WO2017134925A1 - Procédé de fabrication de tranche, et tranche - Google Patents

Procédé de fabrication de tranche, et tranche Download PDF

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Publication number
WO2017134925A1
WO2017134925A1 PCT/JP2016/086455 JP2016086455W WO2017134925A1 WO 2017134925 A1 WO2017134925 A1 WO 2017134925A1 JP 2016086455 W JP2016086455 W JP 2016086455W WO 2017134925 A1 WO2017134925 A1 WO 2017134925A1
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WO
WIPO (PCT)
Prior art keywords
wafer
resin layer
resin
grinding
manufacturing
Prior art date
Application number
PCT/JP2016/086455
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English (en)
Japanese (ja)
Inventor
田中　利幸
友裕 橋井
中島　亮
Original Assignee
株式会社Sumco
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社Sumco filed Critical 株式会社Sumco
Priority to CN201680081011.4A priority Critical patent/CN108885981B/zh
Publication of WO2017134925A1 publication Critical patent/WO2017134925A1/fr

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B7/00—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor
    • B24B7/04—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor involving a rotary work-table
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B7/00—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor
    • B24B7/20—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground
    • B24B7/22—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting

Definitions

  • the present invention relates to a wafer manufacturing method and a wafer.
  • a curable resin is applied to one surface of the wafer, and the curable resin is processed flat and cured. Then, hold the flat surface of the curable resin and grind the other surface of the wafer, hold the other flat surface after removing the curable resin or without removing the one surface of the wafer Grind.
  • the technique may be referred to as “resin pasting”.
  • Patent Document 1 discloses that a curable resin having a thickness of 40 ⁇ m or more and less than 300 ⁇ m is applied.
  • Patent Document 2 discloses that a curable resin having specific characteristics is applied in a thickness of 10 ⁇ m to 200 ⁇ m.
  • Patent Document 3 one surface of a wafer is sucked and held to correct waviness of the wafer, and after grinding the other surface, the other surface is sucked and held to grind one surface. It is disclosed that an equivalent grinding distortion is formed, and thereafter resin pasting is performed.
  • Patent Document 4 discloses that resin pasting grinding is repeatedly performed.
  • JP 2006-269976 A JP 2009-272557 A JP 2011-249652 A Japanese Patent Laying-Open No. 2015-8247
  • An object of the present invention is to provide a wafer manufacturing method and a wafer that can be flattened without lowering the manufacturing efficiency and without affecting the manufacturing of semiconductor devices even when the waviness of the wafer is large. .
  • the method for producing a wafer according to the present invention includes a resin layer forming step of forming a resin layer by applying a curable resin to one surface of a wafer cut from a single crystal ingot or a lapped wafer, and through the resin layer.
  • T Thickness of the thickest part in the resin layer
  • the undulation of one surface is caused by the resin layer having a thickness based on the above formula (1).
  • the resin layer forming step forms the resin layer so as to satisfy the following formula (2). T / X ⁇ 230 (2)
  • the resin layer is too thick and does not satisfy the above formula (2), the resin layer is elastically deformed during the first surface grinding process, and the swell of the other surface may not be sufficiently removed. . Further, even in the second surface grinding step performed by holding the other surface from which the undulation has not been sufficiently removed, there is a possibility that the undulation of the one surface cannot be sufficiently removed. According to the present invention, since the resin layer having an appropriate thickness is formed so as to satisfy the above formula (2), it is possible to suppress the resin layer from being elastically deformed during the first surface grinding process, The surface can be a flat surface from which the undulation has been sufficiently removed. Further, in the subsequent second surface grinding step, one surface can be made a flat surface from which the undulation is sufficiently removed. Therefore, a wafer with high flatness can be obtained with certainty.
  • the wafer of the present invention is characterized in that the amplitude of the undulation having a wavelength of 10 mm or more and 100 mm or less is less than 0.5 ⁇ m.
  • the amplitude of the waviness of the wavelength affecting semiconductor device manufacturing is less than 0.5 ⁇ m, it is possible to provide a wafer that does not affect semiconductor device manufacturing.
  • the wafer of the present invention has a maximum surface shape of 1.2 nm / mm 2 or less at a 10 mm ⁇ 10 mm site when the surface shape is measured in the high order shape mode of the flatness measuring device Wafersight 2 (manufactured by KLA-Tencor). It is characterized by being.
  • Shape Curve is an index representing the warpage of a wafer, and the curvature of an approximate surface approximated by a quadratic order with respect to a surface divided into a designated site size (in the present invention, 10 mm ⁇ 10 mm). To express. For this reason, the larger the shape curvature, the greater the waviness of the wafer. According to the present invention, since the maximum value of Shape Curve at a 10 mm ⁇ 10 mm site is 1.2 nm / mm 2 or less, a wafer capable of appropriately manufacturing a semiconductor device can be provided.
  • a single crystal ingot such as silicon, SiC, GaAs, or sapphire is cut with a wire saw to obtain a plurality of wafers ( Step S1: Slicing step).
  • steps S1: Slicing step both surfaces of the wafer are simultaneously planarized by a lapping apparatus (step S2: lapping process) and chamfered (step S3: chamfering process).
  • a resin layer forming step in which a curable resin is applied to one surface W1 of the wafer W to form a resin layer R (see FIG. 2B);
  • a first surface grinding step step S5 for holding one surface W1 and surface grinding the other surface W2 of the wafer W, a resin layer removing step (step S6) for removing the resin layer R, and the other
  • a second surface grinding step step S7 for holding the surface W2 and surface grinding one surface W1 is performed.
  • the surface shapes of one surface W1 and the other surface W2 are measured, and the maximum amplitude X of the undulation W11 having a wavelength of 10 mm to 100 mm and the in-plane thickness variation of the wafer W (TTV). : Total Thickness Variation) V. Since the swell W11 and the swell W21 are substantially symmetrical, their maximum amplitudes are almost the same.
  • the thickness of the resin layer R that satisfies the following formula (1) is obtained. T / X> 30 (1)
  • T Thickness of the thickest part in the resin layer R At this time, it is preferable that the thickness of the resin layer R satisfies the following formula (2).
  • the machining allowance minimum value P of the other surface W2 in the 1st, 2nd surface grinding process and one surface W1 is calculated
  • P X + V (3)
  • the maximum amplitude X and the in-plane thickness variation V may be used as long as they can be estimated from the ingot slicing conditions and the measurement results of the wafers W in the same lot.
  • the resin layer R is formed using the holding press apparatus 10 as shown to FIG. 2B.
  • a curable resin to be the resin layer R is dropped on the highly flattened flat plate 11.
  • the holding means 12 sucks and holds the other surface W2 of the wafer W by the holding surface 121.
  • the holding means 12 is lowered, and one surface W1 of the wafer W is pressed against the curable resin as indicated by a two-dot chain line in FIG. 2B. Thereafter, the pressure applied to the wafer W by the holding means 12 is released, and the curable resin is cured on the one surface W1 without causing the wafer W to be elastically deformed.
  • the surface opposite to the surface in contact with one surface W1 becomes the flat surface R1, and the resin layer R in which the thickness of the thickest portion satisfies the above formulas (1) and (2) is obtained. It is formed.
  • the curable resin is dropped by dropping the curable resin on one surface W1 with the one surface W1 facing upward, and rotating the wafer W.
  • One side by spin coating method that spreads resin over one side W1 the screen printing method by placing a screen plate on one side W1, placing a curable resin on the screen plate, and applying with a squeegee, electric spray deposition method
  • a method of pressing the flattened flat plate 11 against the curable resin after applying the curable resin by a method such as spraying on the entire surface of W1 can be applied.
  • the curable resin is preferably a curable resin such as a thermosetting resin, a thermoreversible resin, or a photosensitive resin in terms of ease of peeling after processing.
  • the photosensitive resin is also preferable in that stress due to heat is not applied.
  • a UV curable resin is used as the curable resin.
  • Other specific curable resin materials include synthetic rubber and adhesives (wax, etc.).
  • the other surface W2 is surface ground using a surface grinding device 20 as shown in FIG. 2C.
  • a surface grinding device 20 As shown in FIG. 2C, First, when the wafer W is placed on the highly flattened holding surface 211 of the vacuum chuck table 21 with the flat surface R1 facing downward, the vacuum chuck table 21 sucks and holds the wafer W.
  • the surface plate 23 provided with the grindstone 22 on the lower surface is moved above the wafer W.
  • the vacuum chuck table 21 is rotated, and as shown by a two-dot chain line in FIG. 2C, the grindstone 22 and the other surface W2 are brought into contact with each other.
  • Surface grinding When the machining allowance is equal to or greater than the machining allowance minimum value P, the surface grinding is finished.
  • the other surface W2 becomes a flat surface from which the undulation is sufficiently removed.
  • the resin layer R formed on one surface W1 of the wafer W is peeled off from the wafer W as shown in FIG. 3A.
  • the resin layer R may be removed chemically using a solvent.
  • one surface W1 is surface ground using the same surface grinding device 20 as in the first surface grinding step.
  • the vacuum chuck table 21 sucks and holds the wafer W, as shown by a solid line in FIG. 3B.
  • the surface plate 23 moved above the wafer W is lowered while being rotated, and the vacuum chuck table 21 is rotated, so that one surface W1 is surface ground as indicated by a two-dot chain line in FIG. 3B.
  • the machining allowance is equal to or greater than the machining allowance minimum value P, the surface grinding is finished, so that one surface W1 becomes a flat surface from which the undulation is sufficiently removed.
  • a wafer W in which one surface W1 and the other surface W2 are highly planarized is obtained.
  • the obtained wafer W has a wave amplitude of less than 0.5 ⁇ m with a wavelength of 10 mm or more and 100 mm or less, and when measured in the High Order Shape mode of the flatness measuring device Wafersight 2, a Shape at a 10 mm ⁇ 10 mm site is used.
  • the maximum value of Curve (hereinafter simply referred to as “Shape Curve”) is 1.2 nm / mm 2 or less.
  • etching is performed in order to remove a work-affected layer that occurs during chamfering or resin pasting grinding and remains on the wafer W (step S8: etching process).
  • mirror polishing including a primary polishing step (step S9) for polishing both surfaces of the wafer W using a double-side polishing device and a final polishing step (step S10) for polishing both surfaces of the wafer W using a single-side polishing device.
  • a process is performed and the manufacturing method of a wafer is complete
  • the wafer W having the above-described characteristics can be obtained.
  • the resin layer R may be removed by grinding in the second surface grinding step as the resin layer removing step, instead of peeling off.
  • the slicing step shown in FIG. 1 was performed to prepare a wafer having a diameter of 300 mm and a thickness of about 900 ⁇ m.
  • a lapping process and a chamfering process were performed on these wafers.
  • lapping was performed with slurry containing alumina abrasive grains without using a polishing cloth, using a lapping apparatus (HAMAI32BN) manufactured by Hamai Sangyo Co., Ltd.
  • the shape of one surface of the wafer is measured and frequency analysis is performed, so that the wavelength after the lapping process is 10 mm or more and 100 mm.
  • the maximum amplitude X of the following swell was determined. As shown in Table 1, the maximum amplitude X was 0.9 ⁇ m.
  • the resin pasting grinding process was performed.
  • a resin layer was formed by applying a UV curable resin and curing it by UV irradiation.
  • the thickness T of the thickest part of the resin layer was 80 ⁇ m, and T / X was 88.9 satisfying the above formula (1).
  • thickness T measured the thickness of the wafer before resin pasting, and the total thickness of the wafer after resin pasting, and resin using the linear gauge (LGF) by Mitutoyo Corporation, from these differences Asked.
  • LGF linear gauge
  • the 1st surface grinding process, the resin layer removal process, and the 2nd surface grinding process were performed.
  • surface grinding was performed using a disco grinding machine (DFG8360) with a machining allowance of 20 ⁇ m. Then, the etching process to the mirror polishing process was performed.
  • Example 2 a slicing process was performed to prepare a wafer having a diameter of 300 mm and a thickness of about 900 ⁇ m. As shown in Table 1, the maximum amplitude X of the undulation having a wavelength of 10 mm or more and 100 mm or less after the slicing step was 1.5 ⁇ m. Then, without performing the lapping step, as shown in Table 1, under the same conditions as in Example 1 except that a resin layer having T / X of 53.3 satisfying the above formula (1) was formed. The process from the resin pasting grinding process to the mirror polishing process was performed.
  • Example 1 is the same as Example 1 except that only the first and second surface grinding steps of the resin pasting grinding step are performed instead of the resin pasting grinding step. From the slicing process to the mirror polishing process were performed under the same conditions. The machining allowance in the first and second surface grinding steps was 20 ⁇ m.
  • R resin layer, W ... wafer, W1 ... one side, W2 ... the other side.

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  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Grinding Of Cylindrical And Plane Surfaces (AREA)

Abstract

L'invention concerne un procédé comprenant une étape de formation de couche de résine consistant à former une couche de résine (R) sur une surface (W1) d'une tranche (W) ; une étape de meulage de première surface à laquelle ladite surface (W1) est maintenue et une autre surface (W2) est soumise à un meulage de surface avec la couche de résine (R) intercalée ; une étape d'élimination de couche de résine consistant à éliminer la couche de résine (R) ; et une étape de meulage de seconde surface à laquelle l'autre surface (W2) est maintenue, et ladite surface (W1) est soumise à un meulage de surface. À l'étape de formation de couche de résine, la couche de résine (R) est formée de manière à satisfaire la formule 1 ci-dessous. T/X > 30 (1) (dans laquelle X est l'amplitude maximale d'ondulations dont la longueur d'onde sur la tranche est comprise entre 10 et 100 mm compris, et T est l'épaisseur de la partie la plus épaisse de la couche de résine).
PCT/JP2016/086455 2016-02-03 2016-12-07 Procédé de fabrication de tranche, et tranche WO2017134925A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201680081011.4A CN108885981B (zh) 2016-02-03 2016-12-07 晶圆的制造方法及晶圆

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JP2016-019071 2016-02-03
JP2016019071A JP6500796B2 (ja) 2016-02-03 2016-02-03 ウェーハの製造方法

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019163017A1 (fr) * 2018-02-21 2019-08-29 株式会社Sumco Procédé de production de tranches
WO2020039802A1 (fr) * 2018-08-23 2020-02-27 東京エレクトロン株式会社 Système de traitement de substrat et procédé de traitement de substrat
EP4029669A1 (fr) * 2021-01-14 2022-07-20 SENIC Inc. Procédé de fabrication d'une tranche de carbure de silicium, tranche de carbure de silicium et système de fabrication de tranche

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7088125B2 (ja) * 2019-05-14 2022-06-21 信越半導体株式会社 被覆物の厚さ測定方法及び研削方法

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Publication number Priority date Publication date Assignee Title
JP2006269761A (ja) * 2005-03-24 2006-10-05 Disco Abrasive Syst Ltd ウェハの製造方法
JP2009272557A (ja) * 2008-05-09 2009-11-19 Disco Abrasive Syst Ltd ウェーハの製造方法及び製造装置、並びに硬化性樹脂組成物
WO2014129304A1 (fr) * 2013-02-19 2014-08-28 株式会社Sumco Procédé de traitement de tranche de semi-conducteur
JP2015008247A (ja) * 2013-06-26 2015-01-15 株式会社Sumco 半導体ウェーハの加工プロセス

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5524716B2 (ja) * 2010-05-28 2014-06-18 株式会社ディスコ ウェーハの平坦加工方法
JP5917850B2 (ja) * 2011-08-01 2016-05-18 株式会社ディスコ ウエーハの加工方法
JP2015230964A (ja) * 2014-06-05 2015-12-21 株式会社ディスコ ウエーハの加工方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006269761A (ja) * 2005-03-24 2006-10-05 Disco Abrasive Syst Ltd ウェハの製造方法
JP2009272557A (ja) * 2008-05-09 2009-11-19 Disco Abrasive Syst Ltd ウェーハの製造方法及び製造装置、並びに硬化性樹脂組成物
WO2014129304A1 (fr) * 2013-02-19 2014-08-28 株式会社Sumco Procédé de traitement de tranche de semi-conducteur
JP2015008247A (ja) * 2013-06-26 2015-01-15 株式会社Sumco 半導体ウェーハの加工プロセス

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019163017A1 (fr) * 2018-02-21 2019-08-29 株式会社Sumco Procédé de production de tranches
CN111758152A (zh) * 2018-02-21 2020-10-09 胜高股份有限公司 晶片的制造方法
JPWO2019163017A1 (ja) * 2018-02-21 2021-02-04 株式会社Sumco ウェーハの製造方法
CN111758152B (zh) * 2018-02-21 2023-10-31 胜高股份有限公司 晶片的制造方法
US11948789B2 (en) 2018-02-21 2024-04-02 Sumco Corporation Wafer production method
WO2020039802A1 (fr) * 2018-08-23 2020-02-27 東京エレクトロン株式会社 Système de traitement de substrat et procédé de traitement de substrat
JPWO2020039802A1 (ja) * 2018-08-23 2021-08-10 東京エレクトロン株式会社 基板処理システムおよび基板処理方法
JP7080330B2 (ja) 2018-08-23 2022-06-03 東京エレクトロン株式会社 基板処理システムおよび基板処理方法
EP4029669A1 (fr) * 2021-01-14 2022-07-20 SENIC Inc. Procédé de fabrication d'une tranche de carbure de silicium, tranche de carbure de silicium et système de fabrication de tranche
US11969917B2 (en) 2021-01-14 2024-04-30 Senic Inc. Manufacturing method of silicon carbide wafer, silicon carbide wafer and system for manufacturing wafer

Also Published As

Publication number Publication date
JP2017139323A (ja) 2017-08-10
CN108885981A (zh) 2018-11-23
JP6500796B2 (ja) 2019-04-17
CN108885981B (zh) 2023-06-02
TW201740449A (zh) 2017-11-16

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