WO2017128474A1 - 像素补偿电路、方法及平面显示装置 - Google Patents

像素补偿电路、方法及平面显示装置 Download PDF

Info

Publication number
WO2017128474A1
WO2017128474A1 PCT/CN2016/074633 CN2016074633W WO2017128474A1 WO 2017128474 A1 WO2017128474 A1 WO 2017128474A1 CN 2016074633 W CN2016074633 W CN 2016074633W WO 2017128474 A1 WO2017128474 A1 WO 2017128474A1
Authority
WO
WIPO (PCT)
Prior art keywords
switch
controllable switch
voltage
controllable
storage capacitor
Prior art date
Application number
PCT/CN2016/074633
Other languages
English (en)
French (fr)
Inventor
吴小玲
Original Assignee
深圳市华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to US15/023,405 priority Critical patent/US9892685B2/en
Publication of WO2017128474A1 publication Critical patent/WO2017128474A1/zh

Links

Images

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G09G3/3241Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
    • G09G3/325Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/007Use of pixel shift techniques, e.g. by mechanical shift of the physical pixels or by optical shift of the perceived pixels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266Details of drivers for scan electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/04Maintaining the quality of display appearance
    • G09G2320/043Preventing or counteracting the effects of ageing
    • G09G2320/045Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a pixel compensation circuit, method, and flat display device.
  • the current Organic Light Emitting Diode (OLED) display has the advantages of small size, simple structure, autonomous illumination, high brightness, large viewing angle, and short response time, and has attracted wide attention.
  • the existing organic light emitting diode display there is a transistor as a driving transistor for controlling the current passing through the organic light emitting diode OLED, so the importance of the threshold voltage of the driving transistor is very obvious, and the positive or negative drift of the threshold voltage will be Therefore, different currents pass through the organic light emitting diode under the same data signal, and current transistors in the process of use, such as illumination in the oxide semiconductor, voltage stress of the source and drain electrodes, etc., may cause the threshold voltage to drift, resulting in organic light emission.
  • the current of the diode is unstable, which causes the panel brightness to be uneven.
  • the technical problem to be solved by the present invention is to provide a pixel compensation circuit, a method and a flat display device, so as to avoid the instability of the current of the organic light emitting diode caused by the threshold voltage drift, thereby achieving uniform display of the brightness of the panel.
  • a technical solution adopted by the present invention is to provide a pixel compensation circuit, including:
  • the first controllable switch includes a control end, a first end, and a second end, and the control end of the first controllable switch is connected to a first scan line, the first controllable switch The first end is connected to a data line to receive a data voltage from the data line;
  • the storage capacitor includes a first end and a second end, and the first end of the storage capacitor is connected to the second end of the first controllable switch;
  • a driving switch the driving switch, the first end and the second end, the control end of the driving switch is connected to the second end of the storage capacitor, and the first end of the driving switch is connected to a voltage end;
  • the second controllable switch includes a control end, a first end and a second end, wherein the control end of the second controllable switch is connected to a second scan line, and the second controllable switch The first end is connected to the control end of the driving switch, and the second end of the second controllable switch is connected to the second end of the driving switch;
  • the third controllable switch includes a control end, a first end and a second end, wherein the control end of the third controllable switch is connected to a third scan line, and the third controllable switch The first end is connected to the second end of the driving switch;
  • An organic light emitting diode includes an anode and a cathode, an anode of the organic light emitting diode is connected to a second end of the third controllable switch, and a cathode of the organic light emitting diode is grounded.
  • the driving switch, the first controllable switch to the third controllable switch are all NMOS type thin film transistors or all PMOS type thin film transistors or NMOS type thin film transistors and PMOS type thin film transistors,
  • the control switch, the first controllable switch to the control end, the first end and the second end of the third controllable switch respectively correspond to a gate, a drain and a source of the thin film transistor.
  • a pixel compensation method including:
  • the driving switch, the first to third controllable switches are all turned on, and the voltage across the storage capacitor is reset, and the voltage Va of the first end of the storage capacitor is equal to a reference voltage Vref, and the storage capacitor
  • the voltage Vb of the second terminal is equal to the sum of the voltage VDD outputted by the voltage terminal and the threshold voltage Vth of the driving switch;
  • the driving switch, the first and second controllable switches are all turned on, the third controllable switch is turned off, the storage capacitor is charged, and the voltage Va of the first end of the storage capacitor Equal to the data voltage Vdata output by the data line, the voltage Vb of the second end of the storage capacitor is equal to the sum of the voltage VDD outputted by the voltage terminal and the threshold voltage Vth of the driving switch;
  • the driving switch is turned on, the first to third controllable switches are all turned off, and the voltage across the storage capacitor is maintained in the sample phase;
  • the driving switch, the first controllable switch, and the third controllable switch are all NMOS
  • the thin film transistor is either a PMOS type thin film transistor or an NMOS type thin film transistor and a PMOS type thin film transistor, the driving switch, the first controllable switch to the control end of the third controllable switch, and the first end And the second end corresponds to a gate, a drain and a source of the thin film transistor, respectively.
  • the flat display device includes a scan driving circuit, the scan driving circuit includes a pixel compensation circuit, and the pixel compensation circuit includes:
  • the first controllable switch includes a control end, a first end, and a second end, and the control end of the first controllable switch is connected to a first scan line, the first controllable switch The first end is connected to a data line;
  • the storage capacitor includes a first end and a second end, and the first end of the storage capacitor is connected to the second end of the first controllable switch;
  • a driving switch the driving switch, the first end and the second end, the control end of the driving switch is connected to the second end of the storage capacitor, and the first end of the driving switch is connected to a voltage end;
  • the second controllable switch includes a control end, a first end and a second end, wherein the control end of the second controllable switch is connected to a second scan line, and the second controllable switch The first end is connected to the control end of the driving switch, and the second end of the second controllable switch is connected to the second end of the driving switch;
  • the third controllable switch includes a control end, a first end and a second end, wherein the control end of the third controllable switch is connected to a third scan line, and the third controllable switch The first end is connected to the second end of the driving switch;
  • An organic light emitting diode includes an anode and a cathode, an anode of the organic light emitting diode is connected to a second end of the third controllable switch, and a cathode of the organic light emitting diode is grounded.
  • the driving switch, the first controllable switch to the third controllable switch are all NMOS type thin film transistors or all PMOS type thin film transistors or NMOS type thin film transistors and PMOS type thin film transistors,
  • the control switch, the first controllable switch to the control end, the first end and the second end of the third controllable switch respectively correspond to a gate, a drain and a source of the thin film transistor.
  • the flat display device is an OLED or an LCD.
  • the beneficial effects of the present invention are: different from the prior art, the pixel compensation circuit and method of the present invention act to drive a transistor by using a plurality of thin film transistors in combination, thereby avoiding threshold voltage drift of the driving transistor.
  • the current of the organic light emitting diode is unstable, thereby achieving uniform display of panel brightness.
  • FIG. 1 is a schematic structural view of a pixel compensation circuit of the present invention
  • FIG. 2 is a waveform diagram of a pixel compensation circuit of the present invention.
  • FIG. 3 is a simulation result diagram of a pixel compensation circuit of the present invention.
  • Figure 4 is a schematic view of a scan driving circuit of the present invention.
  • Figure 5 is a schematic illustration of a flat display device of the present invention.
  • FIG. 1 is a schematic structural diagram of a pixel compensation circuit of the present invention.
  • the pixel compensation circuit of the present invention includes a first controllable switch T1, and the first controllable switch T1 includes a control end, a first end and a second end, and the first controllable switch T1
  • the control terminal is connected to a first scan line S2, the first end of the first controllable switch T1 is connected to a data line Data to receive a data voltage Vdata from the data line Data;
  • the storage capacitor C1 includes a first end and a second end, and the first end of the storage capacitor C1 is connected to the second end of the first controllable switch T1;
  • the driving switch T0 includes a control end, a first end and a second end, the control end of the driving switch T0 is connected to the second end of the storage capacitor C1, and the first end of the driving switch T0 is connected a voltage terminal VDD1;
  • the second controllable switch T2 includes a control end, a first end and a second end, and a control end of the second controllable switch T2 is coupled to a second scan line S1, the second The first end of the control switch T2 is connected to the control end of the drive switch T0, and the second end of the second controllable switch T2 is connected to the second end of the drive switch T0;
  • the third controllable switch T3, the third controllable switch T3 includes a control end, a first end and a second end, and the control end of the third controllable switch T3 is connected to a third scan line S3, the third a first end of the controllable switch T3 is coupled to the second end of the drive switch T0; and
  • the organic light emitting diode D1 includes an anode and a cathode, an anode of the organic light emitting diode D1 is connected to a second end of the third controllable switch T3, and a cathode of the organic light emitting diode D1 is grounded.
  • the driving switch T0, the first controllable switch to the third controllable switch T1-T3 are all NMOS type thin film transistors or both PMOS type thin film transistors or NMOS type thin film transistors and PMOS type thin film transistor combination, the driving switch T0, the first controllable switch T1 to the The control terminal, the first terminal and the second terminal of the third controllable switch T3 respectively correspond to the gate, the drain and the source of the thin film transistor.
  • FIG. 2 is a waveform diagram of the pixel compensation circuit of the above embodiment of the present invention.
  • Fig. 3 is a view showing a simulation result of the pixel compensation circuit of the above embodiment of the present invention.
  • the working principle of the pixel compensation circuit obtained according to FIG. 1 to FIG. 3 is as follows (ie, the pixel compensation method):
  • the driving switch T0 and the first to third controllable switches T1-T3 are both turned on, the voltage across the storage capacitor C1 is reset, and the voltage Va of the first end of the storage capacitor C1 is equal to a reference voltage Vref.
  • the voltage Vb of the second end of the storage capacitor C1 is equal to the sum of the voltage VDD outputted by the voltage terminal VDD1 and the threshold voltage Vth of the driving switch T0;
  • the driving switch T0, the first and second controllable switches T1 and T2 are both turned on, the third controllable switch T3 is turned off, the storage capacitor C1 is charged, and the storage capacitor C1
  • the voltage Va of the first terminal is equal to the data voltage Vdata output by the data line Data
  • the voltage Vb of the second terminal of the storage capacitor C1 is equal to the sum of the voltage VDD output by the voltage terminal VDD1 and the threshold voltage Vth of the driving switch T0. ;
  • the driving switch T0 is turned on, the first to third controllable switches T1-T3 are all turned off, and the voltage across the storage capacitor C1 is maintained in the sample stage;
  • the second controllable switch T2 is turned off, the driving switch T0, the first and third controllable switches T1 and T3 are both turned on, and the voltage of the first end of the storage capacitor C1 is turned on. Va is equal to the reference voltage Vref. Because of the coupling of the storage capacitor C1, the voltage Vb of the second end of the storage capacitor C1 satisfies the following relationship:
  • Vb VDD+Vth+Vref-Vdata (Equation 1)
  • is an electron mobility
  • Cox is a thin film transistor insulating layer capacitance per unit area
  • L and W are effective channel lengths and widths of the driving switch T0, respectively.
  • the pixel compensation circuit prevents the threshold voltage Vth of the driving switch T0 from drifting to cause the current of the organic light emitting diode D1 to be unstable, thereby achieving uniform display of panel brightness.
  • FIG. 4 is a schematic diagram of a scan driving circuit of the present invention.
  • the scan driving circuit includes the pixel compensation circuit for preventing a threshold voltage drift of the driving transistor in the scan driving circuit, thereby causing unevenness of panel brightness display.
  • FIG. 5 is a schematic diagram of a flat display device according to the present invention.
  • the flat display device may be, for example, an OLED or an LCD including the scan drive circuit and the pixel compensation circuit, and the scan drive circuit having the pixel compensation circuit is disposed at the periphery of the flat display device, for example, disposed on the flat display device. Both ends.
  • the pixel compensation circuit and method act as a driving transistor by using a plurality of thin film transistors in combination, thereby preventing the threshold voltage drift of the driving transistor from causing instability of current of the organic light emitting diode, thereby achieving uniform display of panel brightness.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of El Displays (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种像素补偿电路、方法及平面显示装置。像素补偿电路包括第一可控开关的(T1)控制端连第一扫描线(S2),第一端连数据线(Data)以接收数据电压(Vdata);第一可控开关(T1)的第二端经存储电容(C1)连驱动开关(T0)的控制端,驱动开关(T0)的第一端连接电压端(VDD1);第二可控开关(T2)的控制端连第二扫描线(S2),第一端连驱动开关(T0)的控制端,第二端连驱动开关(T0)的第二端;第三可控开关(T3)的控制端连第三扫描线(S3),第一端连驱动开关(T0)的第二端;有机发光二极管(D1)阳极连第三可控开关(T3)的第二端,阴极接地,以避免阈值电压(Vth)漂移造成有机发光二极管(D1)的电流不稳定,以此实现面板亮度显示均匀。

Description

像素补偿电路、方法及平面显示装置 【技术领域】
本发明涉及显示技术领域,特别是涉及一种像素补偿电路、方法及平面显示装置。
【背景技术】
目前的有机发光二极管(Organic Light Emitting diode,OLED)显示器具有体积小、结构简单、自主发光、亮度高、可视角度大、响应时间短等优点,吸引了广泛的注意。
现有的有机发光二极管显示器中有一个晶体管作为驱动晶体管用于控制通过有机发光二极管OLED的电流,因此驱动晶体管的阈值电压的重要性便十分明显,所述阈值电压的正向或负向漂移都会使得在相同数据信号下有不同的电流通过有机发光二极管,目前的晶体管在使用过程中如氧化物半导体中的照光、源漏电极电压应力作用等因素,都可能导致阈值电压漂移,造成通过有机发光二极管的电流不稳定,进而引起面板亮度显示不均匀。
【发明内容】
本发明主要解决的技术问题是提供一种像素补偿电路、方法及平面显示装置,以避免阈值电压漂移造成有机发光二极管的电流不稳定,以此实现面板亮度显示均匀。
为解决上述技术问题,本发明采用的一个技术方案是:提供一种像素补偿电路,包括:
第一可控开关,所述的第一可控开关包括控制端、第一端及第二端,所述第一可控开关的控制端连接一第一扫描线,所述第一可控开关的第一端连接一数据线以从所述数据线接收一数据电压;
存储电容,所述存储电容包括第一端及第二端,所述存储电容的第一端连接所述第一可控开关的第二端;
驱动开关,所述驱动开关包括控制端、第一端及第二端,所述驱动开关的控制端连接所述存储电容的第二端,所述驱动开关的第一端连接一电压端;
第二可控开关,所述第二可控开关包括控制端、第一端及第二端,所述第二可控开关的控制端连接一第二扫描线,所述第二可控开关的第一端连接所述驱动开关的控制端,所述第二可控开关的第二端连接所述驱动开关的第二端;
第三可控开关,所述第三可控开关包括控制端、第一端及第二端,所述第三可控开关的控制端连接一第三扫描线,所述第三可控开关的第一端连接所述驱动开关的第二端;及
有机发光二极管,所述有机发光二极管包括阳极及阴极,所述有机发光二极管的阳极连接所述第三可控开关的第二端,所述有机发光二极管的阴极接地。
其中,所述驱动开关、所述第一可控开关至所述第三可控开关均为NMOS型薄膜晶体管或均为PMOS型薄膜晶体管或为NMOS型薄膜晶体管与PMOS型薄膜晶体管组合,所述驱动开关、所述第一可控开关至所述第三可控开关的控制端、第一端及第二端分别对应所述薄膜晶体管的栅极、漏极及源极。
为解决上述技术问题,本发明采用的另一个技术方案是:提供一种像素补偿方法,包括:
在重置阶段,驱动开关、第一至第三可控开关均导通,存储电容两端电压重置,所述存储电容的第一端的电压Va等于一参考电压Vref,所述存储电容的第二端的电压Vb等于电压端输出的电压VDD与所述驱动开关的阈值电压Vth之和;
在样本阶段,所述驱动开关、所述第一及第二可控开关均导通,所述第三可控开关截止,所述存储电容被充电,所述存储电容的第一端的电压Va等于数据线输出的数据电压Vdata,所述存储电容的第二端的电压Vb等于所述电压端输出的电压VDD与所述驱动开关的阈值电压Vth之和;
在获取阶段,所述驱动开关导通,所述第一至第三可控开关均截止,所述存储电容两端的电压维持在样本阶段;
在驱动发光阶段,所述第二可控开关均截止,所述驱动开关、所述第一及第三可控开关均导通,所述存储电容的第一端的电压Va等于所述参考电压Vref,因为所述存储电容的耦合作用,所述存储电容的第二端的电压Vb=VDD+Vth+Vref-Vdata,所述驱动开关的控制端与第二端间的电压Vgs=Vb-VDD=Vref-Vdata+Vth,因此通过所述驱动开关的电流I=K(Vgs-Vth)2=K(Vref-Vdata)2,其中K为系数。
其中,所述驱动开关、所述第一可控开关至所述第三可控开关均为NMOS 型薄膜晶体管或均为PMOS型薄膜晶体管或为NMOS型薄膜晶体管与PMOS型薄膜晶体管组合,所述驱动开关、所述第一可控开关至所述第三可控开关的控制端、第一端及第二端分别对应所述薄膜晶体管的栅极、漏极及源极。
为解决上述技术问题,本发明采用的另一个技术方案是:提供一种平面显示装置,所述平面显示装置包括扫描驱动电路,所述扫描驱动电路包括像素补偿电路,所述像素补偿电路包括:
第一可控开关,所述的第一可控开关包括控制端、第一端及第二端,所述第一可控开关的控制端连接一第一扫描线,所述第一可控开关的第一端连接一数据线;
存储电容,所述存储电容包括第一端及第二端,所述存储电容的第一端连接所述第一可控开关的第二端;
驱动开关,所述驱动开关包括控制端、第一端及第二端,所述驱动开关的控制端连接所述存储电容的第二端,所述驱动开关的第一端连接一电压端;
第二可控开关,所述第二可控开关包括控制端、第一端及第二端,所述第二可控开关的控制端连接一第二扫描线,所述第二可控开关的第一端连接所述驱动开关的控制端,所述第二可控开关的第二端连接所述驱动开关的第二端;
第三可控开关,所述第三可控开关包括控制端、第一端及第二端,所述第三可控开关的控制端连接一第三扫描线,所述第三可控开关的第一端连接所述驱动开关的第二端;及
有机发光二极管,所述有机发光二极管包括阳极及阴极,所述有机发光二极管的阳极连接所述第三可控开关的第二端,所述有机发光二极管的阴极接地。
其中,所述驱动开关、所述第一可控开关至所述第三可控开关均为NMOS型薄膜晶体管或均为PMOS型薄膜晶体管或为NMOS型薄膜晶体管与PMOS型薄膜晶体管组合,所述驱动开关、所述第一可控开关至所述第三可控开关的控制端、第一端及第二端分别对应所述薄膜晶体管的栅极、漏极及源极。
其中,所述平面显示装置为OLED或LCD。
本发明的有益效果是:区别于现有技术的情况,本发明的所述像素补偿电路及方法通过组合使用多个薄膜晶体管来作用驱动晶体管,以此来避免所述驱动晶体管的阈值电压漂移造成所述有机发光二极管的电流不稳定,以此实现面板亮度显示均匀。
【附图说明】
图1是本发明的像素补偿电路的结构示意图;
图2是本发明的像素补偿电路的波形图;
图3是本发明的像素补偿电路的模拟结果图;
图4是本发明的扫描驱动电路的示意图;
图5是本发明的平面显示装置的示意图。
【具体实施方式】
请参阅图1,是本发明的像素补偿电路的结构示意图。如图1所示,本发明的像素补偿电路包括第一可控开关T1,所述的第一可控开关T1包括控制端、第一端及第二端,所述第一可控开关T1的控制端连接一第一扫描线S2,所述第一可控开关T1的第一端连接一数据线Data以从所述数据线Data接收一数据电压Vdata;
存储电容C1,所述存储电容C1包括第一端及第二端,所述存储电容C1的第一端连接所述第一可控开关T1的第二端;
驱动开关T0,所述驱动开关T0包括控制端、第一端及第二端,所述驱动开关T0的控制端连接所述存储电容C1的第二端,所述驱动开关T0的第一端连接一电压端VDD1;
第二可控开关T2,所述第二可控开关T2包括控制端、第一端及第二端,所述第二可控开关T2的控制端连接一第二扫描线S1,所述第二可控开关T2的第一端连接所述驱动开关T0的控制端,所述第二可控开关T2的第二端连接所述驱动开关T0的第二端;
第三可控开关T3,所述第三可控开关T3包括控制端、第一端及第二端,所述第三可控开关T3的控制端连接一第三扫描线S3,所述第三可控开关T3的第一端连接所述驱动开关T0的第二端;及
有机发光二极管D1,所述有机发光二极管D1包括阳极及阴极,所述有机发光二极管D1的阳极连接所述第三可控开关T3的第二端,所述有机发光二极管D1的阴极接地。
在本实施例中,所述驱动开关T0、所述第一可控开关至所述第三可控开关T1-T3均为NMOS型薄膜晶体管或均为PMOS型薄膜晶体管或为NMOS型薄膜晶体管与PMOS型薄膜晶体管组合,所述驱动开关T0、第一可控开关T1至所 述第三可控开关T3的控制端、第一端及第二端分别对应所述薄膜晶体管的栅极、漏极及源极。
请参阅图2,是本发明上述实施例的所述像素补偿电路的波形图。图3是本发明上述实施例的所述像素补偿电路的模拟结果图。根据图1至图3获得所述像素补偿电路的工作原理如下(即所述像素补偿方法):
在重置阶段,驱动开关T0、第一至第三可控开关T1-T3均导通,存储电容C1两端电压重置,所述存储电容C1的第一端的电压Va等于一参考电压Vref,所述存储电容C1的第二端的电压Vb等于电压端VDD1输出的电压VDD与所述驱动开关T0的阈值电压Vth之和;
在样本阶段,所述驱动开关T0、所述第一及第二可控开关T1及T2均导通,所述第三可控开关T3截止,所述存储电容C1被充电,所述存储电容C1的第一端的电压Va等于数据线Data输出的数据电压Vdata,所述存储电容C1的第二端的电压Vb等于所述电压端VDD1输出的电压VDD与所述驱动开关T0的阈值电压Vth之和;
在获取阶段,所述驱动开关T0导通,所述第一至第三可控开关T1-T3均截止,所述存储电容C1两端的电压维持在样本阶段;
在驱动发光阶段,所述第二可控开关T2均截止,所述驱动开关T0、所述第一及第三可控开关T1及T3均导通,所述存储电容C1的第一端的电压Va等于所述参考电压Vref,因为所述存储电容C1的耦合作用,所述存储电容C1的第二端的电压Vb满足如下关系:
Vb=VDD+Vth+Vref-Vdata  (公式1)
所述驱动开关T0的控制端与第二端间的电压Vgs满足如下关系:
Vgs=Vb-VDD=Vref-Vdata+Vth  (公式2)
因此通过所述驱动开关T0的电流I满足如下关系:
I=K(Vgs-Vth)2=K(Vref-Vdata)2  (公式3)
其中K为系数且满足如下关系:
K=μCoxW/(2*L)  (公式4)
其中,μ为电子迁移率,Cox为单位面积的薄膜晶体管绝缘层电容;L及W分别为所述驱动开关T0的有效沟道长度及宽度。
由上述公式3及4并结合如下所示的表1可以看出,通过所述有机发光二极管D1的电流与所述驱动开关T0的阈值电压Vth无关。
表1
Figure PCTCN2016074633-appb-000001
因此,所述像素补偿电路避免了所述驱动开关T0的阈值电压Vth漂移造成所述有机发光二极管D1的电流不稳定,以此实现面板亮度显示均匀。
请参阅图4,为本发明一种扫描驱动电路的示意图。所述扫描驱动电路中包括所述像素补偿电路,用于避免所述扫描驱动电路中的驱动晶体管发生阈值电压漂移,从而造成面板亮度显示不均匀。
请参阅图5,为本发明一种平面显示装置的示意图。所述平面显示装置例如可为OLED或LCD,其包括前述的扫描驱动电路及像素补偿电路,所述具有像素补偿电路的扫描驱动电路设置在所述平面显示装置的周边,例如设置在平面显示装置的两端。
所述像素补偿电路及方法通过组合使用多个薄膜晶体管来作用驱动晶体管,以此来避免所述驱动晶体管的阈值电压漂移造成所述有机发光二极管的电流不稳定,以此实现面板亮度显示均匀。
以上仅为本发明的实施方式,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。

Claims (7)

  1. 一种像素补偿电路,其中,所述像素补偿电路包括:
    第一可控开关,所述的第一可控开关包括控制端、第一端及第二端,所述第一可控开关的控制端连接一第一扫描线,所述第一可控开关的第一端连接一数据线以从所述数据线接收一数据电压;
    存储电容,所述存储电容包括第一端及第二端,所述存储电容的第一端连接所述第一可控开关的第二端;
    驱动开关,所述驱动开关包括控制端、第一端及第二端,所述驱动开关的控制端连接所述存储电容的第二端,所述驱动开关的第一端连接一电压端;
    第二可控开关,所述第二可控开关包括控制端、第一端及第二端,所述第二可控开关的控制端连接一第二扫描线,所述第二可控开关的第一端连接所述驱动开关的控制端,所述第二可控开关的第二端连接所述驱动开关的第二端;
    第三可控开关,所述第三可控开关包括控制端、第一端及第二端,所述第三可控开关的控制端连接一第三扫描线,所述第三可控开关的第一端连接所述驱动开关的第二端;及
    有机发光二极管,所述有机发光二极管包括阳极及阴极,所述有机发光二极管的阳极连接所述第三可控开关的第二端,所述有机发光二极管的阴极接地。
  2. 根据权利要求1所述的像素补偿电路,其中,所述驱动开关、所述第一可控开关至所述第三可控开关均为NMOS型薄膜晶体管或均为PMOS型薄膜晶体管或为NMOS型薄膜晶体管与PMOS型薄膜晶体管组合,所述驱动开关、所述第一可控开关至所述第三可控开关的控制端、第一端及第二端分别对应所述薄膜晶体管的栅极、漏极及源极。
  3. 一种像素补偿方法,其中,所述像素补偿方法包括:
    在重置阶段,驱动开关、第一至第三可控开关均导通,存储电容两端电压重置,所述存储电容的第一端的电压Va等于一参考电压Vref,所述存储电容的第二端的电压Vb等于电压端输出的电压VDD与所述驱动开关的阈值电压Vth之和;
    在样本阶段,所述驱动开关、所述第一及第二可控开关均导通,所述第三可控开关截止,所述存储电容被充电,所述存储电容的第一端的电压Va等于数据线输出的数据电压Vdata,所述存储电容的第二端的电压Vb等于所述电压端 输出的电压VDD与所述驱动开关的阈值电压Vth之和;
    在获取阶段,所述驱动开关导通,所述第一至第三可控开关均截止,所述存储电容两端的电压维持在样本阶段;
    在驱动发光阶段,所述第二可控开关均截止,所述驱动开关、所述第一及第三可控开关均导通,所述存储电容的第一端的电压Va等于所述参考电压Vref,因为所述存储电容的耦合作用,所述存储电容的第二端的电压Vb=VDD+Vth+Vref-Vdata,所述驱动开关的控制端与第二端间的电压Vgs=Vb-VDD=Vref-Vdata+Vth,因此通过所述驱动开关的电流I=K(Vgs-Vth)2=K(Vref-Vdata)2,其中K为系数。
  4. 根据权利要求3所述的像素补偿方法,其中,所述驱动开关、所述第一可控开关至所述第三可控开关均为NMOS型薄膜晶体管或均为PMOS型薄膜晶体管或为NMOS型薄膜晶体管与PMOS型薄膜晶体管组合,所述驱动开关、所述第一可控开关至所述第三可控开关的控制端、第一端及第二端分别对应所述薄膜晶体管的栅极、漏极及源极。
  5. 一种平面显示装置,其中,所述平面显示装置包括扫描驱动电路,所述扫描驱动电路包括像素补偿电路,所述像素补偿电路包括:
    第一可控开关,所述的第一可控开关包括控制端、第一端及第二端,所述第一可控开关的控制端连接一第一扫描线,所述第一可控开关的第一端连接一数据线;
    存储电容,所述存储电容包括第一端及第二端,所述存储电容的第一端连接所述第一可控开关的第二端;
    驱动开关,所述驱动开关包括控制端、第一端及第二端,所述驱动开关的控制端连接所述存储电容的第二端,所述驱动开关的第一端连接一电压端;
    第二可控开关,所述第二可控开关包括控制端、第一端及第二端,所述第二可控开关的控制端连接一第二扫描线,所述第二可控开关的第一端连接所述驱动开关的控制端,所述第二可控开关的第二端连接所述驱动开关的第二端;
    第三可控开关,所述第三可控开关包括控制端、第一端及第二端,所述第三可控开关的控制端连接一第三扫描线,所述第三可控开关的第一端连接所述驱动开关的第二端;及
    有机发光二极管,所述有机发光二极管包括阳极及阴极,所述有机发光二极管的阳极连接所述第三可控开关的第二端,所述有机发光二极管的阴极接地。
  6. 根据权利要求5所述的平面显示装置,其中,所述驱动开关、所述第一可控开关至所述第三可控开关均为NMOS型薄膜晶体管或均为PMOS型薄膜晶体管或为NMOS型薄膜晶体管与PMOS型薄膜晶体管组合,所述驱动开关、所述第一可控开关至所述第三可控开关的控制端、第一端及第二端分别对应所述薄膜晶体管的栅极、漏极及源极。
  7. 根据权利要求5所述的平面显示装置,其中,所述平面显示装置为OLED或LCD。
PCT/CN2016/074633 2016-01-29 2016-02-26 像素补偿电路、方法及平面显示装置 WO2017128474A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/023,405 US9892685B2 (en) 2016-01-29 2016-02-26 Pixel compensation circuit, method and flat display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201610064252.X 2016-01-29
CN201610064252.XA CN105528996B (zh) 2016-01-29 2016-01-29 像素补偿电路、方法、扫描驱动电路及平面显示装置

Publications (1)

Publication Number Publication Date
WO2017128474A1 true WO2017128474A1 (zh) 2017-08-03

Family

ID=55771178

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/074633 WO2017128474A1 (zh) 2016-01-29 2016-02-26 像素补偿电路、方法及平面显示装置

Country Status (3)

Country Link
US (1) US9892685B2 (zh)
CN (1) CN105528996B (zh)
WO (1) WO2017128474A1 (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018034944A1 (en) * 2016-08-16 2018-02-22 Apple Inc. Organic light-emitting diode display with external compensation
CN107731149B (zh) 2017-11-01 2023-04-11 北京京东方显示技术有限公司 显示面板的驱动方法、驱动电路、显示面板和显示装置
CN110675814B (zh) * 2019-09-12 2021-02-26 深圳市华星光电半导体显示技术有限公司 一种oled像素补偿电路及像素电路
US11442572B2 (en) 2019-10-17 2022-09-13 Samsung Electronics Co., Ltd. Touch display controller and touch display system including the same
WO2021114251A1 (zh) * 2019-12-13 2021-06-17 京东方科技集团股份有限公司 显示基板和显示装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1744180A (zh) * 2004-08-31 2006-03-08 Lg.菲利浦Lcd株式会社 有源矩阵型有机发光二极管器件的驱动电路及其方法
CN102654976A (zh) * 2012-01-12 2012-09-05 京东方科技集团股份有限公司 一种像素电路及其驱动方法
CN102956201A (zh) * 2012-11-08 2013-03-06 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示装置
CN104575369A (zh) * 2013-10-21 2015-04-29 上海和辉光电有限公司 像素驱动电路及显示装置
US9208725B2 (en) * 2012-06-13 2015-12-08 Innolux Corporation Displays with pixel circuits capable of compensating for transistor threshold voltage drift

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI267049B (en) * 2000-05-09 2006-11-21 Sharp Kk Image display device, and electronic apparatus using the same
JP2009276744A (ja) * 2008-02-13 2009-11-26 Toshiba Mobile Display Co Ltd El表示装置
JP5293364B2 (ja) * 2009-04-15 2013-09-18 ソニー株式会社 表示装置および駆動制御方法
KR101383976B1 (ko) * 2010-09-06 2014-04-10 파나소닉 주식회사 표시 장치 및 그 제어 방법
CN103839520B (zh) 2014-02-28 2017-01-18 京东方科技集团股份有限公司 像素电路及其驱动方法、显示面板和显示装置
KR20150138527A (ko) * 2014-05-29 2015-12-10 삼성디스플레이 주식회사 화소 회로 및 이를 포함하는 전계발광 디스플레이 장치
CN105976758B (zh) 2014-06-04 2019-01-22 上海天马有机发光显示技术有限公司 一种有机发光显示器的像素补偿电路及方法
CN104361857A (zh) 2014-11-04 2015-02-18 深圳市华星光电技术有限公司 有机发光显示器像素驱动电路
CN104599635A (zh) * 2015-02-04 2015-05-06 友达光电股份有限公司 主动矩阵有机发光二极管显示器的像素补偿电路

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1744180A (zh) * 2004-08-31 2006-03-08 Lg.菲利浦Lcd株式会社 有源矩阵型有机发光二极管器件的驱动电路及其方法
CN102654976A (zh) * 2012-01-12 2012-09-05 京东方科技集团股份有限公司 一种像素电路及其驱动方法
US9208725B2 (en) * 2012-06-13 2015-12-08 Innolux Corporation Displays with pixel circuits capable of compensating for transistor threshold voltage drift
CN102956201A (zh) * 2012-11-08 2013-03-06 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示装置
CN104575369A (zh) * 2013-10-21 2015-04-29 上海和辉光电有限公司 像素驱动电路及显示装置

Also Published As

Publication number Publication date
CN105528996A (zh) 2016-04-27
US20170330506A1 (en) 2017-11-16
US9892685B2 (en) 2018-02-13
CN105528996B (zh) 2018-04-10

Similar Documents

Publication Publication Date Title
US9812082B2 (en) Pixel circuit, driving method, display panel and display device
WO2017128468A1 (zh) 像素补偿电路、方法及平面显示装置
WO2020211688A1 (zh) 像素驱动电路及方法、显示面板
WO2020062802A1 (zh) 显示面板及像素电路的驱动方法
WO2017128467A1 (zh) 像素补偿电路、方法及平面显示装置
WO2018045667A1 (zh) Amoled像素驱动电路及驱动方法
WO2015188520A1 (zh) 像素驱动电路、驱动方法、阵列基板及显示装置
WO2017008484A1 (zh) 一种像素驱动电路及其驱动方法、显示面板和显示装置
EP3220380A1 (en) Pixel circuit, organic electroluminescence display panel, and display device and driving method therefor
WO2016050021A1 (zh) 一种像素驱动电路及其驱动方法、像素单元、显示装置
KR20190067877A (ko) Amoled 픽셀 구동 회로 및 구동 방법
WO2017117983A1 (zh) 像素补偿电路及amoled显示装置
WO2016155471A1 (zh) 像素电路及其驱动方法、显示装置
WO2016150232A1 (zh) 像素电路及其驱动方法、显示装置
WO2017128474A1 (zh) 像素补偿电路、方法及平面显示装置
WO2016165529A1 (zh) 像素电路及其驱动方法、显示装置
WO2016023311A1 (zh) 像素驱动电路及其驱动方法和显示装置
TW201606738A (zh) 主動式有機發光二極體顯示器的像素電路
WO2015188533A1 (zh) 像素驱动电路、驱动方法、阵列基板及显示装置
WO2017128469A1 (zh) 像素补偿电路、方法及平面显示装置
WO2019085512A1 (zh) 一种像素电路及其驱动方法、显示装置
WO2017045376A1 (zh) 像素电路及其驱动方法、显示面板和显示装置
TWI667645B (zh) 畫素電路及其驅動方法、顯示裝置
WO2018166037A1 (zh) 一种像素驱动电路及oled显示装置
WO2018227963A1 (zh) 像素电路及其驱动方法、阵列基板以及显示装置

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 15023405

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16887358

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16887358

Country of ref document: EP

Kind code of ref document: A1