WO2017128469A1 - 像素补偿电路、方法及平面显示装置 - Google Patents

像素补偿电路、方法及平面显示装置 Download PDF

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Publication number
WO2017128469A1
WO2017128469A1 PCT/CN2016/074557 CN2016074557W WO2017128469A1 WO 2017128469 A1 WO2017128469 A1 WO 2017128469A1 CN 2016074557 W CN2016074557 W CN 2016074557W WO 2017128469 A1 WO2017128469 A1 WO 2017128469A1
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Prior art keywords
switch
controllable switch
driving
voltage
control
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PCT/CN2016/074557
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English (en)
French (fr)
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聂诚磊
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深圳市华星光电技术有限公司
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Priority to US15/028,920 priority Critical patent/US10115340B2/en
Publication of WO2017128469A1 publication Critical patent/WO2017128469A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1251—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a pixel compensation circuit, method, and flat display device.
  • the current Organic Light Emitting Diode (OLED) display has the advantages of small size, simple structure, autonomous illumination, high brightness, large viewing angle, and short response time, and has attracted wide attention.
  • the existing organic light emitting diode display there is a transistor as a driving transistor for controlling the current passing through the organic light emitting diode OLED, so the importance of the threshold voltage of the driving transistor is very obvious, and the positive or negative drift of the threshold voltage will be Therefore, different currents pass through the organic light emitting diode under the same data signal, and current transistors in the process of use, such as illumination in the oxide semiconductor, voltage stress of the source and drain electrodes, etc., may cause the threshold voltage to drift, resulting in organic light emission.
  • the current of the diode is unstable, which causes the panel brightness to be uneven.
  • the technical problem to be solved by the present invention is to provide a pixel compensation circuit, a method and a flat display device, so as to avoid the instability of the current of the organic light emitting diode caused by the threshold voltage drift, thereby achieving uniform display of the brightness of the panel.
  • a technical solution adopted by the present invention is to provide a pixel compensation circuit, including:
  • the driving switch includes a first control end, a second control end, a first end, and a second end, and the first control end of the driving switch is connected to a reference voltage end for receiving the reference voltage end output Reference voltage
  • the first controllable switch includes a control end, a first end, and a second end, wherein the control end of the first controllable switch is connected to a first scan line, and the first controllable switch The first end is connected to a first voltage end for receiving the first voltage outputted by the first voltage end, and the second end of the first controllable switch is connected to the first end of the driving switch;
  • the second controllable switch includes a control end, a first end and a second end, wherein the control end of the second controllable switch is connected to a second scan line, and the second controllable switch The first end is connected to the second end of the driving switch;
  • An organic light emitting diode comprising an anode and a cathode, an anode of the organic light emitting diode is connected to a second end of the second controllable switch, and a cathode of the organic light emitting diode is grounded;
  • the third controllable switch includes a control end, a first end and a second end, wherein the control end of the third controllable switch is connected to a third scan line, and the third controllable switch The first end is connected to the second end of the first controllable switch and the first end of the driving switch, and the second end of the third controllable switch is connected to the second control end of the driving switch;
  • the storage capacitor includes a first end and a second end, the first end of the storage capacitor is connected to the second control end of the drive switch and the second end of the third controllable switch, the storing The second end of the capacitor is grounded;
  • the fourth controllable switch comprising a control end, a first end and a second end, wherein the control end of the fourth controllable switch is connected to the third scan line, the fourth controllable switch The first end is connected to the second end of the driving switch and the first end of the second controllable switch, and the second end of the fourth controllable switch is connected to a data line for receiving the data line output The second voltage.
  • the driving switch is a double-gate thin film transistor, and the first control end, the second control end, the first end, and the second end of the driving switch respectively correspond to a bottom gate and a top gate of the double-gate thin film transistor , drain and source.
  • the first controllable switch to the fourth controllable switch are all NMOS type thin film transistors, and the first controllable switch to the control end, the first end and the second end of the fourth controllable switch Corresponding to the gate, drain and source of the NMOS thin film transistor, respectively.
  • a pixel compensation method including:
  • the driving switch, the first controllable switch, the third controllable switch and the fourth controllable switch are both turned on, the second controllable switch is turned off, the second control end of the driving switch and the driving switch The first end is connected, and the voltage of the second control end of the driving switch is equal to the voltage of the first end of the driving switch and is the first voltage, because the first controllable switch is turned on, The voltage of the first control terminal of the driving switch is equal to the reference voltage, and the voltage of the second terminal of the driving switch is equal to the second voltage because the fourth controllable switch is turned on;
  • the driving switch, the third controllable switch, and the fourth controllable switch are both guided
  • the first controllable switch and the second controllable switch are both turned off, and the threshold voltage of the driving switch is very small, along with the second control end of the driving switch and the first end of the driving switch
  • the voltage between the driving switches is continuously decreased, and the threshold voltage of the driving switch is continuously increased until the difference between the voltage of the first control terminal of the driving switch and the voltage of the second terminal of the driving switch is equal to the threshold of the driving switch
  • the voltage of the second control terminal of the drive switch does not change and is stored in the storage capacitor
  • the driving switch, the first controllable switch and the second controllable switch are both turned on, and the third controllable switch and the fourth controllable switch are both turned off during the programming phase.
  • Obtaining, by the storage capacitor, a voltage of the second control terminal of the driving switch is obtained, so that a threshold voltage of the driving switch is equal to a difference between the reference voltage and the second voltage, and the driving switch is The voltage of the first control terminal is still the reference voltage, and the voltage of the second terminal of the driving switch is a voltage on the organic light emitting diode.
  • the driving switch is a double-gate thin film transistor, and the first control end, the second control end, the first end, and the second end of the driving switch respectively correspond to a bottom gate and a top gate of the double-gate thin film transistor , drain and source.
  • the first controllable switch to the fourth controllable switch are all NMOS type thin film transistors, and the first controllable switch to the control end, the first end and the second end of the fourth controllable switch Corresponding to the gate, drain and source of the NMOS thin film transistor, respectively.
  • the flat display device includes a scan driving circuit, the scan driving circuit includes a pixel compensation circuit, and the pixel compensation circuit includes:
  • the driving switch includes a first control end, a second control end, a first end, and a second end, and the first control end of the driving switch is connected to a reference voltage end for receiving the reference voltage end output Reference voltage
  • the first controllable switch includes a control end, a first end, and a second end, wherein the control end of the first controllable switch is connected to a first scan line, and the first controllable switch The first end is connected to a first voltage end for receiving the first voltage outputted by the first voltage end, and the second end of the first controllable switch is connected to the first end of the driving switch;
  • the second controllable switch includes a control end, a first end and a second end, wherein the control end of the second controllable switch is connected to a second scan line, and the second controllable switch The first end is connected to the second end of the driving switch;
  • An organic light emitting diode comprising an anode and a cathode, the organic light emitting diode An anode of the pole tube is connected to the second end of the second controllable switch, and a cathode of the organic light emitting diode is grounded;
  • the third controllable switch includes a control end, a first end and a second end, wherein the control end of the third controllable switch is connected to a third scan line, and the third controllable switch The first end is connected to the second end of the first controllable switch and the first end of the driving switch, and the second end of the third controllable switch is connected to the second control end of the driving switch;
  • the storage capacitor includes a first end and a second end, the first end of the storage capacitor is connected to the second control end of the drive switch and the second end of the third controllable switch, the storing The second end of the capacitor is grounded;
  • the fourth controllable switch comprising a control end, a first end and a second end, wherein the control end of the fourth controllable switch is connected to the third scan line, the fourth controllable switch The first end is connected to the second end of the driving switch and the first end of the second controllable switch, and the second end of the fourth controllable switch is connected to a data line for receiving the data line output The second voltage.
  • the driving switch is a double-gate thin film transistor, and the first control end, the second control end, the first end, and the second end of the driving switch respectively correspond to a bottom gate and a top gate of the double-gate thin film transistor a drain and a source, the first controllable switch to the fourth controllable switch are NMOS type thin film transistors, the first controllable switch to the control end of the fourth controllable switch, the first The terminal and the second end respectively correspond to a gate, a drain and a source of the NMOS thin film transistor.
  • the pixel compensation circuit and method of the present invention use a double gate thin film transistor as a driving transistor because the voltage of the double gate thin film transistor is affected by the stress of light and illumination.
  • the threshold voltage of the driving transistor can be specified by inputting a preset voltage, and the threshold voltage drift of the driving transistor is not required to be adjusted by adjusting the magnitude of the data signal. Therefore, the stress influence of the driving tube is not increased, thereby avoiding the threshold voltage drift of the driving transistor and causing the current of the organic light emitting diode to be unstable, thereby achieving uniform display of panel brightness.
  • FIG. 1 is a schematic structural view of a pixel compensation circuit of the present invention
  • FIG. 2 is a waveform diagram of a pixel compensation circuit of the present invention.
  • Figure 3 is a schematic view of a scan driving circuit of the present invention.
  • FIG. 4 is a schematic view of a flat display device of the present invention.
  • FIG. 1 is a schematic structural diagram of a pixel compensation circuit of the present invention.
  • the pixel compensation circuit of the present invention includes a driving switch T0.
  • the driving switch T0 includes a first control terminal BG, a second control terminal TG, a first terminal D and a second terminal S, and the driving switch T0.
  • the first control terminal BG is connected to a reference voltage terminal VPRE for receiving the reference voltage V pre output by the reference voltage terminal VPRE;
  • the first controllable switch T1, the first controllable switch T1 includes a control end, a first end and a second end, and the control end of the first controllable switch T1 is connected to a first scan line scan2, the first The first end of the controllable switch T1 is connected to a first voltage terminal VDD1 for receiving the first voltage VDD outputted by the first voltage terminal VDD1, and the second end of the first controllable switch T1 is connected to the driving switch The first end D of T0;
  • the second controllable switch T2 includes a control end, a first end and a second end, and a control end of the second controllable switch T2 is coupled to a second scan line scan3, the second The first end of the controllable switch T2 is connected to the second end S of the drive switch T0;
  • An organic light emitting diode D1 the organic light emitting diode D1 includes an anode and a cathode, an anode of the organic light emitting diode D1 is connected to a second end of the second controllable switch T2, and a cathode of the organic light emitting diode D1 is grounded;
  • the third controllable switch T3 includes a control end, a first end and a second end, and the control end of the third controllable switch T3 is connected to a third scan line scan1, the third The first end of the controllable switch T3 is connected to the second end of the first controllable switch T1 and the first end D of the drive switch T0, and the second end S of the third controllable switch T3 is connected to the drive a second control terminal TG of the switch T0;
  • the storage capacitor C1 includes a first end and a second end, and the first end of the storage capacitor C1 is connected to the second control terminal TG of the driving switch T0 and the third controllable switch T3 The second end of the storage capacitor C1 is grounded;
  • the fourth controllable switch T4 includes a control end, a first end and a second end, and a control end of the fourth controllable switch T4 is connected to the third scan line scan3, the The first end of the four controllable switch T4 is connected to the second end S of the driving switch T0 and the first end of the second controllable switch T2, and the second end of the fourth controllable switch T4 is connected to a data line Data, for receiving the second voltage V Data of the data line Data output.
  • the driving switch T0 is a double-gate thin film transistor, and the first control end BG, the second control end TG, the first end D, and the second end S of the driving switch T0 respectively correspond to the double The bottom gate, top gate, drain and source of the gate thin film transistor.
  • the first controllable switch to the fourth controllable switch T1-T4 are both NMOS
  • the thin film transistor, the control terminal, the first end and the second end of the first controllable switch to the fourth controllable switch T1-T4 respectively correspond to a gate, a drain and a source of the NMOS thin film transistor .
  • FIG. 2 is a waveform diagram of the pixel compensation circuit of the above embodiment of the present invention.
  • the working principle of the pixel compensation circuit is as follows (ie, the pixel compensation method): in the pre-charging stage, the driving switch T0, the first controllable switch T1, the third controllable switch T3, and the fourth The controllable switch T4 is turned on, the second controllable switch T2 is turned off, and the second control terminal TG of the drive switch T0 is connected to the first end D of the drive switch T0, because the first controllable switch T1 leads
  • the driving switch T0, the third controllable switch T3, and the fourth controllable switch T4 are both turned on, and the first controllable switch T1 and the second controllable switch T2 are both turned off.
  • the threshold voltage Vth of the driving switch T0 is very small. As the voltage between the second control terminal TG of the driving switch T0 and the first terminal D of the driving switch T0 decreases, the driving switch T0 The threshold voltage Vth continues to rise until the difference between the voltage of the first control terminal BG of the drive switch T0 and the voltage of the second terminal S of the drive switch T0 is equal to the threshold voltage Vth of the drive switch T0.
  • the driving switch T0, the first controllable switch T1 and the second controllable switch T2 are both turned on, and the third controllable switch T3 and the fourth controllable switch T4 are both
  • the voltage at the second terminal S of T0 is the voltage V OLED on the organic light emitting diode D1, which is obtained according to the transistor current formula and the above formulas 1 to 6:
  • the current through the organic light emitting diode D1 is independent of the threshold voltage Vth of the driving switch T0. Therefore, the pixel compensation circuit avoids the threshold voltage Vth drift of the driving switch T0.
  • the current of the organic light emitting diode D1 is unstable, thereby achieving uniform display of panel brightness.
  • FIG. 3 is a schematic diagram of a scan driving circuit of the present invention.
  • the scan driving circuit includes the pixel compensation circuit for preventing a threshold voltage drift of the driving transistor in the scan driving circuit, thereby causing unevenness of panel brightness display.
  • FIG. 4 is a schematic diagram of a flat display device according to the present invention.
  • the flat display device may be, for example, an OLED including the scan driving circuit and the pixel compensation circuit, and the scan driving circuit having the pixel compensation circuit is disposed at a periphery of the flat display device, for example, two of the flat display devices. end.
  • the pixel compensation circuit and method use a dual gate thin film transistor as a driving transistor because a double gate thin film transistor is less affected by voltage and light stress, and a negative correlation between a threshold voltage of a double gate thin film transistor and a top gate voltage
  • the characteristic is that the threshold voltage of the driving transistor can be specified by inputting the preset voltage, and the threshold voltage drift of the driving transistor is not required to be adjusted by adjusting the magnitude of the data signal, thereby not increasing the stress influence of the driving tube, thereby avoiding the driving.
  • the threshold voltage drift of the transistor causes the current of the organic light emitting diode to be unstable, thereby achieving uniform display of panel brightness.

Abstract

一种像素补偿电路、方法及平面显示装置。像素补偿电路包括驱动开关（T0）的第一控制端连参考电压端，第一及第二可控开关（T1，T2）的控制端连第一及第二扫描线（scan1，scan2），第一端连第一电压端（VPRE），第二端连驱动开关（T0）的第一端（D）；第二可控开关（T2）的第一端连驱动开关（T0）的第二端（S）；有机发光二极管（D1）的阳极连第二可控开关（T2）的第二端，阴极接地；第三及第四可控开关（T3，T4）的控制端连第三扫描线（scan3），第一端连第一可控开关（T1）的第二端及驱动开关（T0）的第一端（D），第二端连驱动开关（T0）的第二控制端；驱动开关（T0）的第二控制端经存储电容（C1）接地；第四可控开关（T4）的第一端连驱动开关（T0）的第二端，第二端连接数据线（Data），以避免阈值电压漂移造成有机发光二极管（D1）的电流不稳定，以此实现面板亮度显示均匀。

Description

像素补偿电路、方法及平面显示装置 【技术领域】
本发明涉及显示技术领域，特别是涉及一种像素补偿电路、方法及平面显示装置。
【背景技术】
目前的有机发光二极管(Organic Light Emitting diode，OLED)显示器具有体积小、结构简单、自主发光、亮度高、可视角度大、响应时间短等优点，吸引了广泛的注意。
现有的有机发光二极管显示器中有一个晶体管作为驱动晶体管用于控制通过有机发光二极管OLED的电流，因此驱动晶体管的阈值电压的重要性便十分明显，所述阈值电压的正向或负向漂移都会使得在相同数据信号下有不同的电流通过有机发光二极管，目前的晶体管在使用过程中如氧化物半导体中的照光、源漏电极电压应力作用等因素，都可能导致阈值电压漂移，造成通过有机发光二极管的电流不稳定，进而引起面板亮度显示不均匀。
【发明内容】
本发明主要解决的技术问题是提供一种像素补偿电路、方法及平面显示装置，以避免阈值电压漂移造成有机发光二极管的电流不稳定，以此实现面板亮度显示均匀。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种像素补偿电路，包括：
驱动开关，所述驱动开关包括第一控制端、第二控制端、第一端及第二端，所述驱动开关的第一控制端连接一参考电压端，用于接收所述参考电压端输出的参考电压；
第一可控开关，所述第一可控开关包括控制端、第一端及第二端，所述第一可控开关的控制端连接一第一扫描线，所述第一可控开关的第一端连接一第一电压端，用于接收所述第一电压端输出的第一电压，所述第一可控开关的第二端连接所述驱动开关的第一端；
第二可控开关，所述第二可控开关包括控制端、第一端及第二端，所述第二可控开关的控制端连接一第二扫描线，所述第二可控开关的第一端连接所述驱动开关的第二端；
有机发光二极管，所述有机发光二极管包括阳极及阴极，所述有机发光二极管的阳极连接所述第二可控开关的第二端，所述有机发光二极管的阴极接地；
第三可控开关，所述第三可控开关包括控制端、第一端及第二端，所述第三可控开关的控制端连接一第三扫描线，所述第三可控开关的第一端连接所述第一可控开关的第二端及所述驱动开关的第一端，所述第三可控开关的第二端连接所述驱动开关的第二控制端；
存储电容，所述存储电容包括第一端及第二端，所述存储电容的第一端连接所述驱动开关的第二控制端及所述第三可控开关的第二端，所述存储电容的第二端接地；及
第四可控开关，所述第四可控开关包括控制端、第一端及第二端，所述第四可控开关的控制端连接所述第三扫描线，所述第四可控开关的第一端连接所述驱动开关的第二端及所述第二可控开关的第一端，所述第四可控开关的第二端连接一数据线，用于接收所述数据线输出的第二电压。
其中，所述驱动开关为双栅极薄膜晶体管，所述驱动开关的第一控制端、第二控制端、第一端及第二端分别对应所述双栅极薄膜晶体管的底栅、顶栅、漏极及源极。
其中，所述第一可控开关至所述第四可控开关均为NMOS型薄膜晶体管，所述第一可控开关至所述第四可控开关的控制端、第一端及第二端分别对应所述NMOS型薄膜晶体管的栅极、漏极及源极。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种像素补偿方法，包括：
在预充电阶段，驱动开关、第一可控开关、第三可控开关及第四可控开关均导通，第二可控开关截止，所述驱动开关的第二控制端与所述驱动开关的第一端相连，由于所述第一可控开关导通，所述驱动开关的第二控制端的电压与所述驱动开关的第一端的电压相等且均为所述第一电压，所述驱动开关的第一控制端的电压等于参考电压，由于所述第四可控开关导通，所述驱动开关的第二端的电压等于第二电压；
在编程阶段，所述驱动开关、所述第三可控开关及所述第四可控开关均导 通，所述第一可控开关及所述第二可控开关均截止，所述驱动开关的阈值电压非常小，随着所述驱动开关的第二控制端与所述驱动开关的第一端之间电压不断减小，所述驱动开关的阈值电压不断上升，直到所述驱动开关的第一控制端的电压与所述驱动开关的第二端的电压之间的差值等于所述驱动开关的阈值电压时，所述驱动开关的第二控制端的电压不再变化并存储在存储电容中；及
在驱动发光阶段，所述驱动开关、所述第一可控开关及所述第二可控开关均导通，所述第三可控开关及所述第四可控开关均截止，在编程阶段得到的所述驱动开关的第二控制端的电压由所述存储电容维持，以使得所述驱动开关的阈值电压等于所述参考电压与所述第二电压的差值，此时所述驱动开关的第一控制端的电压仍然为所述参考电压，所述驱动开关的第二端的电压为有机发光二极管上的电压。
其中，所述驱动开关为双栅极薄膜晶体管，所述驱动开关的第一控制端、第二控制端、第一端及第二端分别对应所述双栅极薄膜晶体管的底栅、顶栅、漏极及源极。
其中，所述第一可控开关至所述第四可控开关均为NMOS型薄膜晶体管，所述第一可控开关至所述第四可控开关的控制端、第一端及第二端分别对应所述NMOS型薄膜晶体管的栅极、漏极及源极。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种平面显示装置，所述平面显示装置包括扫描驱动电路，所述扫描驱动电路包括像素补偿电路，所述像素补偿电路包括：
驱动开关，所述驱动开关包括第一控制端、第二控制端、第一端及第二端，所述驱动开关的第一控制端连接一参考电压端，用于接收所述参考电压端输出的参考电压；
第一可控开关，所述第一可控开关包括控制端、第一端及第二端，所述第一可控开关的控制端连接一第一扫描线，所述第一可控开关的第一端连接一第一电压端，用于接收所述第一电压端输出的第一电压，所述第一可控开关的第二端连接所述驱动开关的第一端；
第二可控开关，所述第二可控开关包括控制端、第一端及第二端，所述第二可控开关的控制端连接一第二扫描线，所述第二可控开关的第一端连接所述驱动开关的第二端；
有机发光二极管，所述有机发光二极管包括阳极及阴极，所述有机发光二 极管的阳极连接所述第二可控开关的第二端，所述有机发光二极管的阴极接地；
第三可控开关，所述第三可控开关包括控制端、第一端及第二端，所述第三可控开关的控制端连接一第三扫描线，所述第三可控开关的第一端连接所述第一可控开关的第二端及所述驱动开关的第一端，所述第三可控开关的第二端连接所述驱动开关的第二控制端；
存储电容，所述存储电容包括第一端及第二端，所述存储电容的第一端连接所述驱动开关的第二控制端及所述第三可控开关的第二端，所述存储电容的第二端接地；及
第四可控开关，所述第四可控开关包括控制端、第一端及第二端，所述第四可控开关的控制端连接所述第三扫描线，所述第四可控开关的第一端连接所述驱动开关的第二端及所述第二可控开关的第一端，所述第四可控开关的第二端连接一数据线，用于接收所述数据线输出的第二电压。
其中，所述驱动开关为双栅极薄膜晶体管，所述驱动开关的第一控制端、第二控制端、第一端及第二端分别对应所述双栅极薄膜晶体管的底栅、顶栅、漏极及源极，所述第一可控开关至所述第四可控开关均为NMOS型薄膜晶体管，所述第一可控开关至所述第四可控开关的控制端、第一端及第二端分别对应所述NMOS型薄膜晶体管的栅极、漏极及源极。
本发明的有益效果是：区别于现有技术的情况，本发明的所述像素补偿电路及方法通过使用双栅极薄膜晶体管作为驱动晶体管，因为双栅极薄膜晶体管所受到电压与光照的应力影响较小，同时由于双栅极薄膜晶体管阈值电压与顶栅电压负相关特性，能够通过输入预设电压来指定驱动晶体管的阈值电压，无需通过调整数据信号的大小来减弱驱动晶体管的阈值电压漂移，因此也不会增加驱动管的应力影响，以此避免了所述驱动晶体管的阈值电压漂移造成所述有机发光二极管的电流不稳定，以此实现面板亮度显示均匀。
【附图说明】
图1是本发明的像素补偿电路的结构示意图；
图2是本发明的像素补偿电路的波形图；
图3是本发明的扫描驱动电路的示意图；
图4是本发明的平面显示装置的示意图。
【具体实施方式】
请参阅图1，是本发明的像素补偿电路的结构示意图。如图1所示，本发明的像素补偿电路包括驱动开关T0，所述驱动开关T0包括第一控制端BG、第二控制端TG、第一端D及第二端S，所述驱动开关T0的第一控制端BG连接一参考电压端VPRE，用于接收所述参考电压端VPRE输出的参考电压Vpre；
第一可控开关T1，所述第一可控开关T1包括控制端、第一端及第二端，所述第一可控开关T1的控制端连接一第一扫描线scan2，所述第一可控开关T1的第一端连接一第一电压端VDD1，用于接收所述第一电压端VDD1输出的第一电压VDD，所述第一可控开关T1的第二端连接所述驱动开关T0的第一端D；
第二可控开关T2，所述第二可控开关T2包括控制端、第一端及第二端，所述第二可控开关T2的控制端连接一第二扫描线scan3，所述第二可控开关T2的第一端连接所述驱动开关T0的第二端S；
有机发光二极管D1，所述有机发光二极管D1包括阳极及阴极，所述有机发光二极管D1的阳极连接所述第二可控开关T2的第二端，所述有机发光二极管D1的阴极接地；
第三可控开关T3，所述第三可控开关T3包括控制端、第一端及第二端，所述第三可控开关T3的控制端连接一第三扫描线scan1，所述第三可控开关T3的第一端连接所述第一可控开关T1的第二端及所述驱动开关T0的第一端D，所述第三可控开关T3的第二端S连接所述驱动开关T0的第二控制端TG；
存储电容C1，所述存储电容C1包括第一端及第二端，所述存储电容C1的第一端连接所述驱动开关T0的第二控制端TG及所述第三可控开关T3的第二端，所述存储电容C1的第二端接地；
第四可控开关T4，所述第四可控开关T4包括控制端、第一端及第二端，所述第四可控开关T4的控制端连接所述第三扫描线scan3，所述第四可控开关T4的第一端连接所述驱动开关T0的第二端S及所述第二可控开关T2的第一端，所述第四可控开关T4的第二端连接一数据线Data，用于接收所述数据线Data输出的第二电压VData。
在本实施例中，所述驱动开关T0为双栅极薄膜晶体管，所述驱动开关T0的第一控制端BG、第二控制端TG、第一端D及第二端S分别对应所述双栅极薄膜晶体管的底栅、顶栅、漏极及源极。
在本实施例中，所述第一可控开关至所述第四可控开关T1-T4均为NMOS 型薄膜晶体管，所述第一可控开关至所述第四可控开关T1-T4的控制端、第一端及第二端分别对应所述NMOS型薄膜晶体管的栅极、漏极及源极。
请参阅图2，是本发明上述实施例的所述像素补偿电路的波形图。根据图1及图2获得所述像素补偿电路的工作原理如下(即所述像素补偿方法)：在预充电阶段，驱动开关T0、第一可控开关T1、第三可控开关T3及第四可控开关T4均导通，第二可控开关T2截止，所述驱动开关T0的第二控制端TG与所述驱动开关T0的第一端D相连，由于所述第一可控开关T1导通，所述驱动开关T0的第二控制端TG的电压与所述驱动开关T0的第一端D的电压相等且均为所述第一电压VDD，即VTG＝VD＝VDD(公式1)，所述驱动开关T0的第一控制端BG的电压等于参考电压Vpre，即VBG＝Vpre(公式2)，由于所述第四可控开关T4导通，所述驱动开关T0的第二端S的电压等于第二电压VData，即Vs＝VData(公式3)，完成初始化过程；
在编程阶段，所述驱动开关T0、所述第三可控开关T3及所述第四可控开关T4均导通，所述第一可控开关T1及所述第二可控开关T2均截止，所述驱动开关T0的阈值电压Vth非常小，随着所述驱动开关T0的第二控制端TG与所述驱动开关T0的第一端D之间电压不断减小，所述驱动开关T0的阈值电压Vth不断上升，直到所述驱动开关T0的第一控制端BG的电压与所述驱动开关T0的第二端S的电压之间的差值等于所述驱动开关T0的阈值电压Vth时，即VBG-Vs＝Vth(公式4)，所述驱动开关T0的第二控制端TG的电压不再变化并存储在存储电容C1中，此时所述驱动开关T0的阈值电压Vth＝VBG-VS＝Vpre-VData(公式5)；
在驱动发光阶段，所述驱动开关T0、所述第一可控开关T1及所述第二可控开关T2均导通，所述第三可控开关T3及所述第四可控开关T4均截止，在编程阶段得到的所述驱动开关T0的第二控制端TG的电压由所述存储电容C1维持，以使得所述驱动开关T0的阈值电压Vth等于所述参考电压Vpre与所述第二电压VData的差值，即Vth＝Vpre-VData(公式6)，此时所述驱动开关T0的第一控制端BG的电压仍然为所述参考电压Vpre，所述驱动开关T0的第二端S的电压为有机发光二极管D1上的电压VOLED，根据晶体管电流公式及上述公式1至公式6得到：
I＝β(VBG-Vth-Vs)2＝β(Vpre-Vpre+VData-VOLED)2＝β(VData-VOLED)2   (公式7)
由上述公式7可以看出，通过所述有机发光二极管D1的电流与所述驱动开关 T0的阈值电压Vth无关，因此，所述像素补偿电路避免了所述驱动开关T0的阈值电压Vth漂移造成所述有机发光二极管D1的电流不稳定，以此实现面板亮度显示均匀。
请参阅图3，为本发明一种扫描驱动电路的示意图。所述扫描驱动电路中包括所述像素补偿电路，用于避免所述扫描驱动电路中的驱动晶体管发生阈值电压漂移，从而造成面板亮度显示不均匀。
请参阅图4，为本发明一种平面显示装置的示意图。所述平面显示装置例如可为OLED，其包括前述的扫描驱动电路及像素补偿电路，所述具有像素补偿电路的扫描驱动电路设置在所述平面显示装置的周边，例如设置在平面显示装置的两端。
所述像素补偿电路及方法通过使用双栅极薄膜晶体管作为驱动晶体管，因为双栅极薄膜晶体管所受到电压与光照的应力影响较小，同时由于双栅极薄膜晶体管阈值电压与顶栅电压负相关特性，能够通过输入预设电压来指定驱动晶体管的阈值电压，无需通过调整数据信号的大小来减弱驱动晶体管的阈值电压漂移，因此也不会增加驱动管的应力影响，以此避免了所述驱动晶体管的阈值电压漂移造成所述有机发光二极管的电流不稳定，以此实现面板亮度显示均匀。
以上仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (8)

  1. 一种像素补偿电路，其中，所述像素补偿电路包括：
    驱动开关，所述驱动开关包括第一控制端、第二控制端、第一端及第二端，所述驱动开关的第一控制端连接一参考电压端，用于接收所述参考电压端输出的参考电压；
    第一可控开关，所述第一可控开关包括控制端、第一端及第二端，所述第一可控开关的控制端连接一第一扫描线，所述第一可控开关的第一端连接一第一电压端，用于接收所述第一电压端输出的第一电压，所述第一可控开关的第二端连接所述驱动开关的第一端；
    第二可控开关，所述第二可控开关包括控制端、第一端及第二端，所述第二可控开关的控制端连接一第二扫描线，所述第二可控开关的第一端连接所述驱动开关的第二端；
    有机发光二极管，所述有机发光二极管包括阳极及阴极，所述有机发光二极管的阳极连接所述第二可控开关的第二端，所述有机发光二极管的阴极接地；
    第三可控开关，所述第三可控开关包括控制端、第一端及第二端，所述第三可控开关的控制端连接一第三扫描线，所述第三可控开关的第一端连接所述第一可控开关的第二端及所述驱动开关的第一端，所述第三可控开关的第二端连接所述驱动开关的第二控制端；
    存储电容，所述存储电容包括第一端及第二端，所述存储电容的第一端连接所述驱动开关的第二控制端及所述第三可控开关的第二端，所述存储电容的第二端接地；及
    第四可控开关，所述第四可控开关包括控制端、第一端及第二端，所述第四可控开关的控制端连接所述第三扫描线，所述第四可控开关的第一端连接所述驱动开关的第二端及所述第二可控开关的第一端，所述第四可控开关的第二端连接一数据线，用于接收所述数据线输出的第二电压。
  2. 根据权利要求1所述的像素补偿电路，其中，所述驱动开关为双栅极薄膜晶体管，所述驱动开关的第一控制端、第二控制端、第一端及第二端分别对应所述双栅极薄膜晶体管的底栅、顶栅、漏极及源极。
  3. 根据权利要求1所述的像素补偿电路，其中，所述第一可控开关至所述第四可控开关均为NMOS型薄膜晶体管，所述第一可控开关至所述第四可控开 关的控制端、第一端及第二端分别对应所述NMOS型薄膜晶体管的栅极、漏极及源极。
  4. 一种像素补偿方法，其中，所述像素补偿方法包括：
    在预充电阶段，驱动开关、第一可控开关、第三可控开关及第四可控开关均导通，第二可控开关截止，所述驱动开关的第二控制端与所述驱动开关的第一端相连，由于所述第一可控开关导通，所述驱动开关的第二控制端的电压与所述驱动开关的第一端的电压相等且均为所述第一电压，所述驱动开关的第一控制端的电压等于参考电压，由于所述第四可控开关导通，所述驱动开关的第二端的电压等于第二电压；
    在编程阶段，所述驱动开关、所述第三可控开关及所述第四可控开关均导通，所述第一可控开关及所述第二可控开关均截止，所述驱动开关的阈值电压非常小，随着所述驱动开关的第二控制端与所述驱动开关的第一端之间电压不断减小，所述驱动开关的阈值电压不断上升，直到所述驱动开关的第一控制端的电压与所述驱动开关的第二端的电压之间的差值等于所述驱动开关的阈值电压时，所述驱动开关的第二控制端的电压不再变化并存储在存储电容中；及
    在驱动发光阶段，所述驱动开关、所述第一可控开关及所述第二可控开关均导通，所述第三可控开关及所述第四可控开关均截止，在编程阶段得到的所述驱动开关的第二控制端的电压由所述存储电容维持，以使得所述驱动开关的阈值电压等于所述参考电压与所述第二电压的差值，此时所述驱动开关的第一控制端的电压仍然为所述参考电压，所述驱动开关的第二端的电压为有机发光二极管上的电压。
  5. 根据权利要求4所述的像素补偿方法，其中，所述驱动开关为双栅极薄膜晶体管，所述驱动开关的第一控制端、第二控制端、第一端及第二端分别对应所述双栅极薄膜晶体管的底栅、顶栅、漏极及源极。
  6. 根据权利要求4所述的像素补偿方法，其中，所述第一可控开关至所述第四可控开关均为NMOS型薄膜晶体管，所述第一可控开关至所述第四可控开关的控制端、第一端及第二端分别对应所述NMOS型薄膜晶体管的栅极、漏极及源极。
  7. 一种平面显示装置，其中，所述平面显示装置包括扫描驱动电路，所述扫描驱动电路包括像素补偿电路，所述像素补偿电路包括：
    驱动开关，所述驱动开关包括第一控制端、第二控制端、第一端及第二端， 所述驱动开关的第一控制端连接一参考电压端，用于接收所述参考电压端输出的参考电压；
    第一可控开关，所述第一可控开关包括控制端、第一端及第二端，所述第一可控开关的控制端连接一第一扫描线，所述第一可控开关的第一端连接一第一电压端，用于接收所述第一电压端输出的第一电压，所述第一可控开关的第二端连接所述驱动开关的第一端；
    第二可控开关，所述第二可控开关包括控制端、第一端及第二端，所述第二可控开关的控制端连接一第二扫描线，所述第二可控开关的第一端连接所述驱动开关的第二端；
    有机发光二极管，所述有机发光二极管包括阳极及阴极，所述有机发光二极管的阳极连接所述第二可控开关的第二端，所述有机发光二极管的阴极接地；
    第三可控开关，所述第三可控开关包括控制端、第一端及第二端，所述第三可控开关的控制端连接一第三扫描线，所述第三可控开关的第一端连接所述第一可控开关的第二端及所述驱动开关的第一端，所述第三可控开关的第二端连接所述驱动开关的第二控制端；
    存储电容，所述存储电容包括第一端及第二端，所述存储电容的第一端连接所述驱动开关的第二控制端及所述第三可控开关的第二端，所述存储电容的第二端接地；及
    第四可控开关，所述第四可控开关包括控制端、第一端及第二端，所述第四可控开关的控制端连接所述第三扫描线，所述第四可控开关的第一端连接所述驱动开关的第二端及所述第二可控开关的第一端，所述第四可控开关的第二端连接一数据线，用于接收所述数据线输出的第二电压。
  8. 根据权利要求7所述的平面显示装置，其中，所述驱动开关为双栅极薄膜晶体管，所述驱动开关的第一控制端、第二控制端、第一端及第二端分别对应所述双栅极薄膜晶体管的底栅、顶栅、漏极及源极，所述第一可控开关至所述第四可控开关均为NMOS型薄膜晶体管，所述第一可控开关至所述第四可控开关的控制端、第一端及第二端分别对应所述NMOS型薄膜晶体管的栅极、漏极及源极。
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