WO2017124575A1 - 一种频率补偿的跨导放大器 - Google Patents
一种频率补偿的跨导放大器 Download PDFInfo
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- WO2017124575A1 WO2017124575A1 PCT/CN2016/072165 CN2016072165W WO2017124575A1 WO 2017124575 A1 WO2017124575 A1 WO 2017124575A1 CN 2016072165 W CN2016072165 W CN 2016072165W WO 2017124575 A1 WO2017124575 A1 WO 2017124575A1
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- transconductance amplifier
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- transistor
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/08—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
- H03F1/14—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of neutralising means
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
- H03F3/45183—Long tailed pairs
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
- H03F3/4521—Complementary long tailed pairs having parallel inputs and being supplied in parallel
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45288—Differential amplifier with circuit arrangements to enhance the transconductance
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45352—Indexing scheme relating to differential amplifiers the AAC comprising a combination of a plurality of transistors, e.g. Darlington coupled transistors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45526—Indexing scheme relating to differential amplifiers the FBC comprising a resistor-capacitor combination and being coupled between the LC and the IC
Definitions
- the invention belongs to the technical field of analog or digital-analog hybrid integrated circuits, and in particular relates to a frequency-compensated transconductance amplifier.
- transconductance amplifiers In recent years, with the continuous development of integrated circuit design technology, more and more transconductance amplifiers are used in the field of analog integrated circuit design. In most transconductance amplifier applications, in order to obtain a large phase of the transconductance amplifier. The margin, which guarantees the stability of the transconductance amplifier, will compensate the transconductance amplifier. However, the traditional frequency compensation technique for transconductance amplifiers usually achieves the ideal phase margin by pole-breaking and reducing the main pole in the frequency domain, but the reduced main pole will reduce the -3dB bandwidth, thus greatly reducing The unity gain bandwidth of the transconductance amplifier.
- a left half plane zero and a first non-primary pole are introduced to cancel to obtain a larger phase margin, but the passive compensation technique also reduces the frequency of the first non-primary pole.
- the zero and pole of the transfer function are affected by the compensation capacitor, and the zero-pole offset effect is not obvious. Therefore, the traditional compensation technology is difficult to meet the requirements of high-performance transconductance amplifiers at the same time.
- the compensation network is composed of a compensation resistor Rc and a compensation capacitor Cc connected in series, and one end of the compensation resistor Rc is connected to the compensation capacitor Cc.
- the other end of the compensation resistor Rc is connected to the drain of the NMOS transistor M2, and is also connected to the drain of the PMOS transistor M4, and this One node is also the gate of the PMOS transistor M5, and the other end of the compensation capacitor Cc is connected to the output of the transconductance amplifier.
- this compensation method is an extension of the Maitreya compensation method, similar to the effect of Maitreya compensation, which will be at the output of the first stage of the transconductance amplifier, that is, the NMOS tube M2.
- a large capacitance is generated at the drain of the drain and PMOS transistor M4.
- the main pole of the transconductance amplifier transfer function is moved to a low frequency; meanwhile, due to the presence of the compensation resistor Rc, it will be at the transconductance amplifier.
- a higher frequency right half plane zero or left half plane zero is generated, which depends on the magnitude of the compensation resistor Rc.
- the compensation method shown in Structure 1 has the advantage that the compensation structure is simple.
- the transconductance amplifier can obtain an ideal phase margin, thereby enhancing the stability of the transconductance amplifier;
- a disadvantage of this compensation method is that since the main pole of the transconductance amplifier is moved to a lower frequency, the -3dB bandwidth of the transconductance amplifier is reduced, thereby greatly reducing the unity gain bandwidth of the transconductance amplifier.
- the compensation network is also composed of a compensation resistor Rc and a compensation capacitor Cc connected in series. One end of the compensation resistor Rc is connected to the compensation capacitor Cc.
- the difference from the traditional Maitreya compensation method is that the other end of the compensation resistor Rc is connected to the drain of the NMOS transistor M1, and this node is also the drain and the gate of the diode-connected PMOS transistor M3, and the compensation capacitor Cc is another.
- One end is connected to the drain of the NMOS transistor M2, and is also connected to the drain of the PMOS transistor M4, and this node is also the gate of the PMOS transistor M5.
- the transfer function of the transconductance amplifier can be approximated as:
- R 1 represents the output impedance of the first stage of the transconductance amplifier
- R L represents the output impedance of the second stage of the transconductance amplifier
- ⁇ can be expressed as:
- the transconductance amplifier transfer function has two left half-plane poles, which can be expressed as:
- the frequency characteristic of the transconductance amplifier passive frequency compensation technique shown in Fig. 2 varies with the compensation capacitor Cc as shown in Fig. 3.
- the amplitude-frequency characteristic in Fig. 3 As the compensation capacitor Cc increases, the amplitude-frequency characteristic The -3dB bandwidth is reduced, which means that the main pole of the transconductance amplifier transfer function will be reduced; from the phase-frequency characteristic in Figure 3, as the compensation capacitor Cc increases, the curve in the phase-frequency characteristic is concave.
- the amplitude of the upturn and the upturn does not change much, which means that the left half plane zero and the first non-primary pole move to the low frequency at the same time. Therefore, the compensation effect of the compensation technique shown in Structure 2 is also limited.
- the compensation method for the prior art greatly reduces the unity gain band of the transconductance amplifier
- the present invention provides a novel frequency compensated transconductance amplifier that is wide or has limited compensation effects.
- a frequency-compensated transconductance amplifier comprising a transconductance amplifier input stage composed of NMOS transistors M1 and M2, a first-stage active load of a transconductance amplifier composed of PMOS transistors M3 and M4, and a transconductance amplifier composed of a constant current source Iss
- the gates of the NMOS transistors M1 and M2 are connected to the input signal Vin, the sources of the NMOS transistors M1 and M2 are grounded via a constant current source Iss, the drain of the NMOS transistor M1 and the end of the gain stage GAIN, the PMOS transistor M3 The drain, the gates of the PMOS transistors M3 and M4 are connected, the drain of the NMOS transistor M2 is connected to the drain of the PMOS transistor M4 and the gate of the PMOS transistor M5;
- the PMOS transistor M3, M4 and M5 are connected to the power source voltage VDD, the drain of the PMOS transistor M5, the end of the compensation capacitance Cc, and the drain of the NMOS capacitor C L M6 one end connected to each other to form a connection a node, and the connection node is the output terminal Vout of the transconductance amplifier, the other end of the capacitor C L is grounded, the source of the NMOS transistor M6 is grounded, and the gate is connected to the bias voltage Vb.
- the frequency compensation network formed by sequentially connecting the gain stage GAIN, the compensation resistor Rc and the compensation capacitor Cc can generate a very low frequency left half plane zero, this very low frequency left half plane
- the zero point can form a zero-pole offset with the first non-primary pole of the transconductance amplifier.
- the compensation technique proposed by the present invention does not lower the main pole frequency; meanwhile, the generated low frequency left half Plane zero and first non-primary poles cancel out, improving the transconductance amplifier
- the amplitude-frequency characteristic curve makes it rise upward at high frequency, which greatly increases the unity gain bandwidth of the transconductance amplifier, ensures the ideal phase margin, and significantly improves the quality factor of the transconductance amplifier.
- the gain stage GAIN includes an NMOS transistor M7, an NMOS transistor M8, an impedance R1, and an impedance R2.
- the drain of the NMOS transistor M7 is connected to the gate of the NMOS transistor M8 and one end of the impedance R1, the sources of the NMOS transistors M7 and M8 are grounded, and the drain of the NMOS transistor M8 is
- the compensation resistor Rc is connected to one end of the impedance R2, and the other ends of the impedances R1 and R2 are connected to the power supply voltage vdd.
- the impedances R1 and R2 are composed of active device components or passive devices.
- the gain stage GAIN includes a PMOS transistor M9, an NMOS transistor M10, an impedance R3, and an impedance R4.
- the drain of the PMOS transistor M9 is connected to the gate of the NMOS transistor M10 and one end of the impedance R3, and the other end of the impedance R3 is grounded to the source of the NMOS transistor M10, the NMOS transistor M10
- the drain is connected to one end of the compensation resistor Rc and the impedance R4, and the source of the PMOS transistor M9 and the other end of the resistor R4 are connected to the power supply voltage vdd.
- the impedances R3 and R4 are composed of active device components or passive devices.
- the gain level of the gain stage GAIN is 40 dB to 60 dB.
- Figure 1 is a schematic diagram of a conventional transconductance amplifier RC compensation technique.
- Figure 2 is a schematic diagram of the passive frequency compensation technique of the transconductance amplifier.
- Figure 3 is a schematic diagram showing the variation of the frequency characteristic of the passive frequency compensation technique of the transconductance amplifier with the compensation capacitor Cc.
- FIG. 4 is a schematic diagram of a transimpedance amplifier frequency compensation technique provided by the present invention.
- FIG. 5 is a schematic diagram of a small signal equivalent principle of a transimpedance amplifier frequency compensation technique according to the present invention.
- FIG. 6 is a schematic diagram showing the variation of the frequency characteristic of the transconductance amplifier frequency compensation technique with the gain level GAIN gain A according to the present invention.
- FIG. 7 is a schematic diagram showing the comparison of frequency characteristics of the three compensation techniques of FIG. 1, FIG. 2 and FIG.
- Figure 8 is a schematic diagram of a specific embodiment of the present invention.
- Figure 9 is a schematic diagram of another embodiment of the present invention.
- the present invention provides a frequency-compensated transconductance amplifier comprising a transconductance amplifier input stage composed of NMOS transistors M1 and M2, and a first-stage active load of a transconductance amplifier formed by PMOS transistors M3 and M4.
- a first transconductance amplifier stage tail current Iss constant current source configured transconductance amplifier PMOS transistor M5 constituting the input stage of the second tube, the NMOS transistor M6 of the second transconductance amplifier stage composed of a constant current source, the capacitance C L constituted Transconductance amplifier load capacitance, gain stage GAIN, compensation resistor Rc and compensation capacitor Cc are sequentially connected in series to form a transconductance amplifier frequency compensation network;
- the gates of the NMOS transistors M1 and M2 are connected to the input signal Vin, the sources of the NMOS transistors M1 and M2 are grounded via a constant current source Iss, the drain of the NMOS transistor M1 and the end of the gain stage GAIN, the PMOS transistor M3 The drain, the gates of the PMOS transistors M3 and M4 are connected, the drain of the NMOS transistor M2 is connected to the drain of the PMOS transistor M4 and the gate of the PMOS transistor M5;
- the PMOS transistor M3, M4 and M5 are connected to the power source voltage VDD, the drain of the PMOS transistor M5, the end of the compensation capacitance Cc, and the drain of the NMOS capacitor C L M6 one end connected to each other to form a connection a node, and the connection node is the output terminal Vout of the transconductance amplifier, the other end of the capacitor C L is grounded, the source of the NMOS transistor M6 is grounded, and the gate is connected to the bias voltage Vb.
- the frequency compensation network formed by sequentially connecting the gain stage GAIN, the compensation resistor Rc and the compensation capacitor Cc can generate a very low frequency left half plane zero, this very low frequency left half plane
- the zero point can form a zero-pole offset with the first non-primary pole of the transconductance amplifier.
- the compensation technique proposed by the present invention does not lower the main pole frequency; meanwhile, the generated low frequency left half The plane zero and the first non-primary pole cancel each other, which improves the amplitude-frequency characteristic curve of the transconductance amplifier, so that it rises upward at the high frequency, which greatly increases the unity gain bandwidth of the transconductance amplifier and ensures the ideal phase margin.
- the quality factor of the transconductance amplifier is significantly improved.
- the small signal equivalent schematic diagram of the schematic diagram shown in FIG. 4 is shown in FIG. 5, and the Kirchhoff current law (KCL) can be listed for the schematic diagram of the small signal equivalent principle shown in FIG. 5.
- KCL Kirchhoff current law
- the transfer function of the transconductance amplifier can be obtained as follows:
- the amplitude-frequency characteristic of FIG. 6 As can be seen from the amplitude-frequency characteristic of FIG. 6, as the gain level GAIN gain A increases, the amplitude-frequency characteristic The -3dB bandwidth is constant, which means that the main pole of the transconductance amplifier transfer function does not decrease with the increase of gain level GAIN gain A; from the phase frequency characteristic of Figure 6, it can be seen that with the gain level GAIN gain A Increasing, the concave and the upward warping of the curve in the phase-frequency characteristic cancel out and gradually become flat, which means that the zero point of the left half plane gradually shifts to the low frequency, thereby canceling out with the first non-primary pole, which also makes the frame in FIG.
- the frequency characteristic curve is lifted up at a high frequency, which greatly increases the unity gain bandwidth of the transconductance amplifier while maintaining a good phase margin.
- the three structures shown in Figure 1, Figure 2 and Figure 4 were carefully designed, and the same input/output tube and load tube size were used for the above three structures, and the compensation resistor Rc was used.
- the compensation capacitor Cc takes 2pF
- the load capacitance takes 15pF
- the power supply voltage vdd takes 1.8V
- the gain stage GAIN gain A in the structure of the invention takes 40dB
- the corresponding characteristics of the three structures are shown in Figure 7;
- the solid line represents the frequency characteristic of the present invention
- the dashed line represents the frequency characteristics of the structure of Figure 2
- the centerline represents the frequency characteristics of the structure of Figure 1.
- the present invention has a greatly improved unity gain bandwidth compared to the structures shown in Figs. 1 and 2; at the same time, the phase margin is also very desirable.
- the gain stage GAIN includes an NMOS transistor M7, an NMOS transistor M8, an impedance R1, and an impedance R2.
- the drain of the PMOS transistor M3, the drains of the PMOS transistors M3 and M4 are connected, the drain of the NMOS transistor M7 is connected to the gate of the NMOS transistor M8 and one end of the impedance R1, and the sources of the NMOS transistors M7 and M8
- the pole of the NMOS transistor M8 is connected to one end of the compensation resistor Rc and the impedance R2, and the other ends of the resistors R1 and R2 are connected to the power supply voltage vdd.
- the impedances R1 and R2 may be formed by either an active device or a passive device, and the purpose thereof is to provide a large small signal impedance, thereby generating a large small signal gain.
- two cascaded source amplifiers which are composed of an NMOS transistor M7, an NMOS transistor M8, an impedance R1, and an impedance R2, implement a gain stage, and generate a positive small signal gain through two cascaded source amplifiers.
- the gain stage GAIN includes a PMOS transistor M9, an NMOS transistor M10, an impedance R3, and an impedance R4.
- the drain, the drain of the PMOS transistor M3, the gates of the PMOS transistors M3 and M4 are connected, the drain of the PMOS transistor M9 is connected to the gate of the NMOS transistor M10 and one end of the impedance R3, and the other end of the impedance R3 is The source of the NMOS transistor M10 is grounded, the drain of the NMOS transistor M10 is connected to one end of the compensation resistor Rc and the impedance R4, and the source of the PMOS transistor M9 and the other end of the impedance R4 are connected to the power supply voltage vdd.
- the impedances R3 and R4 may be formed by either an active device or a passive device, and the purpose thereof is to provide a large small signal impedance, thereby generating a large small signal gain.
- two cascaded source amplifiers are formed by a PMOS transistor M9, an NMOS transistor M10, an impedance R3, and an impedance R4.
- a gain stage is implemented that produces a positive small signal gain through two cascaded source amplifiers to achieve the compensation effects mentioned in the above analysis.
- the implementation of the gain stage GAIN is not limited to the above two specific implementation manners, and those skilled in the art may also adopt the foregoing specific implementation manners.
- Other structures are implemented as long as a structure capable of providing a positive gain can be used as a specific embodiment of the gain stage GAIN in the frequency compensation network.
- the gain A of the gain stage GAIN is 40 dB to 60 dB. If the gain A is too small, the compensation effect will not be obvious; if the gain A is too large, the formula derivation deviation is relatively large.
- the frequency compensation technology for the transconductance amplifier introduces a gain compensation network of the gain stage GAIN by introducing a frequency compensation network formed by sequentially connecting the gain stage GAIN, the compensation resistance Rc and the compensation capacitance Cc, without reducing the transconductance.
- the main pole of the amplifier transfer function thereby ensuring that the transconductance amplifier has a large unity gain bandwidth; and by properly designing the gain stage GAIN gain A, separately adjusting the left half plane zero of the transconductance amplifier transfer function, and transconductance amplifier transmission
- the first non-primary pole of the function does not change, which is more conducive to the mutual cancellation of the poles and poles.
- the zero-pole offset of the transconductance amplifier transfer function improves the amplitude-frequency characteristic curve of the transconductance amplifier, making it high.
- the frequency is raised upwards, which greatly increases the unity gain bandwidth of the transconductance amplifier and maintains a good phase margin.
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Abstract
Description
Claims (6)
- 一种频率补偿的跨导放大器,其特征在于,包括NMOS管M1和M2构成的跨导放大器输入级,PMOS管M3和M4构成的跨导放大器第一级有源负载,恒流源Iss构成的跨导放大器第一级尾电流源,PMOS管M5构成的跨导放大器第二级输入管,NMOS管M6构成的跨导放大器第二级恒流源,电容CL构成的跨导放大器负载电容,增益级GAIN、补偿电阻Rc和补偿电容Cc顺序串联构成的跨导放大器频率补偿网络;其中,所述NMOS管M1和M2的栅极连接输入信号Vin,所述NMOS管M1和M2的源极经恒流源Iss接地,所述NMOS管M1的漏极与增益级GAIN的一端、PMOS管M3的漏极、PMOS管M3和M4的栅极连接,所述NMOS管M2的漏极与PMOS管M4的漏极和PMOS管M5的栅极连接;所述PMOS管M3、M4和M5的源极与电源电压vdd连接,所述PMOS管M5的漏极、补偿电容Cc的一端、NMOS管M6的漏极和电容CL的一端相互连接形成一个连接节点,且该连接节点为所述跨导放大器的输出端Vout,所述电容CL的另一端接地,所述NMOS管M6的源极接地,栅极连接偏置电压Vb。
- 根据权利要求1所述的频率补偿的跨导放大器,其特征在于,所述增益级GAIN包括NMOS管M7、NMOS管M8、阻抗R1和阻抗R2;其中,所述NMOS管M7的栅极与NMOS管M1的漏极、PMOS管M3的漏极、PMOS管M3和M4的栅极连接,所述NMOS管M7的漏极与NMOS管M8的栅极和阻抗R1的一端连接,所述NMOS管M7和M8的源极接地,所述NMOS管M8的漏极与补偿电阻Rc和阻抗R2的一端连接,所述阻抗R1和R2的另一端与电源电压vdd连接。
- 根据权利要求2所述的频率补偿的跨导放大器,其特征在于,所述阻抗R1和R2为有源器件构成或无源器件构成。
- 根据权利要求1所述的频率补偿的跨导放大器,其特征在于,所述增益级GAIN包括PMOS管M9、NMOS管M10、阻抗R3和阻抗R4;其中,所述PMOS管M9的栅极与NMOS管M1的漏极、PMOS管M3的漏极、PMOS管M3和M4的栅极连接,所述PMOS管M9的漏极与NMOS管M10的栅极和阻抗R3的一端连接,所述阻抗R3的另一端和NMOS管M10的源极接地,所述NMOS管M10的漏极与补偿电阻Rc和阻抗R4的一端连接,所述PMOS管M9的源极和阻抗R4的另一端与电源电压vdd连接。
- 根据权利要求4所述的频率补偿的跨导放大器,其特征在于,所述阻抗R3和R4为有源器件构成或无源器件构成。
- 根据权利要求1所述的频率补偿的跨导放大器,其特征在于,所述增益级GAIN的增益大小为40dB~60dB。
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CN109167583A (zh) * | 2018-10-31 | 2019-01-08 | 上海海栎创微电子有限公司 | 跨导放大器 |
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CN112234973B (zh) * | 2020-09-24 | 2023-01-24 | 西安电子科技大学 | 一种适用于驱动宽范围电容负载的多级运放 |
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CN115149910B (zh) * | 2022-09-06 | 2023-01-24 | 中国电子科技集团公司第五十八研究所 | 一种三级运放电容倍增频率补偿电路 |
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US20180054168A1 (en) | 2018-02-22 |
CN105720927B (zh) | 2018-03-27 |
US10181821B2 (en) | 2019-01-15 |
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