WO2017071400A1 - 发光二极管及其制作方法 - Google Patents

发光二极管及其制作方法 Download PDF

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Publication number
WO2017071400A1
WO2017071400A1 PCT/CN2016/097800 CN2016097800W WO2017071400A1 WO 2017071400 A1 WO2017071400 A1 WO 2017071400A1 CN 2016097800 W CN2016097800 W CN 2016097800W WO 2017071400 A1 WO2017071400 A1 WO 2017071400A1
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layer
algan
gan
barrier layer
light emitting
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PCT/CN2016/097800
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English (en)
French (fr)
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朱学亮
张洁
刘建明
杜成孝
徐宸科
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厦门市三安光电科技有限公司
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Publication of WO2017071400A1 publication Critical patent/WO2017071400A1/zh
Priority to US15/698,631 priority Critical patent/US20180013033A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H01L33/325—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

Definitions

  • the present invention relates to a light emitting diode that improves luminous efficiency at high temperatures and a method of fabricating the same.
  • Luminous efficiency is the most important parameter of LED chips. Generally speaking, the luminous efficiency generally refers to the data tested at room temperature 25 °C.
  • An important feature of semiconductor materials is that their properties change significantly as the temperature increases. For example, the LED chip, with the growth of temperature, its luminous efficiency is obviously reduced; the LED lamp is working, and its chip working environment is warm. C is usually above 25 ° C, especially in summer or poor heat dissipation; LED filament lamps developed in the future have even worse heat dissipation. How to improve the luminous efficiency of LED chips at high temperature is an important direction of current epitaxial research.
  • the present invention provides a light emitting diode, which can improve the electron hole confinement ability by designing a material structure of the barrier region of the light emitting well region, and significantly improve the luminous efficiency of the LED chip at a high temperature.
  • the technical solution of the present invention is: a light emitting diode comprising a first type semiconductor layer, a second type semiconductor layer and an active layer sandwiched therebetween, the active layer being alternately formed by a well layer and a barrier layer
  • a multi-quantum well structure is constructed, wherein the first barrier layer is a first A1G aN graded layer in which the aluminum component gradually increases from the first type of semiconductor layer to the quantum well, and the barrier layer located in the middle of the well layer is AlGaN/GaN/AlGaN
  • the multilayer barrier layer, the last barrier layer is a second AlGaN graded layer in which the aluminum component gradually decreases from the quantum well to the second type of semiconductor layer.
  • the GaN layer of the AlGaN/GaN/AlGaN multilayer barrier layer has a p-type impurity, and the hole injection efficiency at a high temperature can be improved by, for example, a small amount of Mg atoms are lost.
  • the thickness of the AlGaN layer is 1-3 nm, the range of the A1 component is 5-20%, and the thickness of the GaN layer is 1-5 nm, which has a p-type Miserable.
  • the first AlGaN graded layer has a thickness of 3 to 15 nm, and the A1 component at the beginning of the crucible is 0, and the end The Al component is 10-30%.
  • the second AlGaN graded layer has a thickness of 3 to 15 nm, and the aluminum component at the beginning of the crucible is 10 to 30
  • the above active layer structure significantly improves the luminous efficiency of the LED chip at a high temperature.
  • the energy band of the AlGaN/GaN/AlGaN barrier layer between each of the two luminescent quantum wells has a higher energy band order than the single-layer GaN of the original structure, which can more effectively limit the electron hole pair to the quantum well.
  • the middle GaN barrier layer can increase the injection efficiency of holes at high temperature by passing a small amount of Mg atoms, effectively The voltage of the LED chip is maintained unchanged; the AlGaN layer on both sides of the barrier layer can also prevent the diffusion of Mg atoms into the quantum well without forming a deep defect level in the quantum well due to the miscellaneous Mg in the barrier layer.
  • the first AlGaN graded layer acts to effectively limit electrons or holes, because its aluminum component gradually increases from the first type of semiconductor to the quantum well, and thus does not cause electrons in the first type of semiconductor to be difficult to implant. Quantum well region.
  • the aluminum component of the second A IGaN barrier layer gradually decreases from the quantum well to the second semiconductor, and does not cause holes in the second semiconductor to be difficult to implant into the quantum well region.
  • the present invention also provides a method of fabricating a light emitting diode, comprising growing a first type of semiconductor layer, an active layer, and a second type of semiconductor layer, wherein the active layer is formed by the following steps: 1) growing aluminum group The first AlGaN graded layer is divided into the first barrier layer, and the aluminum component is controlled by trimethylaluminum entering the reaction chamber. The flow rate of trimethylaluminum at the starting point is 0, and the flow rate of the growing trimethylaluminum is gradually increased.
  • the second AlGaN graded layer with a graded aluminum component is used as the last barrier layer, controlled by the flow of trimethylaluminum flowing into the reaction chamber.
  • the flow rate of trimethylaluminum at the starting point is the largest, and the flow rate of the growing trimethylaluminum is gradually reduced.
  • the first AlGaN graded layer formed in the step 1) has a thickness of 3 to 15 nm, the A1 component at the beginning of the crucible is 0, and the A1 component at the end is 10-30%.
  • the GaN layer has a p-type impurity.
  • the thickness of the AlGaN layer is The degree is l ⁇ 3nm, the Al composition range is 5 ⁇ 20 ⁇ 3 ⁇ 4, and the thickness of the GaN layer is l ⁇ 5nm, which is p-type miscellaneous.
  • the second AlGaN graded layer formed in the step 5) has a thickness of 3 to 15 nm, an aluminum component at the beginning of the crucible is 10 to 30%, and an aluminum component at the end is 0.
  • FIG. 1 is a full structural view of an LED in accordance with an embodiment of the present invention.
  • FIG 2 is an energy band diagram of an active layer in accordance with an embodiment of the present invention.
  • 100 a substrate; 110: a buffer layer; 120: an N-type GaN layer; 130: an InGaN/GaN superlattice; 140: an active layer; 141: a first barrier layer; 142: a quantum well layer; : intermediate barrier layer; 1431 : first layer in AlGaN/Ga N/AlGaN multilayer barrier layer; 1432: second layer in AlGaN/GaN/AlGaN multilayer barrier layer; 1433: AlGaN/GaN/AlGaN The third layer in the layer barrier layer; 144: the last barrier layer; 150: P-type electron blocking layer; 160: P-type GaN layer.
  • the following embodiments provide a light-emitting diode that improves the luminous efficiency at a high temperature.
  • the electron hole confinement capability is improved, and the overflow of the high-temperature download stream can be effectively suppressed.
  • an epitaxial structure for improving the luminous efficiency of an LED at a high temperature comprising: a substrate 100, a buffer layer 110, an N-type GaN layer 120, and an InGaN/GaN superlattice from bottom to top. 130.
  • the core thereof is a structure of an active layer.
  • the active layer 140 is a multi-quantum well structure, and the initial end is a first AlGaN graded layer in which the aluminum component gradually increases from the N-type GaN layer 120 to the quantum well, and the end is an aluminum component from the quantum well to the P-type.
  • a second AlGaN graded layer in which the electron blocking layer 150 is gradually reduced in the middle is a quantum well layer 142 and an intermediate barrier layer 143 located in the quantum well layer 142.
  • FIG. 2 shows an energy band diagram of the active layer.
  • the first AlGaN graded layer is the first barrier layer 141 of the multiple quantum well structure
  • the second AlGaN graded layer is the last barrier layer 144 of the multiple quantum well structure
  • the intermediate barrier layer 143 is AlGaN/G aN/AlGaN multilayer
  • the barrier layer, the GaN layer 1432 located in the middle has a small amount of Mg atoms, which can improve the injection efficiency of holes at high temperatures.
  • the AlGaN layer on both sides prevents the diffusion of Mg atoms into the quantum well, and is not complicated by the Mg in the barrier layer. Causes deep defect levels to form in the quantum well.
  • the sapphire pattern substrate 100 is placed in metal organic chemical vapor deposition (MOCVD) to raise the temperature to 10
  • MOCVD metal organic chemical vapor deposition
  • the temperature is lowered to 500-600 ° C, and ammonia gas and trimethyl gallium are introduced to grow a low temperature buffer layer of 20-50 nm.
  • the temperature is raised to 1030-1120 ° C, the growth of 1.5-4 microns thick N-type gallium nitride layer 120;
  • the temperature is adjusted to 800-900 ° C, and the first AlGaN graded layer with a graded aluminum component is grown as the first
  • the barrier layer 14 1 has a thickness ranging from 3 to 15 nm.
  • the aluminum component is controlled by trimethylaluminum entering the reaction chamber, the flow rate of trimethylaluminum at the starting point is 0, and the flow rate of the growing trimethylaluminum is gradually increased, and the aluminum component at the end of the first AlGaN graded layer is 10- 30%;
  • the temperature is raised to 750-830 ° C, the first InGaN quantum well layer 142 is grown;
  • the intermediate layer 143 is grown by heating to 800-900 ° C;
  • the first layer 1431 of the intermediate barrier layer is an AlGaN layer containing aluminum, and has a thickness of l-3 nm;
  • the second layer 1432 of the intermediate barrier layer is GaN a layer having a thickness of l-5 nm and having a magnesium pentoxide formed to form a p-type impurity;
  • the third layer 1433 of the intermediate barrier layer is also an AlGaN layer containing aluminum having a thickness of l-3 nm; an AlGaN barrier layer containing aluminum, A1 component range 5-20%;
  • the temperature is raised to 800-900 ° C, and the last aluminum composition gradient AlGaN barrier layer is grown as the last barrier layer 144, and the thickness thereof ranges from 3 to 15 nm.
  • the initial aluminum component ranges from 10-30%, and the growth of the bismuth aluminum component is 0; it can be controlled by the flow of trimethylaluminum flowing into the reaction chamber;
  • the temperature is raised to between 800 and 950 ° C to grow a p-type AlGaN electron blocking layer
  • the temperature is controlled between 900-1050 ° C, and the heavily p-type GaN contact layer is grown (the LED structure shown in FIG. 1 does not show the layer), and the LED epitaxial layer is formed to improve the luminous efficiency at high temperature. structure.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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Abstract

一种发光二极管及其制作方法，通过设计发光阱区势垒的材料结构，实现对电子空穴限制能力的提高，显著改善LED芯片在高温下的发光效率。其中发光二极管结构，包括第一类半导体层、第二类半导体层和夹在两者之间的有源层（140），所述有源层（140）系由阱层和垒层交替构成的多量子阱结构，其中第一个垒层（141）为铝组分自第一类半导体层至量子阱方向逐渐增加的第一AlGaN渐变层，位于阱层中间的垒层（143）为AlGaN/GaN/AlGaN多层势垒层，最后一个垒层（144）为铝组分从量子阱至第二类半导体层方向逐渐减少的第二AlGaN渐变层。

Description

说明书 发明名称：发光二极管及其制作方法 技术领域
[0001] 本发明涉及一种改善高温下发光效率的发光二极管及其制备方法。
背景技术
[0002] 氮化镓基发光二极管由于其高效的发光效率， 目前已经广泛的应用在背光、 照 明、 景观等各个光源领域。 发光效率是 LED芯片最重要的参数， 通常我们讲的发 光效率一般是指在室温 25°C下测试的数据。 半导体材料的一个重要特征是随着温 度的升高， 其特性发生显著变化。 如 LED芯片， 随着温度的生长， 其发光效率下 降明显； LED灯具在工作吋， 其芯片工作环境温。 C通常在 25°C以上， 尤其是在夏 天或者散热较差的灯具中； 进来发展起来的 LED灯丝灯， 其散热效果更差。 如何 提高高温下 LED芯片的发光效率是当前外延研究的一个重要方向。
技术问题
问题的解决方案
技术解决方案
[0003] 本发明提供了一种发光二极管， 通过设计发光阱区势垒的材料结构， 实现对电 子空穴限制能力的提高， 显著改善 LED芯片在高温下的发光效率。
[0004] 本发明的技术方案为： 发光二极管， 包括第一类半导体层、 第二类半导体层和 夹在两者之间的有源层， 所述有源层系由阱层和垒层交替构成的多量子阱结构 ， 其中第一个垒层为铝组分自第一类半导体层至量子阱方向逐渐增加的第一 A1G aN渐变层， 位于阱层中间的垒层为 AlGaN/GaN/AlGaN多层势垒层， 最后一个垒 层为铝组分从量子阱至第二类半导体层方向逐渐减少的第二 AlGaN渐变层。
[0005] 优选地， 所述 AlGaN/GaN/AlGaN多层势垒层的 GaN层具有 p型惨杂， 如通过惨 入少量的 Mg原子后， 可以提高高温下空穴的注入效率。
[0006] 优选地， 所述 AlGaN/GaN/AlGaN多层势垒层中， AlGaN层的厚度为 l~3nm， A1 组分范围为 5~20%， GaN层的厚度 l~5nm， 具有 p型惨杂。
[0007] 优选地， 所述第一 AlGaN渐变层的厚度为 3~15nm， 幵始端的 A1组分是 0， 末端 的 Al组分 10-30%。
[0008] 优选地， 所述第二 AlGaN渐变层的厚度为 3~15nm， 其幵始端的铝组分为 10~30
%, 末端的铝组分是 0。
[0009] 上述有源层结构对 LED芯片在高温下的发光效率改善明显。 其中每两个发光量 子阱之间的 AlGaN/GaN/AlGaN势垒层能带比原有结构的单层 GaN具有更高的能 带带阶， 可以更有效的把电子空穴对限制在量子阱内， 降低电子空穴溢出几率 ， 使他们在量子阱内发生辐射复合， 提高发光效率； 而中间的 GaN势垒层通过惨 入少量的 Mg原子后， 可以提高高温下空穴的注入效率， 有效维持 LED芯片的电 压不变； 同吋势垒层两边的 AlGaN层也可阻止 Mg原子扩散到量子阱， 不会因为 在势垒层中惨杂 Mg引起量子阱中形成深的缺陷能级。 第一 AlGaN渐变层在起到 有效限制电子或空穴的作用同吋， 因为它的铝组分自第一类半导体至量子阱方 向逐渐增加， 因此不会引起第一类半导体内的电子难以注入量子阱区域。 第二 A IGaN势垒层的铝组分从量子阱至第二类半导体方向逐渐减少， 也不会导致第二 类半导体内的空穴难以注入量子阱区域。
[0010] 本发明还提供了一种发光二极管的制作方法， 包括生长第一类半导体层、 有源 层和第二类半导体层， 其中所述有源层通过下面步骤形成： 1) 生长铝组分渐变 的第一 AlGaN渐变层作为第一个垒层， 其铝组分通过进入反应室的三甲基铝控制 ， 幵始点的三甲基铝流量为 0， 生长吋三甲基铝流量逐渐增加； 2) 生长第一个 量子阱层； 3) 生长中间势垒层， 其结构为 AlGaN/GaN/AlGaN多层势垒层； 4) 重复生长上述量子阱层及上述中间势垒层， 重复周期为 n个， 其中 n≥2; 5) 生长 完最后一个量子阱层后， 生长铝组分渐变的第二 AlGaN渐变层作为最后一个垒层 ， 通过通入反应室的三甲基铝流量来控制， 幵始点的三甲基铝流量为最大， 生 长吋三甲基铝流量逐渐减少。
[0011] 优选地， 所述步骤 1) 中形成的第一 AlGaN渐变层的厚度为 3~15nm， 幵始端的 A1组分为 0， 末端的 A1组分为 10-30%。
[0012] 优选地， 所述步骤 2) 形成的 AlGaN/GaN/AlGaN多层势垒层中， GaN层具有 p型 惨杂。
[0013] 优选地， 所述步骤 2) 形成的 AlGaN/GaN/AlGaN多层势垒层中， AlGaN层的厚 度为 l~3nm， Al组分范围为 5~20<¾， GaN层的厚度 l~5nm， 具有 p型惨杂。
[0014] 优选地， 所述步骤 5) 形成的第二 AlGaN渐变层的厚度为 3~15nm， 其幵始端的 铝组分为 10~30%， 末端的铝组分是 0。
发明的有益效果
对附图的简要说明
附图说明
[0015] 附图用来提供对本发明的进一步理解， 并且构成说明书的一部分， 与本发明的 实施例一起用于解释本发明， 并不构成对本发明的限制。 此外， 附图数据是描 述概要， 不是按比例绘制。
[0016] 图 1为根据本发明实施的一种 LED全结构图。
[0017] 图 2为根据本发明实施的有源层的能带图。
[0018] 图中标号：
[0019] 100： 衬底； 110： 缓冲层； 120： N型 GaN层； 130： InGaN/GaN超晶格; 140： 有源层； 141 : 第一个垒层； 142: 量子阱层； 143: 中间垒层； 1431 : AlGaN/Ga N/AlGaN多层势垒层中的第一层； 1432: AlGaN/GaN/AlGaN多层势垒层中的第 二层； 1433: AlGaN/GaN/AlGaN多层势垒层中的第三层； 144: 最后一个垒层； 150： P型电子阻挡层； 160: P型 GaN层。
本发明的实施方式
[0020] 下面结合示意图对本发明的发光二极管及其制作方法进行详细的描述， 借此对 本发明如何应用技术手段来解决技术问题， 并达成技术效果的实现过程能充分 理解并据以实施。 需要说明的是， 只要不构成冲突， 本发明中的各个实施例以 及各实施例中的各个特征可以相互结合， 所形成的技术方案均在本发明的保护 范围之内。
[0021] 发光二极管在高温下发光效率降低的原因较多， 主要原因有两个： 第一个原因 是高温下半导体材料的非辐射复合过程增加， 更多的电子空穴对通过非辐射复 合湮灭， 产生多余的热量； 另外一个原因是高温下电子空穴对的能量增加， 更 容易逃离芯片的量子阱发光区， 最终有效发光效率降低。 一方面， 通过提高 LED 芯片发光区的晶体质量可以抑制非辐射中心， 改善高温下发光效率降低的现象 。 另一方面， 调整发光二极管的能带结构， 抑制高温下载流子的溢出， 可以增 加发光载流子比例。
[0022] 下面实施例提供了一种改善高温下发光效率的发光二极管， 通过设计发光阱区 势垒的材料结构， 实现对电子空穴限制能力的提高， 可以有效抑制高温下载流 子的溢出， 改善高温下 LED芯片的发光效率。
[0023] 请参看附图 1和图 2， 一种改善高温下 LED发光效率的外延结构， 自下而上包括 ： 衬底 100、 缓冲层 110、 N型 GaN层 120、 InGaN/GaN超晶格 130、 有源层 140、 P 型电子阻挡层 150、 P型 GaN层 160。
[0024] 在本实施例中， 其核心为有源层的结构。 具体的， 有源层 140为多量子阱结构 ， 其起始端为铝组分自 N型 GaN层 120至量子阱方向逐渐增加的第一 AlGaN渐变 层， 末端为铝组分从量子阱至 P型电子阻挡层 150方向逐渐减少的第二 AlGaN渐变 层， 中间为量子阱层 142和位于量子阱层 142内的中间垒层 143， 图 2显示了有源 层的能带图。 其中， 第一 AlGaN渐变层作为多量子阱结构的第一个垒层 141， 第 二 AlGaN渐变层作为多量子阱结构的最后一个垒层 144， 中间垒层 143为 AlGaN/G aN/AlGaN多层势垒层， 位于中间的 GaN层 1432惨入少量的 Mg原子， 可以提高高 温下空穴的注入效率， 两边的 AlGaN层阻止 Mg原子扩散到量子阱， 不会因为在 势垒层中惨杂 Mg引起量子阱中形成深的缺陷能级。
[0025] 下面结合制作方法对前述外延结构做详细说明。
[0026] 首先， 将蓝宝石图形衬底 100放入金属有机化学气相沉积 (MOCVD)中升温至 10
00-1200°C， 在氢气氛围下处理 3-10分钟；
[0027] 接着， 降温至 500-600°C， 通入氨气和三甲基镓， 生长 20-50nm的低温缓冲层 11
0， 然后关闭三家钾镓；
[0028] 接着， 升温至 1030-1120°C， 生长 1.5-4微米厚的 N型氮化镓层 120;
[0029] 接着， 降温至 800-900°C， 生长 5-25个周期 InGaN/GaN超晶格层 130， 其中 InGaN 层厚度 l-2nm， GaN层厚度 2-30nm;
[0030] 接着， 温度调整到 800-900°C， 生长铝组分渐变的第一 AlGaN渐变层作为第一个 垒层 141， 其厚度范围 3-15nm。 其中铝组分通过进入反应室的三甲基铝控制， 幵 始点的三甲基铝流量为 0， 生长吋三甲基铝流量逐渐增加， 此第一 AlGaN渐变层 末端的铝组分范围 10-30%;
[0031] 接着， 升温至 750-830°C， 生长第一个 InGaN量子阱层 142;
[0032] 接着， 升温至 800-900°C， 生长中间垒层 143; 中间垒层的第一层 1431是含有铝 的 AlGaN层， 其厚度 l-3nm; 中间垒层的第二层 1432是 GaN层， 其厚度 l-5nm， 并通入二茂镁形成 p型惨杂； 中间垒层的第三层 1433也是含有铝的 AlGaN层， 其 厚度 l-3nm; 含有铝的 AlGaN势垒层， 其 A1组分范围 5-20%;
[0033] 重复生长上述 InGaN量子阱层 142及含有 3层结构的中间垒层 143， 重复周期 5- 15 个.
[0034] 接着， 生长完最后一个 InGaN量子阱层 142后， 升温至 800-900°C， 生长最后一 个铝组分渐变的 AlGaN势垒层作为最后一个垒层 144， 其厚度范围 3-15nm， 其幵 始的铝组分范围 10-30%， 生长结束吋铝组分是 0; 可通过通入反应室的三甲基铝 流量来控制；
[0035] 接着， 升温至 800-950°C之间， 生长 p型 AlGaN电子阻挡层；
[0036] 接着， 控制温度为 900-1050°C之间， 生长 p型 GaN层；
[0037] 接着， 控制温度为 900-1050°C之间， 生长重惨杂 p型 GaN接触层 （图 1所示发光 二极管结构未示出此层） ， 构成改善高温下发光效率的发光二极管外延结构。
[0038] 很明显地， 本发明的说明不应理解为仅仅限制在上述实施例， 而是包括利用本 发明构思的所有可能的实施方式。

Claims

权利要求书
[权利要求 1] 发光二极管， 包括第一类半导体层、 第二类半导体层和夹在两者之间 的有源层， 所述有源层系由阱层和垒层交替构成的多量子阱结构， 其 中第一个垒层为铝组分自第一类半导体层至量子阱方向逐渐增加的第 一 AlGaN渐变层， 位于阱层中间的垒层为 AlGaN/GaN/AlGaN多层势 垒层， 最后一个垒层为铝组分从量子阱至第二类半导体层方向逐渐减 少的第二 AlGaN渐变层。
[权利要求 2] 根据权利要求 1所述的发光二极管， 其特征在于： 所述 AlGaN/GaN/Al
GaN多层势垒层的 GaN层为 p型惨杂， 其惨杂浓。 C为 5E17-lE19cm -3。
[权利要求 3] 根据权利要求 1所述的发光二极管， 其特征在于： 所述 AlGaN/GaN/Al
GaN多层势垒层中， AlGaN层的厚度为 l~3nm， A1组分范围为 5~20<¾
， GaN层的厚度 l~5nm， 具有 p型惨杂。
[权利要求 4] 根据权利要求 1所述的发光二极管， 其特征在于： 所述第一 AlGaN渐 变层的厚度为 3~15nm， 幵始 A1组分是 0， 末端 A1组分 10-30%。
[权利要求 5] 根据权利要求 1所述的发光二极管， 其特征在于： 所述第二 AlGaN渐 变层的厚度为 3~15匪， 其幵始端的铝组分为 10~30%， 末端的铝组分 是。。
[权利要求 6] 发光二极管的制作方法， 包括生长第一类半导体层、 有源层和第二类 半导体层， 其特征在于： 所述有源层通过下面步骤形成：
1) 生长铝组分渐变的第一 AlGaN渐变层作为第一个垒层， 其铝组分 通过进入反应室的三甲基铝控制， 幵始点的三甲基铝流量为 0， 生长 吋三甲基铝流量逐渐增加；
2) 生长第一个量子阱层；
3) 生长中间势垒层， 其结构为 AlGaN/GaN/AlGaN多层势垒层；
4) 重复生长上述量子阱层及上述中间势垒层， 重复周期为 n个， 其中 n>2;
5) 生长完最后一个量子阱层后， 生长铝组分渐变的第二 AlGaN渐变 层作为最后一个垒层， 通过通入反应室的三甲基铝流量来控制， 幵始 点的三甲基铝流量为最大， 生长吋三甲基铝流量逐渐减少。
[权利要求 7] 根据权利要求 6所述的发光二极管的制作方法， 其特征在于： 所述步 骤 1) 中形成的第一 AlGaN渐变层的厚度为 3~15nm， 其幵始端的铝组 分为 0， 末端的铝组分为 10~30%。
[权利要求 8] 根据权利要求 6所述的发光二极管的制作方法， 其特征在于： 所述步 骤 2) 形成的 AlGaN/GaN/AlGaN多层势垒层中， GaN层具有 p型惨杂
[权利要求 9] 根据权利要求 6所述的发光二极管的制作方法， 其特征在于： 所述步
骤 2) 形成的 AlGaN/GaN/AlGaN多层势垒层中， AlGaN层的厚度为 1~ 3nm， A1组分范围为 5~20<¾， GaN层的厚度 l~5nm， 具有 p型惨杂。
[权利要求 10] 根据权利要求 6所述的发光二极管的制作方法， 其特征在于： 所述步 骤 5) 形成的第二 AlGaN渐变层的厚度为 3~15nm， 其幵始端的铝组分 为 10~30%， 末端的铝组分为 0。
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