WO2017061463A1 - Procédé ainsi que dispositif de fabrication de batterie solaire à base de cristaux type hbc - Google Patents

Procédé ainsi que dispositif de fabrication de batterie solaire à base de cristaux type hbc Download PDF

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WO2017061463A1
WO2017061463A1 PCT/JP2016/079611 JP2016079611W WO2017061463A1 WO 2017061463 A1 WO2017061463 A1 WO 2017061463A1 JP 2016079611 W JP2016079611 W JP 2016079611W WO 2017061463 A1 WO2017061463 A1 WO 2017061463A1
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mask
type
layer
solar cell
hbc
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PCT/JP2016/079611
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English (en)
Japanese (ja)
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田中　美和
現示 酒田
真 三浦
嘉文 山崎
秀和 横尾
勉 西橋
山口　昇
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株式会社アルバック
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Priority to CN201680055920.0A priority Critical patent/CN108140684A/zh
Publication of WO2017061463A1 publication Critical patent/WO2017061463A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
    • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer or HIT® solar cells; solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to a method for manufacturing an HBC type crystalline solar cell and a manufacturing apparatus that can simplify the manufacturing process.
  • HBC type crystalline solar cell a solar cell using crystalline silicon as a substrate
  • high power generation efficiency can be obtained in a back contact type solar cell.
  • HBC type hetero-type back contact type
  • a portion composed of an n-type amorphous Si layer and a p-type are disposed on the back surface of the silicon substrate (a surface located on the opposite side of the light incident surface) via an i-type amorphous Si layer.
  • the portions made of the amorphous Si layer are arranged in a localized manner and separated from each other.
  • the HBC type crystalline solar cell is manufactured through the processes shown in FIGS. 16A to 16J (for example, the conventional technique of Patent Document 1).
  • FIG. 16A to 16J are schematic cross-sectional views showing an example of a manufacturing method according to a conventional HBC crystal solar cell.
  • an i-type amorphous Si layer 1002 and an n-type amorphous Si layer 1003 are formed on one surface of silicon 1001.
  • a resist 1004 having a desired pattern is formed on the n-type amorphous Si layer 1003.
  • resist 1004 is used to etch i-type amorphous Si layer 1002 and n-type amorphous Si layer 1003.
  • FIG. 16D after the etching, the resist 1004 is peeled off.
  • an etch stopper layer 1005 is formed.
  • the etch stopper layer 1005 is masked, and the etch stopper layer 1005 in the separated portion where the n-type amorphous Si layer is not formed is etched. Further, an i-type amorphous Si layer 1006 and a p-type amorphous Si layer 1007 are formed over the entire area of the silicon 1001 on the etch stopper layer 1005.
  • a resist 1008 is formed in the separated portion.
  • the i-type amorphous Si layer 1006 and the p-type amorphous Si layer 1007 are etched using a resist 1008.
  • the resist 1008 is removed after the etching.
  • the etch stopper layer 1005 is peeled off.
  • an i-type amorphous Si layer 1009 is formed in a separation portion between i-type amorphous Si layers 1002 and a separation portion between n-type amorphous Si layer 1003 and p-type amorphous Si layer 1007.
  • the n-type amorphous Si layer 1003 and the p-type amorphous Si layer 1007 are formed for the first time through the above-described numerous steps (FIGS. 16A to 16J).
  • a specific pattern region can be produced.
  • a technique such as photolithography or etching must be performed many times.
  • the number of processes increases as shown in FIGS. 16A to 16J, leading to an increase in the cost of the production line. As a result, it is difficult to reduce the production cost of the solar cell. It was.
  • the present invention has been made in view of the above circumstances, and provides a method and apparatus for manufacturing an HBC crystal solar cell that can significantly reduce the number of steps for manufacturing an HBC crystal solar cell.
  • the purpose is to provide.
  • the method for manufacturing an HBC type crystalline solar cell according to the first aspect of the present invention uses a substrate having a non-light-receiving surface and made of crystalline silicon of the first conductivity type so as to cover the non-light-receiving surface of the substrate.
  • an i-type amorphous Si layer is formed, and differs from the first conductivity type and the first conductivity type by the impurity introduction method using a mask with respect to the amorphous Si layer.
  • Conductive type second portions are formed at positions spaced apart from each other, and annealing treatment is performed on the amorphous Si layer after the impurities are introduced.
  • the step of forming the first part and the second part includes a first step of forming a finger part of the first part, a second step of forming a bus bar part of the first part, It includes a third step of forming the finger portion and a fourth step of forming the bus bar portion of the second portion.
  • the finger part of the first part and the finger of the second part A plurality of masks each having an opening of a predetermined shape may be used so that the portion is positioned opposite to each other with a desired spacing portion interposed therebetween.
  • the first mask is used in the first step, the second mask is used in the second step, and the third step.
  • the fourth step the third mask is used, and in the fourth step, the fourth mask is used.
  • the first mask and the second mask are formed by a part of the opening of the first mask and the opening of the second mask.
  • the third mask and the fourth mask each have a region where a part of the opening of the third mask and a part of the opening of the fourth mask overlap. Also good.
  • An apparatus for manufacturing an HBC crystal solar cell according to a second aspect of the present invention is a manufacturing apparatus used in the manufacturing method according to the first aspect of the present invention, and forms the first part and the second part.
  • a mask for forming the first part and the second part when introducing impurities into the amorphous Si layer in the process a first mask, a second mask, a third mask, 4 masks are provided.
  • a region formed by openings of the first mask and the second mask, and a region formed by openings of the third mask and the fourth mask. May be separated by a desired distance without overlapping each other.
  • the second mask has a plurality of openings provided in the first mask and spaced apart from each other in parallel.
  • the single opening provided may be arranged so as to run vertically.
  • the third mask is provided in the third mask with respect to a plurality of openings provided in the third mask and arranged in parallel to each other.
  • the single opening provided may be arranged so as to run vertically.
  • a method for manufacturing an HBC type crystalline solar cell is a method for introducing an impurity using a mask with respect to an i-type amorphous Si layer provided so as to cover one surface forming a non-light-receiving surface side of a substrate.
  • a part A having the same conductivity type as that of the substrate and a part B having a conductivity type different from that of the substrate are formed at positions separated from each other, and then annealing treatment is performed.
  • the part A and the part B into which impurities are introduced are formed in the region of the amorphous Si layer according to the shape of the opening provided in the mask, and both the part A and the part B are amorphous Si.
  • the concentration distribution and introduction profile in the depth direction can be freely controlled for the part A and the part B individually. That is, according to the embodiment of the present invention, it is possible to construct the regions A and B in three dimensions in the amorphous Si layer. In addition, the amorphous Si layer after the introduction of impurities maintains a flat surface profile before forming the part A and the part B.
  • the ion implantation includes the step 1 of forming the finger part of the part A, the step 2 of forming the bus bar part of the part A, the step 3 of forming the finger part of the part B, and Step 4 of forming the bus bar portion of the part B is included.
  • the bus bar portion is formed by, for example, forming a film on the amorphous Si layer by vapor deposition or sputtering, and performing patterning. The manufacturing process is not required.
  • the flat surface is maintained on the outer surface of the amorphous Si layer even after the site A and the site B are formed.
  • the flatness of the electrode film for electricity is maintained. Therefore, it is possible to stabilize the patterning (photolithography) process performed to leave the electrode film so as to overlap the bus bar portions of the part A and the part B, respectively. Therefore, this invention contributes to provision of the manufacturing method of the HBC type
  • An apparatus for manufacturing an HBC type crystalline solar cell according to an embodiment of the present invention is a manufacturing apparatus used in the above-described manufacturing method, and forms the part A and the part B when introducing impurities in the second step.
  • four types of masks M1, M2, M3, and M4 having different positions and shapes of openings are provided.
  • the region into which the impurity is introduced can be formed in order in four different patterns. For example, by forming part A using two patterns and forming part B using the remaining two patterns, the shape of the region where part A and part B are arranged can be designed freely It becomes.
  • the comb M of the part A is connected by the mask M1, the connecting part connecting the comb of the part A by the mask M2, the comb of the part B by the mask M3, and the part B of the part B by the mask M4.
  • the connecting portions for connecting the comb teeth portions both the portion A and the portion B are formed in a comb shape, and the other comb tooth portions are arranged apart from each other.
  • part B can be formed in a desired to-be-processed object (coating film) only by introduce
  • the present invention can produce an HBC type crystalline solar cell with an extremely small number of steps as compared with the conventional production method, which contributes to the construction of a low-cost production line. Further, according to the present invention, the layout of the region where the part A and the part B are arranged can be optimized, which contributes to flexibly improving characteristics such as power generation efficiency of the solar cell.
  • FIG. 1 It is a schematic cross section which shows the procedure which manufactures the HBC type
  • FIG. 4 is a schematic plan view showing an example of an impurity introduction portion formed using the mask shown in FIGS. 3A to 3D.
  • FIG. 4 is a schematic plan view showing an example of an impurity introduction portion formed using the mask shown in FIGS. 3A to 3D.
  • It is a schematic plan view which shows another example of the mask M1 with which the manufacturing apparatus which concerns on embodiment of this invention is provided.
  • It is a schematic plan view which shows another example of the mask M2 with which the manufacturing apparatus which concerns on embodiment of this invention is provided.
  • It is a schematic plan view which shows another example of the mask M3 with which the manufacturing apparatus which concerns on embodiment of this invention is provided.
  • It is a schematic plan view which shows another example of the mask M4 with which the manufacturing apparatus which concerns on embodiment of this invention is provided.
  • FIG. 9 is a schematic plan view showing an example of an impurity introduction portion formed using the mask shown in FIGS.
  • FIG. 9 is a schematic plan view showing an example of an impurity introduction portion formed using the mask shown in FIGS.
  • It is a flowchart which shows the process of manufacturing the HBC type crystalline solar cell in a prior art example. It is a flowchart which shows the process of manufacturing the HBC type
  • FIG. 1 is a diagram for explaining the configuration of an HBC crystal solar cell 100G (100) according to an embodiment of the present invention.
  • a method for manufacturing the HBC type crystalline solar cell shown in FIG. 1 will be described in detail with reference to FIGS. 2A to 2G.
  • “n + site and p + site” described later are the back surface of the substrate (opposite side of the light incident surface: bottom surface in FIG. 1).
  • a non-mass separation type ion implantation method (plasma doping method) is used to form the n + site and the p + site, but the present invention is not limited to this method.
  • the impurity introduction method is not limited to the non-mass separation type ion implantation method. It is possible to introduce to.
  • a non-mass separation type ion implantation method will be described in detail. However, for the sake of simplicity, the non-mass separation type ion implantation is expressed as “ion implantation”.
  • the HBC type crystalline solar cell 100G includes a first surface 101a on which light (an arrow shown in FIG. 1) is incident and a second surface located on the opposite side of the first surface 101a. And a substrate 101 made of crystalline silicon of a first conductivity type (for example, an n-type semiconductor) having a 101b (non-light receiving surface) and exhibiting a photoelectric conversion function. Furthermore, the HBC type crystalline solar cell 100G includes an i-type amorphous Si layer 102 disposed so as to cover the second surface 101b of the substrate 101.
  • a first conductivity type for example, an n-type semiconductor
  • the same conductivity type as the first conductivity type (in the amorphous Si layer 102 and so as to be partially exposed on the outer surface side of the amorphous Si layer 102)
  • an n + -type portion (A) 103 and a portion (B) 104 having a conductivity type different from that of the first conductivity type are arranged apart from each other.
  • a part (C) represents a separation part between the part (A) 103 and the part (B) 104.
  • the part (A) 103 corresponds to the first part (part A) of the present invention.
  • Part (B) 104 corresponds to the second part (part B) of the present invention.
  • the part (A) 103 and the part (B) 104 are each formed by injecting a desired element into the surface layer portion of the substrate 101.
  • the case where it is a present area is shown.
  • the symbol d ⁇ b> 1 represents the thickness of the amorphous Si layer 102
  • the symbol d ⁇ b> 2 represents the depth of the part (A) 103 and the part (B) 104.
  • An example of the thickness d1 of the amorphous Si layer 102 is about 20 nm.
  • the part (A) 103 and the part (B) 104 are formed by an ion implantation method using a mask to be described later.
  • the part (A) 103 and the part (B) 104 are simply applied to the amorphous Si layer 102 by performing an ion implantation process for producing the part (A) 103 and the part (B) 104, respectively. And can be formed.
  • 2A to 2G are schematic cross-sectional views showing a procedure for manufacturing the HBC type crystalline solar cell shown in FIG.
  • amorphous Si is abbreviated as “a-Si”.
  • each step for manufacturing the HBC type crystalline solar cell 100G according to the embodiment of the present invention will be described in detail with reference to FIGS. 2A to 4B.
  • a wet etching process using, for example, potassium hydroxide (KOH) or sodium hydroxide (NaOH) as an etchant is performed on the substrate 101 made of crystalline silicon.
  • organic substances and metal contaminants remaining on the processed substrate 101 are removed using hydrofluoric acid.
  • the 1st surface 101a main surface
  • An i-type a-Si layer 102 is formed on the second surface 101b of the substrate 101 having the first surface 101a processed into a shape having the above texture, under a predetermined condition, for example, by a CVD method (first Process: FIG. 2B).
  • desired ions are implanted into the surface 102b of the i-type a-Si layer 102 by using predetermined masks M1 to M4 individually.
  • the arrows shown below the masks M1 to M4 indicate the ion implantation direction.
  • a mask M1 (first mask, FIG. 3A) is arranged in a region near the outer surface 102b of the i-type a-Si layer 102 (portion close to the outer surface 102b). Then, n-type ions such as phosphorus (P) ions are locally implanted into the outer surface 102b of the i-type a-Si layer 102 through the opening S1 provided in the mask M1. Thereby, the comb-tooth part 103f (FIG. 4A) is formed among n + site
  • a mask M2 (second mask, FIG. 3B) is arranged in the vicinity of the outer surface 102b of the i-type a-Si layer 102 instead of the mask M1.
  • n-type ions such as phosphorus (P) ions are locally implanted into the outer surface 102b of the i-type a-Si layer 102 through the opening S2 provided in the mask M2.
  • the connection part 103b is formed among n ⁇ +> site
  • an n + site (A) 103 is obtained in which the comb-tooth portions 103f produced earlier are electrically connected to each other by the connecting portion 103b.
  • a mask M3 (third mask, FIG. 3C) is arranged in the vicinity of the outer surface 102b of the i-type a-Si layer 102 instead of the mask M2. Then, through the opening S3, it provided on the mask M3, between and how the comb tooth 103f of the n + region (A) 103, and a position which does not overlap with the n + region (A) 103, boron (B) ions A p-type ion such as is locally implanted. Thereby, the comb-tooth part 104f (FIG. 4B) is formed in the p + region (B) 104 (second step using the mask M3).
  • a mask M4 (fourth mask, FIG. 3D) is arranged in the vicinity of the outer surface 102b of the i-type a-Si layer 102 instead of the mask M3.
  • p-type ions such as boron (B) ions are locally implanted into the outer surface 102b of the i-type a-Si layer 102 through the opening S4 provided in the mask M4.
  • the connection part 104b is formed among the p + site
  • the p + site (B) 104 is obtained in which the previously produced comb teeth 104f are electrically connected to each other by the connecting portion 104b.
  • the first step of the substrate 101 is performed so as to be inherent in the i-type a-Si layer 102 and partially exposed to the outer surface side of the a-Si layer 102.
  • HBC type crystal system in which a part (A) 103 of the same conductivity type (for example, n + type) as one conductivity type and a part (B) 104 of a conductivity type different from the first conductivity type are arranged apart from each other A solar cell 100G is formed (FIG. 2G).
  • the part (C) is the i-type a-Si layer 102 and represents a separation portion located between the part (A) and the part (B).
  • a mask is used for the i-type amorphous Si layer provided so as to cover one surface forming the non-light-receiving surface side of the substrate.
  • the part A of the same conductivity type as the substrate 101 and the part B of the conductivity type different from the substrate 101 by ion implantation they are annealed (third process).
  • the ion-implanted portion A103 and the portion B104 can be freely formed in the region of the amorphous Si layer.
  • Both the part A and the part B are inherent in the amorphous Si layer 102.
  • the concentration distribution in the depth direction of the amorphous Si layer can be individually determined for the part A and the part B.
  • the injection profile can be freely controlled.
  • the regions A and B can be three-dimensionally built inside the amorphous Si layer 102. Further, on the outer surface 102b of the amorphous Si layer 102 after ions are implanted into the amorphous Si layer 102, a flat surface profile before the formation of the portion A and the portion B is maintained. Therefore, the flatness is maintained in the electrode film and the reflective film formed in the subsequent process, and the patterning (photolithography) process performed to leave the electrode film so as to overlap each of the part A and the part B can be stabilized. .
  • the first surface 101a of the substrate 101 may employ a configuration in which an anti-reflection layer (Anti Reflection Layer: AR layer) (not shown) is disposed as necessary.
  • an anti-reflection layer for example, an insulating nitride film, silicon nitride film, titanium oxide film, aluminum oxide film, or the like is preferably used.
  • FIGS. 5 to 8 are schematic plan views showing other examples of the masks M1 to M4 provided in the manufacturing apparatus according to the embodiment of the present invention.
  • 9A and 9B are schematic plan views showing an example of an ion implantation portion formed using the mask shown in FIGS. 5 to 8.
  • FIG. 3A to 3D described above show configuration examples in which the arrangement of the openings is at an experimental level.
  • FIGS. 5 to 8 are configuration examples in which the arrangement of the openings is at a practical level (the entire area of the substrate is fully utilized).
  • the numbers described in each of FIGS. 5 to 8 are dimensions in mm.
  • the mask M1 (FIG. 5), seven openings S1 each having a width of 0.3 mm are arranged in parallel with a pitch of 0.7 mm. 5 is used for the same purpose as the mask M1 shown in FIG. 3A in order to form the comb-tooth portion 103f in the n + portion (A) 103 in FIG. That is, as shown in FIGS. 9A and 9B, the tip positions of the comb teeth 703f formed by the mask M1 shown in FIG. 5 are configured to form a straight line (lower two-dot chain line). Further, the rear end position of each comb-tooth portion 703f is configured to overlap with the position (upper two-dot chain line) of the connecting portion 703b along the edge of the substrate manufactured using the mask M2 shown in FIG. .
  • an opening S2 having a width of 2 mm is disposed at a position separated by 0.5 mm on the inner side from the edge of the substrate.
  • the mask M2 shown in FIG. 6 is also used. That is, as shown in FIGS. 9A and 9B, the connecting portion 703b produced by the mask M2 shown in FIG. 6 is arranged along the edge of the substrate so as to overlap the rear end position of each of the comb teeth portions 703f described above. Configured. Thereby, each comb-tooth part 703f and the connection part 703b which comprise the n + site
  • the mask M3 (FIG. 7), six openings S3 each having a width of 0.5 mm are arranged in parallel with a pitch of 0.5 mm. 7 is used for the same purpose as the mask M3 shown in FIG. 3C in order to form the comb-tooth portion 104f in the p + portion (B) 104 in FIG.
  • the openings S3 of the mask M3 (FIG. 7) are within the pitch of the mask M1 (FIG. 5), and the openings S3 of the mask M3 (FIG. 7) and the openings S1 of the mask M1 (FIG. 5) are separated from each other. It is comprised so that the made position may be made. That is, the 0.5 mm opening S3 in the mask M3 (FIG.
  • each comb-tooth portion 704f produced by the mask M3 shown in FIG. 7 is configured to form a straight line (upper two-dot chain line).
  • the rear end position of each comb-tooth portion 704f to be manufactured overlaps with the position of the connecting portion 703b (the lower two-dot chain line) along the edge of the substrate manufactured using the mask M2 shown in FIG. Composed.
  • an opening S2 having a width of 2 mm is disposed at a position separated from the edge of the substrate by 0.5 mm on the inner side, and of the p + portion (B) 104 in FIG.
  • the mask M4 shown in FIG. 8 is also used. That is, as shown in FIGS. 9A and 9B, the connecting portion 703b produced by the mask M4 shown in FIG. 8 is arranged along the edge of the substrate so as to overlap the rear end position of each of the comb teeth portions 704f described above. Configured.
  • part (B) 704 function as an area
  • the i-type a-Si layer 102 is partly exposed and partly exposed on the outer surface side of the a-Si layer 102.
  • the portion (A) 103 having the same conductivity type (for example, n + type) as the first conductivity type of the substrate 101 and the portion (B) 104 having a conductivity type different from the first conductivity type are separated from each other.
  • Arranged HBC crystal solar cells 100 and 200 are formed (FIG. 1).
  • the part (C) is the i-type a-Si layer 102 and represents a separation portion located between the part (A) and the part (B).
  • the ion implantation conditions employed in the method for manufacturing an HBC type crystal solar cell according to an embodiment of the present invention will be described.
  • the ion-implanted portion A103 and the portion B104 can be freely formed in the amorphous Si layer region.
  • Both site A and site B are inherent in the amorphous Si layer 102.
  • the concentration distribution and implantation profile in the depth direction can be freely set for site A and site B individually. Can be controlled.
  • the i-type a-Si layer 102 is originally formed as a single film in the thickness direction and the in-plane direction. Therefore, even when the n + site (A) 103 and the p + site (B) 104 are formed in the vicinity of the outer surface 102b of the i-type a-Si layer 102 by the second process performed after the first process, the separation is performed.
  • the portion (C) which is a portion, that is, a region where ions are not implanted exists as a single film in the i-type a-Si layer 102 along the thickness direction.
  • the n + site (A) 103 and the p + site (B) 104 are formed so as not to reach the second surface 101b of the substrate 101 with respect to the i-type a-Si layer 102 which is a single film.
  • the i-type a-Si layer 102 that is in contact with the second surface 101 b of the substrate 101 exists as a single film that is continuous over the in-plane direction of the substrate 101.
  • 2G exists as a “single film” in a region other than the n + site (A) 103 and the p + site (B) 104 (where, The “single film” means that there is no interface inside the i-type a-Si layer 102), thereby maintaining the function of the i-type a-Si layer 102 as a passivation film.
  • the n-type a-Si layer 1003 and the p-type a-Si layer 1007 are formed between these layers 1003 and 1007 and the substrate 1001.
  • a space is once formed in the surface direction of the substrate by etching (state shown in FIGS. 16C and 16G).
  • an i-type a-Si layer 1009 is formed in the spacing portion to embed the spacing portion. For this reason, in the i-type a-Si layer shown in FIG.
  • an interface exists in the in-plane direction of the substrate (a dotted line between reference numerals 1002 and 1009 shown in FIG. 16J corresponds to the interface). Due to the presence of such an interface, the film becomes discontinuous in the in-plane direction of the substrate, and the i-type a-Si layer may not function effectively as a passivation film.
  • FIG. 11 is a graph showing the relationship between the ion energy (Ion Energy) of boron (B) and the stopping range.
  • the stopping range is an index representing how far the implanted ions can enter the film in the depth direction of the film. From this graph, it was found that the ion energy and the stopping range have a proportional relationship that the ion implantation depth increases as the ion energy increases. Therefore, by selecting a predetermined ion energy, when boron (B) is ion-implanted into the i-type a-Si layer 102, it is possible to change the position where the ion is retained at a specific depth. By utilizing this relationship, the p + site (B) 104 shown in FIG. 1 can be formed with good reproducibility.
  • the p + site (B) 104 having a depth of about 15 nm can be obtained.
  • the thickness d1 of the i-type a-Si layer 102 shown in FIG. 1 is 20 nm
  • the thickness of the ion non-implanted portion that is not implanted with boron (B) ions is (d1 ⁇ It becomes a value shown by d2).
  • the portion having the thickness of d 1 -d 2 exists in the i-type a-Si layer 102 as a single film over the in-plane direction of the substrate 101.
  • the thickness d1 of the i-type a-Si layer 102 forming the n + site (A) 103 and the p + site (B) 104, and the passivation film Depending on the thickness (d1 ⁇ d2) of the portion of the i-type a-Si layer 102 required as the n + portion (A) 103 and the thickness d2 required as the p + portion (B) 104, an appropriate value is obtained. Selected.
  • the ion energy increases, there is a problem that the surface of the i-type a-Si layer 102 to be processed becomes rough and the flatness cannot be maintained.
  • the ion energy (keV) is preferably 20 or less, and the thickness of the i-type a-Si layer 102 (ie, i In view of the relationship between the thickness of the mold a-Si layer and the thickness desired to remain as a passivation film, it can be said that 5 or less is preferable. If the ion energy (keV) is 5 or less, the process is performed with a lower energy, so that the flatness of the surface of the i-type a-Si layer 102 can be maintained.
  • FIG. 12 is a graph showing a profile of the phosphorus (P) concentration observed in the depth direction of the substrate by changing the ion energy of phosphorus (P). From this graph, when the ion energy (keV) at the time of ion implantation is changed to 3, 6 and 15, the position (nm) in the depth direction of the substrate where the phosphorus concentration (atoma / cm 3 ) is 10 +18 is , Approximately 30 (nm), 43 (nm), and 78 (nm). As a result, the n + site (A) 103 can be formed in the substrate in the depth direction so that a predetermined phosphorus concentration is obtained at each position of the depth.
  • keV ion energy
  • the p + site (B) 104 shown in FIG. 1 can be formed in the depth direction in the substrate so as to have a predetermined boron concentration.
  • the ion implantation in the second step is performed using, for example, an ion implantation apparatus 1200 shown in FIG.
  • FIG. 13 is a cross-sectional view of an ion implantation apparatus 1200 used in the n-type ion implantation step and the p-type ion implantation step (second step) in the embodiment of the present invention.
  • the ion implantation apparatus 1200 includes a vacuum chamber 1201, a permanent magnet 1205, an RF introduction coil 1206, a plasma generation unit using ICP discharge using an RF introduction window (quartz) 1212, and a vacuum exhaust unit (not shown). .
  • the inside of the vacuum chamber 1201 is separated into a plasma generation chamber and a plasma processing chamber by electrodes 1208 and 1209 having a plurality of openings.
  • a substrate support 1204 that supports a substrate 1203 (corresponding to the substrate 101 after the texture forming step) as an object to be processed is disposed in the plasma processing chamber.
  • the potential of the electrode 1208 is a floating potential, and the electrode 1208 has a function of stabilizing the potential of the plasma 1207.
  • the electrode 1209 has a function of extracting a positive ion from the plasma 1207 when a negative potential is applied thereto.
  • the inside of the vacuum chamber 1201 is decompressed, and a gas containing impurity atoms injected into the substrate 1203 is introduced into the plasma generation chamber. Then, by exciting the plasma 1207 using the plasma generating portion, impurity atoms are ionized, and p-type or n-type ions extracted via the electrodes 1208 and 1209 can be implanted into the substrate 1203. .
  • the implantation amount of the p-type ions and the implantation amount of the n-type ions are the sheet resistance of the p + portion (B) 104 and the sheet resistance of the n + portion (A) 103 after annealing, which will be described later, and HBC. From the relationship with the photoelectric conversion efficiency of the type crystal solar cell, it is determined as the optimum value for manufacturing the HBC type crystal solar cell 100. However, the concentration of n-type ions in the n + region (A) 103 is set to be higher than at least the concentration of n-type ions in the substrate 101.
  • a process gas in which hydrogen is added to a gas containing impurity atoms for example, BF 3 or the like
  • Conditions may be set so that hydrogen is ion-implanted into the amorphous Si layer.
  • non-mass-separated ion implantation can be employed. Unlike mass-separated ion implantation, which separates and implants only n-type ions and p-type ions (for example, P ions and B ions), non-mass-separated ion implantation uses PH 3 as a gas containing impurity atoms. A gas containing hydrogen such as BH 2 is used. As a result, in non-mass-separated ion implantation, hydrogen can be implanted into the substrate simultaneously with n-type ions and p-type ions without using a process gas to which hydrogen is added as described above. It becomes.
  • non-mass-separated ion implantation does not require a mechanism for separating ions, and thus has an advantage that the footprint is reduced in the device structure.
  • the hydrogen implanted into the amorphous Si layer simultaneously with the n-type ions and p-type ions is converted into the amorphous Si layer. Concentration distribution in the depth direction.
  • the ion implantation apparatus 1200 of FIG. 13 has four types of masks M1, M2, M3, and M4 having different positions of openings as masks for forming the part A and the part B at the time of ion implantation in the second step. It has. Therefore, the ion implantation apparatus 1200 can freely produce the ion-implanted portion A103 and the portion B104 in the amorphous Si layer region by properly using four types of masks having different opening positions.
  • a configuration is employed in which the region formed by the openings of the masks M1 and M2 and the region formed by the openings of the masks M3 and M4 are separated from each other by a desired distance without overlapping each other.
  • an ion implantation region in which comb electrodes are opposed to each other as shown in FIGS. 4A, 4B, 9A, and 9B can be formed.
  • a single opening provided in the mask M2 may be arranged so as to run vertically with respect to a plurality of openings provided in the mask M1 and spaced apart from each other in parallel.
  • a single opening provided in the mask M4 may be arranged so as to run vertically with respect to a plurality of openings provided in the mask M3 that are spaced apart from each other in parallel. preferable.
  • the present invention is not necessarily limited to using four masks.
  • a mask having a large thickness can be used, a single mask that serves both as the mask M1 and the mask M2 is used, and n + configured by the connecting portion 703b and each comb-tooth portion 703f as shown in FIG. 9B.
  • Site (A) 703 can be made together.
  • a p + region (B) 704 composed of the connecting portion 704b and each comb-tooth portion 704f is manufactured together as shown in FIG. 9B. be able to.
  • step 1 for forming the finger portion of the part A and step 2 for forming the bus bar part of the part A can be performed in one step.
  • step 3 for forming the finger portion of the portion B and step 4 for forming the bus bar portion of the portion B can be performed in one step.
  • an annealing apparatus 1300 shown in FIG. 14 employs a vertical heating furnace and is a batch type in which one substrate (substrate after n-type and p-type ion implantation steps is set in one cassette) in one cassette. A plurality of the cassettes can be heat-treated at the same time.
  • An annealing apparatus 1300 in FIG. 14 includes a heating chamber 1310 and a front chamber 1320, and the internal space 1312 of the heating chamber 1310 and the internal space 1322 of the front chamber 1320 can be blocked by a gate valve 1317. .
  • a cassette rack 1303 in which a plurality of cassettes 1301 holding the outer peripheral portion of the substrate are stacked so that the front and back surfaces of the substrate are exposed is stacked on the cassette base 1302.
  • the gate valve 1317 is opened, and the cassette base 1302 in which the cassette rack 1303 is disposed is moved from the interior space 1322 of the front chamber 1320 to the interior of the heating chamber 1310.
  • the space 1312 is raised by a moving device (not shown) (upward arrow).
  • the gate valve 1317 is closed, and the internal space 1312 of the heating chamber 1310 is set to a reduced pressure atmosphere using the exhaust device (P) 1314.
  • the atmospheric pressure annealing may be performed in an atmospheric pressure atmosphere without reducing the pressure in the internal space 1312 of the heating chamber 1310.
  • an annealing gas is introduced into the internal space 1312 of the heating chamber 1310, and annealing is performed with a predetermined temperature profile in a controlled atmosphere.
  • the gas introduced into the internal space 1312 of the heating chamber 1310 is oxygen gas, nitrogen gas, or a gas containing both oxygen gas and nitrogen gas.
  • nitrogen gas is used as the annealing gas
  • hydrogen gas may be added to the nitrogen gas. In this way, by adding hydrogen to the annealing gas, it is possible to compensate for the hydrogen injected into the i-type a-Si layer in the second step being detached from the substrate by heating.
  • an annealing gas in which 3% or less of hydrogen is added to the nitrogen gas is used.
  • the introduction of the gas is stopped and the gate valve 1317 is opened with the internal space 1312 of the heating chamber 1310 opened to the atmosphere.
  • the cassette base 1302 is lowered from the internal space 1312 of the heating chamber 1310 to the internal space 1322 of the front chamber 1320 by a moving device (not shown) (downward arrow).
  • the annealing process in the embodiment of the present invention is performed by the above procedure.
  • the conditions for the annealing treatment are determined as optimum conditions corresponding to the diffusion coefficients of n-type ions and p-type ions inside the substrate.
  • the annealing temperature is desirably 600 ° C. or lower. This prevents the i-type a-Si layer 102 including the n + site (A) 103 and the p + site (B) 104 from being crystallized to deteriorate the function of the i-type a-Si layer as a passivation film. Because.
  • the annealing temperature is more preferably 400 ° C. or lower.
  • the time required for the annealing treatment is about 30 to 60 minutes.
  • a metal film for example, a Cu film
  • the metal film is used as an electrode by performing a desired patterning process.
  • an Ag film or the like is preferably used in addition to the Cu film.
  • the electrode is not limited to the metal film, and a transparent conductive film may be used instead of the metal film.
  • an inter-back type sputtering apparatus 1400 shown in FIG. 15 is used to form the metal film.
  • the substrate 1458 (corresponding to the substrate 101 on which the portion (A) 103 and the portion (B) 104 are formed) is loaded into a loading / unloading chamber (L / UL) by a transfer device (not shown).
  • 1451, the heating chamber (H) 1452, and the film formation chamber (S1) 1453 can be moved.
  • exhaust devices 1451P, 1452P, and 1453P for individually depressurizing the internal space are arranged.
  • the substrate 1458 is introduced from the outside (atmosphere) of the manufacturing apparatus into the charging / unloading chamber 1451 at atmospheric pressure. Thereafter, the preparation / extraction chamber 1451 is depressurized (depressurized atmosphere) using the exhaust device 1451P. Next, the substrate 1458 is transferred from the pressure-removed preparation / extraction chamber 1451 to the heating chamber 1452 and subjected to a desired heat treatment by the heating device 1459.
  • the substrate 1458 after the heat treatment is transferred from the heating chamber 1452 to the film formation chamber 1453 and is passed in front of a target 1462 made of Cu, whereby a Cu film is formed on the substrate 1458.
  • the temperature of the substrate 1458 becomes a desired temperature by the temperature adjustment device 1461.
  • the target 1462 is placed on the backing plate 1463.
  • a desired process gas is introduced from the gas supply source 1465 into the film formation chamber 1453, and desired power is supplied to the backing plate 1463 from the power source 1464.
  • the substrate 1458 on which the Cu film is formed is transferred from the film formation chamber 1453 to the preparation / extraction chamber 1451 and taken out from the manufacturing apparatus to the outside (atmosphere).
  • an electrode localized so as to individually cover the n + site (A) 103 and the p + site (B) 104 is obtained.
  • the formation of the metal film using the sputtering apparatus has been described as the electrode forming step.
  • the electrode may be formed while patterning the electrode by a printing method.
  • FIG. 10A is a flowchart showing a manufacturing process (FIGS. 16A to 16J) of a solar cell in a conventional example.
  • FIG. 10B is a flowchart showing manufacturing steps (FIGS. 2A to 2G) of the solar cell according to the embodiment of the present invention.
  • the conventional example and the embodiment of the present invention differ in “ ⁇ (a)” and “ ⁇ (b)” described in detail below.
  • the portion (A) and the portion (B) in the conventional HBC type crystalline solar cell are formed only after the process flow of FIG. 16A to FIG. 16J ( ⁇ (a) shown in FIG. 10A).
  • i-type a-Si film formation, n-type a-Si film formation, resist coating / patterning, etching, resist peeling, etch stopper film formation / patterning, i-type a-Si film formation, p-type a-Si film formation The film is manufactured by sequentially performing 13 processing steps having a film, resist coating / patterning, etching, resist stripping, etch stopper stripping, and i-type a-Si film formation only on a separated portion.
  • FIG. 10B the part (A) and the part (B) in the HBC type crystalline solar cell according to the embodiment of the present invention are shown in the process flow of FIG. 2B to FIG. 2F ( ⁇ ( The number of processing steps formed by b)) is only six.
  • the manufacturing method according to the embodiment of the present invention it is possible to manufacture an HBC type crystalline solar cell with an extremely small number of steps as compared with the conventional manufacturing method.
  • ⁇ (a) in the manufacturing method shown in FIG. 10A and ⁇ (b) in the manufacturing method shown in FIG. 10B in the HBC type crystalline solar cell according to the embodiment of the present invention, The “expensive photolithography process and etching process” are not required from the conventional process. Therefore, according to the embodiment of the present invention shown in FIG. 10B, the complicated steps required in the prior art can be reduced, so that manufacturing can be performed with more stable process management. That is, according to the embodiment of the present invention, since an expensive manufacturing apparatus is not required, the present invention contributes to the provision of an inexpensive HBC type crystalline solar cell.
  • each of the subsequent processing steps is performed according to the conventional process ( ⁇ (a)) and the process of the embodiment of the present invention ( There is no significant difference in ⁇ (b)).
  • ⁇ (a) the conventional process
  • ⁇ (b) the process of the embodiment of the present invention
  • n + site (A) 103” and p + site (B) 104” affected by annealing are present in “i-type a-Si layer 102” in the embodiment of the present invention. For this reason, it is necessary to consider annealing conditions.
  • the temperature during the annealing treatment is preferably 600 ° C.
  • the temperature is preferably 400 ° C. or lower.
  • the present invention is widely applicable to a method for manufacturing an HBC type crystalline solar cell.
  • Such a method for manufacturing an HBC type crystalline solar cell is preferably used as a method for manufacturing a solar cell that can increase the power generation efficiency per unit area and is required to be light in operation.
  • 100 (100G) HBC type crystalline solar cell 101 substrate (substrate made of first conductivity type crystalline silicon), 101a first surface, 101b second surface, 102 amorphous Si layer, 102b outer surface (outer surface of amorphous Si layer) ), 103 part (A) (first part, part of the same conductivity type as the first conductivity type), 104 part (B) (second part, part of a conductivity type different from the first conductivity type), d1 amorphous Si layer

Abstract

Selon le procédé de fabrication de batterie solaire à base de cristaux type HBC de l'invention, un substrat possédant une face non réceptrice de lumière et constitué de silicium à base de cristaux d'un premier type de conductivité, est mis en œuvre, une couche Si amorphe de type i, est formée de manière à recouvrir ladite face non réceptrice de lumière dudit substrat, une première région de type de conductivité similaire audit premier type de conductivité et une seconde région de type de conductivité différent dudit premier type de conductivité, sont formées en des positions éloignées l'une de l'autre par un procédé d'introduction d'impuretés mettant en œuvre un masque dans ladite couche Si amorphe, et un traitement de recuit est exécuté sur ladite couche Si amorphe après introduction des impuretés. Le processus de formation de ladite première et de ladite seconde région inclut : une première étape de formation d'une partie doigt de ladite première région ; une seconde étape de formation d'une partie omnibus de ladite première région ; une troisième étape de formation d'une partie doigt de ladite seconde région ; et une quatrième étape de formation d'une partie omnibus de ladite seconde région.
PCT/JP2016/079611 2015-10-05 2016-10-05 Procédé ainsi que dispositif de fabrication de batterie solaire à base de cristaux type hbc WO2017061463A1 (fr)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010030588A2 (fr) * 2008-09-10 2010-03-18 Varian Semiconductor Equipment Associates, Inc. Implantation d’un substrat de piles solaires à l'aide d'un masque
US20110192993A1 (en) * 2010-02-09 2011-08-11 Intevac, Inc. Adjustable shadow mask assembly for use in solar cell fabrications
JP2012164961A (ja) * 2011-02-08 2012-08-30 Samsung Sdi Co Ltd 太陽電池およびその製造方法
JP2013219355A (ja) * 2012-04-04 2013-10-24 Samsung Sdi Co Ltd 光電素子の製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010030588A2 (fr) * 2008-09-10 2010-03-18 Varian Semiconductor Equipment Associates, Inc. Implantation d’un substrat de piles solaires à l'aide d'un masque
US20110192993A1 (en) * 2010-02-09 2011-08-11 Intevac, Inc. Adjustable shadow mask assembly for use in solar cell fabrications
JP2012164961A (ja) * 2011-02-08 2012-08-30 Samsung Sdi Co Ltd 太陽電池およびその製造方法
JP2013219355A (ja) * 2012-04-04 2013-10-24 Samsung Sdi Co Ltd 光電素子の製造方法

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