WO2017061463A1 - Hbc crystalline solar cell production method and production device - Google Patents

Hbc crystalline solar cell production method and production device Download PDF

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Publication number
WO2017061463A1
WO2017061463A1 PCT/JP2016/079611 JP2016079611W WO2017061463A1 WO 2017061463 A1 WO2017061463 A1 WO 2017061463A1 JP 2016079611 W JP2016079611 W JP 2016079611W WO 2017061463 A1 WO2017061463 A1 WO 2017061463A1
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mask
type
layer
solar cell
hbc
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PCT/JP2016/079611
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French (fr)
Japanese (ja)
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田中 美和
現示 酒田
真 三浦
嘉文 山崎
秀和 横尾
勉 西橋
山口 昇
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株式会社アルバック
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Priority to CN201680055920.0A priority Critical patent/CN108140684A/en
Publication of WO2017061463A1 publication Critical patent/WO2017061463A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0745Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Definitions

  • the present invention relates to a method for manufacturing an HBC type crystalline solar cell and a manufacturing apparatus that can simplify the manufacturing process.
  • HBC type crystalline solar cell a solar cell using crystalline silicon as a substrate
  • high power generation efficiency can be obtained in a back contact type solar cell.
  • HBC type hetero-type back contact type
  • a portion composed of an n-type amorphous Si layer and a p-type are disposed on the back surface of the silicon substrate (a surface located on the opposite side of the light incident surface) via an i-type amorphous Si layer.
  • the portions made of the amorphous Si layer are arranged in a localized manner and separated from each other.
  • the HBC type crystalline solar cell is manufactured through the processes shown in FIGS. 16A to 16J (for example, the conventional technique of Patent Document 1).
  • FIG. 16A to 16J are schematic cross-sectional views showing an example of a manufacturing method according to a conventional HBC crystal solar cell.
  • an i-type amorphous Si layer 1002 and an n-type amorphous Si layer 1003 are formed on one surface of silicon 1001.
  • a resist 1004 having a desired pattern is formed on the n-type amorphous Si layer 1003.
  • resist 1004 is used to etch i-type amorphous Si layer 1002 and n-type amorphous Si layer 1003.
  • FIG. 16D after the etching, the resist 1004 is peeled off.
  • an etch stopper layer 1005 is formed.
  • the etch stopper layer 1005 is masked, and the etch stopper layer 1005 in the separated portion where the n-type amorphous Si layer is not formed is etched. Further, an i-type amorphous Si layer 1006 and a p-type amorphous Si layer 1007 are formed over the entire area of the silicon 1001 on the etch stopper layer 1005.
  • a resist 1008 is formed in the separated portion.
  • the i-type amorphous Si layer 1006 and the p-type amorphous Si layer 1007 are etched using a resist 1008.
  • the resist 1008 is removed after the etching.
  • the etch stopper layer 1005 is peeled off.
  • an i-type amorphous Si layer 1009 is formed in a separation portion between i-type amorphous Si layers 1002 and a separation portion between n-type amorphous Si layer 1003 and p-type amorphous Si layer 1007.
  • the n-type amorphous Si layer 1003 and the p-type amorphous Si layer 1007 are formed for the first time through the above-described numerous steps (FIGS. 16A to 16J).
  • a specific pattern region can be produced.
  • a technique such as photolithography or etching must be performed many times.
  • the number of processes increases as shown in FIGS. 16A to 16J, leading to an increase in the cost of the production line. As a result, it is difficult to reduce the production cost of the solar cell. It was.
  • the present invention has been made in view of the above circumstances, and provides a method and apparatus for manufacturing an HBC crystal solar cell that can significantly reduce the number of steps for manufacturing an HBC crystal solar cell.
  • the purpose is to provide.
  • the method for manufacturing an HBC type crystalline solar cell according to the first aspect of the present invention uses a substrate having a non-light-receiving surface and made of crystalline silicon of the first conductivity type so as to cover the non-light-receiving surface of the substrate.
  • an i-type amorphous Si layer is formed, and differs from the first conductivity type and the first conductivity type by the impurity introduction method using a mask with respect to the amorphous Si layer.
  • Conductive type second portions are formed at positions spaced apart from each other, and annealing treatment is performed on the amorphous Si layer after the impurities are introduced.
  • the step of forming the first part and the second part includes a first step of forming a finger part of the first part, a second step of forming a bus bar part of the first part, It includes a third step of forming the finger portion and a fourth step of forming the bus bar portion of the second portion.
  • the finger part of the first part and the finger of the second part A plurality of masks each having an opening of a predetermined shape may be used so that the portion is positioned opposite to each other with a desired spacing portion interposed therebetween.
  • the first mask is used in the first step, the second mask is used in the second step, and the third step.
  • the fourth step the third mask is used, and in the fourth step, the fourth mask is used.
  • the first mask and the second mask are formed by a part of the opening of the first mask and the opening of the second mask.
  • the third mask and the fourth mask each have a region where a part of the opening of the third mask and a part of the opening of the fourth mask overlap. Also good.
  • An apparatus for manufacturing an HBC crystal solar cell according to a second aspect of the present invention is a manufacturing apparatus used in the manufacturing method according to the first aspect of the present invention, and forms the first part and the second part.
  • a mask for forming the first part and the second part when introducing impurities into the amorphous Si layer in the process a first mask, a second mask, a third mask, 4 masks are provided.
  • a region formed by openings of the first mask and the second mask, and a region formed by openings of the third mask and the fourth mask. May be separated by a desired distance without overlapping each other.
  • the second mask has a plurality of openings provided in the first mask and spaced apart from each other in parallel.
  • the single opening provided may be arranged so as to run vertically.
  • the third mask is provided in the third mask with respect to a plurality of openings provided in the third mask and arranged in parallel to each other.
  • the single opening provided may be arranged so as to run vertically.
  • a method for manufacturing an HBC type crystalline solar cell is a method for introducing an impurity using a mask with respect to an i-type amorphous Si layer provided so as to cover one surface forming a non-light-receiving surface side of a substrate.
  • a part A having the same conductivity type as that of the substrate and a part B having a conductivity type different from that of the substrate are formed at positions separated from each other, and then annealing treatment is performed.
  • the part A and the part B into which impurities are introduced are formed in the region of the amorphous Si layer according to the shape of the opening provided in the mask, and both the part A and the part B are amorphous Si.
  • the concentration distribution and introduction profile in the depth direction can be freely controlled for the part A and the part B individually. That is, according to the embodiment of the present invention, it is possible to construct the regions A and B in three dimensions in the amorphous Si layer. In addition, the amorphous Si layer after the introduction of impurities maintains a flat surface profile before forming the part A and the part B.
  • the ion implantation includes the step 1 of forming the finger part of the part A, the step 2 of forming the bus bar part of the part A, the step 3 of forming the finger part of the part B, and Step 4 of forming the bus bar portion of the part B is included.
  • the bus bar portion is formed by, for example, forming a film on the amorphous Si layer by vapor deposition or sputtering, and performing patterning. The manufacturing process is not required.
  • the flat surface is maintained on the outer surface of the amorphous Si layer even after the site A and the site B are formed.
  • the flatness of the electrode film for electricity is maintained. Therefore, it is possible to stabilize the patterning (photolithography) process performed to leave the electrode film so as to overlap the bus bar portions of the part A and the part B, respectively. Therefore, this invention contributes to provision of the manufacturing method of the HBC type
  • An apparatus for manufacturing an HBC type crystalline solar cell according to an embodiment of the present invention is a manufacturing apparatus used in the above-described manufacturing method, and forms the part A and the part B when introducing impurities in the second step.
  • four types of masks M1, M2, M3, and M4 having different positions and shapes of openings are provided.
  • the region into which the impurity is introduced can be formed in order in four different patterns. For example, by forming part A using two patterns and forming part B using the remaining two patterns, the shape of the region where part A and part B are arranged can be designed freely It becomes.
  • the comb M of the part A is connected by the mask M1, the connecting part connecting the comb of the part A by the mask M2, the comb of the part B by the mask M3, and the part B of the part B by the mask M4.
  • the connecting portions for connecting the comb teeth portions both the portion A and the portion B are formed in a comb shape, and the other comb tooth portions are arranged apart from each other.
  • part B can be formed in a desired to-be-processed object (coating film) only by introduce
  • the present invention can produce an HBC type crystalline solar cell with an extremely small number of steps as compared with the conventional production method, which contributes to the construction of a low-cost production line. Further, according to the present invention, the layout of the region where the part A and the part B are arranged can be optimized, which contributes to flexibly improving characteristics such as power generation efficiency of the solar cell.
  • FIG. 1 It is a schematic cross section which shows the procedure which manufactures the HBC type
  • FIG. 4 is a schematic plan view showing an example of an impurity introduction portion formed using the mask shown in FIGS. 3A to 3D.
  • FIG. 4 is a schematic plan view showing an example of an impurity introduction portion formed using the mask shown in FIGS. 3A to 3D.
  • It is a schematic plan view which shows another example of the mask M1 with which the manufacturing apparatus which concerns on embodiment of this invention is provided.
  • It is a schematic plan view which shows another example of the mask M2 with which the manufacturing apparatus which concerns on embodiment of this invention is provided.
  • It is a schematic plan view which shows another example of the mask M3 with which the manufacturing apparatus which concerns on embodiment of this invention is provided.
  • It is a schematic plan view which shows another example of the mask M4 with which the manufacturing apparatus which concerns on embodiment of this invention is provided.
  • FIG. 9 is a schematic plan view showing an example of an impurity introduction portion formed using the mask shown in FIGS.
  • FIG. 9 is a schematic plan view showing an example of an impurity introduction portion formed using the mask shown in FIGS.
  • It is a flowchart which shows the process of manufacturing the HBC type crystalline solar cell in a prior art example. It is a flowchart which shows the process of manufacturing the HBC type
  • FIG. 1 is a diagram for explaining the configuration of an HBC crystal solar cell 100G (100) according to an embodiment of the present invention.
  • a method for manufacturing the HBC type crystalline solar cell shown in FIG. 1 will be described in detail with reference to FIGS. 2A to 2G.
  • “n + site and p + site” described later are the back surface of the substrate (opposite side of the light incident surface: bottom surface in FIG. 1).
  • a non-mass separation type ion implantation method (plasma doping method) is used to form the n + site and the p + site, but the present invention is not limited to this method.
  • the impurity introduction method is not limited to the non-mass separation type ion implantation method. It is possible to introduce to.
  • a non-mass separation type ion implantation method will be described in detail. However, for the sake of simplicity, the non-mass separation type ion implantation is expressed as “ion implantation”.
  • the HBC type crystalline solar cell 100G includes a first surface 101a on which light (an arrow shown in FIG. 1) is incident and a second surface located on the opposite side of the first surface 101a. And a substrate 101 made of crystalline silicon of a first conductivity type (for example, an n-type semiconductor) having a 101b (non-light receiving surface) and exhibiting a photoelectric conversion function. Furthermore, the HBC type crystalline solar cell 100G includes an i-type amorphous Si layer 102 disposed so as to cover the second surface 101b of the substrate 101.
  • a first conductivity type for example, an n-type semiconductor
  • the same conductivity type as the first conductivity type (in the amorphous Si layer 102 and so as to be partially exposed on the outer surface side of the amorphous Si layer 102)
  • an n + -type portion (A) 103 and a portion (B) 104 having a conductivity type different from that of the first conductivity type are arranged apart from each other.
  • a part (C) represents a separation part between the part (A) 103 and the part (B) 104.
  • the part (A) 103 corresponds to the first part (part A) of the present invention.
  • Part (B) 104 corresponds to the second part (part B) of the present invention.
  • the part (A) 103 and the part (B) 104 are each formed by injecting a desired element into the surface layer portion of the substrate 101.
  • the case where it is a present area is shown.
  • the symbol d ⁇ b> 1 represents the thickness of the amorphous Si layer 102
  • the symbol d ⁇ b> 2 represents the depth of the part (A) 103 and the part (B) 104.
  • An example of the thickness d1 of the amorphous Si layer 102 is about 20 nm.
  • the part (A) 103 and the part (B) 104 are formed by an ion implantation method using a mask to be described later.
  • the part (A) 103 and the part (B) 104 are simply applied to the amorphous Si layer 102 by performing an ion implantation process for producing the part (A) 103 and the part (B) 104, respectively. And can be formed.
  • 2A to 2G are schematic cross-sectional views showing a procedure for manufacturing the HBC type crystalline solar cell shown in FIG.
  • amorphous Si is abbreviated as “a-Si”.
  • each step for manufacturing the HBC type crystalline solar cell 100G according to the embodiment of the present invention will be described in detail with reference to FIGS. 2A to 4B.
  • a wet etching process using, for example, potassium hydroxide (KOH) or sodium hydroxide (NaOH) as an etchant is performed on the substrate 101 made of crystalline silicon.
  • organic substances and metal contaminants remaining on the processed substrate 101 are removed using hydrofluoric acid.
  • the 1st surface 101a main surface
  • An i-type a-Si layer 102 is formed on the second surface 101b of the substrate 101 having the first surface 101a processed into a shape having the above texture, under a predetermined condition, for example, by a CVD method (first Process: FIG. 2B).
  • desired ions are implanted into the surface 102b of the i-type a-Si layer 102 by using predetermined masks M1 to M4 individually.
  • the arrows shown below the masks M1 to M4 indicate the ion implantation direction.
  • a mask M1 (first mask, FIG. 3A) is arranged in a region near the outer surface 102b of the i-type a-Si layer 102 (portion close to the outer surface 102b). Then, n-type ions such as phosphorus (P) ions are locally implanted into the outer surface 102b of the i-type a-Si layer 102 through the opening S1 provided in the mask M1. Thereby, the comb-tooth part 103f (FIG. 4A) is formed among n + site
  • a mask M2 (second mask, FIG. 3B) is arranged in the vicinity of the outer surface 102b of the i-type a-Si layer 102 instead of the mask M1.
  • n-type ions such as phosphorus (P) ions are locally implanted into the outer surface 102b of the i-type a-Si layer 102 through the opening S2 provided in the mask M2.
  • the connection part 103b is formed among n ⁇ +> site
  • an n + site (A) 103 is obtained in which the comb-tooth portions 103f produced earlier are electrically connected to each other by the connecting portion 103b.
  • a mask M3 (third mask, FIG. 3C) is arranged in the vicinity of the outer surface 102b of the i-type a-Si layer 102 instead of the mask M2. Then, through the opening S3, it provided on the mask M3, between and how the comb tooth 103f of the n + region (A) 103, and a position which does not overlap with the n + region (A) 103, boron (B) ions A p-type ion such as is locally implanted. Thereby, the comb-tooth part 104f (FIG. 4B) is formed in the p + region (B) 104 (second step using the mask M3).
  • a mask M4 (fourth mask, FIG. 3D) is arranged in the vicinity of the outer surface 102b of the i-type a-Si layer 102 instead of the mask M3.
  • p-type ions such as boron (B) ions are locally implanted into the outer surface 102b of the i-type a-Si layer 102 through the opening S4 provided in the mask M4.
  • the connection part 104b is formed among the p + site
  • the p + site (B) 104 is obtained in which the previously produced comb teeth 104f are electrically connected to each other by the connecting portion 104b.
  • the first step of the substrate 101 is performed so as to be inherent in the i-type a-Si layer 102 and partially exposed to the outer surface side of the a-Si layer 102.
  • HBC type crystal system in which a part (A) 103 of the same conductivity type (for example, n + type) as one conductivity type and a part (B) 104 of a conductivity type different from the first conductivity type are arranged apart from each other A solar cell 100G is formed (FIG. 2G).
  • the part (C) is the i-type a-Si layer 102 and represents a separation portion located between the part (A) and the part (B).
  • a mask is used for the i-type amorphous Si layer provided so as to cover one surface forming the non-light-receiving surface side of the substrate.
  • the part A of the same conductivity type as the substrate 101 and the part B of the conductivity type different from the substrate 101 by ion implantation they are annealed (third process).
  • the ion-implanted portion A103 and the portion B104 can be freely formed in the region of the amorphous Si layer.
  • Both the part A and the part B are inherent in the amorphous Si layer 102.
  • the concentration distribution in the depth direction of the amorphous Si layer can be individually determined for the part A and the part B.
  • the injection profile can be freely controlled.
  • the regions A and B can be three-dimensionally built inside the amorphous Si layer 102. Further, on the outer surface 102b of the amorphous Si layer 102 after ions are implanted into the amorphous Si layer 102, a flat surface profile before the formation of the portion A and the portion B is maintained. Therefore, the flatness is maintained in the electrode film and the reflective film formed in the subsequent process, and the patterning (photolithography) process performed to leave the electrode film so as to overlap each of the part A and the part B can be stabilized. .
  • the first surface 101a of the substrate 101 may employ a configuration in which an anti-reflection layer (Anti Reflection Layer: AR layer) (not shown) is disposed as necessary.
  • an anti-reflection layer for example, an insulating nitride film, silicon nitride film, titanium oxide film, aluminum oxide film, or the like is preferably used.
  • FIGS. 5 to 8 are schematic plan views showing other examples of the masks M1 to M4 provided in the manufacturing apparatus according to the embodiment of the present invention.
  • 9A and 9B are schematic plan views showing an example of an ion implantation portion formed using the mask shown in FIGS. 5 to 8.
  • FIG. 3A to 3D described above show configuration examples in which the arrangement of the openings is at an experimental level.
  • FIGS. 5 to 8 are configuration examples in which the arrangement of the openings is at a practical level (the entire area of the substrate is fully utilized).
  • the numbers described in each of FIGS. 5 to 8 are dimensions in mm.
  • the mask M1 (FIG. 5), seven openings S1 each having a width of 0.3 mm are arranged in parallel with a pitch of 0.7 mm. 5 is used for the same purpose as the mask M1 shown in FIG. 3A in order to form the comb-tooth portion 103f in the n + portion (A) 103 in FIG. That is, as shown in FIGS. 9A and 9B, the tip positions of the comb teeth 703f formed by the mask M1 shown in FIG. 5 are configured to form a straight line (lower two-dot chain line). Further, the rear end position of each comb-tooth portion 703f is configured to overlap with the position (upper two-dot chain line) of the connecting portion 703b along the edge of the substrate manufactured using the mask M2 shown in FIG. .
  • an opening S2 having a width of 2 mm is disposed at a position separated by 0.5 mm on the inner side from the edge of the substrate.
  • the mask M2 shown in FIG. 6 is also used. That is, as shown in FIGS. 9A and 9B, the connecting portion 703b produced by the mask M2 shown in FIG. 6 is arranged along the edge of the substrate so as to overlap the rear end position of each of the comb teeth portions 703f described above. Configured. Thereby, each comb-tooth part 703f and the connection part 703b which comprise the n + site
  • the mask M3 (FIG. 7), six openings S3 each having a width of 0.5 mm are arranged in parallel with a pitch of 0.5 mm. 7 is used for the same purpose as the mask M3 shown in FIG. 3C in order to form the comb-tooth portion 104f in the p + portion (B) 104 in FIG.
  • the openings S3 of the mask M3 (FIG. 7) are within the pitch of the mask M1 (FIG. 5), and the openings S3 of the mask M3 (FIG. 7) and the openings S1 of the mask M1 (FIG. 5) are separated from each other. It is comprised so that the made position may be made. That is, the 0.5 mm opening S3 in the mask M3 (FIG.
  • each comb-tooth portion 704f produced by the mask M3 shown in FIG. 7 is configured to form a straight line (upper two-dot chain line).
  • the rear end position of each comb-tooth portion 704f to be manufactured overlaps with the position of the connecting portion 703b (the lower two-dot chain line) along the edge of the substrate manufactured using the mask M2 shown in FIG. Composed.
  • an opening S2 having a width of 2 mm is disposed at a position separated from the edge of the substrate by 0.5 mm on the inner side, and of the p + portion (B) 104 in FIG.
  • the mask M4 shown in FIG. 8 is also used. That is, as shown in FIGS. 9A and 9B, the connecting portion 703b produced by the mask M4 shown in FIG. 8 is arranged along the edge of the substrate so as to overlap the rear end position of each of the comb teeth portions 704f described above. Configured.
  • part (B) 704 function as an area
  • the i-type a-Si layer 102 is partly exposed and partly exposed on the outer surface side of the a-Si layer 102.
  • the portion (A) 103 having the same conductivity type (for example, n + type) as the first conductivity type of the substrate 101 and the portion (B) 104 having a conductivity type different from the first conductivity type are separated from each other.
  • Arranged HBC crystal solar cells 100 and 200 are formed (FIG. 1).
  • the part (C) is the i-type a-Si layer 102 and represents a separation portion located between the part (A) and the part (B).
  • the ion implantation conditions employed in the method for manufacturing an HBC type crystal solar cell according to an embodiment of the present invention will be described.
  • the ion-implanted portion A103 and the portion B104 can be freely formed in the amorphous Si layer region.
  • Both site A and site B are inherent in the amorphous Si layer 102.
  • the concentration distribution and implantation profile in the depth direction can be freely set for site A and site B individually. Can be controlled.
  • the i-type a-Si layer 102 is originally formed as a single film in the thickness direction and the in-plane direction. Therefore, even when the n + site (A) 103 and the p + site (B) 104 are formed in the vicinity of the outer surface 102b of the i-type a-Si layer 102 by the second process performed after the first process, the separation is performed.
  • the portion (C) which is a portion, that is, a region where ions are not implanted exists as a single film in the i-type a-Si layer 102 along the thickness direction.
  • the n + site (A) 103 and the p + site (B) 104 are formed so as not to reach the second surface 101b of the substrate 101 with respect to the i-type a-Si layer 102 which is a single film.
  • the i-type a-Si layer 102 that is in contact with the second surface 101 b of the substrate 101 exists as a single film that is continuous over the in-plane direction of the substrate 101.
  • 2G exists as a “single film” in a region other than the n + site (A) 103 and the p + site (B) 104 (where, The “single film” means that there is no interface inside the i-type a-Si layer 102), thereby maintaining the function of the i-type a-Si layer 102 as a passivation film.
  • the n-type a-Si layer 1003 and the p-type a-Si layer 1007 are formed between these layers 1003 and 1007 and the substrate 1001.
  • a space is once formed in the surface direction of the substrate by etching (state shown in FIGS. 16C and 16G).
  • an i-type a-Si layer 1009 is formed in the spacing portion to embed the spacing portion. For this reason, in the i-type a-Si layer shown in FIG.
  • an interface exists in the in-plane direction of the substrate (a dotted line between reference numerals 1002 and 1009 shown in FIG. 16J corresponds to the interface). Due to the presence of such an interface, the film becomes discontinuous in the in-plane direction of the substrate, and the i-type a-Si layer may not function effectively as a passivation film.
  • FIG. 11 is a graph showing the relationship between the ion energy (Ion Energy) of boron (B) and the stopping range.
  • the stopping range is an index representing how far the implanted ions can enter the film in the depth direction of the film. From this graph, it was found that the ion energy and the stopping range have a proportional relationship that the ion implantation depth increases as the ion energy increases. Therefore, by selecting a predetermined ion energy, when boron (B) is ion-implanted into the i-type a-Si layer 102, it is possible to change the position where the ion is retained at a specific depth. By utilizing this relationship, the p + site (B) 104 shown in FIG. 1 can be formed with good reproducibility.
  • the p + site (B) 104 having a depth of about 15 nm can be obtained.
  • the thickness d1 of the i-type a-Si layer 102 shown in FIG. 1 is 20 nm
  • the thickness of the ion non-implanted portion that is not implanted with boron (B) ions is (d1 ⁇ It becomes a value shown by d2).
  • the portion having the thickness of d 1 -d 2 exists in the i-type a-Si layer 102 as a single film over the in-plane direction of the substrate 101.
  • the thickness d1 of the i-type a-Si layer 102 forming the n + site (A) 103 and the p + site (B) 104, and the passivation film Depending on the thickness (d1 ⁇ d2) of the portion of the i-type a-Si layer 102 required as the n + portion (A) 103 and the thickness d2 required as the p + portion (B) 104, an appropriate value is obtained. Selected.
  • the ion energy increases, there is a problem that the surface of the i-type a-Si layer 102 to be processed becomes rough and the flatness cannot be maintained.
  • the ion energy (keV) is preferably 20 or less, and the thickness of the i-type a-Si layer 102 (ie, i In view of the relationship between the thickness of the mold a-Si layer and the thickness desired to remain as a passivation film, it can be said that 5 or less is preferable. If the ion energy (keV) is 5 or less, the process is performed with a lower energy, so that the flatness of the surface of the i-type a-Si layer 102 can be maintained.
  • FIG. 12 is a graph showing a profile of the phosphorus (P) concentration observed in the depth direction of the substrate by changing the ion energy of phosphorus (P). From this graph, when the ion energy (keV) at the time of ion implantation is changed to 3, 6 and 15, the position (nm) in the depth direction of the substrate where the phosphorus concentration (atoma / cm 3 ) is 10 +18 is , Approximately 30 (nm), 43 (nm), and 78 (nm). As a result, the n + site (A) 103 can be formed in the substrate in the depth direction so that a predetermined phosphorus concentration is obtained at each position of the depth.
  • keV ion energy
  • the p + site (B) 104 shown in FIG. 1 can be formed in the depth direction in the substrate so as to have a predetermined boron concentration.
  • the ion implantation in the second step is performed using, for example, an ion implantation apparatus 1200 shown in FIG.
  • FIG. 13 is a cross-sectional view of an ion implantation apparatus 1200 used in the n-type ion implantation step and the p-type ion implantation step (second step) in the embodiment of the present invention.
  • the ion implantation apparatus 1200 includes a vacuum chamber 1201, a permanent magnet 1205, an RF introduction coil 1206, a plasma generation unit using ICP discharge using an RF introduction window (quartz) 1212, and a vacuum exhaust unit (not shown). .
  • the inside of the vacuum chamber 1201 is separated into a plasma generation chamber and a plasma processing chamber by electrodes 1208 and 1209 having a plurality of openings.
  • a substrate support 1204 that supports a substrate 1203 (corresponding to the substrate 101 after the texture forming step) as an object to be processed is disposed in the plasma processing chamber.
  • the potential of the electrode 1208 is a floating potential, and the electrode 1208 has a function of stabilizing the potential of the plasma 1207.
  • the electrode 1209 has a function of extracting a positive ion from the plasma 1207 when a negative potential is applied thereto.
  • the inside of the vacuum chamber 1201 is decompressed, and a gas containing impurity atoms injected into the substrate 1203 is introduced into the plasma generation chamber. Then, by exciting the plasma 1207 using the plasma generating portion, impurity atoms are ionized, and p-type or n-type ions extracted via the electrodes 1208 and 1209 can be implanted into the substrate 1203. .
  • the implantation amount of the p-type ions and the implantation amount of the n-type ions are the sheet resistance of the p + portion (B) 104 and the sheet resistance of the n + portion (A) 103 after annealing, which will be described later, and HBC. From the relationship with the photoelectric conversion efficiency of the type crystal solar cell, it is determined as the optimum value for manufacturing the HBC type crystal solar cell 100. However, the concentration of n-type ions in the n + region (A) 103 is set to be higher than at least the concentration of n-type ions in the substrate 101.
  • a process gas in which hydrogen is added to a gas containing impurity atoms for example, BF 3 or the like
  • Conditions may be set so that hydrogen is ion-implanted into the amorphous Si layer.
  • non-mass-separated ion implantation can be employed. Unlike mass-separated ion implantation, which separates and implants only n-type ions and p-type ions (for example, P ions and B ions), non-mass-separated ion implantation uses PH 3 as a gas containing impurity atoms. A gas containing hydrogen such as BH 2 is used. As a result, in non-mass-separated ion implantation, hydrogen can be implanted into the substrate simultaneously with n-type ions and p-type ions without using a process gas to which hydrogen is added as described above. It becomes.
  • non-mass-separated ion implantation does not require a mechanism for separating ions, and thus has an advantage that the footprint is reduced in the device structure.
  • the hydrogen implanted into the amorphous Si layer simultaneously with the n-type ions and p-type ions is converted into the amorphous Si layer. Concentration distribution in the depth direction.
  • the ion implantation apparatus 1200 of FIG. 13 has four types of masks M1, M2, M3, and M4 having different positions of openings as masks for forming the part A and the part B at the time of ion implantation in the second step. It has. Therefore, the ion implantation apparatus 1200 can freely produce the ion-implanted portion A103 and the portion B104 in the amorphous Si layer region by properly using four types of masks having different opening positions.
  • a configuration is employed in which the region formed by the openings of the masks M1 and M2 and the region formed by the openings of the masks M3 and M4 are separated from each other by a desired distance without overlapping each other.
  • an ion implantation region in which comb electrodes are opposed to each other as shown in FIGS. 4A, 4B, 9A, and 9B can be formed.
  • a single opening provided in the mask M2 may be arranged so as to run vertically with respect to a plurality of openings provided in the mask M1 and spaced apart from each other in parallel.
  • a single opening provided in the mask M4 may be arranged so as to run vertically with respect to a plurality of openings provided in the mask M3 that are spaced apart from each other in parallel. preferable.
  • the present invention is not necessarily limited to using four masks.
  • a mask having a large thickness can be used, a single mask that serves both as the mask M1 and the mask M2 is used, and n + configured by the connecting portion 703b and each comb-tooth portion 703f as shown in FIG. 9B.
  • Site (A) 703 can be made together.
  • a p + region (B) 704 composed of the connecting portion 704b and each comb-tooth portion 704f is manufactured together as shown in FIG. 9B. be able to.
  • step 1 for forming the finger portion of the part A and step 2 for forming the bus bar part of the part A can be performed in one step.
  • step 3 for forming the finger portion of the portion B and step 4 for forming the bus bar portion of the portion B can be performed in one step.
  • an annealing apparatus 1300 shown in FIG. 14 employs a vertical heating furnace and is a batch type in which one substrate (substrate after n-type and p-type ion implantation steps is set in one cassette) in one cassette. A plurality of the cassettes can be heat-treated at the same time.
  • An annealing apparatus 1300 in FIG. 14 includes a heating chamber 1310 and a front chamber 1320, and the internal space 1312 of the heating chamber 1310 and the internal space 1322 of the front chamber 1320 can be blocked by a gate valve 1317. .
  • a cassette rack 1303 in which a plurality of cassettes 1301 holding the outer peripheral portion of the substrate are stacked so that the front and back surfaces of the substrate are exposed is stacked on the cassette base 1302.
  • the gate valve 1317 is opened, and the cassette base 1302 in which the cassette rack 1303 is disposed is moved from the interior space 1322 of the front chamber 1320 to the interior of the heating chamber 1310.
  • the space 1312 is raised by a moving device (not shown) (upward arrow).
  • the gate valve 1317 is closed, and the internal space 1312 of the heating chamber 1310 is set to a reduced pressure atmosphere using the exhaust device (P) 1314.
  • the atmospheric pressure annealing may be performed in an atmospheric pressure atmosphere without reducing the pressure in the internal space 1312 of the heating chamber 1310.
  • an annealing gas is introduced into the internal space 1312 of the heating chamber 1310, and annealing is performed with a predetermined temperature profile in a controlled atmosphere.
  • the gas introduced into the internal space 1312 of the heating chamber 1310 is oxygen gas, nitrogen gas, or a gas containing both oxygen gas and nitrogen gas.
  • nitrogen gas is used as the annealing gas
  • hydrogen gas may be added to the nitrogen gas. In this way, by adding hydrogen to the annealing gas, it is possible to compensate for the hydrogen injected into the i-type a-Si layer in the second step being detached from the substrate by heating.
  • an annealing gas in which 3% or less of hydrogen is added to the nitrogen gas is used.
  • the introduction of the gas is stopped and the gate valve 1317 is opened with the internal space 1312 of the heating chamber 1310 opened to the atmosphere.
  • the cassette base 1302 is lowered from the internal space 1312 of the heating chamber 1310 to the internal space 1322 of the front chamber 1320 by a moving device (not shown) (downward arrow).
  • the annealing process in the embodiment of the present invention is performed by the above procedure.
  • the conditions for the annealing treatment are determined as optimum conditions corresponding to the diffusion coefficients of n-type ions and p-type ions inside the substrate.
  • the annealing temperature is desirably 600 ° C. or lower. This prevents the i-type a-Si layer 102 including the n + site (A) 103 and the p + site (B) 104 from being crystallized to deteriorate the function of the i-type a-Si layer as a passivation film. Because.
  • the annealing temperature is more preferably 400 ° C. or lower.
  • the time required for the annealing treatment is about 30 to 60 minutes.
  • a metal film for example, a Cu film
  • the metal film is used as an electrode by performing a desired patterning process.
  • an Ag film or the like is preferably used in addition to the Cu film.
  • the electrode is not limited to the metal film, and a transparent conductive film may be used instead of the metal film.
  • an inter-back type sputtering apparatus 1400 shown in FIG. 15 is used to form the metal film.
  • the substrate 1458 (corresponding to the substrate 101 on which the portion (A) 103 and the portion (B) 104 are formed) is loaded into a loading / unloading chamber (L / UL) by a transfer device (not shown).
  • 1451, the heating chamber (H) 1452, and the film formation chamber (S1) 1453 can be moved.
  • exhaust devices 1451P, 1452P, and 1453P for individually depressurizing the internal space are arranged.
  • the substrate 1458 is introduced from the outside (atmosphere) of the manufacturing apparatus into the charging / unloading chamber 1451 at atmospheric pressure. Thereafter, the preparation / extraction chamber 1451 is depressurized (depressurized atmosphere) using the exhaust device 1451P. Next, the substrate 1458 is transferred from the pressure-removed preparation / extraction chamber 1451 to the heating chamber 1452 and subjected to a desired heat treatment by the heating device 1459.
  • the substrate 1458 after the heat treatment is transferred from the heating chamber 1452 to the film formation chamber 1453 and is passed in front of a target 1462 made of Cu, whereby a Cu film is formed on the substrate 1458.
  • the temperature of the substrate 1458 becomes a desired temperature by the temperature adjustment device 1461.
  • the target 1462 is placed on the backing plate 1463.
  • a desired process gas is introduced from the gas supply source 1465 into the film formation chamber 1453, and desired power is supplied to the backing plate 1463 from the power source 1464.
  • the substrate 1458 on which the Cu film is formed is transferred from the film formation chamber 1453 to the preparation / extraction chamber 1451 and taken out from the manufacturing apparatus to the outside (atmosphere).
  • an electrode localized so as to individually cover the n + site (A) 103 and the p + site (B) 104 is obtained.
  • the formation of the metal film using the sputtering apparatus has been described as the electrode forming step.
  • the electrode may be formed while patterning the electrode by a printing method.
  • FIG. 10A is a flowchart showing a manufacturing process (FIGS. 16A to 16J) of a solar cell in a conventional example.
  • FIG. 10B is a flowchart showing manufacturing steps (FIGS. 2A to 2G) of the solar cell according to the embodiment of the present invention.
  • the conventional example and the embodiment of the present invention differ in “ ⁇ (a)” and “ ⁇ (b)” described in detail below.
  • the portion (A) and the portion (B) in the conventional HBC type crystalline solar cell are formed only after the process flow of FIG. 16A to FIG. 16J ( ⁇ (a) shown in FIG. 10A).
  • i-type a-Si film formation, n-type a-Si film formation, resist coating / patterning, etching, resist peeling, etch stopper film formation / patterning, i-type a-Si film formation, p-type a-Si film formation The film is manufactured by sequentially performing 13 processing steps having a film, resist coating / patterning, etching, resist stripping, etch stopper stripping, and i-type a-Si film formation only on a separated portion.
  • FIG. 10B the part (A) and the part (B) in the HBC type crystalline solar cell according to the embodiment of the present invention are shown in the process flow of FIG. 2B to FIG. 2F ( ⁇ ( The number of processing steps formed by b)) is only six.
  • the manufacturing method according to the embodiment of the present invention it is possible to manufacture an HBC type crystalline solar cell with an extremely small number of steps as compared with the conventional manufacturing method.
  • ⁇ (a) in the manufacturing method shown in FIG. 10A and ⁇ (b) in the manufacturing method shown in FIG. 10B in the HBC type crystalline solar cell according to the embodiment of the present invention, The “expensive photolithography process and etching process” are not required from the conventional process. Therefore, according to the embodiment of the present invention shown in FIG. 10B, the complicated steps required in the prior art can be reduced, so that manufacturing can be performed with more stable process management. That is, according to the embodiment of the present invention, since an expensive manufacturing apparatus is not required, the present invention contributes to the provision of an inexpensive HBC type crystalline solar cell.
  • each of the subsequent processing steps is performed according to the conventional process ( ⁇ (a)) and the process of the embodiment of the present invention ( There is no significant difference in ⁇ (b)).
  • ⁇ (a) the conventional process
  • ⁇ (b) the process of the embodiment of the present invention
  • n + site (A) 103” and p + site (B) 104” affected by annealing are present in “i-type a-Si layer 102” in the embodiment of the present invention. For this reason, it is necessary to consider annealing conditions.
  • the temperature during the annealing treatment is preferably 600 ° C.
  • the temperature is preferably 400 ° C. or lower.
  • the present invention is widely applicable to a method for manufacturing an HBC type crystalline solar cell.
  • Such a method for manufacturing an HBC type crystalline solar cell is preferably used as a method for manufacturing a solar cell that can increase the power generation efficiency per unit area and is required to be light in operation.
  • 100 (100G) HBC type crystalline solar cell 101 substrate (substrate made of first conductivity type crystalline silicon), 101a first surface, 101b second surface, 102 amorphous Si layer, 102b outer surface (outer surface of amorphous Si layer) ), 103 part (A) (first part, part of the same conductivity type as the first conductivity type), 104 part (B) (second part, part of a conductivity type different from the first conductivity type), d1 amorphous Si layer

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Abstract

In this HBC crystalline solar cell production method: a substrate having a non-light-receiving surface and comprising a first conduction-type crystalline silicon is used; an i-type amorphous Si layer is formed so as to cover the non-light-receiving surface of the substrate; a first site having the same conduction type as the first conduction type and a second site having a different conduction type from the first conduction type are formed, at mutually separated positions on the amorphous Si layer, using an impurities introduction method using a mask; and the amorphous Si layer having had the impurities introduced thereto is annealed. The step in which the first site and the second site are formed includes: a first step in which a finger section of the first site is formed; a second step in which a busbar section of the first site is formed; a third step in which a finger section of the second site is formed; and a fourth step in which a busbar section of the second site is formed.

Description

HBC型結晶系太陽電池の製造方法および製造装置Method and apparatus for manufacturing HBC type crystalline solar cell
 本発明は、製造工程の簡素化が図れる、HBC型結晶系太陽電池の製造方法および製造装置に関する。
 本願は、2015年10月5日に日本に出願された特願2015-198028号に基づき優先権を主張し、その内容をここに援用する。
The present invention relates to a method for manufacturing an HBC type crystalline solar cell and a manufacturing apparatus that can simplify the manufacturing process.
This application claims priority based on Japanese Patent Application No. 2015-198028 filed in Japan on October 5, 2015, the contents of which are incorporated herein by reference.
 従来、結晶系シリコンを基板として用いる太陽電池(HBC型結晶系太陽電池)に関し、バックコンタクト型の太陽電池においては、高い発電効率が得られることが公知である。その中でも、ヘテロタイプのバックコンタクト型(HBC型)HBC型結晶系太陽電池においては、世界最高の発電効率が確認され、多方面から注目されている。 Conventionally, regarding a solar cell using crystalline silicon as a substrate (HBC type crystalline solar cell), it is known that high power generation efficiency can be obtained in a back contact type solar cell. Among them, in the hetero-type back contact type (HBC type) HBC type crystal solar cell, the world's highest power generation efficiency has been confirmed and has attracted attention from various fields.
 このようなHBC型結晶系太陽電池においては、シリコン基板の裏面(光入射面の反対側に位置する面)に、i型アモルファスSi層を介して、n型アモルファスSi層からなる部位とp型アモルファスSi層からなる部位とが、各々局在して配され、かつ、互い離間して構成されている。このような構成を得るため、HBC型結晶系太陽電池は、図16A~図16Jに示すような工程を経て製造されること知られている(例えば、特許文献1の従来技術等)。 In such an HBC type crystalline solar cell, a portion composed of an n-type amorphous Si layer and a p-type are disposed on the back surface of the silicon substrate (a surface located on the opposite side of the light incident surface) via an i-type amorphous Si layer. The portions made of the amorphous Si layer are arranged in a localized manner and separated from each other. In order to obtain such a configuration, it is known that the HBC type crystalline solar cell is manufactured through the processes shown in FIGS. 16A to 16J (for example, the conventional technique of Patent Document 1).
 図16A~図16Jは、従来のHBC型結晶系太陽電池に係る製造方法の一例を示す模式的な断面図である。具体的に、図16Aにおいて、シリコン1001の片面に対して、i型アモルファスSi層1002とn型アモルファスSi層1003とを成膜する。図16Bにおいて、n型アモルファスSi層1003上に、所望のパターンを有するレジスト1004を形成する。図16Cにおいて、レジスト1004を用い、i型アモルファスSi層1002とn型アモルファスSi層1003とをエッチングする。図16Dにおいて、エッチング後に、レジスト1004を剥離する。図16Eにおいて、エッチストッパー層1005を形成する。エッチストッパー層1005をマスクして、n型アモルファスSi層が形成されていない離間部のエッチストッパー層1005をエッチングする。さらに、エッチストッパー層1005の上に、シリコン1001の全域に、i型アモルファスSi層1006とp型アモルファスSi層1007とを成膜する。 16A to 16J are schematic cross-sectional views showing an example of a manufacturing method according to a conventional HBC crystal solar cell. Specifically, in FIG. 16A, an i-type amorphous Si layer 1002 and an n-type amorphous Si layer 1003 are formed on one surface of silicon 1001. In FIG. 16B, a resist 1004 having a desired pattern is formed on the n-type amorphous Si layer 1003. In FIG. 16C, resist 1004 is used to etch i-type amorphous Si layer 1002 and n-type amorphous Si layer 1003. In FIG. 16D, after the etching, the resist 1004 is peeled off. In FIG. 16E, an etch stopper layer 1005 is formed. The etch stopper layer 1005 is masked, and the etch stopper layer 1005 in the separated portion where the n-type amorphous Si layer is not formed is etched. Further, an i-type amorphous Si layer 1006 and a p-type amorphous Si layer 1007 are formed over the entire area of the silicon 1001 on the etch stopper layer 1005.
 図16Fにおいて、離間部にレジスト1008を形成する。図16Gにおいて、レジスト1008を用いて、i型アモルファスSi層1006とp型アモルファスSi層1007をエッチングする。図16Hにおいて、エッチング後に、レジスト1008を剥離する。図16Iにおいて、エッチストッパー層1005を剥離する。図16Jにおいて、i型アモルファスSi層1002どうしの離間部およびn型アモルファスSi層1003とp型アモルファスSi層1007の離間部に、i型アモルファスSi層1009を成膜する。 In FIG. 16F, a resist 1008 is formed in the separated portion. In FIG. 16G, the i-type amorphous Si layer 1006 and the p-type amorphous Si layer 1007 are etched using a resist 1008. In FIG. 16H, the resist 1008 is removed after the etching. In FIG. 16I, the etch stopper layer 1005 is peeled off. In FIG. 16J, an i-type amorphous Si layer 1009 is formed in a separation portion between i-type amorphous Si layers 1002 and a separation portion between n-type amorphous Si layer 1003 and p-type amorphous Si layer 1007.
 つまり、従来のHBC型結晶系太陽電池の製造方法においては、上述した多数の工程(図16A~図16J)を経ることによって、初めて、n型アモルファスSi層1003とp型アモルファスSi層1007からなる特定のパターン領域を作製することができる。上記特定のパターン領域を形成するには、フォトリソグラフィやエッチング等の手法を何度も行わざるを得なかった。しかしながら、このような手法でパターニングを行うと、図16A~図16Jに示すように工程の数が増え、製造ラインのコストアップに繋がり、ひいては、太陽電池の製造コストを削減することは困難であった。 That is, in the conventional method for manufacturing a HBC type crystalline solar cell, the n-type amorphous Si layer 1003 and the p-type amorphous Si layer 1007 are formed for the first time through the above-described numerous steps (FIGS. 16A to 16J). A specific pattern region can be produced. In order to form the specific pattern region, a technique such as photolithography or etching must be performed many times. However, when patterning is performed by such a method, the number of processes increases as shown in FIGS. 16A to 16J, leading to an increase in the cost of the production line. As a result, it is difficult to reduce the production cost of the solar cell. It was.
 ゆえに、上述した従来の課題を解決できる、HBC型結晶系太陽電池の製造方法および製造装置の開発が期待されていた。 Therefore, it has been expected to develop a manufacturing method and a manufacturing apparatus for an HBC crystal solar cell that can solve the conventional problems described above.
日本国特開2012-243797号公報Japanese Unexamined Patent Publication No. 2012-243797
 本発明は、上記の事情に鑑みてなされたもので、HBC型結晶系太陽電池を製造する工程の数を大幅に削減することが可能な、HBC型結晶系太陽電池の製造方法および製造装置を提供することを目的とする。 The present invention has been made in view of the above circumstances, and provides a method and apparatus for manufacturing an HBC crystal solar cell that can significantly reduce the number of steps for manufacturing an HBC crystal solar cell. The purpose is to provide.
 本発明の第1態様に係るHBC型結晶系太陽電池の製造方法は、非受光面を有し、第一導電型の結晶系シリコンからなる基板を用い、前記基板の前記非受光面を覆うように、i型のアモルファスSi層を形成し、前記アモルファスSi層に対して、マスクを利用した不純物導入法により、前記第一導電型と同じ導電型の第1部位および前記第一導電型と異なる導電型の第2部位を、互いに離間した位置に形成し、不純物が導入された後の前記アモルファスSi層に対して、アニール処理を施す。前記第1部位及び前記第2部位を形成する工程は、前記第1部位のフィンガー部を形成する第1ステップと、前記第1部位のバスバー部を形成する第2ステップと、前記第2部位のフィンガー部を形成する第3ステップと、前記第2部位のバスバー部を形成する第4ステップと、を含む。
 本発明の第1態様に係るHBC型結晶系太陽電池の製造方法においては、前記第1部位及び前記第2部位を形成する工程においては、前記第1部位のフィンガー部と前記第2部位のフィンガー部とが、所望の離間部を挟んで、互いに対向して配される位置となるように、所定形状の開口部を備える複数のマスクを用いてもよい。
 本発明の第1態様に係るHBC型結晶系太陽電池の製造方法においては、前記第1ステップにおいては第1マスクが用いられ、前記第2ステップにおいては第2マスクが用いられ、前記第3ステップにおいては第3マスクが用いられ、前記第4ステップにおいては第4マスクが用いられ、第1マスク及び前記第2マスクは、第1マスクの開口部の一部と前記第2マスクの開口部の一部とが重なる領域を有しており、第3マスク及び前記第4マスクは、第3マスクの開口部の一部と前記第4マスクの開口部の一部とが重なる領域を有してもよい。
The method for manufacturing an HBC type crystalline solar cell according to the first aspect of the present invention uses a substrate having a non-light-receiving surface and made of crystalline silicon of the first conductivity type so as to cover the non-light-receiving surface of the substrate. In addition, an i-type amorphous Si layer is formed, and differs from the first conductivity type and the first conductivity type by the impurity introduction method using a mask with respect to the amorphous Si layer. Conductive type second portions are formed at positions spaced apart from each other, and annealing treatment is performed on the amorphous Si layer after the impurities are introduced. The step of forming the first part and the second part includes a first step of forming a finger part of the first part, a second step of forming a bus bar part of the first part, It includes a third step of forming the finger portion and a fourth step of forming the bus bar portion of the second portion.
In the method for manufacturing an HBC crystal solar cell according to the first aspect of the present invention, in the step of forming the first part and the second part, the finger part of the first part and the finger of the second part A plurality of masks each having an opening of a predetermined shape may be used so that the portion is positioned opposite to each other with a desired spacing portion interposed therebetween.
In the method for manufacturing an HBC type crystalline solar cell according to the first aspect of the present invention, the first mask is used in the first step, the second mask is used in the second step, and the third step. In the fourth step, the third mask is used, and in the fourth step, the fourth mask is used. The first mask and the second mask are formed by a part of the opening of the first mask and the opening of the second mask. The third mask and the fourth mask each have a region where a part of the opening of the third mask and a part of the opening of the fourth mask overlap. Also good.
 本発明の第2態様に係るHBC型結晶系太陽電池の製造装置は、本発明の第1態様に係る製造方法において使用する製造装置であって、前記第1部位及び前記第2部位を形成する工程において不純物をアモルファスSi層に導入する際に前記第1部位と前記第2部位を形成するためのマスクとして、開口部の位置が互いに異なる第1マスク、第2マスク、第3マスク、及び第4マスクを備える。
 本発明の第2態様に係るHBC型結晶系太陽電池の製造装置においては、前記第1マスク及び前記第2マスクの開口部による領域と、前記第3マスク及び前記第4マスクの開口部による領域とが、互いに重なることなく、所望の距離をもって離間してもよい。
 本発明の第2態様に係るHBC型結晶系太陽電池の製造装置においては、前記第1マスクに設けられた互いに離間して並行に配された複数の開口部に対して、前記第2マスクに設けられた単一の開口部が縦断するように配置されてもよい。
 本発明の第2態様に係るHBC型結晶系太陽電池の製造装置においては、前記第3マスクに設けられた互いに離間して並行に配された複数の開口部に対して、前記第3マスクに設けられた単一の開口部が縦断するように配置されてもよい。
An apparatus for manufacturing an HBC crystal solar cell according to a second aspect of the present invention is a manufacturing apparatus used in the manufacturing method according to the first aspect of the present invention, and forms the first part and the second part. As a mask for forming the first part and the second part when introducing impurities into the amorphous Si layer in the process, a first mask, a second mask, a third mask, 4 masks are provided.
In the apparatus for manufacturing an HBC type crystalline solar cell according to the second aspect of the present invention, a region formed by openings of the first mask and the second mask, and a region formed by openings of the third mask and the fourth mask. May be separated by a desired distance without overlapping each other.
In the apparatus for manufacturing an HBC type crystalline solar cell according to the second aspect of the present invention, the second mask has a plurality of openings provided in the first mask and spaced apart from each other in parallel. The single opening provided may be arranged so as to run vertically.
In the apparatus for manufacturing an HBC type crystalline solar cell according to the second aspect of the present invention, the third mask is provided in the third mask with respect to a plurality of openings provided in the third mask and arranged in parallel to each other. The single opening provided may be arranged so as to run vertically.
 本発明の実施形態に係るHBC型結晶系太陽電池の製造方法は、基板の非受光面側をなす一面を覆うように設けたi型のアモルファスSi層に対して、マスクを利用した不純物導入法により、基板と同じ導電型の部位Aおよび基板と異なる導電型の部位Bを、互いに離間した位置に形成した後、アニール処理を行う。これにより、マスクに設けた開口部の形状に応じた、アモルファスSi層の領域に対して、不純物導入された部位Aと部位Bが形成され、かつ、部位Aと部位Bは何れも、アモルファスSi層に内在したものとなる。その際に、不純物導入条件を変更することにより、部位A及び部位Bについて個別に、その深さ方向における濃度分布や導入プロファイを自由に制御できる。つまり、本発明の実施形態によれば、部位Aと部位Bの領域を3次元的に、アモルファスSi層の内部に構築することが可能となる。また、不純物導入後のアモルファスSi層は、部位Aと部位Bを形成する前の平坦な表面プロファイルが維持される。 A method for manufacturing an HBC type crystalline solar cell according to an embodiment of the present invention is a method for introducing an impurity using a mask with respect to an i-type amorphous Si layer provided so as to cover one surface forming a non-light-receiving surface side of a substrate. Thus, a part A having the same conductivity type as that of the substrate and a part B having a conductivity type different from that of the substrate are formed at positions separated from each other, and then annealing treatment is performed. Thereby, the part A and the part B into which impurities are introduced are formed in the region of the amorphous Si layer according to the shape of the opening provided in the mask, and both the part A and the part B are amorphous Si. Becomes inherent in the layer. At that time, by changing the impurity introduction conditions, the concentration distribution and introduction profile in the depth direction can be freely controlled for the part A and the part B individually. That is, according to the embodiment of the present invention, it is possible to construct the regions A and B in three dimensions in the amorphous Si layer. In addition, the amorphous Si layer after the introduction of impurities maintains a flat surface profile before forming the part A and the part B.
 本発明の製造方法において、前記イオン注入は、前記部位Aのフィンガー部を形成するステップ1、前記部位Aのバスバー部を形成するステップ2、前記部位Bのフィンガー部を形成するステップ3、及び、前記部位Bのバスバー部を形成するステップ4、を含んでいる。
 これにより、部位Aのフィンガー部とバスバー部、および、部位Bのフィンガー部とバスバー部を全て、不純物導入のみで、アモルファスSi層に内在するように形成することができる。
 ゆえに、従来はi型のアモルファスSi層を形成した後で、前記アモルファスSi層の上に、例えば、蒸着法やスパッタ法により成膜し、かつ、パターニングを行うことにより作製されていた、バスバー部の作製工程が不要となる。
In the manufacturing method of the present invention, the ion implantation includes the step 1 of forming the finger part of the part A, the step 2 of forming the bus bar part of the part A, the step 3 of forming the finger part of the part B, and Step 4 of forming the bus bar portion of the part B is included.
Thereby, all the finger part and bus bar part of the part A, and the finger part and bus bar part of the part B can be formed so as to be inherent in the amorphous Si layer only by introducing impurities.
Therefore, conventionally, after forming an i-type amorphous Si layer, the bus bar portion is formed by, for example, forming a film on the amorphous Si layer by vapor deposition or sputtering, and performing patterning. The manufacturing process is not required.
 上述した通り、本発明の実施形態によれば、部位A及び部位Bが形成された後であっても、アモルファスSi層の外面は平坦なプロファイルが維持されるので、後工程において形成される集電用の電極膜の平坦性が保たれる。
 よって、部位Aと部位Bのバスバー部に各々重なるように電極膜を残すために行われるパターニング(フォトリソグラフィ)処理の安定化も図れる。
 したがって、本発明は、製造ラインの工程の数を大幅に削減することが可能な、HBC型結晶系太陽電池の製造方法の提供に貢献する。
As described above, according to the embodiment of the present invention, the flat surface is maintained on the outer surface of the amorphous Si layer even after the site A and the site B are formed. The flatness of the electrode film for electricity is maintained.
Therefore, it is possible to stabilize the patterning (photolithography) process performed to leave the electrode film so as to overlap the bus bar portions of the part A and the part B, respectively.
Therefore, this invention contributes to provision of the manufacturing method of the HBC type | mold crystalline solar cell which can reduce the number of processes of a manufacturing line significantly.
 本発明の実施形態に係るHBC型結晶系太陽電池の製造装置は、上述した製造方法において使用する製造装置であって、前記第二工程における不純物導入時に、前記部位Aと前記部位Bを形成するためのマスクとして、開口部の位置や形状が異なる4種類のマスクM1、M2、M3、M4を備えている。これにより、不純物導入される領域を、異なる4つのパターンで順に作り分けることができる。例えば、2つのパターンを用いて部位Aを形成し、残りの2つのパターンを用いて部位Bを形成することにより、部位Aと部位Bが配される領域の形状を自由に設計することが可能となる。 An apparatus for manufacturing an HBC type crystalline solar cell according to an embodiment of the present invention is a manufacturing apparatus used in the above-described manufacturing method, and forms the part A and the part B when introducing impurities in the second step. For this purpose, four types of masks M1, M2, M3, and M4 having different positions and shapes of openings are provided. Thereby, the region into which the impurity is introduced can be formed in order in four different patterns. For example, by forming part A using two patterns and forming part B using the remaining two patterns, the shape of the region where part A and part B are arranged can be designed freely It becomes.
 より具体的には、マスクM1により部位Aの櫛歯部を、マスクM2により部位Aの櫛歯部を接続する連結部を、マスクM3により部位Bの櫛歯部を、マスクM4により部位Bの櫛歯部を接続する連結部を、それぞれ形成することにより、部位Aと部位Bを何れも櫛歯状として、一方の櫛歯部どうしの間に、他方の櫛歯部が離間して配置され、かつ、部位Aと部位Bの各櫛歯部どうしを各々電気的に接続する連結部を、不純物導入するだけで所望の被処理体(被膜)の内部に形成することが可能となる。
 ゆえに、本発明は、従来の製造方法に比べて極めて少ない工程数によって、HBC型結晶系太陽電池を作製することができるので、低コストの製造ラインの構築に貢献する。
 また、本発明によれば、部位Aと部位Bが配される領域のレイアウトの最適化が図れるので、太陽電池の発電効率等の特性を柔軟に改善することにも寄与する。
More specifically, the comb M of the part A is connected by the mask M1, the connecting part connecting the comb of the part A by the mask M2, the comb of the part B by the mask M3, and the part B of the part B by the mask M4. By forming the connecting portions for connecting the comb teeth portions, both the portion A and the portion B are formed in a comb shape, and the other comb tooth portions are arranged apart from each other. And the connection part which electrically connects each comb-tooth part of the site | part A and the site | part B can be formed in a desired to-be-processed object (coating film) only by introduce | transducing an impurity.
Therefore, the present invention can produce an HBC type crystalline solar cell with an extremely small number of steps as compared with the conventional production method, which contributes to the construction of a low-cost production line.
Further, according to the present invention, the layout of the region where the part A and the part B are arranged can be optimized, which contributes to flexibly improving characteristics such as power generation efficiency of the solar cell.
本発明の実施形態に係るHBC型結晶系太陽電池の一実施形態を示す模式断面図である。It is a schematic cross section which shows one Embodiment of the HBC type | system | group crystalline solar cell which concerns on embodiment of this invention. 図1に示すHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the HBC type | mold crystalline solar cell shown in FIG. 図1に示すHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the HBC type | mold crystalline solar cell shown in FIG. 図1に示すHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the HBC type | mold crystalline solar cell shown in FIG. 図1に示すHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the HBC type | mold crystalline solar cell shown in FIG. 図1に示すHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the HBC type | mold crystalline solar cell shown in FIG. 図1に示すHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the HBC type | mold crystalline solar cell shown in FIG. 図1に示すHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the HBC type | mold crystalline solar cell shown in FIG. 本発明の実施形態に係る製造装置が備えるマスクM1の一例を示す模式平面図である。It is a schematic plan view which shows an example of the mask M1 with which the manufacturing apparatus which concerns on embodiment of this invention is provided. 本発明の実施形態に係る製造装置が備えるマスクM2の一例を示す模式平面図である。It is a schematic plan view which shows an example of the mask M2 with which the manufacturing apparatus which concerns on embodiment of this invention is provided. 本発明の実施形態に係る製造装置が備えるマスクM3の一例を示す模式平面図である。It is a schematic plan view which shows an example of the mask M3 with which the manufacturing apparatus which concerns on embodiment of this invention is provided. 本発明の実施形態に係る製造装置が備えるマスクM4の一例を示す模式平面図である。It is a schematic plan view which shows an example of the mask M4 with which the manufacturing apparatus which concerns on embodiment of this invention is provided. 図3A~図3Dに示すマスクを用いて形成された不純物導入部の一例を示す模式平面図である。FIG. 4 is a schematic plan view showing an example of an impurity introduction portion formed using the mask shown in FIGS. 3A to 3D. 図3A~図3Dに示すマスクを用いて形成された不純物導入部の一例を示す模式平面図である。FIG. 4 is a schematic plan view showing an example of an impurity introduction portion formed using the mask shown in FIGS. 3A to 3D. 本発明の実施形態に係る製造装置が備えるマスクM1の他の一例を示す模式平面図である。It is a schematic plan view which shows another example of the mask M1 with which the manufacturing apparatus which concerns on embodiment of this invention is provided. 本発明の実施形態に係る製造装置が備えるマスクM2の他の一例を示す模式平面図である。It is a schematic plan view which shows another example of the mask M2 with which the manufacturing apparatus which concerns on embodiment of this invention is provided. 本発明の実施形態に係る製造装置が備えるマスクM3の他の一例を示す模式平面図である。It is a schematic plan view which shows another example of the mask M3 with which the manufacturing apparatus which concerns on embodiment of this invention is provided. 本発明の実施形態に係る製造装置が備えるマスクM4の他の一例を示す模式平面図である。It is a schematic plan view which shows another example of the mask M4 with which the manufacturing apparatus which concerns on embodiment of this invention is provided. 図5~図8に示すマスクを用いて形成された不純物導入部の一例を示す模式平面図である。FIG. 9 is a schematic plan view showing an example of an impurity introduction portion formed using the mask shown in FIGS. 図5~図8に示すマスクを用いて形成された不純物導入部の一例を示す模式平面図である。FIG. 9 is a schematic plan view showing an example of an impurity introduction portion formed using the mask shown in FIGS. 従来例におけるHBC型結晶系太陽電池を製造する工程を示すフロー図である。It is a flowchart which shows the process of manufacturing the HBC type crystalline solar cell in a prior art example. 本発明の実施形態に係るHBC型結晶系太陽電池を製造する工程を示すフロー図である。It is a flowchart which shows the process of manufacturing the HBC type | mold crystalline solar cell which concerns on embodiment of this invention. ボロン(B)のイオンエネルギーとストッピングレンジとの関係を示すグラフである。It is a graph which shows the relationship between the ion energy of boron (B), and a stopping range. リン(P)のイオンエネルギーを変えて、基板の深さ方向に観測したリン(P)濃度のプロファイルを示すグラフである。It is a graph which shows the profile of the phosphorus (P) density | concentration observed by changing the ion energy of phosphorus (P) in the depth direction of a board | substrate. イオン注入装置の模式断面図である。It is a schematic cross section of an ion implantation apparatus. アニール処理装置の模式断面図である。It is a schematic cross section of an annealing treatment apparatus. 電極膜の形成に用いる成膜装置の模式断面図である。It is a schematic cross section of the film-forming apparatus used for formation of an electrode film. 従来のHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the conventional HBC type crystal system solar cell. 従来のHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the conventional HBC type crystal system solar cell. 従来のHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the conventional HBC type crystal system solar cell. 従来のHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the conventional HBC type crystal system solar cell. 従来のHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the conventional HBC type crystal system solar cell. 従来のHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the conventional HBC type crystal system solar cell. 従来のHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the conventional HBC type crystal system solar cell. 従来のHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the conventional HBC type crystal system solar cell. 従来のHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the conventional HBC type crystal system solar cell. 従来のHBC型結晶系太陽電池を製造する手順を示す模式断面図である。It is a schematic cross section which shows the procedure which manufactures the conventional HBC type crystal system solar cell.
 以下、本発明の実施形態に係るHBC型結晶系太陽電池の製造方法の一実施形態を、図面に基づいて説明する。
 図1は、本発明の実施形態に係る、HBC型結晶系太陽電池100G(100)の構成について説明する図である。
 本実施形態では、図1に示すHBC型結晶系太陽電池を製造する方法について、図2A~図2Gを参照して詳述する。
 本発明の実施形態に係るHBC型結晶系太陽電池100G(100)においては、後述する「n部位とp部位」が、基板の裏面(光入射面の反対側:図1においては下面)を覆うように形成されており、i型のアモルファスSi層内部の裏面近傍(裏面に近い領域)に、イオン注入法により形成されている。
 なお、本実施形態では、n部位とp部位を形成するために非質量分離型のイオン注入法(プラズマドーピング法)を用いるが、本発明は、この方法を限定していない。アモルファスSi層に不純物原子をイオンの状態で導入する方法であれば、不純物導入法は、非質量分離型のイオン注入法に限定されず、質量分離型のイオン注入法等でも不純物をアモルファスSi層に導入することが可能である。以下の説明では、不純物導入法の代表例として、非質量分離型のイオン注入法を用いて詳述するが、簡便のため、非質量分離型のイオン注入を「イオン注入」と表現する。
Hereinafter, an embodiment of a method for producing an HBC crystal solar cell according to an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a diagram for explaining the configuration of an HBC crystal solar cell 100G (100) according to an embodiment of the present invention.
In the present embodiment, a method for manufacturing the HBC type crystalline solar cell shown in FIG. 1 will be described in detail with reference to FIGS. 2A to 2G.
In the HBC type crystalline solar cell 100G (100) according to the embodiment of the present invention, “n + site and p + site” described later are the back surface of the substrate (opposite side of the light incident surface: bottom surface in FIG. 1). Is formed near the back surface (region close to the back surface) inside the i-type amorphous Si layer by an ion implantation method.
In this embodiment, a non-mass separation type ion implantation method (plasma doping method) is used to form the n + site and the p + site, but the present invention is not limited to this method. As long as impurity atoms are introduced into the amorphous Si layer in an ion state, the impurity introduction method is not limited to the non-mass separation type ion implantation method. It is possible to introduce to. In the following description, as a typical example of the impurity introduction method, a non-mass separation type ion implantation method will be described in detail. However, for the sake of simplicity, the non-mass separation type ion implantation is expressed as “ion implantation”.
 本発明の実施形態に係るHBC型結晶系太陽電池100Gは、光(図1に示されている矢印)が入射する第1面101aと、第1面101aとは反対側に位置する第2面101b(非受光面)とを有し、かつ、光電変換機能を発現する第一導電型(例えば、n型半導体)の結晶系シリコンからなる基板101を備える。更に、HBC型結晶系太陽電池100Gは、基板101の第2面101bを覆うように配されるi型のアモルファスSi層102を備えている。 The HBC type crystalline solar cell 100G according to the embodiment of the present invention includes a first surface 101a on which light (an arrow shown in FIG. 1) is incident and a second surface located on the opposite side of the first surface 101a. And a substrate 101 made of crystalline silicon of a first conductivity type (for example, an n-type semiconductor) having a 101b (non-light receiving surface) and exhibiting a photoelectric conversion function. Furthermore, the HBC type crystalline solar cell 100G includes an i-type amorphous Si layer 102 disposed so as to cover the second surface 101b of the substrate 101.
 また、HBC型結晶系太陽電池100Gにおいては、アモルファスSi層102に内在され、かつ、前記アモルファスSi層102の外面側に一部が露呈されるように、前記第一導電型と同じ導電型(例えば、n型)の部位(A)103および前記第一導電型と異なる導電型の部位(B)104が、互いに離間して配置されている。図1において、部位(C)が、部位(A)103と部位(B)104の離間部を表している。部位(A)103は、本発明の第1部位(部位A)に相当する。部位(B)104は、本発明の第2部位(部位B)に相当する。 Further, in the HBC type crystalline solar cell 100G, the same conductivity type as the first conductivity type (in the amorphous Si layer 102 and so as to be partially exposed on the outer surface side of the amorphous Si layer 102) For example, an n + -type portion (A) 103 and a portion (B) 104 having a conductivity type different from that of the first conductivity type are arranged apart from each other. In FIG. 1, a part (C) represents a separation part between the part (A) 103 and the part (B) 104. The part (A) 103 corresponds to the first part (part A) of the present invention. Part (B) 104 corresponds to the second part (part B) of the present invention.
 すなわち、本発明の実施形態に係るHBC型結晶系太陽電池100Gは、部位(A)103および部位(B)104が、各々、基板101の表層部に所望の元素を注入して形成された局在領域である場合を示している。
 図1において、符号d1がアモルファスSi層102の厚さを表しており、符号d2が部位(A)103および部位(B)104の深さを表している。前記アモルファスSi層102の厚さd1の一例としては、約20nmが挙げられる。部位(A)103および部位(B)104は、後述するマスクを利用したイオン注入法により形成される。
That is, in the HBC type crystalline solar cell 100G according to the embodiment of the present invention, the part (A) 103 and the part (B) 104 are each formed by injecting a desired element into the surface layer portion of the substrate 101. The case where it is a present area is shown.
In FIG. 1, the symbol d <b> 1 represents the thickness of the amorphous Si layer 102, and the symbol d <b> 2 represents the depth of the part (A) 103 and the part (B) 104. An example of the thickness d1 of the amorphous Si layer 102 is about 20 nm. The part (A) 103 and the part (B) 104 are formed by an ion implantation method using a mask to be described later.
 この手法によれば、アモルファスSi層102に対して、部位(A)103と部位(B)104を各々作製するためのイオン注入処理を施すだけで、部位(A)103と部位(B)104とを形成することができる。
 図2A~図2Gは、図1に示すHBC型結晶系太陽電池を製造する手順を示す模式断面図である。以下では、「アモルファスSi」を「a-Si」と略記する。
According to this method, the part (A) 103 and the part (B) 104 are simply applied to the amorphous Si layer 102 by performing an ion implantation process for producing the part (A) 103 and the part (B) 104, respectively. And can be formed.
2A to 2G are schematic cross-sectional views showing a procedure for manufacturing the HBC type crystalline solar cell shown in FIG. Hereinafter, “amorphous Si” is abbreviated as “a-Si”.
 本発明の実施形態に係るHBC型結晶系太陽電池100Gを製造するための各工程について、図2A~図4Bを用い、詳しく説明する。まず、結晶系シリコンからなる基板101に対して、例えば、水酸化カリウム(KOH)や水酸化ナトリウム(NaOH)をエッチャントとして用いたウェットエッチング処理を行う。そして、処理後の基板101に残存する有機物および金属汚染物を、フッ硝酸を用いて除去する。これにより、図2Aに示すように、テクスチャーを有する形状となるように第1面101a(主面)を加工する(前処理工程)。 Each step for manufacturing the HBC type crystalline solar cell 100G according to the embodiment of the present invention will be described in detail with reference to FIGS. 2A to 4B. First, a wet etching process using, for example, potassium hydroxide (KOH) or sodium hydroxide (NaOH) as an etchant is performed on the substrate 101 made of crystalline silicon. Then, organic substances and metal contaminants remaining on the processed substrate 101 are removed using hydrofluoric acid. Thereby, as shown to FIG. 2A, the 1st surface 101a (main surface) is processed so that it may become a shape which has a texture (pre-processing process).
 上記のテクスチャーを有する形状に加工された第1面101aを有する基板101の第2面101bに、i型a-Si層102を、所定の条件で、例えば、CVD法により成膜する(第一工程:図2B)。
 以下の第二工程では、i型a-Si層102の表面102bに、所定のマスクM1~M4を個別に用いて、所望のイオンを注入する。図2C~図2Fにおいて、マスクM1~M4の下方に示す矢印は、イオンの注入方向を表している。
An i-type a-Si layer 102 is formed on the second surface 101b of the substrate 101 having the first surface 101a processed into a shape having the above texture, under a predetermined condition, for example, by a CVD method (first Process: FIG. 2B).
In the following second step, desired ions are implanted into the surface 102b of the i-type a-Si layer 102 by using predetermined masks M1 to M4 individually. In FIGS. 2C to 2F, the arrows shown below the masks M1 to M4 indicate the ion implantation direction.
 図2Cに示すように、i型a-Si層102の外面102bの近傍領域(外面102bに近い部分)に、マスクM1(第1マスク、図3A)を配置する。そして、マスクM1に設けられた開口部S1を通して、リン(P)イオン等のn型イオンを、i型a-Si層102の外面102bに対して局所的に注入する。これにより、n部位(A)103のうち、櫛歯部103f(図4A)を形成する(マスクM1を用いた第二工程)。 As shown in FIG. 2C, a mask M1 (first mask, FIG. 3A) is arranged in a region near the outer surface 102b of the i-type a-Si layer 102 (portion close to the outer surface 102b). Then, n-type ions such as phosphorus (P) ions are locally implanted into the outer surface 102b of the i-type a-Si layer 102 through the opening S1 provided in the mask M1. Thereby, the comb-tooth part 103f (FIG. 4A) is formed among n + site | part (A) 103 (2nd process using the mask M1).
 図2Dに示すように、i型a-Si層102の外面102bの近傍領域に、マスクM1に代えてマスクM2(第2マスク、図3B)を配置する。そして、マスクM2に設けられた開口部S2を通して、リン(P)イオン等のn型イオンを、i型a-Si層102の外面102bに対して局所的に注入する。これにより、n部位(A)103のうち、連結部103bを形成する(マスクM2を用いた第二工程)。その結果、先に作製した櫛歯部103fどうしが、連結部103bによって各々電気的に接続された、n部位(A)103が得られる。 As shown in FIG. 2D, a mask M2 (second mask, FIG. 3B) is arranged in the vicinity of the outer surface 102b of the i-type a-Si layer 102 instead of the mask M1. Then, n-type ions such as phosphorus (P) ions are locally implanted into the outer surface 102b of the i-type a-Si layer 102 through the opening S2 provided in the mask M2. Thereby, the connection part 103b is formed among n <+> site | part (A) 103 (2nd process using the mask M2). As a result, an n + site (A) 103 is obtained in which the comb-tooth portions 103f produced earlier are electrically connected to each other by the connecting portion 103b.
 図2Eに示すように、i型a-Si層102の外面102bの近傍領域に、マスクM2に代えてマスクM3(第3マスク、図3C)を配置する。そして、マスクM3に設けられた開口部S3を通して、n部位(A)103の櫛歯部103fどうしの間で、かつ、n部位(A)103と重ならない位置に、ボロン(B)イオン等のp型イオンを局所的に注入する。これにより、p部位(B)104のうち、櫛歯部104f(図4B)を形成する(マスクM3を用いた第二工程)。 As shown in FIG. 2E, a mask M3 (third mask, FIG. 3C) is arranged in the vicinity of the outer surface 102b of the i-type a-Si layer 102 instead of the mask M2. Then, through the opening S3, it provided on the mask M3, between and how the comb tooth 103f of the n + region (A) 103, and a position which does not overlap with the n + region (A) 103, boron (B) ions A p-type ion such as is locally implanted. Thereby, the comb-tooth part 104f (FIG. 4B) is formed in the p + region (B) 104 (second step using the mask M3).
 図2Fに示すように、i型a-Si層102の外面102bの近傍領域に、マスクM3に代えてマスクM4(第4マスク、図3D)を配置する。そして、マスクM4に設けられた開口部S4を通して、ボロン(B)イオン等のp型イオンを、i型a-Si層102の外面102bに対して局所的に注入する。これにより、p部位(B)104のうち、連結部104bを形成する(マスクM4を用いた第二工程)。その結果、先に作製した櫛歯部104fどうしが、連結部104bによって各々電気的に接続された、p部位(B)104が得られる。 As shown in FIG. 2F, a mask M4 (fourth mask, FIG. 3D) is arranged in the vicinity of the outer surface 102b of the i-type a-Si layer 102 instead of the mask M3. Then, p-type ions such as boron (B) ions are locally implanted into the outer surface 102b of the i-type a-Si layer 102 through the opening S4 provided in the mask M4. Thereby, the connection part 104b is formed among the p + site | parts (B) 104 (2nd process using the mask M4). As a result, the p + site (B) 104 is obtained in which the previously produced comb teeth 104f are electrically connected to each other by the connecting portion 104b.
 上述したマスクM1~M4を用いた第二工程により、i型a-Si層102に内在され、かつ、前記a-Si層102の外面側に一部が露呈されるように、基板101の第一導電型と同じ導電型(例えば、n型)の部位(A)103および前記第一導電型と異なる導電型の部位(B)104が、互いに離間して配置されてなるHBC型結晶系太陽電池100Gが形成される(図2G)。ここで、部位(C)は、i型a-Si層102であって、部位(A)と部位(B)の間に位置する離間部を表している。 By the second process using the masks M1 to M4 described above, the first step of the substrate 101 is performed so as to be inherent in the i-type a-Si layer 102 and partially exposed to the outer surface side of the a-Si layer 102. HBC type crystal system in which a part (A) 103 of the same conductivity type (for example, n + type) as one conductivity type and a part (B) 104 of a conductivity type different from the first conductivity type are arranged apart from each other A solar cell 100G is formed (FIG. 2G). Here, the part (C) is the i-type a-Si layer 102 and represents a separation portion located between the part (A) and the part (B).
 さらに、本発明の実施形態に係るHBC型結晶系太陽電池の製造方法においては、基板の非受光面側をなす一面を覆うように設けたi型のアモルファスSi層に対して、マスクを利用したイオン注入法により、基板101と同じ導電型の部位Aおよび基板101と異なる導電型の部位Bを、互いに離間した位置に形成した後、アニール処理を行う(第三工程)。
 これにより、開口部の形状が異なるマスクを用いることにより、アモルファスSi層の領域に対して、イオン注入された部位A103と部位B104を自在に作製することができる。この部位Aと部位Bは何れも、アモルファスSi層102に内在しており、イオン注入条件を変更することにより、部位A及び部位Bについて、個別に、アモルファスSi層の深さ方向における濃度分布や注入プロファイを自由に制御できる。
Furthermore, in the method for manufacturing an HBC type crystalline solar cell according to the embodiment of the present invention, a mask is used for the i-type amorphous Si layer provided so as to cover one surface forming the non-light-receiving surface side of the substrate. After forming the part A of the same conductivity type as the substrate 101 and the part B of the conductivity type different from the substrate 101 by ion implantation, they are annealed (third process).
As a result, by using a mask having a different opening shape, the ion-implanted portion A103 and the portion B104 can be freely formed in the region of the amorphous Si layer. Both the part A and the part B are inherent in the amorphous Si layer 102. By changing the ion implantation conditions, the concentration distribution in the depth direction of the amorphous Si layer can be individually determined for the part A and the part B. The injection profile can be freely controlled.
 このマスクを利用したイオン注入法によれば、部位Aと部位Bの領域を3次元的に、アモルファスSi層102の内部に構築できる。さらに、アモルファスSi層102にイオンを注入した後のアモルファスSi層102の外面102bにおいては、部位Aと部位Bを形成する前の平坦な表面プロファイルが維持される。ゆえに、後工程において形成される電極膜や反射膜も平坦性が保たれ、部位A及び部位Bの各々に重なるように電極膜を残すために行われるパターニング(フォトリソグラフィ)処理の安定化が図れる。 According to the ion implantation method using this mask, the regions A and B can be three-dimensionally built inside the amorphous Si layer 102. Further, on the outer surface 102b of the amorphous Si layer 102 after ions are implanted into the amorphous Si layer 102, a flat surface profile before the formation of the portion A and the portion B is maintained. Therefore, the flatness is maintained in the electrode film and the reflective film formed in the subsequent process, and the patterning (photolithography) process performed to leave the electrode film so as to overlap each of the part A and the part B can be stabilized. .
 なお、基板101の第1面101aには、必要に応じて不図示の反射防止層(Anti Reflection Layer:AR層)が配される構成が採用されてもよい。反射防止層(不図示)としては、例えば、絶縁性の窒化膜、窒化ケイ素膜、酸化チタン膜、酸化アルミニウム膜等が好適に用いられる。 The first surface 101a of the substrate 101 may employ a configuration in which an anti-reflection layer (Anti Reflection Layer: AR layer) (not shown) is disposed as necessary. As the antireflection layer (not shown), for example, an insulating nitride film, silicon nitride film, titanium oxide film, aluminum oxide film, or the like is preferably used.
 図5~図8は、本発明の実施形態に係る製造装置が備えるマスクM1~M4の他の一例を示す模式平面図である。図9A及び図9Bは、図5~図8に示すマスクを用いて形成されたイオン注入部の一例を示す模式平面図である。
 前述した図3A~図3Dは、開口部の配置が実験レベルである構成例を示している。これに対して、図5~図8は、開口部の配置が実用レベル(基板の全域を十分に活用)である構成例である。図5~図8の各図の中に記載された数字は、mm単位の寸法である。
5 to 8 are schematic plan views showing other examples of the masks M1 to M4 provided in the manufacturing apparatus according to the embodiment of the present invention. 9A and 9B are schematic plan views showing an example of an ion implantation portion formed using the mask shown in FIGS. 5 to 8. FIG.
3A to 3D described above show configuration examples in which the arrangement of the openings is at an experimental level. On the other hand, FIGS. 5 to 8 are configuration examples in which the arrangement of the openings is at a practical level (the entire area of the substrate is fully utilized). The numbers described in each of FIGS. 5 to 8 are dimensions in mm.
 マスクM1(図5)には、0.3mm幅の開口部S1が、ピッチ0.7mmの間隔をおいて7本並行して配置されている。図1におけるn部位(A)103のうち、櫛歯部103fを形成するために、図3Aに示すマスクM1と同じ目的で、図5に示すマスクM1も用いられる。
 すなわち、図9A及び図9Bに示すように、図5に示すマスクM1によって形成される各櫛歯部703fの先端位置は、直線(下方の二点鎖線)をなすように構成される。また、各櫛歯部703fの後端位置は、図6に示すマスクM2を用いて作製される基板の縁に沿った連結部703bの位置(上方の二点鎖線)と重なるように構成される。
In the mask M1 (FIG. 5), seven openings S1 each having a width of 0.3 mm are arranged in parallel with a pitch of 0.7 mm. 5 is used for the same purpose as the mask M1 shown in FIG. 3A in order to form the comb-tooth portion 103f in the n + portion (A) 103 in FIG.
That is, as shown in FIGS. 9A and 9B, the tip positions of the comb teeth 703f formed by the mask M1 shown in FIG. 5 are configured to form a straight line (lower two-dot chain line). Further, the rear end position of each comb-tooth portion 703f is configured to overlap with the position (upper two-dot chain line) of the connecting portion 703b along the edge of the substrate manufactured using the mask M2 shown in FIG. .
 マスクM2(図6)には、2mm幅の開口部S2が基板の縁から内側0.5mmだけ離れた位置に配置されており、図1におけるn部位(A)103のうち、連結部103bを形成するために、図3Bに示すマスクM2と同じ目的で、図6に示すマスクM2も用いられる。
 すなわち、図9A及び図9Bに示すように、図6に示すマスクM2によって作製される連結部703bは、基板の縁に沿って配置され、上述した各櫛歯部703fの後端位置と重なるように構成される。これにより、n部位(A)703を構成する各櫛歯部703fと連結部703bは、電気的に接続された領域として機能する。
In the mask M2 (FIG. 6), an opening S2 having a width of 2 mm is disposed at a position separated by 0.5 mm on the inner side from the edge of the substrate. Of the n + portions (A) 103 in FIG. For the same purpose as the mask M2 shown in FIG. 3B, the mask M2 shown in FIG. 6 is also used.
That is, as shown in FIGS. 9A and 9B, the connecting portion 703b produced by the mask M2 shown in FIG. 6 is arranged along the edge of the substrate so as to overlap the rear end position of each of the comb teeth portions 703f described above. Configured. Thereby, each comb-tooth part 703f and the connection part 703b which comprise the n + site | part (A) 703 function as an area | region electrically connected.
 マスクM3(図7)には、0.5mm幅の開口部S3が、ピッチ0.5mmの間隔をおいて6本並行して配置されている。図1におけるp部位(B)104のうち、櫛歯部104fを形成するために、図3Cに示すマスクM3と同じ目的で、図7に示すマスクM3も用いられる。
 マスクM3(図7)の開口部S3が、マスクM1(図5)のピッチ内に収まり、かつ、マスクM3(図7)の開口部S3とマスクM1(図5)の開口部S1が互いに離間した位置をなすように構成される。つまり、マスクM1(図5)における0.7mmのピッチ内に、マスクM3(図7)における0.5mmの開口部S3が配置されるとともに、マスクM3(図7)における0.5mmのピッチ内に、マスクM1(図5)における0.3mmの開口部S1が配置される。
 すなわち、図9A及び図9Bに示すように、図7に示すマスクM3によって作製される各櫛歯部704fの先端位置は、直線(上方の二点鎖線)をなすように構成される。また、作製される各櫛歯部704fの後端位置は、図6に示すマスクM2を用いて作製される基板の縁に沿った連結部703bの位置(下方の二点鎖線)と重なるように構成される。
In the mask M3 (FIG. 7), six openings S3 each having a width of 0.5 mm are arranged in parallel with a pitch of 0.5 mm. 7 is used for the same purpose as the mask M3 shown in FIG. 3C in order to form the comb-tooth portion 104f in the p + portion (B) 104 in FIG.
The openings S3 of the mask M3 (FIG. 7) are within the pitch of the mask M1 (FIG. 5), and the openings S3 of the mask M3 (FIG. 7) and the openings S1 of the mask M1 (FIG. 5) are separated from each other. It is comprised so that the made position may be made. That is, the 0.5 mm opening S3 in the mask M3 (FIG. 7) is disposed within the 0.7 mm pitch in the mask M1 (FIG. 5), and the 0.5 mm pitch in the mask M3 (FIG. 7). In addition, an opening S1 of 0.3 mm in the mask M1 (FIG. 5) is arranged.
That is, as shown in FIGS. 9A and 9B, the tip position of each comb-tooth portion 704f produced by the mask M3 shown in FIG. 7 is configured to form a straight line (upper two-dot chain line). Further, the rear end position of each comb-tooth portion 704f to be manufactured overlaps with the position of the connecting portion 703b (the lower two-dot chain line) along the edge of the substrate manufactured using the mask M2 shown in FIG. Composed.
 マスクM4(図8)には、2mm幅の開口部S2が基板の縁から内側0.5mmだけ離れた位置に配置されており、図1におけるp部位(B)104のうち、連結部104bを形成するために、図3Dに示すマスクM4と同じ目的で、図8に示すマスクM4も用いられる。
 すなわち、図9A及び図9Bに示すように、図8に示すマスクM4によって作製される連結部703bは、基板の縁に沿って配置され、上述した各櫛歯部704fの後端位置と重なるように構成される。これにより、p部位(B)704を構成する各櫛歯部703fと連結部703bは、電気的に接続された領域として機能する。
 なお、図5、図7、図9A、及び図9Bでは、各櫛歯部703f、704fと、この櫛歯部に相当する7本の開口部S1と、6本の開口部S3が図示されている。これらの図面では、これは各櫛歯部の配置状態、および、櫛歯部のそれぞれが互いに離間している状態を把握しやすくするために簡易的に示されており、実際には、先に述べた開口幅および間隔で、基板の全域を十分に活用するように、隙間なく配置される。
In the mask M4 (FIG. 8), an opening S2 having a width of 2 mm is disposed at a position separated from the edge of the substrate by 0.5 mm on the inner side, and of the p + portion (B) 104 in FIG. For the same purpose as the mask M4 shown in FIG. 3D, the mask M4 shown in FIG. 8 is also used.
That is, as shown in FIGS. 9A and 9B, the connecting portion 703b produced by the mask M4 shown in FIG. 8 is arranged along the edge of the substrate so as to overlap the rear end position of each of the comb teeth portions 704f described above. Configured. Thereby, each comb-tooth part 703f and the connection part 703b which comprise the p + site | part (B) 704 function as an area | region electrically connected.
5, 7, 9 </ b> A, and 9 </ b> B, the comb teeth 703 f and 704 f, seven openings S <b> 1 corresponding to the comb teeth, and six openings S <b> 3 are illustrated. Yes. In these drawings, this is shown simply to make it easier to grasp the arrangement state of each comb tooth portion and the state where each comb tooth portion is separated from each other. With the described opening width and interval, they are arranged without gaps so as to fully utilize the entire area of the substrate.
 上述した図5~図8に示すマスクM1~M4を用いた第二工程によっても、i型a-Si層102に内在され、かつ、前記a-Si層102の外面側に一部が露呈されるように、基板101の第一導電型と同じ導電型(例えば、n型)の部位(A)103および前記第一導電型と異なる導電型の部位(B)104が、互いに離間して配置されてなるHBC型結晶系太陽電池100、200が形成される(図1)。ここで、部位(C)は、i型a-Si層102であって、部位(A)と部位(B)の間に位置する離間部を表している。 Also in the second step using the masks M1 to M4 shown in FIGS. 5 to 8, the i-type a-Si layer 102 is partly exposed and partly exposed on the outer surface side of the a-Si layer 102. As shown, the portion (A) 103 having the same conductivity type (for example, n + type) as the first conductivity type of the substrate 101 and the portion (B) 104 having a conductivity type different from the first conductivity type are separated from each other. Arranged HBC crystal solar cells 100 and 200 are formed (FIG. 1). Here, the part (C) is the i-type a-Si layer 102 and represents a separation portion located between the part (A) and the part (B).
 以下では、本発明の実施形態に係るHBC型結晶系太陽電池の製造方法において採用されるイオン注入の条件について説明する。
 前述したように、本発明の実施形態では、開口部の形状が異なるマスクを用いることにより、アモルファスSi層の領域に対して、イオン注入された部位A103と部位B104を自在に作製することができる。この部位Aと部位Bは何れも、アモルファスSi層102に内在したものとなり、イオン注入条件を変更することにより、部位A及び部位Bについて個別に、その深さ方向における濃度分布や注入プロファイを自由に制御できる。
Hereinafter, the ion implantation conditions employed in the method for manufacturing an HBC type crystal solar cell according to an embodiment of the present invention will be described.
As described above, in the embodiment of the present invention, by using a mask having different opening shapes, the ion-implanted portion A103 and the portion B104 can be freely formed in the amorphous Si layer region. . Both site A and site B are inherent in the amorphous Si layer 102. By changing the ion implantation conditions, the concentration distribution and implantation profile in the depth direction can be freely set for site A and site B individually. Can be controlled.
 ここで、図2Bに示されるように、i型a-Si層102は、もともと、厚さ方向および面内方向において単一の膜として形成されている。このため、第一工程の後に行われる第二工程によりi型a-Si層102の外面102bの近傍領域にn部位(A)103およびp部位(B)104を形成した場合でも、離間部である部位(C)、すなわち、イオン注入されていない領域は、厚さ方向に沿ってi型a-Si層102内に単一の膜として存在している。 Here, as shown in FIG. 2B, the i-type a-Si layer 102 is originally formed as a single film in the thickness direction and the in-plane direction. Therefore, even when the n + site (A) 103 and the p + site (B) 104 are formed in the vicinity of the outer surface 102b of the i-type a-Si layer 102 by the second process performed after the first process, the separation is performed. The portion (C) which is a portion, that is, a region where ions are not implanted exists as a single film in the i-type a-Si layer 102 along the thickness direction.
 さらに、単一の膜であるi型a-Si層102に対して、基板101の第2面101bに達しないようにn部位(A)103およびp部位(B)104を形成することで、基板101の第2面101b上に接して存在するi型a-Si層102は、基板101の面内方向にわたって連続した単一の膜として存在している。
 このように、図2Gに示されるi型a-Si層102は、n部位(A)103およびp部位(B)104以外の領域において「単一の膜」として存在する(ここで、「単一の膜」とは、i型a-Si層102の内部に界面が存在しないことを意味する)ことにより、i型a-Si層102のパッシベーション膜としての機能が維持される。
Further, the n + site (A) 103 and the p + site (B) 104 are formed so as not to reach the second surface 101b of the substrate 101 with respect to the i-type a-Si layer 102 which is a single film. Thus, the i-type a-Si layer 102 that is in contact with the second surface 101 b of the substrate 101 exists as a single film that is continuous over the in-plane direction of the substrate 101.
As described above, the i-type a-Si layer 102 shown in FIG. 2G exists as a “single film” in a region other than the n + site (A) 103 and the p + site (B) 104 (where, The “single film” means that there is no interface inside the i-type a-Si layer 102), thereby maintaining the function of the i-type a-Si layer 102 as a passivation film.
 これに対し、図16Jに示される従来の構成においては、n型a-Si層1003およびp型a-Si層1007を形成するために、これらの層1003、1007と基板1001との間に形成されるi型a-Si層1002は、エッチングにより基板の面方向にわたって一旦離間部が形成される(図16C及び図16Gに示す状態)。最終的には、図16Jに示されるように、この離間部にi型a-Si層1009が成膜され、離間部を埋め込む構造が得られている。このため、図16Jに示すi型a-Si層では、基板の面内方向に界面が存在する(図16Jに示す符号1002と符号1009との間の点線が界面に相当する)。このような界面の存在により基板の面内方向で膜が不連続となり、i型a-Si層がパッシベーション膜として有効に機能しない虞がある。 On the other hand, in the conventional configuration shown in FIG. 16J, the n-type a-Si layer 1003 and the p-type a-Si layer 1007 are formed between these layers 1003 and 1007 and the substrate 1001. In the i-type a-Si layer 1002 to be formed, a space is once formed in the surface direction of the substrate by etching (state shown in FIGS. 16C and 16G). Eventually, as shown in FIG. 16J, an i-type a-Si layer 1009 is formed in the spacing portion to embed the spacing portion. For this reason, in the i-type a-Si layer shown in FIG. 16J, an interface exists in the in-plane direction of the substrate (a dotted line between reference numerals 1002 and 1009 shown in FIG. 16J corresponds to the interface). Due to the presence of such an interface, the film becomes discontinuous in the in-plane direction of the substrate, and the i-type a-Si layer may not function effectively as a passivation film.
 図11は、ボロン(B)のイオンエネルギー(Ion Energy)とストッピングレンジ(Stopping Range)との関係を示すグラフである。
 ストッピングレンジは、注入したイオンが、膜の深さ方向において、どこまで膜に進入できるかを表わす指標である。
 このグラフより、イオンエネルギーとストッピングレンジとは、イオンエネルギーが増加すればイオンが注入される深さが大きくなるという比例の関係にあることが分かった。
 ゆえに、所定のイオンエネルギーを選択することにより、i型a-Si層102に対して、ボロン(B)をイオン注入した際に、特定の深さで留める位置を変えることが可能である。この関係を利用することにより、図1に示すp部位(B)104を再現性よく形成できる。
FIG. 11 is a graph showing the relationship between the ion energy (Ion Energy) of boron (B) and the stopping range.
The stopping range is an index representing how far the implanted ions can enter the film in the depth direction of the film.
From this graph, it was found that the ion energy and the stopping range have a proportional relationship that the ion implantation depth increases as the ion energy increases.
Therefore, by selecting a predetermined ion energy, when boron (B) is ion-implanted into the i-type a-Si layer 102, it is possible to change the position where the ion is retained at a specific depth. By utilizing this relationship, the p + site (B) 104 shown in FIG. 1 can be formed with good reproducibility.
 一例を示すと、イオンエネルギーとして3keVを選択することで、15nm程度の深さを有するp部位(B)104を得ることができる。この場合、図1に示されるi型a-Si層102の厚さd1を20nmとすると、ボロン(B)イオンが注入されずに残るイオン非注入部の厚さは、図1における(d1-d2)で示される値となる。このd1-d2の厚さを有する部分は、基板101の面内方向にわたって単一の膜として、i型a-Si層102内に存在する。 As an example, by selecting 3 keV as the ion energy, the p + site (B) 104 having a depth of about 15 nm can be obtained. In this case, if the thickness d1 of the i-type a-Si layer 102 shown in FIG. 1 is 20 nm, the thickness of the ion non-implanted portion that is not implanted with boron (B) ions is (d1− It becomes a value shown by d2). The portion having the thickness of d 1 -d 2 exists in the i-type a-Si layer 102 as a single film over the in-plane direction of the substrate 101.
 イオン注入の際のイオンエネルギーとしては、上記の例のように、n部位(A)103およびp部位(B)104を形成するi型a-Si層102の厚さd1と、パッシベーション膜として必要になるi型a-Si層102の部分の厚さ(d1-d2)、さらにn部位(A)103およびp部位(B)104として必要な厚さd2によって、適切な値が選択される。しかしながら、イオンエネルギーが大きくなると、処理の対象であるi型a-Si層102の表面が粗くなり、平坦性が保てなくなるという問題がある。
 このため、i型a-Si層102に対して処理を行う場合は、イオンエネルギー(keV)としては20以下であることが好ましく、さらに、i型a-Si層102の膜厚(すなわち、i型a-Si層の厚さとパッシベーション膜として残したい厚さとの関係)を考慮すると、5以下が好適であると言える。イオンエネルギー(keV)が5以下であれば、さらに低エネルギーによる処理となるため、i型a-Si層102の表面の平坦性を保つことが可能となる。
As ion energy at the time of ion implantation, as in the above example, the thickness d1 of the i-type a-Si layer 102 forming the n + site (A) 103 and the p + site (B) 104, and the passivation film Depending on the thickness (d1−d2) of the portion of the i-type a-Si layer 102 required as the n + portion (A) 103 and the thickness d2 required as the p + portion (B) 104, an appropriate value is obtained. Selected. However, when the ion energy increases, there is a problem that the surface of the i-type a-Si layer 102 to be processed becomes rough and the flatness cannot be maintained.
For this reason, when processing is performed on the i-type a-Si layer 102, the ion energy (keV) is preferably 20 or less, and the thickness of the i-type a-Si layer 102 (ie, i In view of the relationship between the thickness of the mold a-Si layer and the thickness desired to remain as a passivation film, it can be said that 5 or less is preferable. If the ion energy (keV) is 5 or less, the process is performed with a lower energy, so that the flatness of the surface of the i-type a-Si layer 102 can be maintained.
 なお、リン(P)についても、上述したボロン(B)における、イオンエネルギーとストッピングレンジとの関係が成立していることが確認された。ゆえに、この関係を利用することにより、図1に示すn部位(A)103を再現性よく形成できる。さらに、リン(P)についても、n部位(A)103を形成する対象であるi型a-Si層102の膜厚等の条件、およびi型a-Si層102の表面の平坦性の確保という意味から、ボロン(B)の場合と同様に、イオンエネルギー(keV)としては、20以下、さらに5以下を選択することで、ボロン(B)の場合と同様の効果を得ることが可能である。 It was confirmed that the relationship between the ion energy and the stopping range in the above-described boron (B) was also established for phosphorus (P). Therefore, by utilizing this relationship, the n + site (A) 103 shown in FIG. 1 can be formed with good reproducibility. Further, with respect to phosphorus (P), conditions such as the film thickness of the i-type a-Si layer 102 that is the target of forming the n + site (A) 103 and the flatness of the surface of the i-type a-Si layer 102 From the viewpoint of securing, as in the case of boron (B), the same effect as in the case of boron (B) can be obtained by selecting an ion energy (keV) of 20 or less and further 5 or less. It is.
 図12は、リン(P)のイオンエネルギーを変えて、基板の深さ方向に観測したリン(P)濃度のプロファイルを示すグラフである。
 このグラフより、イオン注入する際のイオンエネルギー(keV)を、3、6、15と変えた場合、リン濃度(atoma/cm)が10+18となる基板の深さ方向の位置(nm)は、およそ、30(nm)、43(nm)、78(nm)となることが確認される。これにより、上記深さの各々の位置において、所定のリン濃度となるように、n部位(A)103を基板内に深さ方向に形成することができる。
FIG. 12 is a graph showing a profile of the phosphorus (P) concentration observed in the depth direction of the substrate by changing the ion energy of phosphorus (P).
From this graph, when the ion energy (keV) at the time of ion implantation is changed to 3, 6 and 15, the position (nm) in the depth direction of the substrate where the phosphorus concentration (atoma / cm 3 ) is 10 +18 is , Approximately 30 (nm), 43 (nm), and 78 (nm). As a result, the n + site (A) 103 can be formed in the substrate in the depth direction so that a predetermined phosphorus concentration is obtained at each position of the depth.
 ボロン(B)についても、上述したリン(P)における、基板の深さ方向に観測したリン(P)濃度のプロファイルと同様の関係が成立していることが確認された。ゆえに、この関係を利用することにより、所定のボロン濃度となるように、図1に示すp部位(B)104を基板内に深さ方向に形成することができる。 For boron (B), it was confirmed that the same relationship as the profile of phosphorus (P) concentration observed in the depth direction of the substrate in phosphorus (P) described above was established. Therefore, by utilizing this relationship, the p + site (B) 104 shown in FIG. 1 can be formed in the depth direction in the substrate so as to have a predetermined boron concentration.
 上記の第二工程におけるイオンの注入は、例えば、図13に示すイオン注入装置1200を用いて行う。 The ion implantation in the second step is performed using, for example, an ion implantation apparatus 1200 shown in FIG.
 図13は、本発明の実施形態において、n型イオン注入工程およびp型イオン注入工程(第二工程)に用いる、イオン注入装置1200の断面図である。イオン注入装置1200は、真空槽1201と、永久磁石1205、RF導入コイル1206、RF導入窓(石英)1212を用いたICP放電によるプラズマ発生部と、真空排気部(不図示)とを備えている。真空槽1201の内部は、複数の開口を有する電極1208、1209により、プラズマ発生室とプラズマ処理室とに分離されている。プラズマ処理室に被処理体である基板1203(テクスチャー形成工程後の基板101に相当)を支持する基板支持台1204が配されている。なお、電極1208の電位は、浮遊電位とされており、電極1208は、プラズマ1207の電位を安定させる機能を有する。また、電極1209は、負電位を印加され、プラズマ1207から正イオンを引き出す機能を有する。 FIG. 13 is a cross-sectional view of an ion implantation apparatus 1200 used in the n-type ion implantation step and the p-type ion implantation step (second step) in the embodiment of the present invention. The ion implantation apparatus 1200 includes a vacuum chamber 1201, a permanent magnet 1205, an RF introduction coil 1206, a plasma generation unit using ICP discharge using an RF introduction window (quartz) 1212, and a vacuum exhaust unit (not shown). . The inside of the vacuum chamber 1201 is separated into a plasma generation chamber and a plasma processing chamber by electrodes 1208 and 1209 having a plurality of openings. A substrate support 1204 that supports a substrate 1203 (corresponding to the substrate 101 after the texture forming step) as an object to be processed is disposed in the plasma processing chamber. Note that the potential of the electrode 1208 is a floating potential, and the electrode 1208 has a function of stabilizing the potential of the plasma 1207. The electrode 1209 has a function of extracting a positive ion from the plasma 1207 when a negative potential is applied thereto.
 真空槽1201内を減圧し、プラズマ発生室に、基板1203に注入される不純物原子を含んだガスを導入する。そして、プラズマ発生部を用いてプラズマ1207を励起させることにより、不純物原子をイオン化させ、電極1208、1209を経由して引き出されたp型あるいはn型のイオンを、基板1203に注入させることができる。 The inside of the vacuum chamber 1201 is decompressed, and a gas containing impurity atoms injected into the substrate 1203 is introduced into the plasma generation chamber. Then, by exciting the plasma 1207 using the plasma generating portion, impurity atoms are ionized, and p-type or n-type ions extracted via the electrodes 1208 and 1209 can be implanted into the substrate 1203. .
 ここで、p型イオンの注入量やn型イオンの注入量は、後述するアニール処理後のp部位(B)104のシート抵抗、及び、n部位(A)103のシート抵抗と、HBC型結晶系太陽電池の光電変換効率との関係から、HBC型結晶系太陽電池100を製造する上での最適値として決定される。ただし、n部位(A)103におけるn型イオンの濃度は、少なくとも基板101におけるn型イオンの濃度より高く設定されている。 Here, the implantation amount of the p-type ions and the implantation amount of the n-type ions are the sheet resistance of the p + portion (B) 104 and the sheet resistance of the n + portion (A) 103 after annealing, which will be described later, and HBC. From the relationship with the photoelectric conversion efficiency of the type crystal solar cell, it is determined as the optimum value for manufacturing the HBC type crystal solar cell 100. However, the concentration of n-type ions in the n + region (A) 103 is set to be higher than at least the concentration of n-type ions in the substrate 101.
 なお、基板1203に対して上述したp型イオンの注入やn型イオンの注入を行う際に、不純物原子を含んだガス(例えば、BF等)に水素が添加されたプロセスガスを用い、前記アモルファスSi層に対して水素がイオン注入されるように条件を設定してもよい。イオン注入時に水素も一緒にアモルファスSi層にイオン注入することにより、アモルファスSi層の構造欠陥が修復され、キャリアの再結合の抑制効果が向上し、部位(A)や部位(B)に到達する電子やホールの総量が増加するため、発電効率の向上を図ることができる。 Note that when the above-described p-type ion implantation or n-type ion implantation is performed on the substrate 1203, a process gas in which hydrogen is added to a gas containing impurity atoms (for example, BF 3 or the like) is used. Conditions may be set so that hydrogen is ion-implanted into the amorphous Si layer. By implanting hydrogen into the amorphous Si layer at the time of ion implantation, the structural defects of the amorphous Si layer are repaired, the effect of suppressing recombination of carriers is improved, and the part (A) or part (B) is reached. Since the total amount of electrons and holes increases, power generation efficiency can be improved.
 アモルファスSi層に対して効果的に水素を注入する手法として、非質量分離型イオン注入の採用が挙げられる。n型イオン、p型イオン(例えば、Pイオン、Bイオン)のみを分離して注入する質量分離型イオン注入とは異なり、非質量分離型イオン注入では、不純物原子を含んだガスとしてPH、BH等の水素を含むガスを用いる。これにより、非質量分離型イオン注入においては、前述のように水素が添加されたプロセスガスを用いなくとも、基板に対して、n型イオン、p型イオンと同時に、水素も注入することが可能となる。さらに、非質量分離型イオン注入では、イオンを分離する機構が不要であるため、装置構造においてフットプリントが小さくなるというメリットもある。
 このように、プロセスガスに水素を添加したり、非質量分離型イオン注入を選択したりすることによって、n型イオン、p型イオンと同時にアモルファスSi層に注入された水素は、アモルファスSi層の深さ方向において濃度分布を持つ。
As a technique for effectively implanting hydrogen into the amorphous Si layer, non-mass-separated ion implantation can be employed. Unlike mass-separated ion implantation, which separates and implants only n-type ions and p-type ions (for example, P ions and B ions), non-mass-separated ion implantation uses PH 3 as a gas containing impurity atoms. A gas containing hydrogen such as BH 2 is used. As a result, in non-mass-separated ion implantation, hydrogen can be implanted into the substrate simultaneously with n-type ions and p-type ions without using a process gas to which hydrogen is added as described above. It becomes. Further, non-mass-separated ion implantation does not require a mechanism for separating ions, and thus has an advantage that the footprint is reduced in the device structure.
In this way, by adding hydrogen to the process gas or selecting non-mass-separated ion implantation, the hydrogen implanted into the amorphous Si layer simultaneously with the n-type ions and p-type ions is converted into the amorphous Si layer. Concentration distribution in the depth direction.
 図13のイオン注入装置1200は、前記第二工程におけるイオン注入時に、前記部位Aと前記部位Bを形成するためのマスクとして、開口部の位置が異なる4種類のマスクM1、M2、M3、M4を備えている。ゆえに、イオン注入装置1200は、開口部の位置が異なる4種類のマスクを使い分けることにより、アモルファスSi層の領域に対して、イオン注入された部位A103と部位B104を自在に作製することができる。 The ion implantation apparatus 1200 of FIG. 13 has four types of masks M1, M2, M3, and M4 having different positions of openings as masks for forming the part A and the part B at the time of ion implantation in the second step. It has. Therefore, the ion implantation apparatus 1200 can freely produce the ion-implanted portion A103 and the portion B104 in the amorphous Si layer region by properly using four types of masks having different opening positions.
 特に、前記マスクM1、M2の開口部による領域と、前記マスクM3、M4の開口部による領域とが、互いに重なることなく、所望の距離をもって離間している構成が採用されている。この構成により、例えば、図4A、図4B、図9A、及び図9Bに示すような、櫛歯電極が対向してなるイオン注入領域を形成することが可能となる。 In particular, a configuration is employed in which the region formed by the openings of the masks M1 and M2 and the region formed by the openings of the masks M3 and M4 are separated from each other by a desired distance without overlapping each other. With this configuration, for example, an ion implantation region in which comb electrodes are opposed to each other as shown in FIGS. 4A, 4B, 9A, and 9B can be formed.
 その場合、前記マスクM1に設けられた互いに離間して並行に配された複数の開口部に対して、前記マスクM2に設けられた単一の開口部が縦断するように配置されていることが好ましい。同様に、前記マスクM3に設けられた互いに離間して並行に配された複数の開口部に対して、前記マスクM4に設けられた単一の開口部が縦断するように配置されていることが好ましい。 In that case, a single opening provided in the mask M2 may be arranged so as to run vertically with respect to a plurality of openings provided in the mask M1 and spaced apart from each other in parallel. preferable. Similarly, a single opening provided in the mask M4 may be arranged so as to run vertically with respect to a plurality of openings provided in the mask M3 that are spaced apart from each other in parallel. preferable.
 なお、以上の説明においては、4枚のマスクM1~M4を用いてイオン注入する手法について詳述したが、本発明は必ずしも4枚のマスクを用いることに限定されない。例えば、厚みの大きなマスクが利用できる場合には、マスクM1とマスクM2を兼用する1枚のマスクを用い、図9Bに示すような、連結部703bと各櫛歯部703fから構成されるn部位(A)703を一緒に作製することができる。同様に、マスクM3とマスクM4を兼用する1枚のマスクを用い、図9Bに示すような、連結部704bと各櫛歯部704fから構成されるp部位(B)704を一緒に作製することができる。 In the above description, the ion implantation method using the four masks M1 to M4 has been described in detail, but the present invention is not necessarily limited to using four masks. For example, when a mask having a large thickness can be used, a single mask that serves both as the mask M1 and the mask M2 is used, and n + configured by the connecting portion 703b and each comb-tooth portion 703f as shown in FIG. 9B. Site (A) 703 can be made together. Similarly, by using one mask that also serves as the mask M3 and the mask M4, a p + region (B) 704 composed of the connecting portion 704b and each comb-tooth portion 704f is manufactured together as shown in FIG. 9B. be able to.
 したがって、マスクM1とマスクM2を兼用する1枚のマスクや、マスクM3とマスクM4を兼用する1枚のマスクを用いた場合には、上述した第二工程において2つのステップをまとめて行うことがすることが可能となる。すなわち、前記部位Aのフィンガー部を形成するステップ1と前記部位Aのバスバー部を形成するステップ2とを一つのステップにまとめて行うことができる。同様に、前記部位Bのフィンガー部を形成するステップ3と前記部位Bのバスバー部を形成するステップ4とを一つのステップにまとめて行うことができる。 Therefore, when one mask that doubles as the mask M1 and the mask M2 or one mask that doubles as the mask M3 and the mask M4 is used, the two steps can be performed together in the second step described above. It becomes possible to do. That is, step 1 for forming the finger portion of the part A and step 2 for forming the bus bar part of the part A can be performed in one step. Similarly, step 3 for forming the finger portion of the portion B and step 4 for forming the bus bar portion of the portion B can be performed in one step.
 次に、第二工程を経て行われるアニール処理は、例えば、図14に示すアニール処理装置1300を用いて行う。図14に示すアニール処理装置1300は、縦型加熱炉を採用し、バッチ式で、1カセットに1枚の基板(第二工程により、n型およびp型イオン注入工程後の基板)がセットされ、このカセットを複数枚、同時に熱処理することが可能とされている。
 図14のアニール処理装置1300は、加熱室1310と前室1320から構成されており、加熱室1310の内部空間1312と前室1320の内部空間1322とは、仕切弁1317によって遮断可能とされている。
Next, the annealing process performed through the second step is performed using, for example, an annealing apparatus 1300 shown in FIG. An annealing apparatus 1300 shown in FIG. 14 employs a vertical heating furnace and is a batch type in which one substrate (substrate after n-type and p-type ion implantation steps is set in one cassette) in one cassette. A plurality of the cassettes can be heat-treated at the same time.
An annealing apparatus 1300 in FIG. 14 includes a heating chamber 1310 and a front chamber 1320, and the internal space 1312 of the heating chamber 1310 and the internal space 1322 of the front chamber 1320 can be blocked by a gate valve 1317. .
 前室1320の内部空間1322において、基板の表面及び裏面が露呈した状態となるように基板の外周部を保持したカセット1301が複数枚、多段に重ねられているカセットラック1303を、カセットベース1302上に配置する。
 加熱室1310の内部空間1312を大気圧雰囲気に開放された状態で仕切弁1317を開けて、カセットラック1303が配置されているカセットベース1302を、前室1320の内部空間1322から加熱室1310の内部空間1312へ、不図示の移動装置により上昇させる(上向き矢印)。その後、仕切弁1317を閉じ、排気装置(P)1314を用いて、加熱室1310の内部空間1312を減圧雰囲気とする。なお、加熱室1310の内部空間1312を減圧せず、大気圧雰囲気において、大気圧アニールを行ってもよい。
In the internal space 1322 of the front chamber 1320, a cassette rack 1303 in which a plurality of cassettes 1301 holding the outer peripheral portion of the substrate are stacked so that the front and back surfaces of the substrate are exposed is stacked on the cassette base 1302. To place.
With the interior space 1312 of the heating chamber 1310 open to the atmospheric pressure atmosphere, the gate valve 1317 is opened, and the cassette base 1302 in which the cassette rack 1303 is disposed is moved from the interior space 1322 of the front chamber 1320 to the interior of the heating chamber 1310. The space 1312 is raised by a moving device (not shown) (upward arrow). Thereafter, the gate valve 1317 is closed, and the internal space 1312 of the heating chamber 1310 is set to a reduced pressure atmosphere using the exhaust device (P) 1314. Note that the atmospheric pressure annealing may be performed in an atmospheric pressure atmosphere without reducing the pressure in the internal space 1312 of the heating chamber 1310.
 加熱室1310の内部空間1312を減圧した後、加熱室1310の内部空間1312に、アニールガスを導入し、管理された雰囲気下で、所定の温度プロファイルにより、アニール処理を行う。ここで、加熱室1310の内部空間1312に導入するガスは、酸素ガス、窒素ガス、または、酸素ガスおよび窒素ガスの両方を含むガスである。窒素ガスをアニールガスとして使用する場合は、窒素ガスに水素ガスを添加して用いてもよい。このように、アニールガスに水素を添加することで、第二工程においてi型a-Si層に注入された水素が、加熱により基板から離脱することを補うことが可能となる。一例としては、窒素ガスに対し3%以下の水素を添加したアニールガスを利用する。
 基板温度を所定の温度以下とした後、上記ガスの導入を停止し、加熱室1310の内部空間1312を大気開口した状態として仕切弁1317を開ける。その後、カセットベース1302を、加熱室1310の内部空間1312から前室1320の内部空間1322へ、不図示の移動装置により下降させる(下向き矢印)。
After the internal space 1312 of the heating chamber 1310 is depressurized, an annealing gas is introduced into the internal space 1312 of the heating chamber 1310, and annealing is performed with a predetermined temperature profile in a controlled atmosphere. Here, the gas introduced into the internal space 1312 of the heating chamber 1310 is oxygen gas, nitrogen gas, or a gas containing both oxygen gas and nitrogen gas. When nitrogen gas is used as the annealing gas, hydrogen gas may be added to the nitrogen gas. In this way, by adding hydrogen to the annealing gas, it is possible to compensate for the hydrogen injected into the i-type a-Si layer in the second step being detached from the substrate by heating. As an example, an annealing gas in which 3% or less of hydrogen is added to the nitrogen gas is used.
After the substrate temperature is set to a predetermined temperature or lower, the introduction of the gas is stopped and the gate valve 1317 is opened with the internal space 1312 of the heating chamber 1310 opened to the atmosphere. Thereafter, the cassette base 1302 is lowered from the internal space 1312 of the heating chamber 1310 to the internal space 1322 of the front chamber 1320 by a moving device (not shown) (downward arrow).
 以上の手順により、本発明の実施形態におけるアニール処理は行われる。その際、アニール処理の条件は、基板内部における、n型イオン及びp型イオンの拡散係数に応じた最適な条件として決定される。例えば、アニール処理の温度は、600℃以下であることが望ましい。これは、n部位(A)103およびp部位(B)104を含むi型a-Si層102が結晶化してi型a-Si層のパッシベーション膜としての機能が低下することを防止するためである。さらに、アニール処理の温度は、400℃以下であることがより望ましい。これは、イオン注入の際に、n型イオン、p型イオンと同時に注入された水素が、i型a-Si層から離脱するのを抑制するためである。また、アニール処理にかける時間は、30分~60分程度であることが望ましい。 The annealing process in the embodiment of the present invention is performed by the above procedure. At that time, the conditions for the annealing treatment are determined as optimum conditions corresponding to the diffusion coefficients of n-type ions and p-type ions inside the substrate. For example, the annealing temperature is desirably 600 ° C. or lower. This prevents the i-type a-Si layer 102 including the n + site (A) 103 and the p + site (B) 104 from being crystallized to deteriorate the function of the i-type a-Si layer as a passivation film. Because. Furthermore, the annealing temperature is more preferably 400 ° C. or lower. This is to prevent hydrogen implanted at the same time as n-type ions and p-type ions from being separated from the i-type a-Si layer during ion implantation. Further, it is desirable that the time required for the annealing treatment is about 30 to 60 minutes.
 次に、電極形成工程として、n部位(A)103およびp部位(B)104を含むi型a-Si層の外面102bの全域を覆うように、金属膜(例えば、Cu膜)を形成する。金属膜は、所望のパターニング処理を施すことで、電極として利用される。金属膜としては、Cu膜の他に、Ag膜等が好適に用いられる。ただし、電極は金属膜に限定されず、金属膜に代えて透明導電膜を用いてもよい。
 上記金属膜の形成には、例えば、図15に示すインターバック式のスパッタリング装置1400が用いられる。
Next, as an electrode forming step, a metal film (for example, a Cu film) is formed so as to cover the entire outer surface 102b of the i-type a-Si layer including the n + site (A) 103 and the p + site (B) 104. Form. The metal film is used as an electrode by performing a desired patterning process. As the metal film, an Ag film or the like is preferably used in addition to the Cu film. However, the electrode is not limited to the metal film, and a transparent conductive film may be used instead of the metal film.
For example, an inter-back type sputtering apparatus 1400 shown in FIG. 15 is used to form the metal film.
 図15に示すスパッタリング装置1400においては、基板1458(部位(A)103および部位(B)104が形成された基板101に相当)は、不図示の搬送装置により、仕込取出室(L/UL)1451の内部、加熱室(H)1452の内部、及び成膜室(S1)1453の内部に移動可能である。
 上記の各室1451,1452、1453には、個別に、その内部空間を減圧可能とするための排気装置1451P、1452P、1453Pが配されている。
In the sputtering apparatus 1400 shown in FIG. 15, the substrate 1458 (corresponding to the substrate 101 on which the portion (A) 103 and the portion (B) 104 are formed) is loaded into a loading / unloading chamber (L / UL) by a transfer device (not shown). 1451, the heating chamber (H) 1452, and the film formation chamber (S1) 1453 can be moved.
In each of the chambers 1451, 1452, and 1453, exhaust devices 1451P, 1452P, and 1453P for individually depressurizing the internal space are arranged.
 まず、基板1458は、製造装置の外部(大気雰囲気)から、大気圧とされた仕込取出室1451へ導入される。その後、仕込取出室1451は、排気装置1451Pを用いて減圧される(減圧雰囲気)。次いで、基板1458は、減圧された仕込取出室1451から加熱室1452へ搬送され、加熱装置1459により所望の熱処理が施される。 First, the substrate 1458 is introduced from the outside (atmosphere) of the manufacturing apparatus into the charging / unloading chamber 1451 at atmospheric pressure. Thereafter, the preparation / extraction chamber 1451 is depressurized (depressurized atmosphere) using the exhaust device 1451P. Next, the substrate 1458 is transferred from the pressure-removed preparation / extraction chamber 1451 to the heating chamber 1452 and subjected to a desired heat treatment by the heating device 1459.
 次に、熱処理後の基板1458は、加熱室1452から成膜室1453へ搬送され、Cuからなるターゲット1462の前を通過させることにより、基板1458上にCu膜が形成される。その際、温度調整装置1461により、基板1458の温度は、所望の温度となる。
 成膜室1453において、ターゲット1462は、バッキングプレート1463に載置されている。スパッタリングを行う際にはガス供給源1465から所望のプロセスガスが成膜室1453の内部に導入されるとともに、バッキングプレート1463には電源1464から所望の電力が供給される。
Next, the substrate 1458 after the heat treatment is transferred from the heating chamber 1452 to the film formation chamber 1453 and is passed in front of a target 1462 made of Cu, whereby a Cu film is formed on the substrate 1458. At that time, the temperature of the substrate 1458 becomes a desired temperature by the temperature adjustment device 1461.
In the film formation chamber 1453, the target 1462 is placed on the backing plate 1463. When sputtering is performed, a desired process gas is introduced from the gas supply source 1465 into the film formation chamber 1453, and desired power is supplied to the backing plate 1463 from the power source 1464.
 そして、Cu膜が形成された基板1458は、成膜室1453から仕込取出室1451へ搬送され、製造装置から外部(大気雰囲気)へ取り出される。
 次いで、所望のパターニング処理を施すことにより、n部位(A)103およびp部位(B)104を個々に覆うように局在する電極が得られる。
 以上では、電極形成工程として、スパッタリング装置を用いた金属膜の成膜を説明したが、印刷法で電極をパターニングしつつ形成してもよい。
Then, the substrate 1458 on which the Cu film is formed is transferred from the film formation chamber 1453 to the preparation / extraction chamber 1451 and taken out from the manufacturing apparatus to the outside (atmosphere).
Next, by performing a desired patterning process, an electrode localized so as to individually cover the n + site (A) 103 and the p + site (B) 104 is obtained.
In the above description, the formation of the metal film using the sputtering apparatus has been described as the electrode forming step. However, the electrode may be formed while patterning the electrode by a printing method.
 図10Aは、従来例における太陽電池の製造工程(図16A~図16J)を示すフロー図である。図10Bは、本発明の実施形態に係る太陽電池の製造工程(図2A~図2G)を示すフロー図である。従来例と本発明の実施形態とは、以下に詳述する「α(a)」と「α(b)」において相違する。 FIG. 10A is a flowchart showing a manufacturing process (FIGS. 16A to 16J) of a solar cell in a conventional example. FIG. 10B is a flowchart showing manufacturing steps (FIGS. 2A to 2G) of the solar cell according to the embodiment of the present invention. The conventional example and the embodiment of the present invention differ in “α (a)” and “α (b)” described in detail below.
 図10Aに示すとおり、従来のHBC型結晶系太陽電池における部位(A)と部位(B)は、図16A~図16Jの工程フロー(図10Aに示すα(a))を経て初めて形成される。すなわち、「i型a-Si成膜、n型a-Si成膜、レジスト塗布・パターニング、エッチング、レジスト剥離、エッチストッパー成膜・パターニング、i型a-Si成膜、p型a-Si成膜、レジスト塗布・パターニング、エッチング、レジスト剥離、エッチストッパー剥離、離間部にのみi型a-Si成膜」を有する13処理工程を順に行うことにより製造される。
 これに対し、図10Bに示すとおり、本発明の実施形態に係るHBC型結晶系太陽電池における部位(A)と部位(B)は、図2B~図2Fの工程フロー(図10Bに示すα(b))により形成され、必要な処理工程の数は6つだけである。
As shown in FIG. 10A, the portion (A) and the portion (B) in the conventional HBC type crystalline solar cell are formed only after the process flow of FIG. 16A to FIG. 16J (α (a) shown in FIG. 10A). . That is, “i-type a-Si film formation, n-type a-Si film formation, resist coating / patterning, etching, resist peeling, etch stopper film formation / patterning, i-type a-Si film formation, p-type a-Si film formation” The film is manufactured by sequentially performing 13 processing steps having a film, resist coating / patterning, etching, resist stripping, etch stopper stripping, and i-type a-Si film formation only on a separated portion.
On the other hand, as shown in FIG. 10B, the part (A) and the part (B) in the HBC type crystalline solar cell according to the embodiment of the present invention are shown in the process flow of FIG. 2B to FIG. 2F (α ( The number of processing steps formed by b)) is only six.
 一方、本発明の実施形態に係る製造方法によれば、従来の製造方法に比べて極めて少ない工程数によって、HBC型結晶系太陽電池を作製することができる。特に、図10Aに示す製造方法におけるα(a)と図10Bに示す製造方法におけるα(b)との比較から明らかなように、本発明の実施形態に係るHBC型結晶系太陽電池においては、従来の工程から「高価なフォトリソグラフィ工程やエッチング工程」が不要となる。ゆえに、図10Bに示す本発明の実施形態によれば、従来必要とした複雑な工程を削減できるので、より安定した工程管理において製造が可能となる。すなわち、本発明の実施形態によれば、高価な製造装置が不要となることから、安価なHBC型結晶系太陽電池の提供に本発明は寄与する。 On the other hand, according to the manufacturing method according to the embodiment of the present invention, it is possible to manufacture an HBC type crystalline solar cell with an extremely small number of steps as compared with the conventional manufacturing method. In particular, as is apparent from a comparison between α (a) in the manufacturing method shown in FIG. 10A and α (b) in the manufacturing method shown in FIG. 10B, in the HBC type crystalline solar cell according to the embodiment of the present invention, The “expensive photolithography process and etching process” are not required from the conventional process. Therefore, according to the embodiment of the present invention shown in FIG. 10B, the complicated steps required in the prior art can be reduced, so that manufacturing can be performed with more stable process management. That is, according to the embodiment of the present invention, since an expensive manufacturing apparatus is not required, the present invention contributes to the provision of an inexpensive HBC type crystalline solar cell.
 図10A及び図10Bに示すように、後段の各処理工程(電極膜形成、パターニング(フォトリソグラフィ)、絶縁膜形成)は、従来の工程(β(a))と本発明の実施形態の工程(β(b))で大きな違いはない。しかしながら、アニールの影響を受ける「n部位(A)103」および「p部位(B)104」が、本発明の実施形態では「i型a-Si層102」の内部に存在する。このため、アニール条件を考慮する必要がある。
 具体的には、アニール処理時の温度は、先に述べたように、i型a-Si層のパッシベーション膜としての機能が低下を防止するために、600℃以下であることが好ましく、さらには、i型a-Si層からの水素の離脱を抑制するために、400℃以下であることが好ましい。
As shown in FIGS. 10A and 10B, each of the subsequent processing steps (electrode film formation, patterning (photolithography), insulating film formation) is performed according to the conventional process (β (a)) and the process of the embodiment of the present invention ( There is no significant difference in β (b)). However, “n + site (A) 103” and “p + site (B) 104” affected by annealing are present in “i-type a-Si layer 102” in the embodiment of the present invention. For this reason, it is necessary to consider annealing conditions.
Specifically, as described above, the temperature during the annealing treatment is preferably 600 ° C. or less in order to prevent the function of the i-type a-Si layer as a passivation film from being deteriorated, In order to suppress desorption of hydrogen from the i-type a-Si layer, the temperature is preferably 400 ° C. or lower.
 本発明の好ましい実施形態を説明し、上記で説明してきたが、これらは本発明の例示的なものであり、限定するものとして考慮されるべきではないことを理解すべきである。追加、省略、置換、およびその他の変更は、本発明の範囲から逸脱することなく行うことができる。従って、本発明は、前述の説明によって限定されていると見なされるべきではなく、請求の範囲によって制限されている。 While preferred embodiments of the present invention have been described and described above, it should be understood that these are exemplary of the invention and should not be considered as limiting. Additions, omissions, substitutions, and other changes can be made without departing from the scope of the invention. Accordingly, the invention is not to be seen as limited by the foregoing description, but is limited by the scope of the claims.
 本発明は、HBC型結晶系太陽電池の製造方法に広く適用可能である。このようなHBC型結晶系太陽電池の製造方法は、例えば、単位面積当たりの発電効率を高くすることができるとともに稼働状況において軽量化が求められる太陽電池の製造方法として好適に用いられる。 The present invention is widely applicable to a method for manufacturing an HBC type crystalline solar cell. Such a method for manufacturing an HBC type crystalline solar cell is preferably used as a method for manufacturing a solar cell that can increase the power generation efficiency per unit area and is required to be light in operation.
 100(100G) HBC型結晶系太陽電池、101 基板(第一導電型の結晶系シリコンからなる基板)、101a 第1面、101b 第2面、102 アモルファスSi層、102b 外面(アモルファスSi層の外面)、103 部位(A)(第1部位、第一導電型と同じ導電型の部位)、104 部位(B)(第2部位、第一導電型と異なる導電型の部位)、d1 アモルファスSi層102の厚さ、d2 部位(A)103および部位(B)104の深さ。 100 (100G) HBC type crystalline solar cell, 101 substrate (substrate made of first conductivity type crystalline silicon), 101a first surface, 101b second surface, 102 amorphous Si layer, 102b outer surface (outer surface of amorphous Si layer) ), 103 part (A) (first part, part of the same conductivity type as the first conductivity type), 104 part (B) (second part, part of a conductivity type different from the first conductivity type), d1 amorphous Si layer The thickness of 102, the depth of d2 part (A) 103 and part (B) 104.

Claims (7)

  1.  非受光面を有し、第一導電型の結晶系シリコンからなる基板を用い、
     前記基板の前記非受光面を覆うように、i型のアモルファスSi層を形成し、
     前記アモルファスSi層に対して、マスクを利用した不純物導入法により、前記第一導電型と同じ導電型の第1部位および前記第一導電型と異なる導電型の第2部位を、互いに離間した位置に形成し、
     不純物が導入された後の前記アモルファスSi層に対して、アニール処理を施し、
     前記第1部位及び前記第2部位を形成する工程は、
     前記第1部位のフィンガー部を形成する第1ステップと、
     前記第1部位のバスバー部を形成する第2ステップと、
     前記第2部位のフィンガー部を形成する第3ステップと、
     前記第2部位のバスバー部を形成する第4ステップと、
     を含むHBC型結晶系太陽電池の製造方法。
    Using a substrate having a non-light-receiving surface and made of crystalline silicon of the first conductivity type,
    Forming an i-type amorphous Si layer so as to cover the non-light-receiving surface of the substrate;
    A position where a first portion of the same conductivity type as the first conductivity type and a second portion of a conductivity type different from the first conductivity type are separated from each other by an impurity introduction method using a mask with respect to the amorphous Si layer. Formed into
    Annealing treatment is performed on the amorphous Si layer after the impurities are introduced,
    Forming the first part and the second part,
    A first step of forming a finger portion of the first portion;
    A second step of forming the bus bar portion of the first part;
    A third step of forming the finger portion of the second portion;
    A fourth step of forming the bus bar portion of the second part;
    The manufacturing method of the HBC type | mold crystalline solar cell containing this.
  2.  前記第1部位及び前記第2部位を形成する工程においては、
     前記第1部位のフィンガー部と前記第2部位のフィンガー部とが、所望の離間部を挟んで、互いに対向して配される位置となるように、所定形状の開口部を備える複数のマスクを用いる請求項1に記載のHBC型結晶系太陽電池の製造方法。
    In the step of forming the first part and the second part,
    A plurality of masks having openings of a predetermined shape so that the finger parts of the first part and the finger parts of the second part are arranged to face each other across a desired separation part The manufacturing method of the HBC type | mold crystalline solar cell of Claim 1 used.
  3.  前記第1ステップにおいては第1マスクが用いられ、
     前記第2ステップにおいては第2マスクが用いられ、
     前記第3ステップにおいては第3マスクが用いられ、
     前記第4ステップにおいては第4マスクが用いられ、
     第1マスク及び前記第2マスクは、第1マスクの開口部の一部と前記第2マスクの開口部の一部とが重なる領域を有しており、
     第3マスク及び前記第4マスクは、第3マスクの開口部の一部と前記第4マスクの開口部の一部とが重なる領域を有している請求項1又は請求項2に記載のHBC型結晶系太陽電池の製造方法。
    In the first step, a first mask is used,
    In the second step, a second mask is used,
    In the third step, a third mask is used,
    In the fourth step, a fourth mask is used,
    The first mask and the second mask have a region where a part of the opening of the first mask and a part of the opening of the second mask overlap,
    3. The HBC according to claim 1, wherein each of the third mask and the fourth mask has a region where a part of an opening of the third mask overlaps with a part of the opening of the fourth mask. Of manufacturing type crystalline solar cell.
  4.  請求項1から請求項3のいずれか一項に記載のHBC型結晶系太陽電池の製造方法において使用する製造装置であって、
     前記第1部位及び前記第2部位を形成する工程において不純物をアモルファスSi層に導入する際に前記第1部位と前記第2部位を形成するためのマスクとして、開口部の位置が互いに異なる第1マスク、第2マスク、第3マスク、及び第4マスクを備えるHBC型結晶系太陽電池の製造装置。
    It is a manufacturing apparatus used in the manufacturing method of the HBC type crystalline solar cell as described in any one of Claims 1-3,
    As a mask for forming the first part and the second part when impurities are introduced into the amorphous Si layer in the step of forming the first part and the second part, the positions of the openings are different from each other. An apparatus for manufacturing an HBC type crystalline solar cell comprising a mask, a second mask, a third mask, and a fourth mask.
  5.  前記第1マスク及び前記第2マスクの開口部による領域と、前記第3マスク及び前記第4マスクの開口部による領域とが、互いに重なることなく、所望の距離をもって離間している請求項4に記載のHBC型結晶系太陽電池の製造装置。 5. The region defined by the openings of the first mask and the second mask and the region defined by the openings of the third mask and the fourth mask are separated from each other by a desired distance without overlapping each other. The manufacturing apparatus of the HBC type crystalline solar cell of description.
  6.  前記第1マスクに設けられた互いに離間して並行に配された複数の開口部に対して、前記第2マスクに設けられた単一の開口部が縦断するように配置されている請求項4に記載のHBC型結晶系太陽電池の製造装置。 The single opening provided in the second mask is arranged so as to be longitudinally cut with respect to the plurality of openings provided in the first mask and spaced apart from each other in parallel. The manufacturing apparatus of the HBC type | mold crystal-type solar cell as described in any one of.
  7.  前記第3マスクに設けられた互いに離間して並行に配された複数の開口部に対して、前記第3マスクに設けられた単一の開口部が縦断するように配置されている請求項4に記載のHBC型結晶系太陽電池の製造装置。 5. The single opening provided in the third mask is arranged so as to be longitudinally cut with respect to the plurality of openings provided in the third mask that are spaced apart from each other in parallel. The manufacturing apparatus of the HBC type | mold crystal-type solar cell as described in any one of.
PCT/JP2016/079611 2015-10-05 2016-10-05 Hbc crystalline solar cell production method and production device WO2017061463A1 (en)

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WO2010030588A2 (en) * 2008-09-10 2010-03-18 Varian Semiconductor Equipment Associates, Inc. Implanting a solar cell substrate using a mask
US20110192993A1 (en) * 2010-02-09 2011-08-11 Intevac, Inc. Adjustable shadow mask assembly for use in solar cell fabrications
JP2012164961A (en) * 2011-02-08 2012-08-30 Samsung Sdi Co Ltd Solar cell and method of manufacturing the same
JP2013219355A (en) * 2012-04-04 2013-10-24 Samsung Sdi Co Ltd Method for manufacturing photoelectric element

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Publication number Priority date Publication date Assignee Title
WO2010030588A2 (en) * 2008-09-10 2010-03-18 Varian Semiconductor Equipment Associates, Inc. Implanting a solar cell substrate using a mask
US20110192993A1 (en) * 2010-02-09 2011-08-11 Intevac, Inc. Adjustable shadow mask assembly for use in solar cell fabrications
JP2012164961A (en) * 2011-02-08 2012-08-30 Samsung Sdi Co Ltd Solar cell and method of manufacturing the same
JP2013219355A (en) * 2012-04-04 2013-10-24 Samsung Sdi Co Ltd Method for manufacturing photoelectric element

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