WO2017041339A1 - 基板制备方法 - Google Patents

基板制备方法 Download PDF

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WO2017041339A1
WO2017041339A1 PCT/CN2015/091471 CN2015091471W WO2017041339A1 WO 2017041339 A1 WO2017041339 A1 WO 2017041339A1 CN 2015091471 W CN2015091471 W CN 2015091471W WO 2017041339 A1 WO2017041339 A1 WO 2017041339A1
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layer
thickness
silicon dioxide
amorphous silicon
etching
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French (fr)
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李子健
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Wuhan China Star Optoelectronics Technology Co Ltd
TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to US14/897,858 priority Critical patent/US10392297B2/en
Publication of WO2017041339A1 publication Critical patent/WO2017041339A1/zh
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    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
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Definitions

  • the present invention relates to display technology, and in particular to a substrate preparation method.
  • Amorphous silicon is generally used as a semiconductor layer in a flat panel display.
  • LTPS low temperature polysilicon technology
  • amorphous silicon is usually melted and crystallized into polycrystalline silicon using excimer laser annealing (ELA).
  • ELA excimer laser annealing
  • HF acid is used to etch away the native silicon dioxide layer on the surface of the silicon semiconductor layer, and then ozone (O 3 ) is used to oxidize fresh silicon to the silicon semiconductor.
  • O 3 ozone
  • the layer surface forms a layer of silicon dioxide having the desired characteristics.
  • the resulting silicon dioxide layer serves as a heat insulating effect.
  • the thickness of the formed silicon dioxide layer is generally only about 3 nm, and such a thin silicon dioxide layer is difficult to suppress the bulging formed at the grain boundary when the molten amorphous silicon crystallizes, thereby causing The roughness of the prepared semiconductor layer is large, and the display quality of the flat panel display is also adversely affected.
  • the present invention proposes a substrate preparation method.
  • a silicon dioxide layer of a desired thickness can be prepared on an amorphous silicon layer.
  • the prepared silicon dioxide layer is sufficient to suppress the ridge at the polycrystalline silicon grain boundary, so that the roughness of the prepared semiconductor layer is low.
  • a substrate preparation method comprises the steps of: step one, depositing an amorphous silicon layer on a substrate, and step two, depositing a first thickness of a silicon dioxide layer on the amorphous silicon layer, step three, etching two The silicon oxide layer is reduced until its thickness is reduced to a second thickness.
  • the thickness of the finally obtained silicon dioxide layer is It is not limited to a maximum of 3 nm, but may be thick enough to suppress the ridge at the grain boundary of the polysilicon layer. Thereby, the roughness of the prepared semiconductor layer is low, and the display quality of the display is not adversely affected.
  • ozone is not required in the preparation of the silica layer, which eliminates the ozone generator and simplifies the production equipment. In addition, since ozone is not required, the risk of environmental pollution caused by ozone leakage is also avoided. Further, in the process of etching the silicon dioxide layer, the silicon dioxide layer of a predetermined thickness can be conveniently realized by controlling the etching conditions, and the etching process becomes simpler.
  • the method further comprises: step four, performing water washing, and then performing excimer laser annealing. Since the silicon dioxide layer has been prepared in the three steps, it is only necessary to wash the substrate with water before the excimer laser annealing, which facilitates the operation.
  • hydrofluoric acid is used for etching.
  • Hydrofluoric acid is a commonly used chemical reagent that is inexpensive and helps to reduce costs.
  • the etch endpoint is determined by monitoring the etch time.
  • the concentration of hydrofluoric acid is from 0.5% to 1% by mass fraction.
  • the first thickness is 10 nm or more.
  • the first thickness is from 10 nm to 50 nm.
  • the second thickness is from 3 nm to 7 nm.
  • Applicants have found that when etching a silicon dioxide layer with this concentration of hydrofluoric acid, the etching speed of the silicon dioxide layer is about 0.2 nm/s, and the first thickness of the silicon dioxide layer is etched into a second thickness of dioxide.
  • the time required for the silicon layer is between about 0.5 minutes and 3.6 minutes. This etching time makes the etching efficiency high and easy to control, which helps to further improve the yield of the product.
  • the resulting time error will be very large, which will significantly reduce the yield of the product.
  • the time error generated is small, the etching efficiency is remarkably lowered, thereby reducing the production efficiency of the substrate.
  • the substrate comprises a glass substrate and a buffer layer disposed on the glass substrate, amorphous silicon
  • the layer is on the buffer layer.
  • the buffer layer is a two-layer stacked SiNx layer and SiOx layer.
  • the amorphous silicon layer on the buffer layer is crystallized into a polysilicon layer by excimer laser annealing, it does not adversely affect the amorphous silicon layer, which contributes to further improve the display quality of the display. .
  • a silicon dioxide layer of a desired thickness can be prepared on an amorphous silicon layer.
  • the prepared silicon dioxide layer is sufficient to suppress the ridge at the polycrystalline silicon grain boundary, so that the roughness of the prepared semiconductor layer is low.
  • the surface roughness of the prepared silicon dioxide layer is very low, the cleaning equipment and the cleaning method used before laser annealing crystallization can be greatly simplified, the production cost is lowered, and the competitiveness is improved.
  • Figure 1 schematically shows the step of depositing an amorphous silicon layer on a substrate
  • Figure 2 schematically shows the step of depositing a layer of silicon dioxide on an amorphous silicon layer
  • Figure 3 schematically shows the steps of etching a layer of silicon dioxide
  • Figure 4 schematically shows the steps of excimer laser annealing
  • the method includes the following steps:
  • step 1 an amorphous silicon layer 12 is deposited on the substrate 11. As shown in Figure 1.
  • Step 2 depositing a silicon dioxide layer 17 of a first thickness D1 on the amorphous silicon layer 12. as shown in picture 2.
  • Step 3 etching the silicon dioxide layer 17 until its thickness is lowered to the second thickness D2. As shown in Figure 3.
  • the substrate 11 may include a glass substrate 14 and a first buffer layer 15 and a second buffer layer 16 disposed on the glass substrate 14.
  • the first buffer layer 15 is SiNx and the second buffer layer 16 is SiOx.
  • the first buffer layer 15 may also be SiOx
  • the second buffer layer 16 may be SiNx.
  • the amorphous silicon layer 12 is on the first buffer layer 15 and the second buffer layer 16.
  • the first buffer layer 15 and the second buffer layer 16 do not cause any abnormality to the amorphous silicon layer 12.
  • the impact of Lee This greatly simplifies the excimer laser annealing step and reduces the difficulty of substrate production.
  • the SiO 2 layer 17 can be deposited by plasma enhanced chemical vapor deposition (PECVD) using silane and N 2 O as raw materials. This is well known to those skilled in the art and will not be described again here. It should be understood that the SiO 2 layer can also be deposited by any suitable other method.
  • PECVD plasma enhanced chemical vapor deposition
  • the thickness D1 (i.e., the first thickness) of the deposited SiO 2 layer 17 should be thicker so that step 3 can be performed smoothly.
  • the first thickness D1 is 10 nm or more. If the first thickness D1 is less than 10 nm, in the next step 3, it may be difficult to ensure that the second thickness D2 after the etching is within the expected range, resulting in a decrease in the yield of the product. However, if the first thickness D1 is too large, the etching time is prolonged and the production efficiency is lowered.
  • the first thickness D1 is from 10 nm to 50 nm.
  • hydrofluoric acid can be used to etch the silicon dioxide layer.
  • Hydrofluoric acid means an aqueous solution of hydrogen fluoride or an aqueous solution containing a dopant. These dopants are intended to better perform etching or other beneficial purposes. Hydrofluoric acid with dopants is also within the scope of the present invention.
  • the silicon dioxide layer 17 prepared in the step 2 may be etched to a second thickness D2 of 3 nm to 7 nm.
  • the second thickness D2 can be controlled by the etching time. In this way, automatic monitoring and etching can be realized, and the labor intensity of the worker is reduced.
  • a fully automated monitoring and etching process can significantly reduce the contact time of workers with hydrofluoric acid (or hydrogen fluoride gas) to protect workers.
  • the etching rate of the silicon dioxide layer 17 is about 0.2 nm/s.
  • the time required to etch the silicon dioxide layer 17 of the first thickness D1 into the silicon dioxide layer of the second thickness D2 is between about 0.5 minutes and 3.6 minutes. This etching time makes the etching efficiency high, and the etching time is also easy to control, which helps to further improve the yield of the product. Further increasing the concentration of hydrofluoric acid will reduce the etching time, which will result in an increase in etching time error and a decrease in product yield. Reducing the concentration of hydrofluoric acid will increase the etching time and reduce the production efficiency.
  • step 4 water washing can also be carried out, followed by excimer laser annealing.
  • the amorphous silicon layer is melted and crystallized into polycrystalline silicon 18.
  • the substrate can be thoroughly washed by a simple water washing. This simplifies the cleaning equipment and cleaning steps used prior to laser annealing crystallization, reducing production costs and increasing competitiveness.
  • ozone is not used in the process of preparing the silica layer 17. This is
  • the ozone generator is eliminated, which simplifies production equipment and reduces production costs.
  • due to the omission of ozone the risk of environmental pollution caused by accidental leakage of ozone is also avoided.

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Abstract

一种基板制备方法，包括以下步骤：步骤一，在基材（11）上沉积非晶硅层（12），步骤二，在所述非晶硅层（12）上沉积第一厚度（D1）的二氧化硅层（17），步骤三，刻蚀所述二氧化硅层（17），直到其厚度（D1）降低到第二厚度（D2）。根据该方法，能够在非晶硅层（12）上制备所需厚度的二氧化硅层（17）。在进行准分子激光退火时，所制备的二氧化硅层（17）足以抑制多晶硅层（18）晶界处的隆起，使得所制备的半导体层的粗糙度较低。

Description

基板制备方法
相关申请的交叉引用
本申请要求享有于2015年9月10日提交的名称为“基板制备方法”的中国专利申请CN 201510573490.9的优先权，该申请的全部内容通过引用并入本文中。
技术领域
本发明涉及显示技术，特别是涉及一种基板制备方法。
背景技术
在平板显示器中通常使用非晶硅作为其半导体层。然而，随着平板显示器朝向高分辨率、高集成度以及低功耗的方向发展，使用非晶硅越来越难以实现这些特点。因此，逐渐使用多晶硅来满足平板显示器未来发展的需求，这使得低温多晶硅技术(LTPS)得到广泛应用。
在低温多晶硅技术中，通常使用准分子激光退火(ELA)将非晶硅熔化后结晶成多晶硅。在现有技术中，在进行准分子激光退火结晶之前，使用HF酸来刻蚀掉硅半导体层表面的原生二氧化硅层，然后再使用臭氧(O3)将新鲜的硅氧化以在硅半导体层表面形成具有所需要特征的二氧化硅层。在进行准分子激光退火结晶期间，所生成的二氧化硅层起到保温作用。然而，受臭氧的氧化能力所限，所生成的二氧化硅层的厚度一般只有3nm左右，如此薄的二氧化硅层难以抑制熔融的非晶硅结晶时在晶界处形成的隆起，从而导致所制备的半导体层的粗糙度较大，平板显示器的显示品质也因此而受到不良影响。
发明内容
针对上述问题，本发明提出了一种基板制备方法。根据本发明的方法，能够在非晶硅层上制备所需厚度的二氧化硅层。在进行准分子激光退火时，所制备的二氧化硅层足以抑制多晶硅晶界处的隆起，使得所制备的半导体层的粗糙度较低。
根据本发明的基板制备方法，包括以下步骤：步骤一，在基材上沉积非晶硅层，步骤二，在非晶硅层上沉积第一厚度的二氧化硅层，步骤三，刻蚀二氧化硅层，直到其厚度降低到第二厚度。
在使用根据本发明的方法制备二氧化硅层时，由于第二厚度的二氧化硅层是通过蚀刻较厚的二氧化硅层而得到，因此最终所得到的到的二氧化硅层的厚度就不限于最多3nm，而是可以厚到足以抑制多晶硅层晶界处的隆起。由此，所制备的半导体层的粗糙度就会较低，显示器的显示品质也就不会受到不良影响。另外，在制备二氧化硅层的过程中，不需要臭氧，这就省去了臭氧发生器，简化了生产设备。另外，由于不需要臭氧，也避免了臭氧泄露而导致的环境污染风险。此外，在蚀刻二氧化硅层的过程中，可通过控制蚀刻条件来方便地实现预定厚度的二氧化硅层，蚀刻过程变得更加简单。
在一个实施例中，在步骤三之后，还包括：步骤四，进行水洗，然后进行准分子激光退火。由于在步骤三种已经制备了二氧化硅层，因此在进行准分子激光退火之前，就仅需要使用水清洗基板，方便了操作。
在一个实施例中，在步骤三中，使用氢氟酸来进行蚀刻。氢氟酸是常用的化学试剂，价格低廉，有助于降低成本。
在一个优选的实施例中，在步骤三中，通过监测蚀刻时间来确定蚀刻终点。通过这种方法来控制蚀刻，可以方便地实现自动完成蚀刻，而无需操作人员手动处理。这不但简化了操作人员的劳动强度，而且能够更精确地控制蚀刻结束的时刻，大幅提高产品的良率。
在一个具体的实施例中，以质量分数计，氢氟酸的浓度为0.5％到1％。第一厚度为10nm以上。优选地，第一厚度为10nm到50nm。第二厚度为3nm到7nm。申请人发现，使用这种浓度的氢氟酸蚀刻二氧化硅层时，二氧化硅层的蚀刻速度在0.2nm/s左右，将第一厚度的二氧化硅层蚀刻成第二厚度的二氧化硅层所需要的时间大约为0.5分钟到3.6分钟之间。该蚀刻时间使得蚀刻效率较高，而且易于控制，有助于进一步提高产品的良率。在进一步缩短蚀刻时间的情况下，所产生的时间误差会非常大，这会显著降低产品良率。在延长蚀刻时间的情况下，虽然所产生的时间误差会较小，但是蚀刻效率会显著下降，从而降低基板的生产效率。
在一个实施例中，基材包括玻璃基板和设置在玻璃基板上的缓冲层，非晶硅 层处于所述缓冲层上。优选地，缓冲层为两层层叠的SiNx层和SiOx层。在这种情况下，在缓冲层上的非晶硅层经准分子激光退火而结晶成多晶硅层时，不会对非晶硅层产生任何不利的影响，这有助于进一步提高显示器的显示品质。
与现有技术相比，本发明的优点在于：(1)根据本发明的方法，能够在非晶硅层上制备所需厚度的二氧化硅层。在进行准分子激光退火时，所制备的二氧化硅层足以抑制多晶硅晶界处的隆起，使得所制备的半导体层的粗糙度较低。(2)由于所制备的二氧化硅层的表面粗糙度非常低，可大大简化激光退火结晶前所使用的清洗设备和清洗方法，降低了生产成本，提高了竞争力。
附图说明
在下文中将基于实施例并参考附图来对本发明进行更详细的描述。其中：
图1示意性地显示了在基材上沉积非晶硅层的步骤；
图2示意性地显示了在非晶硅层上沉积二氧化硅层的步骤；
图3示意性地显示了刻蚀二氧化硅层的步骤；以及
图4示意性地显示了准分子激光退火的步骤；
在附图中，相同的部件使用相同的附图标记，附图并未按照实际的比例。
具体实施方式
下面将结合附图对本发明作进一步说明。
图1到图4示例性地显示了实施根据本发明的方法(以下简称方法)的步骤。方法包括以下步骤：
步骤1，在基材11上沉积非晶硅层12。如图1所示。
步骤2，在非晶硅层12上沉积第一厚度D1的二氧化硅层17。如图2所示。
步骤3，刻蚀二氧化硅层17，直到其厚度降低到第二厚度D2。如图3所示。
在步骤1中，基材11可包括玻璃基板14和设置在玻璃基板14上的第一缓冲层15和第二缓冲层16。在一个优选的实施例中，第一缓冲层15为SiNx和第二缓冲层16为SiOx。在其他的实施例中，第一缓冲层15也可为SiOx，第二缓冲层16则为SiNx。在这种情况下，实际上，非晶硅层12处于第一缓冲层15和第二缓冲层16上。这样，在将非晶硅层12进行准分子激光退火结晶(如下文所述的步骤4)时，第一缓冲层15和第二缓冲层16不会对非晶硅层12产生任何不 利的影响。这极大地简化了准分子激光退火步骤，降低了基板生产难度。
在步骤2中，可以以硅烷和N2O为原料，通过等离子增强化学气相沉积(PECVD)的方法来沉积SiO2层17。这是本领域的技术人员所熟知的，这里不再赘述。应理解地是，还可以任何适当其他的方法来沉积SiO2层。
应当注意地是，所沉积的SiO2层17的厚度D1(即，第一厚度)应当较厚，以使得能够顺利进行步骤3。在一个实施例中，第一厚度D1为10nm以上。若第一厚度D1小于10nm，在接下来的步骤3中，会难以保证蚀刻之后的第二厚度D2在预期范围之内，导致产品的良率降低。然而，若第一厚度D1过大，则会延长蚀刻时间，降低生产效率。优选地，第一厚度D1为10nm到50nm。
在步骤3中，可以使用氢氟酸(HF)来进行蚀刻二氧化硅层。氢氟酸是指：氟化氢的水溶液或者含有掺杂物的水溶液。这些掺杂物是为了更好地实施蚀刻或其他有益的目的。具有掺杂物的氢氟酸也在本发明的保护范围之内。
为了能使二氧化硅层17抑制在多晶硅晶界处产生的隆起以降低表面粗糙度，可以将步骤2中制备的二氧化硅层17蚀刻到3nm到7nm的第二厚度D2。可以通过蚀刻时间来控制第二厚度D2。这样，能够实现全自动监控蚀刻，降低工作人员的劳动强度。特别是由于氢氟酸具有挥发性和毒性，进行全自动监控蚀刻过程，可以大幅减少工作人员与氢氟酸(或氟化氢气体)的接触时间，以保护工作人员。
在使用以质量分数计浓度为0.5％到1％的氢氟酸的情况下，二氧化硅层17的蚀刻速度在0.2nm/s左右。这样，将第一厚度D1的二氧化硅层17蚀刻成第二厚度D2的二氧化硅层所需要的时间大约为0.5分钟到3.6分钟之间。该蚀刻时间使得蚀刻效率较高，而且蚀刻时间也易于控制，有助于进一步提高产品的良率。进一步提高氢氟酸的浓度，会减少蚀刻时间，这将导致蚀刻时间误差增大，而降低产品的良率。降低氢氟酸的浓度，则会延长蚀刻时间，降低生产效率。
在步骤3之后，还可以进行步骤4：水洗，然后进行准分子激光退火。这样，将非晶硅层熔融后结晶成多晶硅18。
由于经步骤1到3制备二氧化硅层17的表面粗糙度非常低，因此可以经简单的水洗即可将基板彻底洗干净。这简化了激光退火结晶前所使用的清洗设备和清洗步骤，降低了生产成本，提高了竞争力。
本发明的制备方法，在制备二氧化硅层17的过程中，没有使用臭氧。这就 省去了臭氧发生器，简化了生产设备、降低了生产成本。另外，由于省去了臭氧，也避免了臭氧意外泄露而导致的环境污染风险。
虽然已经参考优选实施例对本发明进行了描述，但在不脱离本发明的范围的情况下，可以对其进行各种改进并且可以用等效物替换其中的部件。尤其是，只要不存在结构冲突，各个实施例中所提到的各项技术特征均可以任意方式组合起来。本发明并不局限于文中公开的特定实施例，而是包括落入权利要求的范围内的所有技术方案。

Claims (10)

  1. 一种基板制备方法，包括以下步骤：
    步骤一，在基材上沉积非晶硅层，
    步骤二，在所述非晶硅层上沉积第一厚度的二氧化硅层，
    步骤三，刻蚀所述二氧化硅层，直到其厚度降低到第二厚度。
  2. 根据权利要求1所述的方法，其中，在所述步骤三之后，还包括：步骤四，进行水洗，然后进行准分子激光退火使非晶硅层变为多晶硅层。
  3. 根据权利要求1所述的方法，其中，在所述步骤三中，使用氢氟酸来进行蚀刻。
  4. 根据权利要求3所述的方法，其中，在所述步骤三中，通过监测蚀刻时间来确定蚀刻终点。
  5. 根据权利要求4所述的方法，其中，以质量分数计，所述氢氟酸的浓度为0.5％到1％。
  6. 根据权利要求5所述的方法，其中，所述第一厚度为10nm以上。
  7. 根据权利要求6所述的方法，其中，所述第一厚度为10nm到50nm。
  8. 根据权利要求5所述的方法，其中，所述第二厚度为3nm到7nm。
  9. 根据权利要求1所述的方法，其中，所述基材包括玻璃基板和设置在所述玻璃基板上的缓冲层，所述非晶硅层处于所述缓冲层上。
  10. 根据权利要求9所述的方法，其中，所述缓冲层为两层层叠的SiNx层和SiOx层。
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