WO2016155456A1 - 阵列基板及其制作方法、有机发光显示装置 - Google Patents

阵列基板及其制作方法、有机发光显示装置 Download PDF

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Publication number
WO2016155456A1
WO2016155456A1 PCT/CN2016/075423 CN2016075423W WO2016155456A1 WO 2016155456 A1 WO2016155456 A1 WO 2016155456A1 CN 2016075423 W CN2016075423 W CN 2016075423W WO 2016155456 A1 WO2016155456 A1 WO 2016155456A1
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light emitting
emitting unit
planarization layer
electrode
light
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PCT/CN2016/075423
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English (en)
French (fr)
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张鹏
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京东方科技集团股份有限公司
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Priority to US15/510,918 priority Critical patent/US10186561B2/en
Publication of WO2016155456A1 publication Critical patent/WO2016155456A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/813—Anodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H10K50/852—Arrangements for extracting light from the devices comprising a resonant cavity structure, e.g. Bragg reflector pair
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80515—Anodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices
    • H10K59/876—Arrangements for extracting light from the devices comprising a resonant cavity structure, e.g. Bragg reflector pair
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/302—Details of OLEDs of OLED structures
    • H10K2102/3023—Direction of light emission
    • H10K2102/3026—Top emission
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an array substrate, a method for fabricating the same, and an organic light emitting display device.
  • OLED display panels have become a very popular emerging flat panel display panel at home and abroad. Compared with LCD panels, which are the mainstream of flat panel display panels, OLED display panels have self-luminous and wide viewing angles. Short response time, wide color gamut, low working voltage, thin panel, easy to make flexible panels, wide operating temperature range and other innate advantages.
  • the microcavity effect mainly means that the photon densities of different energy states are redistributed, so that only specific wavelengths of light are It is emitted at a specific angle after conforming to the resonant cavity mode.
  • the reflectivity of the anode close to the substrate substrate is high, and the cathode away from the substrate substrate generally adopts a semi-transmissive metal structure, which also increases the reflection of light, thereby between the anode and the cathode.
  • the light emitting unit 20 includes a first electrode 21, a light emitting layer 22 and a second electrode 23, which are sequentially disposed above the base substrate 10, and the first electrode 21
  • the light-emitting layer 22 and the second electrode 23 constitute a microcavity, and an exit direction of the light is perpendicular to an interface between the first electrode 21 and the light-emitting layer 22 and an interface between the light-emitting layer 22 and the second electrode 23, which causes a viewing angle.
  • the problem that the intensity of light seen at a narrow, different viewing angle is different and the light-emitting area is small.
  • An object of the present invention is to provide an array substrate and a method of fabricating the same, and an organic light emitting display device to increase the amount of light emitted from each sub-pixel region and improve display efficiency. fruit.
  • the present invention provides an array substrate including a plurality of sub-pixel regions each including a light emitting unit disposed on a base substrate, wherein the light emitting unit is formed to include a recessed or raised structure The light emitting area of the light emitting unit is made larger than the projected area of the light emitting unit on the substrate.
  • a planarization layer is disposed between the light emitting unit and the base substrate, and a surface of the planarization layer is formed toward a surface of the light emitting unit, and the light emitting unit is formed to cover a surface of the recess.
  • the recess comprises an inclined side surface and a bottom surface, the area of the bottom surface being smaller than the area of the opening of the recess.
  • the angle between the side surface of the recess and the bottom surface is in the range of 130° to 140°.
  • the thickness of the portion of the planarization layer around the recess is in the range of 5 to 7 ⁇ m.
  • the light emitting unit includes a first electrode, a light emitting layer and a second electrode which are sequentially disposed on the planarization layer, the first electrode includes a metal layer that is opaque, and the second electrode is semipermeable.
  • the metal layer of light is not limited to a first electrode, a light emitting layer and a second electrode which are sequentially disposed on the planarization layer, the first electrode includes a metal layer that is opaque, and the second electrode is semipermeable. The metal layer of light.
  • a driving thin film transistor is further disposed between the base substrate and the planarization layer, and a position of the planarization layer corresponding to a drain of the driving thin film transistor is provided with a via hole, the first An electrode is connected to the drain through the via.
  • the present invention further provides a method for fabricating an array substrate, wherein the array substrate includes a plurality of sub-pixel regions, and the manufacturing method includes:
  • a light emitting unit is formed in each of the sub-pixel regions, wherein the light emitting unit is formed to include a recess or a protrusion such that a light emitting area of the light emitting unit is larger than a projected area of the light emitting unit on the base substrate.
  • the manufacturing method further comprises the step performed before the step of forming the light emitting unit in each sub-pixel region:
  • a recess is formed on a portion of the planarization layer corresponding to the light emitting unit.
  • a portion corresponding to the light emitting unit is formed on the planarization layer
  • the steps include:
  • Exposing and developing the planarization layer using a halftone mask wherein the halftone mask comprises a completely transparent region, a partially transparent region, and an opaque region, the fully transparent region corresponding to In a middle portion of the light emitting unit, the partial light transmitting region corresponds to a peripheral region of a middle portion of the light emitting unit, and the light emitting region corresponds to a region where the light emitting unit is not disposed.
  • the halftone mask comprises a completely transparent region, a partially transparent region, and an opaque region, the fully transparent region corresponding to In a middle portion of the light emitting unit, the partial light transmitting region corresponds to a peripheral region of a middle portion of the light emitting unit, and the light emitting region corresponds to a region where the light emitting unit is not disposed.
  • a portion of the planarization layer located around the recess has a thickness in the range of 5 to 7 ⁇ m.
  • the step of forming a light emitting unit in each sub-pixel region comprises:
  • the first electrode includes a metal layer that is opaque, and the second electrode is a semi-transmissive metal layer.
  • the manufacturing method further comprises the steps performed before the step of forming a planarization layer on the base substrate:
  • the manufacturing method further includes the steps performed after the step of forming a planarization layer on the base substrate:
  • a via hole is formed at a position of the planarization layer corresponding to a drain of the driving thin film transistor such that the first electrode is connected to the drain through the via hole.
  • the present invention also provides an organic light emitting display device, wherein the organic light emitting display device comprises the above array substrate provided by the present invention.
  • the light-emitting area of the light-emitting unit in the present invention is larger than the projected area of the light-emitting unit on the base substrate, so that the light-emitting area of the light-emitting unit in the present invention is relative to the light-emitting unit in the prior art in the case where the sub-pixel area is limited.
  • the light-emitting area is increased, the amount of light is increased, and by forming the light-emitting unit on the surface of the recess on the planarization layer, the light can be emitted in a plurality of directions, thereby increasing the viewing angle of the display, thereby The intensity and color of the light observed at different angles are more uniform, improving the display effect.
  • FIG. 1 is a schematic structural view of an array substrate in the prior art
  • FIG. 2 is a schematic structural view of an array substrate in an embodiment of the present invention.
  • FIG 3 is a schematic view showing the structure of a recess on a planarization layer in an embodiment of the present invention.
  • an array substrate including a plurality of sub-pixel regions each including a light emitting unit 20 disposed above a base substrate 10, wherein the light emitting unit 20 is formed as
  • the structure including the depressions or protrusions is such that the light-emitting area of the light-emitting unit 20 is larger than the projected area of the light-emitting unit 20 on the base substrate 10.
  • the light emitting unit on the organic electroluminescent array substrate is formed into a flat plate structure, which is disposed in parallel with the base substrate 10, such that the light emitting area of the light emitting unit 20 and the light emitting unit 20 are on the base substrate 10.
  • the projected area is equal.
  • the light emitting unit 20 is formed to include a recessed or convex structure, so that the light emitting area of the light emitting unit 20 is larger than the projected area of the light emitting unit 20 on the base substrate 10, and thus, compared with the prior art, When the sub-pixel area is limited, the array substrate of the present invention has a larger light-emitting area and a larger amount of light emitted, thereby improving the display effect of the display device.
  • a planarization layer 30 is disposed between the light emitting unit 20 and the base substrate 10.
  • the surface of the planarization layer 30 facing the light emitting unit 20 is recessed, and the light emitting unit 20 is formed. Formed by covering the surface of the recess.
  • the unit 20 may include a first electrode 21, a light emitting layer 22, and a second electrode 23 which are sequentially disposed, and the light emitting unit 20 covers the surface of the recess to form a first electrode 21, a light emitting layer 22, and a second electrode 23.
  • the shape coincides with the shape of the surface of the recess, so that the light emitting area of the light emitting unit 20 is increased.
  • the interface between the first electrode of the light emitting unit 20 and the light emitting layer and the interface between the light emitting layer and the second electrode are both planar, such that the light emitted by the light emitting layer is perpendicular to the first electrode and the light emitting layer.
  • the light emitted by the luminescent layer 22 can form multi-photon beam interference in multiple directions between the first electrode and the second electrode, so that the light can be emitted at different angles, thereby increasing The viewing angle of the display, in turn, makes the intensity and color of the light observed at different angles more uniform.
  • the shape of the recess is not particularly limited as long as the light of the light-emitting unit 20 can be emitted in different directions.
  • the recess includes an inclined side surface and a bottom surface, and an area of the bottom surface is smaller than an area of the opening of the recess.
  • the light emitting unit 20 is formed to cover the surface of the recess, the light emitted from the portion corresponding to the inclined side surface of the recess is perpendicular to the inclined side surface, and the light emitted from the portion corresponding to the bottom surface of the recess is perpendicular to the light.
  • the bottom surface Preferably, the angle between the side and the bottom surface is in the range of 130 to 140, for example, 135.
  • the light emitting area can be increased to a greater extent while preventing the portion of the light emitting unit 20 corresponding to each side from being emitted. The light is blocked by portions corresponding to the opposite sides.
  • the thickness of the material for forming the planarization layer may be large, and specifically, the thickness of the portion of the planarization layer around the recess is between 5 and 7 ⁇ m.
  • an increase in the thickness of the planarization layer may increase an area of the inclined side surface. For example, as shown in FIG.
  • the width d1 of the side surface of the recess is about 6.4 ⁇ m.
  • the light emitting unit 20 may include the first electrode 21, the light emitting layer 22, and the second electrode 23 which are sequentially disposed on the planarization layer 30, and when the first electrode 21 is an opaque metal layer and a second electrode When 23 is a semi-transmissive metal layer, the second electrode 23 increases the reflection of light, making the microcavity effect more conspicuous.
  • the first electrode may be an anode
  • the second electrode may be a cathode.
  • an operating voltage is applied to the anode and the cathode
  • holes in the anode and electrons in the cathode are injected into the light-emitting layer 22, and holes and electrons are formed.
  • the electron-hole pair releases energy at the same time and emits in the form of light, which shows different colors through different luminescent molecules, and is evenly emitted from both sides of the luminescent layer 22.
  • the micro-cavity effect is more obvious due to the reflection effect of the second electrode. Therefore, the present invention is particularly applicable to the top-emission type light-emitting unit, that is, the first electrode 21 includes an opaque metal layer.
  • the second electrode 23 includes a semi-transmissive metal layer.
  • the first electrode 21 may include a two-layer indium tin oxide film and an opaque metal layer between the two indium tin oxide films, and the second electrode 23 is a semi-transmissive metal film.
  • a driving thin film transistor 40 is further disposed between the base substrate 10 and the planarization layer 30, and a via hole is disposed at a position corresponding to the drain 41 of the driving thin film transistor 40 of the planarization layer 30.
  • the first electrode 21 is connected to the drain electrode 41 through the via hole.
  • the driving thin film transistor 40 may be a bottom gate type thin film transistor or a top gate type thin film transistor (as shown in FIG. 2), which is not limited herein.
  • a pixel defining layer 50 is further disposed around each of the light emitting units 20 to partition the light emitting units in the adjacent sub-pixel regions.
  • a method for fabricating an array substrate includes a plurality of sub-pixel regions, and the manufacturing method includes:
  • the manufacturing method further includes the steps performed before the step of forming a light emitting unit in each sub-pixel region:
  • the planarization layer may be formed into a polyimide paste (PI) layer by vapor phase thermal deposition;
  • PI polyimide paste
  • a recess is formed on a portion of the planarization layer corresponding to the light emitting unit such that the light emitting unit covers the surface of the recess such that a light emitting area of the light emitting unit is larger than a projected area of the light emitting unit on the base substrate.
  • the recess may include a sloped side surface and a bottom surface, the area of the bottom surface being smaller than the area of the opening of the recess, specifically, a step of forming a recess on the flattening layer corresponding to a portion of the light emitting unit include:
  • the halftone mask Exposing and developing the planarization layer using a halftone mask, wherein when a positive photoresist is used, the halftone mask includes a completely transparent region, a partially transparent region, and an opaque region.
  • the completely transparent region corresponds to a middle portion of the light emitting unit
  • the partial light transmitting region corresponds to a peripheral region of a middle portion of the light emitting unit
  • the opaque region corresponds to a region where the light emitting unit is not disposed.
  • the middle portion of the light emitting unit corresponds to the bottom surface of the recess to be formed, and may also be regarded as the middle portion of the sub-pixel region.
  • the size of the sub-pixel region is 25 ⁇ m*30 ⁇ m
  • a portion of the planarization layer corresponding to the middle portion of the light-emitting unit may correspond to a region of 15 ⁇ m*20 ⁇ m in the middle of the sub-pixel region.
  • a completely transparent region of the halftone mask corresponds to a middle portion of the sub-pixel region, and the light transmittance of the partially transparent region can be made within
  • the gradual decrease (toward the completely transparent region) to the outside (near the opaque region) causes the degree of photoresist denaturation at the position of the middle portion of the sub-pixel region to be large, and the degree of photoresist denaturation of the peripheral region of the middle portion gradually decreases.
  • the recess is then formed on the planarization layer by development.
  • the recess may be formed by other means, which is not specifically limited herein.
  • the thickness of the flattening layer may be large.
  • the thickness of the portion of the planarizing layer around the recess may be In the range of 5 to 7 ⁇ m, deep depressions can be formed on the planarization layer to increase the light-emitting surface of the light-emitting unit as much as possible. The product and the effect on the thickness of the array substrate are reduced, which is advantageous for the thin design of the display device.
  • the step of forming a light emitting unit in each sub-pixel region may include:
  • the first electrode includes a metal layer that is opaque, and the second electrode is a semi-transmissive metal layer.
  • the manufacturing method further includes the steps performed before the step of forming a planarization layer on the base substrate:
  • the manufacturing method further includes the steps performed after the step of forming a planarization layer on the base substrate:
  • a via hole is formed at a position of the planarization layer corresponding to a drain of the driving thin film transistor such that the first electrode is connected to the drain through the via hole.
  • the form of the driving thin film transistor is not particularly limited, and may be a top gate thin film transistor or a bottom gate thin film transistor.
  • an active layer material may be deposited on the base substrate 10, and a pattern including the active layer 42 may be formed by a photolithography patterning process; then, the active layer 42 is formed.
  • a first insulating layer 43 is formed on the base substrate; a gate metal layer is formed on the first insulating layer 43, a pattern including the gate electrode 44 is formed by a photolithography patterning process; then a second insulating layer 45 is formed and formed Two via holes penetrating the first insulating layer 43 and the second insulating layer 45 such that a source/drain metal layer formed on the second insulating layer 45 is subsequently connected to the active layer 42 through the two via holes, and finally a source is formed The pattern of the pole 46 and the drain 41.
  • an organic light emitting display device including the above array substrate. Since the light-emitting area of the light-emitting unit on the array substrate of the present invention is larger than that of the prior art, and the light-emitting angle is wider, the light intensity of the different angles is displayed when the organic light-emitting display device performs image display. The difference is small and the display effect is improved.
  • the foregoing is a description of the array substrate provided by the present invention, the manufacturing method thereof, and the display device. It can be seen that in the case where the sub-pixel region is limited, the light-emitting unit of the present invention
  • the light-emitting area is larger than the light-emitting area of the light-emitting unit in the prior art, and by forming the light-emitting unit on the surface of the recess on the planarization layer, the light can be emitted in a plurality of directions, thereby increasing the viewing angle of the display In turn, the intensity and color of the light observed at different angles are more uniform, and the display effect is improved.
  • the present invention is not limited thereto, and the light emitting unit may be formed to include a convex structure as long as the light emitting area of the light emitting unit is used. It may be larger than the projected area of the light emitting unit on the base substrate.

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Abstract

提供一种阵列基板及其制作方法和有机发光显示装置。阵列基板包括多个子像素区域，每个子像素区域包括设置在衬底基板（10）上的发光单元（20），其中，发光单元（20）被形成为包括凹陷或凸起的结构，使得发光单元（20）的发光面积大于其在衬底基板（10）上的投影面积。该结构的发光单元能够增大每个子像素区域的出光量，从而增大显示器的视角，改善显示效果。

Description

阵列基板及其制作方法、有机发光显示装置 技术领域
本发明涉及显示技术领域，具体涉及阵列基板及其制作方法、有机发光显示装置。
背景技术
近年来，有机发光二极管(organic light emitting diode，OLED)显示面板已经成为国内外非常热门的新兴平板显示面板，与现今作为平板显示面板主流的LCD面板相比，OLED显示面板具有自发光、广视角、短反应时间、广色域、低工作电压、面板薄、易于做成柔性面板、工作温度范围广等先天的优势。
然而，不管是顶发射式OLED显示面板还是底发射式OLED显示面板，都会有不同程度的微腔效应，微腔效应主要是指不同能态的光子密度被重新分配，使得只有特定波长的光在符合共振腔模式后以特定的角度射出。对于顶发射式OLED显示面板，靠近衬底基板的阳极的反射率很高，远离衬底基板的阴极通常采用半透光的金属结构，也会增加光的反射，从而在阳极和阴极之间会形成多光子束的干涉，使得微腔效应更为明显。如图1所示，在现有技术的顶发射式OLED显示面板中，发光单元20包括依次设置在衬底基板10上方的第一电极21、发光层22和第二电极23，第一电极21、发光层22和第二电极23构成微腔，光线的出射方向垂直于第一电极21与发光层22之间的界面以及发光层22与第二电极23之间的界面，这就造成了视角窄、不同观察角度看到的光的强度不同并且发光面积较小的问题。
发明内容
本发明的一个目的在于提供一种阵列基板及其制作方法、和一种有机发光显示装置，以增加每个子像素区域的出光量，改善显示效 果。
为了实现上述目的，本发明提供一种阵列基板，包括多个子像素区域，每个子像素区域包括设置在衬底基板上的发光单元，其中，所述发光单元被形成为包括凹陷或凸起的结构，使得所述发光单元的发光面积大于所述发光单元在衬底基板上的投影面积。
优选地，所述发光单元和衬底基板之间设置有平坦化层，所述平坦化层的朝向所述发光单元的表面形成凹陷，所述发光单元覆盖所述凹陷的表面而形成。
优选地，所述凹陷包括倾斜的侧面和底面，所述底面的面积小于所述凹陷的开口的面积。
优选地，所述凹陷的侧面与底面之间的夹角的角度在130°～140°的范围内。
优选地，所述平坦化层的位于所述凹陷周围的部分的厚度在5～7μm的范围内。
优选地，所述发光单元包括在所述平坦化层上依次设置的第一电极、发光层和第二电极，所述第一电极包括不透光的金属层，所述第二电极为半透光的金属层。
优选地，所述衬底基板和所述平坦化层之间还设置有驱动薄膜晶体管，所述平坦化层的对应于所述驱动薄膜晶体管的漏极的位置设置有过孔，所述第一电极通过所述过孔与所述漏极相连。
相应地，本发明还提供一种阵列基板的制作方法，所述阵列基板包括多个子像素区域，所述制作方法包括：
在每个子像素区域内形成发光单元，其中，所述发光单元被形成为包括凹陷或凸起的结构，使得所述发光单元的发光面积大于所述发光单元在所述衬底基板上投影面积。
优选地，所述制作方法还包括在每个子像素区域内形成发光单元的步骤之前进行的步骤：
形成平坦化层；
在所述平坦化层上对应于发光单元的部分形成凹陷。
优选地，在所述平坦化层上对应于发光单元的部分形成凹陷的 步骤包括：
利用半色调掩膜板对所述平坦化层进行曝光并显影，其中，半色调掩膜板包括完全透光区域、部分透光区域和不透光区域，所述完全透光区域对应于所述发光单元的中部，所述部分透光区域对应于所述发光单元的中部的外围区域，所述不透光区域对应于未设置发光单元的区域。
优选地，所述平坦化层的位于所述凹陷周围的部分厚度在5～7μm的范围内。
优选地，在每个子像素区域内形成发光单元的步骤包括：
在平坦化层上的凹陷的表面上依次形成第一电极、发光层和第二电极，
其中，所述第一电极包括不透光的金属层，所述第二电极为半透光的金属层。
优选地，所述制作方法还包括在衬底基板上形成平坦化层的步骤之前进行的步骤：
形成驱动薄膜晶体管；
所述制作方法还包括在衬底基板上形成平坦化层的步骤之后进行的步骤：
在所述平坦化层的对应于所述驱动薄膜晶体管的漏极的位置形成过孔，以使得第一电极通过所述过孔与所述漏极相连。
相应地，本发明还提供一种有机发光显示装置，其中，所述有机发光显示装置包括本发明提供的上述阵列基板。
本发明中的发光单元的发光面积大于发光单元在衬底基板上的投影面积，从而使得在子像素区域有限的情况下，本发明中的发光单元的发光面积相对于现有技术中的发光单元的发光面积有所增大，出光量更多，并且，通过将发光单元形成在平坦化层上的凹陷的表面上，能够使得光线朝向多个方向出射，从而能增大显示器的视角，进而使得不同角度观察到的光的强度和颜色更加均匀，改善了显示效果。
附图说明
附图是用来提供对本发明的进一步理解的，并且构成说明书的一部分，与下面的具体实施方式一起用于解释本发明，但并不构成对本发明的限制。在附图中：
图1是现有技术中的阵列基板的结构示意图；
图2是本发明的实施方式中的阵列基板的结构示意图；
图3是本发明的实施方式中的平坦化层上的凹陷的结构示意图。
附图标记：10、衬底基板；20、发光单元；21、第一电极；22、发光层；23、第二电极；30、平坦化层；40、驱动薄膜晶体管；41、漏极；42、有源层；43、第一绝缘层；44、栅极；45、第二绝缘层；46、源极；50、像素定义层。
具体实施方式
以下结合附图对本发明的具体实施方式进行详细说明。应当理解的是，此处所描述的具体实施方式仅用于说明和解释本发明，并不用于限制本发明。
作为本发明的一方面，提供一种阵列基板，如图2所示，包括多个子像素区域，每个子像素区域包括设置在衬底基板10上方的发光单元20，其中，发光单元20被形成为包括凹陷或凸起的结构，使得发光单元20的发光面积大于发光单元20在衬底基板10上的投影面积。
在现有技术中，有机电致发光阵列基板上的发光单元被形成为平板结构，与衬底基板10相对平行地设置，这样，发光单元20的发光面积与发光单元20在衬底基板10上的投影面积相等。而本发明中，发光单元20被形成为包括凹陷或凸起的结构，从而发光单元20的发光面积大于发光单元20在衬底基板10上的投影面积，因此，与现有技术相比，在子像素区域有限的情况下，本发明的阵列基板的发光面积更大、出光量更多，从而能改善显示装置的显示效果。
作为本发明的一种具体实施方式，如图2所示，发光单元20与衬底基板10之间设置有平坦化层30，平坦化层30的朝向发光单元20的表面形成凹陷，发光单元20覆盖所述凹陷的表面而形成。发光 单元20可以包括依次设置的第一电极21、发光层22和第二电极23，发光单元20覆盖所述凹陷的表面而形成可以理解为，第一电极21、发光层22和第二电极23的形状与所述凹陷的表面的形状一致，从而使得发光单元20的发光面积增大。在现有技术中，发光单元20的第一电极和发光层之间的界面以及发光层和第二电极之间的界面均为平面，使得发光层所发射的光线垂直于第一电极和发光层之间的界面以及发光层和第二电极之间的界面射出，尤其当第一电极为不透光的材料时，使光线进一步沿垂直于第一电极和发光层之间的界面以及发光层和第二电极之间的界面的方向反射，而本发明中，由于发光单元20覆盖所述凹陷的表面而形成，使得第一电极和发光层之间的界面以及发光层和第二电极之间的界面形成为弯曲的形状，因此，发光层22所发射的光线可以在第一电极和第二电极之间形成多个方向的多光子束干涉，使得光线可以以不同的角度出射，从而增大了显示器的视角，进而使得不同角度观察到的光的强度和颜色更加均匀。
本发明对所述凹陷的形状不作具体限定，只要能够使得发光单元20的光线朝向不同的方向出射即可。作为本发明的一种具体实施方式，所述凹陷包括倾斜的侧面和底面，所述底面的面积小于所述凹陷的开口的面积。发光单元20覆盖所述凹陷的表面而形成时，对应于所述凹陷的倾斜的侧面的部分所射出的光线垂直于该倾斜的侧面，对应于所述凹陷的底面的部分所射出的光线垂直于该底面。优选地，所述侧面与底面之间的夹角的角度在130°～140°的范围内，例如，为135°。当所述侧面与底面之间的夹角的角度在130°～140°的范围内时，可以更大限度地增大发光面积，同时防止发光单元20的对应于每个侧面的部分所出射的光线受到对应于相对的侧面的部分的遮挡。
为了增大所述凹陷的表面面积，用于形成平坦化层的材料的厚度可以较大，具体地，所述平坦化层的位于所述凹陷周围的部分的厚度在5～7μm之间。当所述凹陷包括倾斜的侧面和底面且所述底面的面积小于开口的面积时，平坦化层的厚度增加可以使得倾斜的侧面的面积增大。例如，如图3所示，当平坦化层位于所述凹陷周围的部分 的厚度H为6μm时，所述凹陷的深度h可以为4.5μm，所述凹陷的侧面和底面之间的角度α可以为135°，此时，所述凹陷的侧面的宽度d1约为6.4μm，所述凹陷的侧面在衬底基板上的投影的宽度d2为4.5μm，因此，本发明中的阵列基板的发光区域的宽度比现有技术中的大约(6.4-4.5)*2＝3.8μm，从而增大了显示器的发光区域的面积。
如上文中所述，发光单元20可以包括在平坦化层30上依次设置的第一电极21、发光层22和第二电极23，且当第一电极21为不透光的金属层、第二电极23为半透光的金属层时，第二电极23会增加光的反射，使得微腔效应更加明显。
具体地，第一电极可以为阳极，第二电极可以为阴极，当向阳极和阴极施加工作电压时，阳极中的空穴和阴极中的电子均注入到发光层22中，空穴和电子形成电子-空穴对，同时释放出能量，并以光的形式发出，经过不同的发光分子而显示出不同的颜色，再从发光层22的两侧均匀射出。对于顶发射式的发光单元，由于第二电极的反射作用使得微腔效应更加明显，因此，本发明尤其适用于顶发射式的发光单元，即，第一电极21包括不透光的金属层，第二电极23包括半透光的金属层。
具体地，第一电极21可以包括两层氧化铟锡膜和两层氧化铟锡膜之间的不透光的金属层，第二电极23为半透光的金属薄膜。
进一步地，如图2所示，衬底基板10和平坦化层30之间还设置有驱动薄膜晶体管40，平坦化层30的对应于驱动薄膜晶体管40的漏极41的位置设置有过孔，第一电极21通过所述过孔与漏极41相连。驱动薄膜晶体管40可以为底栅型薄膜晶体管或顶栅型薄膜晶体管(如图2中所示)，这里不做限定。
如图2所示，每个发光单元20周围还设置有像素定义层50，以隔开相邻子像素区域内的发光单元。
作为本发明的另一方面，提供一种阵列基板的制作方法，所述阵列基板包括多个子像素区域，所述制作方法包括：
在每个子像素区域内形成发光单元；其中，所述发光单元被形成为包括凹陷或凸起的结构，使得所述发光单元的发光面积大于所述 发光单元在所述衬底基板上的投影面积。
作为本发明的一种具体实施方式，具体地，所述制作方法还包括在每个子像素区域内形成发光单元的步骤之前进行的步骤：
在衬底基板上形成平坦化层，所述平坦化层可以通过气相热沉积的方法形成为聚酰亚胺胶(PI)层；
在所述平坦化层上对应于发光单元的部分形成凹陷，使得发光单元覆盖所述凹陷的表面而形成，从而使得发光单元的发光面积大于发光单元在衬底基板上的投影面积。
如上文中所述，所述凹陷可以包括倾斜的侧面和底面，所述底面的面积小于所述凹陷的开口的面积，具体地，在所述平坦化层上对应于发光单元的部分形成凹陷的步骤包括：
利用半色调掩膜板对所述平坦化层进行曝光并显影，其中，当采用正性光刻胶时，半色调掩膜板包括完全透光区域、部分透光区域和不透光区域，所述完全透光区域对应于所述发光单元的中部，所述部分透光区域对应于所述发光单元的中部的外围区域，所述不透光区域对应于未设置发光单元的区域。
所述发光单元的中部对应于要形成的凹陷的底面，也可以看作子像素区域的中部。例如，子像素区域的大小为25μm*30μm，所述平坦化层的对应于所述发光单元的中部的部分可以对应于该子像素区域的中部的15μm*20μm的区域。当采用正性光刻胶时，对所述平坦化层进行曝光时，半色调掩膜板的完全透光区域对应于子像素区域的中部，并且可以将部分透光区域的透光性由内(靠近完全透光区域)至外(靠近不透光区域)逐渐降低，使得子像素区域的中部的位置的光刻胶变性程度较大，中部的外围区域的光刻胶变性程度逐渐减小，然后通过显影在所述平坦化层上形成所述凹陷。
当然也可以利用其他方式形成所述凹陷，这里不作具体限定。
为了使得发光单元的发光面积尽可能地大于发光单元在衬底基板上的投影面积，平坦化层的厚度可以较大，具体地，所述平坦化层的位于所述凹陷周围的部分的厚度可以在5～7μm的范围内，从而可以在平坦化层上形成较深的凹陷，以尽可能地增大发光单元的发光面 积，且减小对阵列基板的厚度的影响，有利于显示装置的薄形化设计。
更进一步地，在每个子像素区域内形成发光单元的步骤可以包括：
在平坦化层上的凹陷的表面上依次形成第一电极、发光层和第二电极；
其中，所述第一电极包括不透光的金属层，所述第二电极为半透光的金属层。
更进一步地，所述制作方法还包括在衬底基板上形成平坦化层的步骤之前进行的步骤：
形成驱动薄膜晶体管；
所述制作方法还包括在衬底基板上形成平坦化层的步骤之后进行的步骤：
在所述平坦化层的对应于所述驱动薄膜晶体管的漏极的位置形成过孔，以使得第一电极通过所述过孔与所述漏极相连。
本发明对驱动薄膜晶体管的形式不作具体限定，可以为顶栅型薄膜晶体管或底栅型薄膜晶体管。以图2中所示的驱动薄膜晶体管40为例，可以先在衬底基板10上沉积有源层材料，通过光刻构图工艺形成包括有源层42的图形；然后在形成有有源层42的衬底基板上形成第一绝缘层43；再在该第一绝缘层43上形成栅极金属层，通过光刻构图工艺形成包括栅极44的图形；之后形成第二绝缘层45，并形成贯穿第一绝缘层43和第二绝缘层45的两个过孔，以使得后续在第二绝缘层45上形成的源漏金属层通过这两个过孔与有源层42相连，最后形成源极46和漏极41的图形。
作为本发明的再一方面，提供一种有机发光显示装置，该有机发光显示装置包括上述阵列基板。由于本发明中的阵列基板上的发光单元的发光面积相对现有技术的有所增大，且光线的出射角度更广，因此，所述有机发光显示装置进行图像显示时，不同角度的光强度相差较小，显示效果有所改善。
上述为对本发明提供的阵列基板及其制作方法、显示装置的描述，可以看出，在子像素区域有限的情况下，本发明中的发光单元的 发光面积比现有技术中的发光单元的发光面积更大，并且，通过将发光单元形成在平坦化层上的凹陷的表面上，能够使得光线朝向多个方向出射，从而能增大显示器的视角，进而使得不同角度观察到的光的强度和颜色更加均匀，改善了显示效果。
虽然上述实施例中以发光单元被形成为包括凹陷的结构为例进行了描述，但是，本发明不限于此，发光单元也可以被形成为包括凸起的结构，只要所述发光单元的发光面积大于所述发光单元在所述衬底基板上的投影面积即可。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为落入本发明的保护范围内。

Claims (14)

  1. 一种阵列基板，包括多个子像素区域，每个子像素区域包括设置在衬底基板上的发光单元，其中，所述发光单元被形成为包括凹陷或凸起的结构，使得所述发光单元的发光面积大于所述发光单元在衬底基板上的投影面积。
  2. 根据权利要求1所述的阵列基板，其中，所述发光单元和衬底基板之间设置有平坦化层，所述平坦化层的朝向所述发光单元的表面形成凹陷，所述发光单元覆盖所述凹陷的表面而形成。
  3. 根据权利要求2所述的阵列基板，其中，所述凹陷包括倾斜的侧面和底面，所述底面的面积小于所述凹陷的开口的面积。
  4. 根据权利要求3所述的阵列基板，其中，所述凹陷的侧面与底面之间的夹角的角度在130°～140°的范围内。
  5. 根据权利要求3所述的阵列基板，其中，所述平坦化层的位于所述凹陷周围的部分的厚度在5～7μm的范围内。
  6. 根据权利要求2至5中任意一项所述的阵列基板，其中，所述发光单元包括在所述平坦化层上依次设置的第一电极、发光层和第二电极，所述第一电极包括不透光的金属层，所述第二电极为半透光的金属层。
  7. 根据权利要求6所述的阵列基板，其中，所述衬底基板和所述平坦化层之间还设置有驱动薄膜晶体管，所述平坦化层的对应于所述驱动薄膜晶体管的漏极的位置设置有过孔，所述第一电极通过所述过孔与所述漏极相连。
  8. 一种阵列基板的制作方法，所述阵列基板包括多个子像素区域，其中，所述制作方法包括：
    在每个子像素区域内形成发光单元，其中，所述发光单元被形成为包括凹陷或凸起的结构，使得所述发光单元的发光面积大于所述发光单元在所述衬底基板上的投影面积。
  9. 根据权利要求8所述的制作方法，其中，所述制作方法还包括在每个子像素区域内形成发光单元的步骤之前进行的步骤：
    形成平坦化层；
    在所述平坦化层上对应于发光单元的部分形成凹陷。
  10. 根据权利要求9所述的制作方法，其中，在所述平坦化层上对应于发光单元的部分形成凹陷的步骤包括：
    利用半色调掩膜板对所述平坦化层进行曝光并显影，其中，半色调掩膜板包括完全透光区域、部分透光区域和不透光区域，所述完全透光区域对应于所述发光单元的中部，所述部分透光区域对应于所述发光单元的中部的外围区域，所述不透光区域对应于未设置发光单元的区域。
  11. 根据权利要求9所述的制作方法，其中，所述平坦化层的位于所述凹陷周围的部分厚度在5～7μm的范围内。
  12. 根据权利要求9至11中任意一项所述的制作方法，其中，在每个子像素区域内形成发光单元的步骤包括：
    在平坦化层上的凹陷的表面上依次形成第一电极、发光层和第二电极；
    其中，所述第一电极包括不透光的金属层，所述第二电极为半透光的金属层。
  13. 根据权利要求9至11中任意一项所述的制作方法，其中， 所述制作方法还包括在衬底基板上形成平坦化层的步骤之前进行的步骤：
    形成驱动薄膜晶体管；
    所述制作方法还包括在衬底基板上形成平坦化层的步骤之后进行的步骤：
    在所述平坦化层的对应于所述驱动薄膜晶体管的漏极的位置形成过孔，以使得第一电极通过所述过孔与所述漏极相连。
  14. 一种有机发光显示装置，包括权利要求1至7中任意一项所述的阵列基板。
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