WO2016065864A1 - Oled阵列基板及其制备方法、显示面板、显示装置 - Google Patents

Oled阵列基板及其制备方法、显示面板、显示装置 Download PDF

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WO2016065864A1
WO2016065864A1 PCT/CN2015/076848 CN2015076848W WO2016065864A1 WO 2016065864 A1 WO2016065864 A1 WO 2016065864A1 CN 2015076848 W CN2015076848 W CN 2015076848W WO 2016065864 A1 WO2016065864 A1 WO 2016065864A1
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coupling layer
array substrate
light
oled array
arc
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PCT/CN2015/076848
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English (en)
French (fr)
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张粲
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京东方科技集团股份有限公司
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Priority to US14/761,962 priority Critical patent/US9728749B2/en
Publication of WO2016065864A1 publication Critical patent/WO2016065864A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/8791—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H10K50/852—Arrangements for extracting light from the devices comprising a resonant cavity structure, e.g. Bragg reflector pair
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
    • H10K71/164—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering using vacuum deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
    • H10K71/166—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering using selective deposition, e.g. using a mask
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/302—Details of OLEDs of OLED structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an OLED array substrate and a method for fabricating the same, an OLED display panel, and an OLED display device.
  • OLED Organic Light Emitting Diode
  • OLED displays are considered as a new generation of flat panel display products after liquid crystal displays and plasma displays.
  • OLEDs have a wide range of applications in the field of display and illumination.
  • it is necessary to increase the external quantum efficiency of the semiconductor light-emitting element itself as much as possible.
  • the external quantum efficiency of a semiconductor light-emitting element depends on its own internal quantum efficiency and Light Extraction Efficiency (LEE).
  • the internal quantum efficiency is determined by the characteristics of the material itself. Therefore, in the case where the internal quantum efficiency cannot be effectively improved, it is particularly important to improve the light extraction efficiency of the semiconductor light-emitting element.
  • the light extraction efficiency is increased in order to direct the light emitted inside the OLED to the outside of the semiconductor light emitting element as much as possible.
  • the existing OLED array substrate includes a substrate 1 provided with a thin film transistor (not shown), and an OLED unit controlled by a thin film transistor on the substrate 1, and a typical OLED unit includes an anode 2 which is sequentially disposed.
  • the cathode 4 is generally a translucent metal electrode, the reflection of light emitted from the organic light-emitting layer 3 at the electrode is increased, thereby causing multi-photon beam interference, resulting in a microcavity effect ( The phenomenon that the intensity of light at different emission angles and the wavelength of light waves are different due to optical interference inside the component is very obvious. Therefore, when a display including the top emission type OLED array substrate is used, the light emission intensity and color change with the viewing angle.
  • the photocoupling layer 5 may be covered on the cathode 4, and the refractive index of the material forming the optical coupling layer 5 is larger than the refractive index of the material forming the cathode 4, in other words, the optical coupling layer.
  • the refractive index of 5 is greater than the refractive index of the cathode 4. It has been found that when the refractive index of the light coupling layer 5 (the refractive index of the light coupling layer 5 is generally greater than 2.0) is greater than the refractive indices of the organic light-emitting layer 3 and the cathode 4, the transmittance of the cathode 4 is increased, and the cathode 4 is transparent. An increase in the overshoot will attenuate the microcavity effect.
  • the optical coupling layer 5 is formed by evaporation using an open mask, that is, all of the OLED units are simultaneously vapor-deposited to form an equal-thickness optical coupling layer 5 as shown in FIG.
  • the refractive index of the light coupling layer 5 is relatively high, it is generally larger than the refractive index of the gas layer located outside the light coupling layer 5, for example, larger than the refractive index of the nitrogen layer located outside thereof, resulting in an iso-thick optical coupling layer. 5
  • the internal total reflection of light occurs, which loses part of the light intensity, which reduces the light extraction efficiency.
  • the object of the present invention is to solve the problem that the light extraction efficiency is reduced due to the total reflection of light occurring inside the equal-thickness optical coupling layer of the OLED array substrate existing in the prior art, and an OLED array substrate and a preparation method thereof are provided.
  • an OLED array plate includes a substrate and a plurality of pixel units disposed on the substrate, each of the pixel units including a thin film transistor and a first one sequentially disposed on the thin film transistor An electrode, an organic light emitting layer, a second electrode, and an optical coupling layer, wherein
  • the light coupling layer includes a bottom portion in contact with the second electrode and a curved top portion convex toward the light emission direction.
  • the thickness of the light coupling layer is ⁇ /4n, where ⁇ is the wavelength of light emitted by the organic light emitting layer, and n is the refractive index of the light coupling layer.
  • the first electrode is an anode and the second electrode is a cathode.
  • the light coupling layer has different thicknesses corresponding to portions of pixel units of different colors.
  • An arc-top light coupling layer is formed on the substrate on which the first electrode, the organic light-emitting layer, and the second electrode are formed by evaporation using a mask.
  • the mask has a thickness of 100 to 200 nm.
  • the mask comprises a plurality of openings corresponding to the respective pixel units, the openings for passing the evaporation material and forming an arc-top light coupling layer on the corresponding pixel unit;
  • each of the openings are respectively 20-50 nm larger than the length and width of the corresponding pixel unit.
  • the thickness of the arc top light coupling layer is ⁇ /4n, wherein ⁇ is the wavelength of light emitted by the organic light emitting layer, and n is the refractive index of the arc top light coupling layer.
  • the same mask is used when making the arc-top light coupling layer of the pixel unit corresponding to different colors.
  • a mask plate corresponding to the pixel unit of the color is used when making the arc-top light coupling layer of the pixel unit of different colors.
  • an OLED display panel comprising any one of the above OLED array substrates.
  • an OLED display device comprising the above OLED display panel.
  • the OLED array substrate and the preparation method thereof, the OLED display panel and the OLED display device of the invention reduce the total reflection of light inside the optical coupling layer by forming the optical coupling layer into an arc-top light coupling layer, thereby improving light extraction efficiency .
  • FIG. 1 is a schematic structural view of an OLED array substrate in the prior art
  • FIG. 2 is a schematic structural view of an OLED array substrate according to Embodiment 1 of the present invention.
  • FIG. 3 is a schematic view showing a comparison of optical paths in an arc-top light coupling layer according to Embodiment 1 of the present invention and an equal-thickness optical coupling layer in the prior art;
  • FIG. 4 is a top plan view showing a mask used for preparing an arc-top light coupling layer in Embodiment 2 of the present invention
  • Figure 5 is a cross-sectional view showing a mask used in the vapor deposition according to Embodiment 2 of the present invention. As well as
  • FIG. 6 is a view showing the size comparison between the opening 71 of the mask and the corresponding pixel unit in the embodiment 2 of the present invention.
  • the embodiment provides an OLED array substrate, including a substrate 1 and a plurality of pixel units disposed on the substrate 1, each of the pixel units including a thin film transistor (not shown) and the thin film a first electrode 2, an organic light-emitting layer 3, a second electrode 4, and a light coupling layer 6 disposed in sequence above the transistor, the light-coupling layer 6 including a bottom portion in contact with the second electrode 4 and a direction toward the light exiting direction (FIG. 2) A convex curved top in the direction of the arrow.
  • the light coupling layer 6 having a curved top portion provided in the present invention is referred to as an arc top light coupling layer 6.
  • the thin film transistor is used to control the light emission of the organic light-emitting layer 3.
  • the first electrode 2 and the second electrode 4 are used to supply holes and electrons to the organic light-emitting layer 3 to cause the organic light-emitting layer 3 to emit light.
  • the refractive index of the arc-top light coupling layer 6 is greater than the refractive index of the second electrode 4, and the arc-top light coupling layer 6 is used to increase the light transmittance of the second electrode 4.
  • the arc-top light coupling layer 6 can reduce the total reflection inside the optical coupling layer.
  • FIG. 3 when light is incident at the same angle, for an equal-thickness optical coupling layer, since the incident angle is larger than the critical angle, total reflection occurs at the interface of the iso-thick optical coupling layer; The layer has a curved interface, so the incident angle is reduced.
  • the incident angle is smaller than the critical angle, refraction occurs at the interface of the arc-top light coupling layer, and light is emitted to the outside of the arc-top light coupling layer, thereby facilitating light. extract.
  • the OLED array substrate of the present invention has the optical coupling layer disposed to have a curved top portion, the light coupling can be reduced with respect to the iso-thick optical coupling layer in the prior art. Total reflection inside the layer, which improves light extraction efficiency.
  • the thickness of the arc top light coupling layer 6 is ⁇ /4n, where ⁇ is the wavelength of light emitted by the organic light emitting layer 3; n is the refractive index of the arc top light coupling layer 6.
  • the arc-top light coupling layer 6 having the above thickness has the highest light transmittance (minimum total reflection of light). It should be noted that, in the present invention, the thickness of the arc-top light coupling layer 6 is ⁇ /4n, which means that the maximum thickness of the arc-top light-coupling layer 6 is ⁇ /4n.
  • the arc-top light coupling layer 6 has different thicknesses corresponding to portions of pixel units of different colors. For example, in a case where the pixel unit is divided into a red pixel unit, a green pixel unit, and a blue pixel unit, the portion of the arc top light coupling layer 6 corresponding to the red pixel unit has a first thickness, and the arc top light coupling layer 6 corresponds to the green pixel unit.
  • the portion has a second thickness
  • the portion of the arc-top light coupling layer 6 corresponding to the blue pixel unit has a third thickness, wherein the first thickness, the second thickness, and the third thickness are not equal to each other.
  • the arc-top light coupling layer 6 has different thicknesses corresponding to portions of pixel units of different colors, which contributes to improving the optical performance of the device.
  • the first electrode 2 is an anode
  • the second electrode 4 is a cathode. That is, the above OLED array substrate is of a top emission type.
  • the embodiment provides a method for preparing an OLED array substrate. After the thin film transistor, the first electrode 2, the organic light-emitting layer 3, and the second electrode 4 are sequentially formed on the substrate, the mask is further included.
  • the plate 7 is formed by vapor deposition on the substrate 1 on which the second electrode 4 is formed to form the arc-shaped light coupling layer 6.
  • the method of forming the thin film transistor, the first electrode 2, the organic light-emitting layer 3, and the second electrode 4 on the substrate can be referred to the prior art, which is not specifically limited in the present invention.
  • vapor deposition of the material for forming the arc-shaped light coupling layer 6 is also in the prior art, and will not be described herein.
  • a top view of a partial structure of the mask 7 used in the vapor deposition is as shown in FIG.
  • the mask 7 includes a plurality of openings 71 corresponding to the respective pixel units, and each of the openings 71 corresponds to one pixel unit, and the opening 71 is configured to pass the evaporation material and form on the corresponding pixel unit.
  • the opening 71 of the mask 7 is arranged to correspond to the pixel unit such that the evaporation material 8 is evaporated on the corresponding pixel unit through the opening 71 to form the arc-top light coupling layer 6.
  • the opening 71 of the mask 7 is arranged to correspond to the pixel unit such that the evaporation material 8 is evaporated on the corresponding pixel unit through the opening 71 to form the arc-top light coupling layer 6.
  • a cross-sectional view of the mask 7 when it is used for vapor deposition is as shown in FIG. 5, and the vapor deposition material 8 on the vapor deposition plate is vapor-deposited through the opening 71 of the mask 7 to a portion corresponding to the pixel unit on the cathode 4.
  • the vapor-deposited material 8 is not vapor-deposited on the cathode 4 at a portion larger than the angle ⁇ , and the substance vapor-deposited in the middle portion of the pixel unit is thick, and the material evaporated in the edge portion of the pixel unit is thin (due to masking)
  • the occlusion effect of the diaphragm is such that it is easy to form the arc-top light coupling layer 6 having a thin intermediate periphery.
  • h is the thickness of the mask 7
  • the thickness h of the mask 7 is 100-200 nm, and the arc-top light coupling layer 6 can be formed by appropriately controlling the thickness h of the mask 7.
  • the inner rectangle in FIG. 6 corresponds to the size of the pixel unit 9, and the outer rectangle corresponds to the size of the opening 71 of the mask 7.
  • the length of the opening 71 of the mask 7 (in the vertical direction in FIG. 6) is 5-20 ⁇ m longer than the length of the corresponding pixel unit 9 (the length of L2 of 2 times in FIG. 6), where L2 One end of the opening 71 is longer than the pixel unit 9 in the longitudinal direction (in the vertical direction in FIG. 6).
  • the width of the opening 71 of the mask 7 (in the horizontal direction in FIG. 6) is 5-20 ⁇ m wider than the width of the corresponding pixel unit 9 (the width of L1 of 2 times in FIG. 6), where L1 is the opening 71 One end is wider than the pixel unit 9 in the width direction (horizontal direction in FIG. 6).
  • the opening 71 of the mask 7 is sized to cover the corresponding pixel unit 9. Due to the shielding effect of the masking plate 7, the size of the opening 71 of the masking plate 7 is larger than the size of the corresponding pixel unit 9, and it is ensured that an arc-shaped light-coupling layer 6 having a thin intermediate periphery is formed on the pixel unit 9. It should be understood that the size relationship between the opening 71 on the mask 7 and the corresponding pixel unit 9 is suitable for the production of most products, but The dimensional relationship between the two can also be adapted to specific product or process conditions.
  • the thickness of the arc-top light coupling layer 6 in the evaporation process for example, the evaporation time, the evaporation rate, the mask 7 and the evaporation material 8 and the surface to be vaporized (cathode 4)
  • the distance between the two, etc., the arc-top light coupling layer 6 can be evaporated to a predetermined thickness by adjusting the above parameters, and details are not described herein again.
  • the optimum thickness of the arc-top light coupling layer 6 is ⁇ /4n, where ⁇ is the wavelength of light emitted by the organic light-emitting layer 3; n is the refractive index of the arc-top light-coupling layer 6. At this time, the arc top light coupling layer 6 has the largest light transmittance and the least total light reflection;
  • the vapor deposition of the arc top light coupling layer 6 may be performed using the mask 7 of the pixel unit corresponding to the color.
  • the same mask 7 can be used in the production of the arc-top light coupling layer 6 corresponding to the pixel unit of different colors.
  • the mask can be moved during evaporation.
  • the board 7 completes the evaporation of the arc-top light coupling layer 6 corresponding to the pixel units of different colors.
  • This embodiment provides an OLED display panel, including the above OLED array substrate.
  • the OLED display panel provided in this embodiment may further include other known structures, such as a color film, etc., and the present invention will not be described herein.
  • This embodiment provides an OLED display device including the above OLED display panel.
  • the OLED display device provided in this embodiment may further include other known structures, such as a power supply unit, and the like, and the details are not described herein.

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Abstract

一种OLED阵列基板及其制备方法、OLED显示面板、OLED显示装置。OLED阵列基板包括基板（1）和在基板（1）上设置的多个像素单元，每个像素单元包括薄膜晶体管和在薄膜晶体管基板上依次设置的第一电极（2）、有机发光层（3）、第二电极（4）、光耦合层（6），其中光耦合层（6）包括与第二电极（4）接触的底部和朝向光出射方向凸起的弧形顶部。OLED阵列基板及其制备方法、OLED显示面板、OLED显示装置，通过将OLED阵列基板上每个像素单元的光耦合层制作成弧顶光耦合层，降低了光在光耦合层内部的全反射；增加了光的取出效率。

Description

OLED阵列基板及其制备方法、显示面板、显示装置 技术领域
本发明涉及显示技术领域，具体地，涉及一种OLED阵列基板及其制备方法、一种OLED显示面板和一种OLED显示装置。
背景技术
有机发光二极管(OLED，Organic Light Emitting Diode)因具有自发光、全固态、宽视角、响应快等诸多优点而被认为在平板显示产品中有着巨大的应用前景。OLED显示器被认为是继液晶显示器、等离子显示器之后的新一代平板显示产品。目前OLED在显示和照明领域都有广泛的应用。为了确保OLED中的半导体发光元件具有较高的功能可靠性及较低的能耗，需要尽可能的提高半导体发光元件本身的外部量子效率。
一般来说，半导体发光元件的外部量子效率取决于其本身的内部量子效率以及光提取效率(LEE，Light Extraction Efficiency)。其中，内量子效率由材料本身的特性所决定，因此在内部量子效率无法有效提升的情况下，提高半导体发光元件的光提取效率尤为重要。而提高光提取效率是为了将OLED内部所发射的光尽可能地引至半导体发光元件外。
如图1所示，现有的OLED阵列基板包括设置有薄膜晶体管(未示出)的基板1，和由基板1上的薄膜晶体管控制的OLED单元，典型的OLED单元包括依次设置的阳极2、有机发光层3和阴极4。对于顶发射型OLED阵列基板来说，由于阴极4一般是半透明的金属电极，因此有机发光层3发出的光在该电极处的反射会增加，从而造成多光子束干涉，导致微腔效应(因元件内部的光学干扰而导致光在不同发射角度的强度和光波波长不同的现象)非常明显。因此，在使用包括该顶发射型OLED阵列基板的显示器时，发光强度和颜色会随着视角发生改变。
在现有技术中，为了减弱微腔效应，可以在阴极4上覆盖光耦合层5，形成该光耦合层5的材料的折射率大于形成该阴极4的材料的折射率，换言之，光耦合层5的折射率大于阴极4的折射率。实验发现，当光耦合层5的折射率(光耦合层5的折射率一般大于2.0)大于有机发光层3及阴极4的折射率时时，阴极4的透过率增大，而阴极4的透过率增大就会减弱微腔效应。
现有技术中一般采用敞开式的掩膜板通过蒸镀来形成光耦合层5，即对所有的OLED单元同时蒸镀以形成如图1所示的等厚型光耦合层5。然而，由于光耦合层5的折射率较高，一般大于位于该光耦合层5外侧的气体层的折射率，例如，大于位于其外侧的氮气层的折射率，导致在等厚型光耦合层5内部又会发生光的全反射，从而损失了部分光强，进而降低了光提取效率。
发明内容
本发明的目的是解决现有技术中存在的由于在OLED阵列基板的等厚型光耦合层内部发生光的全反射而导致光提取效率降低的问题，提供一种OLED阵列基板及其制备方法。
根据本发明的一个方面，提供了一种OLED阵列极板，其包括基板和在所基板上设置的多个像素单元，每个像素单元包括薄膜晶体管和在所述薄膜晶体管上依次设置的第一电极、有机发光层、第二电极和光耦合层，其中
所述光耦合层包括与所述第二电极接触的底部和朝向光出射方向凸起的弧形顶部、。
优选的是，所述光耦合层的厚度为λ/4n，其中，λ为有机发光层发出的光的波长，n为光耦合层的折射率。
优选的是，所述的第一电极为阳极，所述的第二电极为阴极。
优选的是，所述光耦合层对应不同颜色的像素单元的部分具有不同厚度。
根据本发明的另一方面，还提供了一种OLED阵列基板的制作方法，其包括步骤：
采用掩膜板通过蒸镀在形成有第一电极、有机发光层和第二电极的基板上形成弧顶光耦合层。
优选的是，所述掩膜板的厚度为100-200nm。
优选的是，所述掩膜板包括与各像素单元对应的多个开孔，所述开孔用于使蒸镀物质通过，并在对应的像素单元上形成弧顶光耦合层；并且
所述每个开孔的长度和宽度分别比对应的像素单元的长度和宽度大20-50nm。
优选的是，所述弧顶光耦合层的厚度为λ/4n，其中，λ为所述有机发光层发出的光的波长，n为所述弧顶光耦合层的折射率。
优选的是，制作对应不同颜色的所述像素单元的弧顶光耦合层时采用同一个掩膜板。
优选的是，制作对应不同颜色的所述像素单元的弧顶光耦合层时采用对应该颜色的像素单元的掩膜板。
根据本发明的又一方面，还提供了一种OLED显示面板，其包括上述任意一种OLED阵列基板。
根据本发明的另一方面，还提供了一种OLED显示装置，其包括上述的OLED显示面板。
本发明的OLED阵列基板及其制备方法、OLED显示面板和OLED显示装置，通过将光耦合层制作成弧顶光耦合层，降低了光在光耦合层内部的全反射，从而提高了光提取效率。
附图说明
图1为现有技术中OLED阵列基板的结构示意图；
图2为本发明实施例1中OLED阵列基板的结构示意图；
图3为本发明实施例1中的弧顶光耦合层与现有技术中的等厚型光耦合层中的光路对比示意图；
图4为本发明实施例2中制备弧顶光耦合层所用的掩膜板的俯视示意图；
图5为本发明实施例2中掩膜板在蒸镀中被使用时的剖面图； 以及
图6为本发明实施例2中掩膜板的开孔71与其对应的像素单元的尺寸对比图。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对本发明作进一步详细描述。
实施例1：
如图2所示，本实施例提供一种OLED阵列基板，包括基板1和在所述基板1上设置的多个像素单元，每个像素单元包括薄膜晶体管(未示出)以及在所述薄膜晶体管上方依次设置的第一电极2、有机发光层3、第二电极4和光耦合层6，所述光耦合层6包括与所述第二电极4接触的底部和朝向光出射方向(图2中箭头所示方向)凸起的弧形顶部。在本文中，为了简化描述，将本发明中提供的具有弧形顶部的光耦合层6称为弧顶光耦合层6。
本领域技术人员应该理解的是：所述薄膜晶体管用于控制有机发光层3发光。所述的第一电极2和第二电极4用于向所述有机发光层3提供空穴和电子以使有机发光层3发光。所述弧顶光耦合层6的折射率大于第二电极4的折射率，并且所述弧顶光耦合层6用于提高第二电极4的光线透过率。
与现有技术中的等厚型光耦合层相比，本实施例提供的弧顶光耦合层6可降低光耦合层内部的全反射。如图3所示，当光以相同角度入射时，对于等厚型光耦合层，由于入射角大于临界角，因此在等厚型光耦合层的界面处发生全反射；而对于弧顶光耦合层，由于具有弧形界面，因此减小了入射角，当入射角小于临界角时，在弧顶光耦合层的界面处发生折射，光出射至弧顶光耦合层外部，从而有利于光的提取。
本发明的OLED阵列基板由于将光耦合层设置为具有弧形顶部，因此相对于现有技术中的等厚型光耦合层可以降低光在耦合 层内部的全反射，从而提高了光提取效率。
优选的，所述弧顶光耦合层6的厚度为λ/4n，其中，λ为有机发光层3发出的光的波长；n为弧顶光耦合层6的折射率。具有上述厚度的弧顶光耦合层6，其光透过率最大(光的全反射最少)。需要说明的是，本发明中，弧顶光耦合层6的厚度为λ/4n是指弧顶光耦合层6的最大厚度为λ/4n。
为了进一步优化OLED阵列基板的性能(即，进一步增大光透过率，减少光的全反射)，弧顶光耦合层6对应不同颜色的像素单元的部分具有不同厚度。例如，在像素单元分为红色像素单元、绿色像素单元和蓝色像素单元的情况下，弧顶光耦合层6对应红色像素单元的部分具有第一厚度,弧顶光耦合层6对应绿色像素单元的部分具有第二厚度，弧顶光耦合层6对应蓝色像素单元的部分具有第三厚度，其中第一厚度、第二厚度和第三厚度互不相等。需要说明的是：此处仅以像素单元分为红、绿和蓝色像素单元为例进行了说明，但本发明显然不限于此。弧顶光耦合层6对应不同颜色的像素单元的部分具有不同的厚度，有助于提升器件的光学性能。
本实施例中，所述第一电极2为阳极，所述第二电极4为阴极。也就是上述的OLED阵列基板为顶发射型的。
实施例2：
如图4-6所示，本实施例提供一种OLED阵列基板的制备方法，在基板上依次形成薄膜晶体管、第一电极2、有机发光层3和第二电极4后，还包括采用掩膜板7通过蒸镀在形成有第二电极4的基板1上形成弧顶光耦合层6的步骤。
在基板上形成薄膜晶体管、第一电极2、有机发光层3和第二电极4的方法可参考现有技术，本发明对此不进行具体限定。另外，对用于形成弧顶光耦合层6的物质进行蒸镀也属于现有技术范畴，在此不再赘述。
蒸镀时使用的掩膜板7的局部结构俯视图如图4所示，所述 掩膜板7包括与各像素单元对应的多个开孔71，且每个开孔71均对应一个像素单元，所述开孔71用于使蒸镀物质通过，并在对应的像素单元上形成弧顶光耦合层6；
掩膜板7的开孔71布置为与像素单元相对应，以使得蒸镀物质8经过开孔71蒸镀在对应的像素单元上形成弧顶光耦合层6。为了清楚起见，图4所示的掩膜板7中只示出了分别与R、G、B三个像素单元对应的三个开孔71，而没有示出其他开孔。
掩膜板7在蒸镀使用时的剖面图如图5所示，蒸镀板上的蒸镀物质8通过掩膜板7的开孔71向阴极4上与像素单元对应的部分进行蒸镀，其中，蒸镀物质8在大于β角的部分不会被蒸镀于阴极4上，在像素单元的中间部分蒸镀的物质较厚，而像素单元的边缘区域蒸镀的物质较薄(由于掩膜板的遮挡效应)，因此容易形成中间厚周边薄的弧顶光耦合层6。其中，h为掩膜板7的厚度，掩膜板7越厚则遮挡效应越明显，越易形成中间厚周边薄的弧顶光耦合层6。优选的，掩膜板7的厚度h为100-200nm，通过适当地控制掩膜板7的厚度h即可形成弧顶光耦合层6。
如图6所示，图6中的内部矩形对应像素单元9的尺寸，外部矩形对应掩膜板7的开孔71的尺寸。具体地，掩膜板7的开孔71的长度(图6中竖直方向上)比对应的像素单元9的长度长5-20μm(图6中的2倍的L2的长度)，其中，L2为开孔71的一端在长度方向上(图6中竖直方向上)比像素单元9长的长度。掩膜板7的开孔71的宽度(图6中水平方向上)比对应的像素单元9的宽度宽5-20μm(图6中的2倍的L1的宽度)，其中，L1为开孔71的一端在宽度方向上(图6中水平方向上)比像素单元9宽的宽度。
这样，掩膜板7的开孔71的尺寸能够覆盖对应的像素单元9。由于掩膜板7存在遮挡效应，掩膜板7的开孔71的尺寸大于对应的像素单元9的尺寸更能保证在该像素单元9上形成中间厚周边薄的弧顶光耦合层6。应当理解的是，上述的掩膜板7上的开孔71与对应的像素单元9的尺寸关系适用于多数产品的制作，但对 于特殊的产品或工艺条件，两者的尺寸关系也可以作出适应性的调整。
应当理解的是，蒸镀过程中影响弧顶光耦合层6的厚度的参数很多，例如，蒸镀时间、蒸镀的速率、掩膜板7与蒸镀物质8分别和待蒸镀面(阴极4)之间的距离等等，可以通过调整上述参数使弧顶光耦合层6蒸镀至预定的厚度，在此不再赘述。
弧顶光耦合层6的最佳厚度为λ/4n，其中，λ为有机发光层3发出的光的波长；n为弧顶光耦合层6的折射率。此时，弧顶光耦合层6具有最大的光透过率和最少的光的全反射；
对于不同颜色的像素单元，为了获得最佳的光耦合层6的厚度，对于不同颜色的像素单元，可以采用对应该颜色的像素单元的掩膜板7进行弧顶光耦合层6的蒸镀。
当然可以理解的是，为了降低量化生产的难度也可以在制作对应不同颜色的像素单元的弧顶光耦合层6时采用同一个掩膜板7，此时在蒸镀时，可以通过移动掩膜板7完成对应不同颜色的像素单元的弧顶光耦合层6的蒸镀。
实施例3：
本实施例提供一种OLED显示面板，包括上述OLED阵列基板。本实施例提供的OLED显示面板还可以包括其他已知的结构，比如彩膜等，本发明在此不再赘述。
实施例4：
本实施例提供一种OLED显示装置，包括上述的OLED显示面板。本实施例提供的OLED显示装置还可以包括其他已知的结构，比如电源单元等，本发明在此不再赘述。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领 域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (12)

  1. 一种OLED阵列基板，包括基板和在所述基板上设置的多个像素单元，每个像素单元包括薄膜晶体管基以及在所述薄膜晶体管上依次设置的第一电极、有机发光层、第二电极和光耦合层，
    其特征在于，所述光耦合层包括与所述第二电极接触的底部和朝向光出射方向凸起的弧形顶部。
  2. 根据权利要求1所述的OLED阵列基板，其特征在于，所述光耦合层的厚度为λ/4n，其中，λ为所述有机发光层发出的光的波长，n为所述光耦合层的折射率。
  3. 根据权利要求1所述的OLED阵列基板，其特征在于，所述第一电极为阳极，所述第二电极为阴极。
  4. 根据权利要求1所述的OLED阵列基板，其特征在于，所述光耦合层对应不同颜色的像素单元的部分具有不同厚度。
  5. 一种OLED阵列基板的制作方法，其特征在于，包括步骤：采用掩膜板通过蒸镀在形成有第一电极、有机发光层和第二电极的基板上形成弧顶光耦合层。
  6. 如权利要求5所述OLED阵列基板的制作方法，其特征在于，所述掩膜板的厚度为100-200nm。
  7. 如权利要求5所述OLED阵列基板的制作方法，其特征在于，所述掩膜板包括与各像素单元对应的多个开孔，所述开孔用于使蒸镀物质通过，并在对应的像素单元上形成弧顶光耦合层；并且
    所述每个开孔的长度和宽度分别比对应的像素单元的长度和宽度大20-50nm。
  8. 如权利要求5所述OLED阵列基板的制作方法，其特征在于，所述弧顶光耦合层的厚度为λ/4n，其中，λ为所述有机发光层发出的光的波长，n为所述弧顶光耦合层的折射率。
  9. 如权利要求5所述OLED阵列基板的制作方法，其特征在于，制作对应不同颜色的像素单元的弧顶光耦合层时采用同一个掩膜板。
  10. 如权利要求5所述OLED阵列基板的制作方法，其特征在于，制作对应不同颜色的像素单元的弧顶光耦合层时采用对应该颜色的像素单元的掩膜板。
  11. 一种OLED显示面板，其特征在于，包括如权利要求1-4中任一项所述的OLED阵列基板。
  12. 一种OLED显示装置，其特征在于，包括如权利要求11所述的OLED显示面板。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11588135B2 (en) 2020-07-07 2023-02-21 Avalon Holographies Inc. Microcavity pixel array design and method

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104319351A (zh) * 2014-10-31 2015-01-28 京东方科技集团股份有限公司 Oled阵列基板及其制备方法、显示面板、显示装置
CN104630703B (zh) * 2015-01-29 2017-09-19 四川虹视显示技术有限公司 Oled器件的掩膜板组及基板
CN105826354A (zh) * 2016-04-14 2016-08-03 鄂尔多斯市源盛光电有限责任公司 一种阵列基板、显示面板及显示装置
CN106653806B (zh) * 2016-11-30 2019-12-20 上海天马有机发光显示技术有限公司 一种有机发光显示面板、电子设备及其制作方法
CN106848097B (zh) * 2017-02-10 2019-02-26 上海天马有机发光显示技术有限公司 一种有机发光显示面板、显示装置及其制作方法
CN108417584B (zh) * 2018-03-12 2020-12-15 上海天马有机发光显示技术有限公司 一种显示面板和显示装置
US11430969B2 (en) * 2019-08-28 2022-08-30 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Electroluminescent component having metal layer disposed between two of optical coupling layers and display device having the same
CN110729413B (zh) * 2019-09-25 2021-12-03 武汉华星光电半导体显示技术有限公司 显示面板以及显示装置
CN110571356B (zh) * 2019-10-14 2022-04-08 京东方科技集团股份有限公司 一种发光器件、制作方法、显示面板及显示装置
CN113178467B (zh) * 2021-04-14 2022-07-29 武汉华星光电半导体显示技术有限公司 显示面板及显示装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030155593A1 (en) * 2002-02-18 2003-08-21 Hwa-Young Kang Photodiode and method of manufacturing the same
CN103715372A (zh) * 2013-12-26 2014-04-09 京东方科技集团股份有限公司 Oled显示面板及其制作方法
CN203690349U (zh) * 2013-12-26 2014-07-02 京东方科技集团股份有限公司 Oled显示面板
CN104319351A (zh) * 2014-10-31 2015-01-28 京东方科技集团股份有限公司 Oled阵列基板及其制备方法、显示面板、显示装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6606199B2 (en) * 2001-10-10 2003-08-12 Honeywell International Inc. Graded thickness optical element and method of manufacture therefor
JP2005079014A (ja) * 2003-09-02 2005-03-24 Toyota Industries Corp 発光装置
KR101230316B1 (ko) * 2006-03-21 2013-02-06 삼성디스플레이 주식회사 표시장치와 그 제조방법
KR20090112090A (ko) * 2008-04-23 2009-10-28 삼성전자주식회사 유기 발광 표시 장치 및 그 제조 방법
JP2010040427A (ja) * 2008-08-07 2010-02-18 Hitachi Displays Ltd 有機ｅｌ表示装置
EP2172990A1 (en) * 2008-10-03 2010-04-07 Thomson Licensing OLED or group of adjacent OLEDs with a light-extraction enhancement layer efficient over a large range of wavelengths
JP5284300B2 (ja) * 2010-03-10 2013-09-11 株式会社東芝 半導体発光素子、およびそれを用いた照明装置、ならびに半導体発光素子の製造方法
JP5216112B2 (ja) * 2011-02-17 2013-06-19 日東電工株式会社 面状発光体
KR102215622B1 (ko) * 2013-11-18 2021-02-17 삼성디스플레이 주식회사 유기 발광 표시 장치
KR102105061B1 (ko) * 2014-01-06 2020-04-28 삼성디스플레이 주식회사 유기발광 표시패널 및 이의 제조방법
JP2016191892A (ja) * 2015-03-31 2016-11-10 株式会社ジャパンディスプレイ 液晶表示装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030155593A1 (en) * 2002-02-18 2003-08-21 Hwa-Young Kang Photodiode and method of manufacturing the same
CN103715372A (zh) * 2013-12-26 2014-04-09 京东方科技集团股份有限公司 Oled显示面板及其制作方法
CN203690349U (zh) * 2013-12-26 2014-07-02 京东方科技集团股份有限公司 Oled显示面板
CN104319351A (zh) * 2014-10-31 2015-01-28 京东方科技集团股份有限公司 Oled阵列基板及其制备方法、显示面板、显示装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11588135B2 (en) 2020-07-07 2023-02-21 Avalon Holographies Inc. Microcavity pixel array design and method

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