WO2016095327A1 - 显示器及具有触控功能的面板 - Google Patents

显示器及具有触控功能的面板 Download PDF

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Publication number
WO2016095327A1
WO2016095327A1 PCT/CN2015/071707 CN2015071707W WO2016095327A1 WO 2016095327 A1 WO2016095327 A1 WO 2016095327A1 CN 2015071707 W CN2015071707 W CN 2015071707W WO 2016095327 A1 WO2016095327 A1 WO 2016095327A1
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WO
WIPO (PCT)
Prior art keywords
disposed
film layer
touch
wires
film
Prior art date
Application number
PCT/CN2015/071707
Other languages
English (en)
French (fr)
Inventor
龙冲
申智渊
孙海燕
Original Assignee
深圳市华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to KR1020177019413A priority Critical patent/KR101945651B1/ko
Priority to US14/433,664 priority patent/US9798205B2/en
Priority to RU2017125057A priority patent/RU2669512C1/ru
Priority to GB1706990.7A priority patent/GB2547368B/en
Priority to DE112015005632.7T priority patent/DE112015005632T5/de
Priority to JP2017531493A priority patent/JP6460583B2/ja
Publication of WO2016095327A1 publication Critical patent/WO2016095327A1/zh

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Classifications

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    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
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    • G06F2203/04112Electrode mesh in capacitive digitiser: electrode for touch sensing is formed of a mesh of very fine, normally metallic, interconnected lines that are almost invisible to see. This provides a quite large but transparent electrode surface, without need for ITO or similar transparent conductive material

Definitions

  • the present invention relates to the field of display and touch technologies, and in particular, to a display and a panel having a touch function.
  • the working principle of the touch screen is that the touch chip is connected to the touch electrode through the metal line, and the touch electrode is periodically charged and discharged.
  • the touch of the touch electrode causes the pixel capacitance to change
  • the detected voltage, current The charge change is fed back to the processing chip via the wire to capture the positioning touch coordinates.
  • the same function trace between the touch electrode and the driving control chip is usually a metal trace of the same film layer, which is formed by an exposure process, and the conventional exposure process may cause a short circuit due to various foreign particles, static electricity, etc. in the process, thereby causing a short circuit.
  • the touch electrode failed. Especially in densely populated areas, this chance of failure increases.
  • the technical problem to be solved by the present invention is to provide a display and a panel with a touch function, which can reduce the probability of short-circuiting the wires of the touch electrodes, thereby reducing the probability of failure of the touch electrodes.
  • one technical solution adopted by the present invention is to provide a panel having a touch function, wherein the panel includes a plurality of film layers, a plurality of touch electrodes disposed in the plurality of film layers, a plurality of wires and a touch chip disposed in one-to-one correspondence with the touch electrodes, the wires electrically connecting the touch electrodes to the touch chip, wherein a plurality of the touch electrodes are connected
  • the wire is disposed on the first film layer of the plurality of film layers, and the plurality of wires connected to the other portion of the touch electrode are disposed on the second film layer of the plurality of film layers, the touch electrode a third film layer disposed in the plurality of film layers, wherein the plurality of wires are sequentially arranged in parallel, wherein two adjacent wires are located in different film layers, and the wires pass through the via holes and the corresponding touches
  • the control electrode is electrically connected.
  • another technical solution adopted by the present invention is to provide a panel with a touch function, the panel comprising a plurality of film layers, a plurality of touch electrodes disposed in the plurality of film layers, and a touch
  • the control electrode is provided with a plurality of wires and a touch chip, and the wire electrically connects the touch electrode to the touch chip, wherein the plurality of wires connecting a part of the touch electrodes are disposed on the first film layer of the plurality of film layers, A plurality of wires connecting the other portion of the touch electrodes are disposed on the second film layer of the plurality of film layers.
  • the touch electrode is disposed on the third film layer of the plurality of film layers.
  • the plurality of wires are arranged in parallel in parallel, wherein the adjacent two wires are located in different film layers.
  • the wire is electrically connected to the corresponding touch electrode through the via hole.
  • the panel includes an array substrate, and the touch electrodes are made of a common electrode layer of the array substrate.
  • the touch electrodes are distributed in a matrix form.
  • the panel further includes a pixel electrode and a thin film transistor.
  • the pixel electrode is disposed on a surface of the third film layer
  • the thin film transistor is disposed on the fourth film layer of the plurality of film layers
  • the thin film transistor is electrically connected to the pixel electrode through the via hole.
  • a plurality of film layers are disposed on the array substrate.
  • the fourth film layer is disposed on the array substrate, the second film layer is disposed on the fourth film layer, the first film layer is disposed on the second film layer, and the third film layer is disposed on the first film layer, the pixel The electrode is disposed on a surface of the third film layer away from the first film layer.
  • a display including a panel having a touch function, the panel comprising a plurality of film layers, and a plurality of touch electrodes disposed in the plurality of film layers a plurality of wires and a touch chip disposed in one-to-one correspondence with the touch electrodes, wherein the wires electrically connect the touch electrodes to the touch chip, wherein the plurality of wires connecting the touch electrodes are disposed in the first of the plurality of film layers
  • the film layer, the plurality of wires connecting the other part of the touch electrodes are disposed on the second film layer of the plurality of film layers.
  • the touch electrode is disposed on the third film layer of the plurality of film layers.
  • the plurality of wires are arranged in parallel in parallel, wherein the adjacent two wires are located in different film layers.
  • the wire is electrically connected to the corresponding touch electrode through the via hole.
  • the panel includes an array substrate, and the touch electrodes are made of a common electrode layer of the array substrate.
  • the touch electrodes are distributed in a matrix form.
  • the panel further includes a pixel electrode and a thin film transistor.
  • the pixel electrode is disposed on a surface of the third film layer
  • the thin film transistor is disposed on the fourth film layer of the plurality of film layers
  • the thin film transistor is electrically connected to the pixel electrode through the via hole.
  • a plurality of film layers are disposed on the array substrate.
  • the fourth film layer is disposed on the array substrate, the second film layer is disposed on the fourth film layer, the first film layer is disposed on the second film layer, and the third film layer is disposed on the first film layer, the pixel The electrode is disposed on a surface of the third film layer away from the first film layer.
  • the invention has the beneficial effects that the present invention is different from the prior art, and the plurality of wires connecting the touch electrode and the touch chip are disposed in different film layers, so that the wires are not densely arranged on one layer. In this way, the risk of contact between the wires can be reduced, the short circuit can be avoided, and the probability of failure of the touch electrode can be reduced.
  • FIG. 1 is a schematic top plan view of a panel with a touch function according to the present invention.
  • FIG. 2 is a partial cross-sectional view showing a panel having a touch function according to a first embodiment of the present invention.
  • FIG 3 is a partial cross-sectional view showing a panel having a touch function according to a second embodiment of the present invention.
  • FIG. 1 is a schematic top plan view of a panel with a touch function according to the present invention.
  • 2 is a partial cross-sectional view showing a panel having a touch function according to a first embodiment of the present invention.
  • the panel includes a plurality of film layers (not shown), a plurality of touch electrodes 131 disposed in the plurality of film layers, and a plurality of wires 111 or 121 disposed in one-to-one correspondence with the touch electrodes 131 and
  • the touch panel 20, the wire 111 or 121 electrically connects the touch electrode 131 to the touch chip 20, wherein the plurality of wires 111 connecting the touch electrodes 131 are disposed on the first film layer 11 of the plurality of film layers, and the other A plurality of wires 121 of the touch electrode 131 are disposed on the second film layer 12 of the plurality of film layers.
  • the touch electrode 131 is disposed on the third film layer 13 of the plurality of film layers.
  • the touch electrodes 131 may also be located in the same film layer as the partial wires 111 or 121. Accordingly, the other portion of the wires 111 or 121 may be located in a different film layer from the touch electrodes 131.
  • the plurality of wires 111 or 121 are sequentially arranged in parallel, wherein the adjacent two wires 111 and 121 are located in different film layers.
  • the plurality of wires 111 or 121 are sequentially arranged in parallel, that is, sequentially arranged in parallel along the length or the width direction of the panel, and are sequentially sorted, and the odd-numbered wires and the even-numbered wires are located in different film layers.
  • the film layer in which the respective wires are located may be allocated in other ways.
  • the wires 111 or 121 are electrically connected to the corresponding touch electrodes 131 through the vias 15 .
  • the wire 111 or 121 is connected to the corresponding touch electrode 131 through a via hole.
  • one end of the wire 111 is connected to the touch electrode 131 through a via hole, and the other end of the wire 111 is connected to the touch chip 20, so that the touch electrode 131 can be realized.
  • the connection of the touch chip 20 detects the voltage, current, and charge changes on the touch electrode 131 and feeds back to the touch chip 20 via the wires 111 or 121, thereby capturing the positioning touch coordinates.
  • the first film layer 11 is located on the second film layer 12 and the third film layer 13 is located on the first film layer 11.
  • the touch electrodes 131 are distributed in a matrix form. As shown in FIG. 1, the touch electrodes 131 are distributed in a matrix on the panel. Preferably, the area where the touch electrodes 131 are distributed is an effective touch area, and the area around the effective touch area is an ineffective touch area, and the touch chip 20 is disposed in the non-effective touch area. It is to be noted that, in other embodiments, the wires 111 or 121 are disposed in the first film of the plurality of film layers by connecting the plurality of wires 111 connecting the touch electrodes 131 to the film only when passing through the non-effective touch regions.
  • the layer 11, the plurality of wires 121 connecting the other touch electrodes 131 are disposed on the second film layer 12 of the plurality of film layers, and all the wires 111 or 121 are disposed on the same film layer when passing through the effective touch region. If the touch electrode 131 of the effective touch area is easily detected and positioned to the failed touch electrode 131 and the wire 111 or 121 connected thereto is easily repaired, the process can be simplified in the effective touch area. In one layer, the non-effective touch area is difficult to locate due to the short circuit of the wire, and it is necessary to arrange some of the wires in different layers in the above manner.
  • the first film layer 11, the second film layer 12, and the third film layer 13 are all insulating layers.
  • the touch panel of the present embodiment may further include other existing display panels or components in the touch panel or the touch display integrated panel.
  • OLED display panel TFT liquid crystal panel, IPS liquid crystal panel, etc.
  • the touch panel is not limited to self-capacitance or mutual capacitance.
  • the touch-display integrated panel is not limited to the OGS full-fit, IN-CELL or ON-CELL fusion technology. panel.
  • FIG. 3 is a partial cross-sectional view of a panel with a touch function according to a second embodiment of the present invention.
  • the panel having the touch function further includes the array substrate 10
  • the touch electrode 131 is formed by the common electrode layer 13 of the array substrate 10
  • the panel having the touch function further includes the pixel.
  • the electrode 16 and the thin film transistor 141 are disposed on the surface of the third film layer 13, the thin film transistor 141 is disposed on the fourth film layer 14 of the plurality of film layers, and the thin film transistor 141 is electrically connected to the pixel electrode 16 through the via hole 17 Connected, a plurality of film layers are disposed on the array substrate 10.
  • the fourth film layer 14 is disposed on the array substrate 10
  • the second film layer 12 is disposed on the fourth film layer 14
  • the first film layer 11 is disposed on the second film layer 12
  • the third film layer 13 is disposed On the first film layer 11, the pixel electrode 16 is disposed on the surface of the third film layer 13 away from the first film layer 11.
  • the first film layer 11, the second film layer 12, the third film layer 13, and the fourth film layer 14 are all insulating layers.
  • the present invention provides a plurality of wires connecting the touch electrodes and the touch chips in different layers, so that the wires are not densely arranged in one layer, thereby reducing contact between the wires. The risk of avoiding a short circuit and reducing the chance of touch electrode failure.

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Abstract

本发明公开了一种具有触控功能的面板,该面板包括多个膜层、设置在多个膜层中的多个触控电极、与触控电极一一对应设置的多根导线以及触控芯片,导线将触控电极电连接至触控芯片,其中连接一部分触控电极的多根导线设置于多个膜层中的第一膜层,连接另一部分触控电极的多根导线设置于多个膜层中的第二膜层。本发明还公开了一种显示器,通过上述方式,本发明能够避免短路发生,降低触控电极失效的几率。

Description

显示器及具有触控功能的面板
【技术领域】
本发明涉及显示和触控技术领域,特别是涉及一种显示器及具有触控功能的面板。
【背景技术】
目前触控屏工作原理是使用触控芯片通过金属线路与触控电极相连,对触控电极进行周期充电放电,当手触摸到触控电极引起像素电容变化时,通过检测到的电压、电流、电荷变化经由导线反馈至处理芯片,从而捕捉定位触摸坐标。触控电极与驱动控制芯片之间相同功能走线通常为同膜层金属走线,是通过曝光工艺制成,传统曝光工艺会因制程中各种异物粒子、静电等原因导致线路短路,从而导致触控电极失效。特别是在线路密集的区域,此失效几率会增加。
因此,需要提供一种显示器及具有触控功能的面板,以解决上述技术问题。
【发明内容】
本发明主要解决的技术问题是提供一种显示器及具有触控功能的面板,能够降低触控电极的导线短路的几率,从而降低触控电极失效的几率。
为解决上述技术问题,本发明采用的一个技术方案是:提供一种具有触控功能的面板,其中,所述面板包括多个膜层、设置在多个膜层中的多个触控电极、与所述触控电极一一对应设置的多根导线以及触控芯片,所述导线将所述触控电极电连接至所述触控芯片,其中连接一部分所述触控电极的多根所述导线设置于所述多个膜层中的第一膜层,连接另一部分所述触控电极的多根所述导线设置于所述多个膜层中的第二膜层,所述触控电极设置于所述多个膜层中的第三膜层,所述多根导线依次平行排列,其中相邻两根所述导线位于不同的膜层,所述导线通过过孔与对应的所述触控电极电连接。
为解决上述技术问题,本发明采用的另一个技术方案是:提供一种具有触控功能的面板,该面板包括多个膜层、设置在多个膜层中的多个触控电极、与触控电极一一对应设置的多根导线以及触控芯片,导线将触控电极电连接至触控芯片,其中连接一部分触控电极的多根导线设置于多个膜层中的第一膜层,连接另一部分触控电极的多根导线设置于多个膜层中的第二膜层。
其中,触控电极设置于多个膜层中的第三膜层。
其中,多根导线依次平行排列,其中相邻两根导线位于不同的膜层。
其中,导线通过过孔与对应的触控电极电连接。
其中,面板包括阵列基板,触控电极由阵列基板的公共电极层制成。
其中,触控电极呈矩阵形式分布。
其中,面板还包括像素电极和薄膜晶体管,像素电极设置于第三膜层的表面上,薄膜晶体管设置于多个膜层中的第四膜层,薄膜晶体管通过过孔与像素电极电连接。
其中,多个膜层设置在阵列基板上。
其中,第四膜层设置在阵列基板上,第二膜层设置在第四膜层的上,第一膜层设置在第二膜层上,第三膜层设置在第一膜层上,像素电极设置在第三膜层远离第一膜层的表面上。
为解决上述技术问题,本发明采用的又一个技术方案是:提供一种显示器,显示器包括具有触控功能的面板,面板包括多个膜层、设置在多个膜层中的多个触控电极、与触控电极一一对应设置的多根导线以及触控芯片,导线将触控电极电连接至触控芯片,其中连接一部分触控电极的多根导线设置于多个膜层中的第一膜层,连接另一部分触控电极的多根导线设置于多个膜层中的第二膜层。
其中,触控电极设置于多个膜层中的第三膜层。
其中,多根导线依次平行排列,其中相邻两根导线位于不同的膜层。
其中,导线通过过孔与对应的触控电极电连接。
其中,面板包括阵列基板,触控电极由阵列基板的公共电极层制成。
其中,触控电极呈矩阵形式分布。
其中,面板还包括像素电极和薄膜晶体管,像素电极设置于第三膜层的表面上,薄膜晶体管设置于多个膜层中的第四膜层,薄膜晶体管通过过孔与像素电极电连接。
其中,多个膜层设置在阵列基板上。
其中,第四膜层设置在阵列基板上,第二膜层设置在第四膜层的上,第一膜层设置在第二膜层上,第三膜层设置在第一膜层上,像素电极设置在第三膜层远离第一膜层的表面上。本发明的有益效果是:区别于现有技术的情况,本发明通过将连接触控电极与触控芯片的多根导线设置在不同的膜层中,使得导线不会密集的排布在一层中,从而可以降低导线之间接触的风险,避免短路发生,降低触控电极失效的几率。
【附图说明】
图1是本发明具有触控功能的面板的俯视结构示意图;
图2是本发明第一实施例的具有触控功能的面板的局部截面示意图。
图3是本发明第二实施例的具有触控功能的面板的局部截面示意图。
【具体实施方式】
下面结合附图和实施例对本发明进行详细的说明。
请一并参阅图1和图2,图1是本发明具有触控功能的面板的俯视结构示意图。图2是本发明第一实施例的具有触控功能的面板的局部截面示意图。在本实施例中,面板包括多个膜层(图未示)、设置在多个膜层中的多个触控电极131、与触控电极131一一对应设置的多根导线111或121以及触控芯片20,导线111或121将触控电极131电连接至触控芯片20,其中连接一部分触控电极131的多根导线111设置于多个膜层中的第一膜层11,连接另一部分触控电极131的多根导线121设置于多个膜层中的第二膜层12。
优选地,触控电极131设置于多个膜层中的第三膜层13。在其他的实施例中,触控电极131也可以与部分的导线111或121位于同一个膜层,相应地,另一部分导线111或121则与触控电极131位于不同的膜层。
优选地,多根导线111或121依次平行排列,其中相邻两根导线111与121位于不同的膜层。多根导线111或121依次平行排列,即沿面板的长度或者宽度方向依次的平行排列,且依次排序,第奇数根导线与第偶数根导线位于不同的膜层。当然在其他的实施例中,也可以是其他的方式分配各根导线所在的膜层。
优选地,导线111或121通过过孔15与对应的触控电极131电连接。导线111或121通过过孔与对应的触控电极131连接,例如导线111的一端通过过孔连接触控电极131而该导线111的另一端则连接触控芯片20因而可以实现触控电极131与触控芯片20的连接。触控芯片20通过检测到触控电极131上的电压、电流、电荷变化经由导线111或者121反馈至触控芯片20,从而捕捉定位触摸坐标。
优选地,第一膜层11位于第二膜层12上第三膜层13位于第一膜层11上。
优选地,触控电极131呈矩阵形式分布。如图1所示,触控电极131在面板上呈矩阵形式分布。优选地,触控电极131分布的区域为有效的触控区域,而有效触控区域周围的区域为非有效的触控区域,触控芯片20设置于非有效触控区域。值得注意的是,在其他的实施例中,导线111或者121仅在经过非有效触控区域时才采用将连接一部分触控电极131的多根导线111设置于多个膜层中的第一膜层11,连接另一部分触控电极131的多根导线121设置于多个膜层中的第二膜层12的方式,而经过有效触控区域时将所有的导线111或者121设置在同一膜层,由于有效触控区域的触控电极131若失效很容易检测定位到失效的触控电极131并容易修复与之连接的导线111或者121,因此在有效触控区域可以简化工艺流程将导线全部设置在一层,而非有效触控区域由于导线短路使得触控电极131失效很难定位,需要采用上述方式将部分导线设置在不同膜层。
优选地,第一膜层11、第二膜层12以及第三膜层13均为绝缘层。
优选地,本实施例的具有触控功能的面板还可以包括其他现有的显示面板或者是触控面板或者触控显示一体的面板中的部件,此处不再一一赘述,显示面板不限于OLED显示面板、TFT液晶面板、IPS液晶面板等等,触控面板不限于自电容或者互电容,触控显示一体的面板不限于采用OGS全贴合、IN-CELL或者ON-CELL等融合技术的面板。
请参阅图3,图3是本发明第二实施例的具有触控功能的面板的局部截面示意图。与第一实施例相比,本实施例中,具有触控功能的面板进一步包括阵列基板10,触控电极131由阵列基板10的公共电极层13制成,具有触控功能的面板还包括像素电极16和薄膜晶体管141,像素电极16设置于第三膜层13的表面上,薄膜晶体管141设置于多个膜层中的第四膜层14,薄膜晶体管141通过过孔17与像素电极16电连接,多个膜层设置在阵列基板10上。
优选地,第四膜层14设置在阵列基板10上,第二膜层12设置在第四膜层14的上,第一膜层11设置在第二膜层12上,第三膜层13设置在第一膜层11上,像素电极16设置在第三膜层13远离第一膜层11的表面上。
优选地,第一膜层11、第二膜层12、第三膜层13以及第四膜层14均为绝缘层。
区别于现有技术,本发明通过将连接触控电极与触控芯片的多根导线设置在不同的膜层中,使得导线不会密集的排布在一层中,从而可以降低导线之间接触的风险,避免短路发生,降低触控电极失效的几率。
以上所述仅为本发明的实施方式,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。

Claims (19)

  1. 一种具有触控功能的面板,其中,所述面板包括多个膜层、设置在多个膜层中的多个触控电极、与所述触控电极一一对应设置的多根导线以及触控芯片,所述导线将所述触控电极电连接至所述触控芯片,其中连接一部分所述触控电极的多根所述导线设置于所述多个膜层中的第一膜层,连接另一部分所述触控电极的多根所述导线设置于所述多个膜层中的第二膜层,所述触控电极设置于所述多个膜层中的第三膜层,所述多根导线依次平行排列,其中相邻两根所述导线位于不同的膜层,所述导线通过过孔与对应的所述触控电极电连接。
  2. 一种具有触控功能的面板,其中,所述面板包括多个膜层、设置在多个膜层中的多个触控电极、与所述触控电极一一对应设置的多根导线以及触控芯片,所述导线将所述触控电极电连接至所述触控芯片,其中连接一部分所述触控电极的多根所述导线设置于所述多个膜层中的第一膜层,连接另一部分所述触控电极的多根所述导线设置于所述多个膜层中的第二膜层。
  3. 根据权利要求2所述的面板,其中,所述触控电极设置于所述多个膜层中的第三膜层。
  4. 根据权利要求3所述的面板,其中,所述多根导线依次平行排列,其中相邻两根所述导线位于不同的膜层。
  5. 根据权利要求3所述的面板,其中,所述导线通过过孔与对应的所述触控电极电连接。
  6. 根据权利要求3所述的面板,其中,所述面板包括阵列基板,所述触控电极由阵列基板的公共电极层制成。
  7. 根据权利要求3所述的面板,其中,所述触控电极呈矩阵形式分布。
  8. 根据权利要求6所述的面板,其中,所述面板还包括像素电极和薄膜晶体管,所述像素电极设置于所述第三膜层的表面上,所述薄膜晶体管设置于所述多个膜层中的第四膜层,所述薄膜晶体管通过过孔与所述像素电极电连接。
  9. 根据权利要求8所述的面板,其中,所述多个膜层设置在阵列基板上。
  10. 根据权利要求9所述的面板,其中,所述第四膜层设置在所述阵列基板上,所述第二膜层设置在所述第四膜层的上,所述第一膜层设置在所述第二膜层上,所述第三膜层设置在所述第一膜层上,所述像素电极设置在所述第三膜层远离所述第一膜层的表面上。
  11. 一种显示器,其中,所述显示器包括具有触控功能的面板,所述面板包括多个膜层、设置在多个膜层中的多个触控电极、与所述触控电极一一对应设置的多根导线以及触控芯片,所述导线将所述触控电极电连接至所述触控芯片,其中连接一部分所述触控电极的多根所述导线设置于所述多个膜层中的第一膜层,连接另一部分所述触控电极的多根所述导线设置于所述多个膜层中的第二膜层。
  12. 根据权利要求11所述的显示器,其中,所述触控电极设置于所述多个膜层中的第三膜层。
  13. 根据权利要求12所述的显示器,其中,所述多根导线依次平行排列,其中相邻两根所述导线位于不同的膜层。
  14. 根据权利要求12所述的显示器,其中,所述导线通过过孔与对应的所述触控电极电连接。
  15. 根据权利要求12所述的显示器,其中,所述面板包括阵列基板,所述触控电极由阵列基板的公共电极层制成。
  16. 根据权利要求12所述的显示器,其中,所述触控电极呈矩阵形式分布。
  17. 根据权利要求15所述的显示器,其中,所述面板还包括像素电极和薄膜晶体管,所述像素电极设置于所述第三膜层的表面上,所述薄膜晶体管设置于所述多个膜层中的第四膜层,所述薄膜晶体管通过过孔与所述像素电极电连接。
  18. 根据权利要求17所述的显示器,其中,所述多个膜层设置在阵列基板上。
  19. 根据权利要求18所述的显示器,其中,所述第四膜层设置在所述阵列基板上,所述第二膜层设置在所述第四膜层的上,所述第一膜层设置在所述第二膜层上,所述第三膜层设置在所述第一膜层上,所述像素电极设置在所述第三膜层远离所述第一膜层的表面上。
PCT/CN2015/071707 2014-12-18 2015-01-28 显示器及具有触控功能的面板 WO2016095327A1 (zh)

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