WO2016090671A1 - 一种扫描驱动电路 - Google Patents

一种扫描驱动电路 Download PDF

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Publication number
WO2016090671A1
WO2016090671A1 PCT/CN2014/094316 CN2014094316W WO2016090671A1 WO 2016090671 A1 WO2016090671 A1 WO 2016090671A1 CN 2014094316 W CN2014094316 W CN 2014094316W WO 2016090671 A1 WO2016090671 A1 WO 2016090671A1
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WO
WIPO (PCT)
Prior art keywords
switch tube
pull
output end
module
scan
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2014/094316
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English (en)
French (fr)
Inventor
戴超
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to KR1020177016212A priority Critical patent/KR101937963B1/ko
Priority to EA201791311A priority patent/EA031970B1/ru
Priority to US14/417,237 priority patent/US9576677B2/en
Priority to JP2017531625A priority patent/JP6340484B2/ja
Priority to DE112014007244.3T priority patent/DE112014007244T5/de
Priority to GB1709226.3A priority patent/GB2548509B/en
Publication of WO2016090671A1 publication Critical patent/WO2016090671A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2230/00—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery

Definitions

  • the present invention relates to the field of display driving, and more particularly to a scan driving circuit.
  • Gate Driver On Array is a driving circuit for forming a scan driving circuit on an array substrate of an existing thin film transistor liquid crystal display to realize progressive scanning of a scanning line.
  • a schematic diagram of a conventional scan driving circuit is shown in FIG. 1.
  • the scan driving circuit 10 includes a pull-up control module 101, a pull-up module 102, a downlink module 103, a pull-down module 104, a bootstrap capacitor 105, and a pull-down maintaining module 106.
  • the threshold voltage of the switching transistor moves to a negative value, which causes the switching transistors of the modules of the scan driving circuit 10 to easily leak, thereby affecting the reliability of the scanning driving circuit.
  • An object of the present invention is to provide a scan driving circuit with light leakage and high reliability, which solves the technical problem that the conventional scanning driving circuit is prone to leakage and affects the reliability of the scanning driving circuit.
  • An embodiment of the present invention provides a scan driving circuit for driving a cascaded scan line, which includes:
  • a pull-up control module configured to receive a downlink signal of the upper stage, and generate a corresponding scan level signal of the scan line according to the downlink signal of the upper stage;
  • a pull-up module configured to pull up a scan signal of the corresponding scan line according to the scan level signal and a clock signal of the current stage
  • a pull-down module configured to pull down a corresponding scan signal of the scan line according to a clock signal of the next two stages and a scan signal of the next two stages
  • a pull-down maintaining module configured to maintain a low level of a scan signal of the corresponding scan line, comprising two first pull-down maintaining units and a second pull-down maintaining unit that work alternately;
  • the downlink module is configured to send the downlink signal of the current level to the pull-up control module of the next stage;
  • a bootstrap capacitor for generating a high level of a scan signal of the scan line
  • the pull-up control module When the pull-up control module generates a scan level signal, the pull-up control module and the pull-down maintenance module use a constant voltage high level to prevent generation of a leakage phenomenon; the pull-down module uses a scan signal of the current stage to prevent The occurrence of leakage;
  • the pull-up control module includes a first switch tube, a control end of the first switch tube inputs a downlink signal of the upper stage, and an input end of the first switch tube inputs the constant voltage high level
  • the output end of the first switch tube is respectively connected to the pull-up module, the pull-down module, the pull-down maintaining module, the downlink module, and the bootstrap capacitor.
  • the pull-up module includes a second switch tube, and a control end of the second switch tube is connected to an output end of the first switch tube of the pull-up control module,
  • the input end of the second switch tube inputs the clock signal of the current stage, and the output end of the second switch tube outputs the scan signal of the current stage.
  • the down-transmission module includes a third switch tube, and a control end of the third switch tube is connected to an output end of the first switch tube of the pull-up control module,
  • the input end of the third switch tube inputs the clock signal of the current stage, and the output end of the third switch tube outputs the downlink signal of the current stage.
  • the pull-down module includes a fourth switch tube and a fifth switch tube, and the control end of the fourth switch tube inputs the scan signals of the next two stages, and the fourth switch
  • the input end of the tube is connected to the output end of the first switch tube of the pull-up control module, the output end of the fourth switch tube is connected to the input end of the fifth switch tube, and the control of the fifth switch tube
  • the terminal inputs the clock signals of the lower two stages, and the output end of the fifth switch tube inputs the scan signal of the current stage.
  • the pull-down maintaining module includes a sixth switching tube, a seventh switching tube, an eighth switching tube, a ninth switching tube, a tenth switching tube, an eleventh switching tube, and a tenth a second switch tube, a thirteenth switch tube, a fourteenth switch tube, and a fifteenth switch tube;
  • a control terminal of the sixth switch tube inputs the constant voltage high level, an input end of the sixth switch tube inputs the constant voltage high level, and an output end of the sixth switch tube respectively An output end of the seventh switch tube, a control end of the eighth switch tube, and a control end of the tenth switch tube;
  • the control end of the seventh switch tube is respectively connected to the output end of the first switch tube and the control end of the eleventh switch tube, and the input end of the seventh switch tube and the first constant voltage low level connection;
  • the input end of the eighth switch tube inputs the constant voltage high level, and the output end of the eighth switch tube is respectively connected with the output end of the ninth switch tube, the control end of the fourteenth switch tube, and Connecting the control end of the fifteenth switch tube;
  • a control end of the ninth switch tube is connected to an output end of the first switch tube, and an input end of the ninth switch tube is respectively connected to an output end of the tenth switch tube and the eleventh switch tube Output connection;
  • the input end of the tenth switch tube inputs the constant voltage high level
  • the input end of the eleventh switch tube is connected to the second constant voltage low level
  • a control end of the twelfth switch tube is connected to an output end of the first switch tube, an input end of the twelfth switch tube is input to the constant voltage high level, and an output of the twelfth switch tube The end is respectively connected to the output end of the thirteenth switch tube and the output end of the fourteenth switch tube;
  • a control end of the thirteenth switch tube is connected to a control end of the fifteenth switch tube, and an input end of the thirteenth switch tube is connected to the second constant voltage low level;
  • An input end of the fourteenth switch tube is connected to an output end of the first switch tube
  • the input end of the fifteenth switch tube is connected to the first constant voltage low level, and the output end of the fifteenth switch tube is connected to the output end of the second switch tube of the pull-up module.
  • the first constant voltage low level is greater than the second constant voltage low level.
  • the bootstrap capacitor is disposed between an output end of the first switching transistor and an output end of the second switching transistor of the pull-up module.
  • the pull-down module includes a fourth switch tube and a fifth switch tube, and a control end of the fourth switch tube inputs a clock signal of the next two stages, and the fourth switch
  • the input end of the tube is connected to the output end of the first switch tube of the pull-up control module, the output end of the fourth switch tube is connected to the input end of the fifth switch tube, and the control of the fifth switch tube
  • the scan signal of the lower two stages is input, and the output end of the fifth switch tube inputs the scan signal of the current stage.
  • the embodiment of the present invention further provides a scan driving circuit for driving a cascaded scan line, which includes:
  • a pull-up control module configured to receive a downlink signal of the upper stage, and generate a corresponding scan level signal of the scan line according to the downlink signal of the upper stage;
  • a pull-up module configured to pull up a scan signal of the corresponding scan line according to the scan level signal and a clock signal of the current stage
  • a pull-down module configured to pull down a corresponding scan signal of the scan line according to a clock signal of the next two stages and a scan signal of the next two stages
  • the downlink module is configured to send the downlink signal of the current level to the pull-up control module of the next stage;
  • a bootstrap capacitor for generating a high level of a scan signal of the scan line
  • the pull-up control module When the pull-up control module generates a scan level signal, the pull-up control module and the pull-down maintenance module use a constant voltage high level to prevent generation of a leakage phenomenon; the pull-down module uses a scan signal of the current stage to prevent The occurrence of leakage.
  • the pull-up control module includes a first switch tube, and a control end of the first switch tube inputs a downlink signal of the upper stage, and the first switch tube
  • the input terminal inputs the constant voltage high level, and the output ends of the first switch tube are respectively connected to the pull-up module, the pull-down module, the pull-down maintaining module, the downlink module, and the bootstrap capacitor connection.
  • the pull-up module includes a second switch tube, and a control end of the second switch tube is connected to an output end of the first switch tube of the pull-up control module,
  • the input end of the second switch tube inputs the clock signal of the current stage, and the output end of the second switch tube outputs the scan signal of the current stage.
  • the down-transmission module includes a third switch tube, and a control end of the third switch tube is connected to an output end of the first switch tube of the pull-up control module,
  • the input end of the third switch tube inputs the clock signal of the current stage, and the output end of the third switch tube outputs the downlink signal of the current stage.
  • the pull-down module includes a fourth switch tube and a fifth switch tube, and the control end of the fourth switch tube inputs the scan signals of the next two stages, and the fourth switch
  • the input end of the tube is connected to the output end of the first switch tube of the pull-up control module, the output end of the fourth switch tube is connected to the input end of the fifth switch tube, and the control of the fifth switch tube
  • the terminal inputs the clock signals of the lower two stages, and the output end of the fifth switch tube inputs the scan signal of the current stage.
  • the pull-down maintaining module includes a sixth switching tube, a seventh switching tube, an eighth switching tube, a ninth switching tube, a tenth switching tube, an eleventh switching tube, and a tenth a second switch tube, a thirteenth switch tube, a fourteenth switch tube, and a fifteenth switch tube;
  • a control terminal of the sixth switch tube inputs the constant voltage high level, an input end of the sixth switch tube inputs the constant voltage high level, and an output end of the sixth switch tube and the An output end of the seventh switch tube, a control end of the eighth switch tube, and a control end of the tenth switch tube are connected;
  • the control end of the seventh switch tube is respectively connected to the output end of the first switch tube and the control end of the eleventh switch tube, and the input end of the seventh switch tube and the first constant voltage low level connection;
  • the input end of the eighth switch tube inputs the constant voltage high level, and the output end of the eighth switch tube is respectively connected with the output end of the ninth switch tube, the control end of the fourteenth switch tube, and Connecting the control end of the fifteenth switch tube;
  • a control end of the ninth switch tube is connected to an output end of the first switch tube, and an input end of the ninth switch tube is respectively connected to an output end of the tenth switch tube and the eleventh switch tube Output connection;
  • the input end of the tenth switch tube inputs the constant voltage high level
  • the input end of the eleventh switch tube is connected to the second constant voltage low level
  • a control end of the twelfth switch tube is connected to an output end of the first switch tube, an input end of the twelfth switch tube is input to the constant voltage high level, and an output of the twelfth switch tube The end is respectively connected to the output end of the thirteenth switch tube and the output end of the fourteenth switch tube;
  • a control end of the thirteenth switch tube is connected to a control end of the fifteenth switch tube, and an input end of the thirteenth switch tube is connected to the second constant voltage low level;
  • An input end of the fourteenth switch tube is connected to an output end of the first switch tube
  • the input end of the fifteenth switch tube is connected to the first constant voltage low level, and the output end of the fifteenth switch tube is connected to the output end of the second switch tube of the pull-up module.
  • the first constant voltage low level is greater than the second constant voltage low level.
  • the bootstrap capacitor is disposed between the output end of the first switching transistor and the output end of the second switching transistor of the pull-up module.
  • the pull-down module includes a fourth switch tube and a fifth switch tube, and a control end of the fourth switch tube inputs a clock signal of the next two stages, and the fourth switch
  • the input end of the tube is connected to the output end of the first switch tube of the pull-up control module, the output end of the fourth switch tube is connected to the input end of the fifth switch tube, and the control of the fifth switch tube
  • the scan signal of the lower two stages is input, and the output end of the fifth switch tube inputs the scan signal of the current stage.
  • the pull-down maintaining module includes two first pull-down maintaining units and a second pull-down maintaining unit that work alternately.
  • the scan driving circuit of the present invention can avoid the leakage phenomenon by the setting of the pull-up control module, the pull-down maintenance module and the pull-down module, and improve the reliability of the scan driving circuit; A technical problem that the existing scan driving circuit is prone to leakage current, thereby affecting the reliability of the scan driving circuit.
  • 1 is a schematic structural view of a conventional scan driving circuit
  • FIG. 2 is a schematic structural view of a first preferred embodiment of a scan driving circuit of the present invention
  • FIG. 3 is a signal waveform diagram of a first preferred embodiment of the scan driving circuit of the present invention.
  • FIG. 4 is a schematic structural view of a second preferred embodiment of a scan driving circuit of the present invention.
  • FIG. 5 is a schematic structural view of a third preferred embodiment of a scan driving circuit of the present invention.
  • FIG. 6 is a schematic structural view of a fourth preferred embodiment of a scan driving circuit of the present invention.
  • Figure 7 is a block diagram showing the structure of a fifth preferred embodiment of the scan driving circuit of the present invention.
  • FIG. 2 is a schematic structural view of a first preferred embodiment of the scan driving circuit of the present invention.
  • the scan driving circuit 20 of the preferred embodiment includes a pull-up control module 201, a pull-up module 202, a pull-down module 203, a pull-down maintaining module 204, a downlink module 205, and a bootstrap capacitor 206.
  • the pull-up control module 201 is configured to receive the downlink signal ST(N-1) of the previous stage, and generate a scan level signal Q of the corresponding scan line according to the downlink signal ST(N-1) of the previous stage ( N); the pull-up module 202 is configured to pull up the scan signal G(N) of the corresponding scan line according to the scan level signal Q(N) and the clock signal CK(n) of the current stage; the pull-down module 203 is used to The two-stage clock signal CK(n+2) and the next two stages of the scan signal G(N+2) pull down the scan signal G(N) of the corresponding scan line; the pull-down maintenance module 204 is used to maintain the corresponding scan line.
  • the pull-up control module 201 includes a first switch tube T11.
  • the control end of the first switch tube T11 inputs the downlink signal ST(N-1) of the previous stage, and the input end of the first switch tube T11 inputs the constant voltage level.
  • the output of the first switch T11 is connected to the pull-up module 202, the pull-down module 203, the pull-down maintaining module 204, the downlink module 205, and the bootstrap capacitor 206, respectively.
  • the pull-up module 202 includes a second switch tube T21, the control end of the second switch tube T21 is connected to the output end of the first switch tube T11 of the pull-up control module, and the input end of the second switch tube T21 is input with the clock signal CK of the current stage. (n), the output terminal of the second switching transistor T21 outputs the scanning signal G(N) of the present stage.
  • the downlink module 205 includes a third switch T22, the control end of the third switch T22 is connected to the output end of the first switch T11 of the pull-up control module 201, and the input of the third switch T22 is input with the clock signal of the current switch. CK(n), the output terminal of the third switching transistor T22 outputs the downlink signal ST(N) of the current stage.
  • the pull-down module 203 includes a fourth switch tube T411 and a fifth switch tube T412.
  • the control end of the fourth switch tube T411 inputs the scan signals G(N+2) of the next two stages, and the input end and pull-up control of the fourth switch tube T411.
  • the output end of the first switch tube T11 of the module is connected, the output end of the fourth switch tube T411 is connected to the input end of the fifth switch tube T412, and the control end of the fifth switch tube T412 is input to the clock signal CK of the next two stages (n+ 2)
  • the output of the fifth switching transistor T412 is input to the scanning signal G(N) of the current stage.
  • the pull-down maintenance module 204 includes a sixth switch tube T51, a seventh switch tube T52, an eighth switch tube T53, a ninth switch tube T54, a tenth switch tube T73, an eleventh switch tube T74, a twelfth switch tube T75, and a Thirteen switch tubes T76, fourteenth switch tubes T42 and fifteenth switch tubes T32.
  • the control terminal of the sixth switch tube T51 inputs a constant voltage high level DCH
  • the input end of the sixth switch tube T51 inputs a constant voltage high level DCH
  • the output end of the sixth switch tube T51 and the output end of the seventh switch tube T52 respectively
  • the control end of the eighth switch tube T53 and the control end of the tenth switch tube T73 are connected.
  • the control end of the seventh switch tube T52 is respectively connected to the output end of the first switch tube T11 and the control end of the eleventh switch tube T74, and the input end of the seventh switch tube T52 is connected to the first constant voltage low level VSS1.
  • the input end of the eighth switch tube T53 inputs a constant voltage high level DCH, and the output end of the eighth switch tube T53 and the output end of the ninth switch tube T54, the control end of the fourteenth switch tube T42, and the fifteenth switch tube
  • the control terminal of the T32 is connected.
  • the control end of the ninth switch tube T54 is connected to the output end of the first switch tube T11, and the input end of the ninth switch tube T54 is connected to the output end of the tenth switch tube T73 and the output end of the eleventh switch tube T74.
  • the input end of the tenth switch tube T73 inputs a constant voltage high level DCH; the input end of the eleventh switch tube T74 is connected to the second constant voltage low level DCL.
  • the control end of the twelfth switch tube T75 is connected to the output end of the first switch tube T11, the input end of the twelfth switch tube T75 is input with the constant voltage high level DCH, and the output end of the twelfth switch tube T75 is respectively the tenth
  • the output end of the three-switch tube T76 and the output end of the fourteenth switch tube T42 are connected.
  • the control end of the thirteenth switch tube T76 is connected to the control end of the fifteenth switch tube T32, and the input end of the thirteenth switch tube T76 is connected to the second constant voltage low point flat DCL.
  • the input end of the fourteenth switch tube T42 is connected to the output end of the first switch tube T11.
  • the input end of the fifteenth switch tube T32 is connected to the first constant voltage low level VSS1, and the output end of the fifteenth switch tube T32 is connected to the output end of the second switch tube T21 of the pull-up module 202.
  • the bootstrap capacitor 206 is disposed between the output of the first switching transistor T11 and the output of the second switching transistor T21 of the pull-up module 202.
  • FIG. 3 is a signal waveform diagram of a first preferred embodiment of the scan driving circuit of the present invention.
  • the scan driving circuit of the preferred embodiment is started by the start signal STV.
  • the lower-level signal ST(N-1) of the upper stage is at a high level, the first switching transistor T11 is turned on, and the constant voltage is high.
  • the level DCH charges the bootstrap capacitor 206 through the first switching transistor T11 such that the reference point Q(N) rises to a higher level.
  • the downlink signal ST(N-1) of the upper stage is turned to a low level
  • the first switch tube T11 is turned off
  • the reference point Q(N) is maintained at a higher level by the bootstrap capacitor 206
  • the second The switch tube T21 and the third switch tube T22 are turned on.
  • the clock signal CK(n) of the current stage is turned to a high level, and the clock signal CK(n) continues to charge the bootstrap capacitor 206 through the second switch T21, so that the reference point Q(N) reaches a higher level.
  • the scanning signal G(N) of this stage and the downlink signal ST(N) of this stage also turn to a high level.
  • the reference point Q(N) is in a high state, and since the input end of the first switching transistor T11 is connected to the constant voltage high level DCH, the reference point Q(N) does not generate a leakage phenomenon through the first switching transistor T11. .
  • the reference point P(N) is a low level state, so that the fourteenth switch tube T42 is In the off state, the constant voltage high level DCH is connected to the output end of the fourteenth switch tube T42 through the twelfth switch tube T75, so that the reference point Q(N) does not generate a leakage phenomenon through the fourteenth switch tube T42.
  • the fourth switch tube T411 and the fifth switch tube T412 are in an off state, but the output end of the fifth switch tube T412 is input to the scan signal G(N) of the current stage, and the scan signal G(N) of the current stage is A high level state, therefore, the reference point Q(N) also does not generate a leakage phenomenon through the fourth switching transistor T411 and the fifth switching transistor T412.
  • the scan driving circuit 20 of the preferred embodiment does not generate leakage through the first switch tube T11, the fourteenth switch tube T42, the fourth switch tube T411, and the fifth switch tube T412 when in the high level state.
  • the phenomenon improves the reliability of the scan driving circuit 20.
  • the fourth switching transistor T411 and the fifth switching transistor T412 are turned on, and the scanning signal of the current stage is G(N) is low and the reference point Q(N) is discharged through the pull-down module.
  • the seventh switch tube T52 is turned off, the reference point P(N) turns to a high level under the action of the sixth switch tube T51 and the eighth switch tube T53, and the thirteenth switch tube T76 and the fourteenth switch
  • the tube T42 is turned on, and the reference point Q(N) is connected to the second constant voltage low level DCL through the fourteenth switch tube T42 and the thirteenth switch tube T76, thus ensuring the low potential of the reference point Q(N),
  • the scanning signal G(N) of the current level of the low level plays a sustaining role.
  • the first constant voltage low level VSS1 In order to facilitate the analysis of the driving circuit, it is preferable to set the first constant voltage low level VSS1 to be greater than the second constant voltage low level DCL, so as to separately and independently control the components in the scan driving circuit 20, the first constant voltage low voltage
  • the specific values of the flat VSS1 and the second constant voltage low level DCL can be set according to actual conditions.
  • the scan driving circuit of the invention can avoid the occurrence of leakage phenomenon and improve the reliability of the scan driving circuit by setting the pull-up control module, the pull-down maintaining module and the pull-down module.
  • FIG. 4 is a schematic structural view of a second preferred embodiment of the scan driving circuit of the present invention.
  • the difference between the scan driving circuit of the preferred embodiment and the first preferred embodiment is that the control terminal of the fourth switching transistor T411 of the pull-down module inputs the clock signal CK(n+2) of the next two stages, and the input of the fourth switching tube T411.
  • the end is connected to the output end of the first switch tube T11 of the pull-up control module, the output end of the fourth switch tube T411 is connected to the input end of the fifth switch tube T412, and the control end of the fifth switch tube T412 is input to scan the next two stages.
  • the signal G(N+2), the output terminal of the fifth switching transistor T412 is input to the scanning signal G(N) of the current stage.
  • the preferred embodiment modifies the pull-down module of the scan driving circuit of the first preferred embodiment, so that not only the reference point Q(N) can be prevented from causing leakage phenomenon through the fourth switching tube and the fifth switching tube, but also the next two levels can be avoided.
  • the pulse signal of the clock signal affects the scanning signal of this stage.
  • FIG. 5 is a schematic structural diagram of a third preferred embodiment of the scan driving circuit of the present invention.
  • the pull-down maintaining module of the scan driving circuit of the preferred embodiment includes two first pull-down maintaining units 51 and a second pull-down maintaining unit 52 that alternately operate, respectively passing the voltage source LC1 and the voltage.
  • the source LC2 controls the pull-down sustaining unit of the operation.
  • the working principle of the first pull-down maintaining unit 51 and the second pull-down maintaining unit 52 is the same as that of the pull-down maintaining module in the first preferred embodiment.
  • the first preferred embodiment of the scan driving circuit For details, refer to the first preferred embodiment of the scan driving circuit. Related description.
  • the scan driving circuit of the preferred embodiment is provided with two pull-down sustaining units that work alternately, so that the electrical stress of each pull-down maintaining unit can be better mitigated, and the reliability of the scan driving circuit for a long time is further improved.
  • FIG. 6 is a schematic structural view of a fourth preferred embodiment of the scan driving circuit of the present invention.
  • the difference between the scan driving circuit of the preferred embodiment and the third preferred embodiment is that the control terminal of the fourth switching transistor T411 of the pull-down module inputs the clock signal CK(n+2) of the next two stages, and the input of the fourth switching tube T411.
  • the end is connected to the output end of the first switch tube T11 of the pull-up control module, the output end of the fourth switch tube T411 is connected to the input end of the fifth switch tube T412, and the control end of the fifth switch tube T412 is input to scan the next two stages.
  • the signal G(N+2), the output terminal of the fifth switching transistor T412 is input to the scanning signal G(N) of the current stage.
  • the preferred embodiment modifies the pull-down module of the scan driving circuit of the third preferred embodiment, so that not only the reference point Q(N) can be prevented from causing leakage phenomenon through the fourth switching tube and the fifth switching tube, but also the next two levels can be avoided.
  • the pulse signal of the clock signal affects the scanning signal of this stage.
  • FIG. 7 is a schematic structural diagram of a fifth preferred embodiment of the scan driving circuit of the present invention.
  • the difference between the scan driving circuit of the preferred embodiment and the first preferred embodiment is that the node is not shared in the scan driving circuit of the preferred embodiment (the control end of the T53 does not share the node with the control end of the T73), although the addition is made.
  • a certain control component but further improves the reliability of the scan driving circuit of the present invention.
  • the scan driving circuit of the invention can avoid the leakage phenomenon by the setting of the pull-up control module, the pull-down maintenance module and the pull-down module, improve the reliability of the scan driving circuit, and solve the problem that the existing scanning driving circuit is easy to occur. A leakage problem that affects the reliability of the scan drive circuit.

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Abstract

一种扫描驱动电路，其包括上拉控制模块（201）、上拉模块（202）、下拉模块（203）、下拉维持模块（204）、下传模块（205）以及自举电容（206）；其中当上拉控制模块（201）生成扫描信号时，上拉控制模块（201）以及下拉维持模块（204）使用恒压高电平（DCH）防止漏电现象的产生，下拉模块（203）使用本级的扫描信号（G(N)）防止漏电现象的产生。该扫描驱动电路可以很好的避免漏电现象的产生。

Description

一种扫描驱动电路 技术领域
本发明涉及显示驱动领域，特别是涉及一种扫描驱动电路。
 背景技术
Gate Driver On Array，简称GOA，即在现有薄膜晶体管液晶显示器的阵列基板上制作扫描驱动电路，实现对扫描线逐行扫描的驱动方式。现有扫描驱动电路的结构示意图如图1所示，该扫描驱动电路10包括上拉控制模块101、上拉模块102、下传模块103、下拉模块104、自举电容105以及下拉维持模块106。
该扫描驱动电路10在高温状态下工作时，开关管的阈值电压会往负值移动，这样导致扫描驱动电路10的各模块的开关管容易发生漏电，从而影响该扫描驱动电路的可靠性。
故，有必要提供一种扫描驱动电路，以解决现有技术所存在的问题。
 技术问题
本发明的目的在于提供一种漏电现象较轻且可靠性较高的扫描驱动电路，以解决现有的扫描驱动电路的容易发生漏电现象，从而影响扫描驱动电路的可靠性的技术问题。
 技术解决方案
本发明实施例提供一种扫描驱动电路，用于对级联的扫描线进行驱动操作，其包括：
上拉控制模块，用于接收上一级的下传信号，并根据所述上一级的下传信号生成相应的所述扫描线的扫描电平信号；
上拉模块，用于根据所述扫描电平信号以及本级的时钟信号，拉升相应的所述扫描线的扫描信号；
下拉模块，用于根据下两级的时钟信号以及下两级的扫描信号，拉低相应的所述扫描线的扫描信号
下拉维持模块，用于维持相应的所述扫描线的扫描信号的低电平，其包括两个交替工作的第一下拉维持单元以及第二下拉维持单元；
下传模块，用于向下一级的上拉控制模块发送本级的下传信号；以及
自举电容，用于生成所述扫描线的扫描信号的高电平；
其中当所述上拉控制模块生成扫描电平信号时，所述上拉控制模块以及所述下拉维持模块使用恒压高电平防止漏电现象的产生；所述下拉模块使用本级的扫描信号防止漏电现象的产生；
其中所述上拉控制模块包括第一开关管，所述第一开关管的控制端输入所述上一级的下传信号，所述第一开关管的输入端输入所述恒压高电平，所述第一开关管的输出端分别与所述上拉模块、所述下拉模块、所述下拉维持模块、所述下传模块以及所述自举电容连接。
在本发明所述的扫描驱动电路中，所述上拉模块包括第二开关管，所述第二开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第二开关管的输入端输入所述本级的时钟信号，所述第二开关管的输出端输出本级的扫描信号。
在本发明所述的扫描驱动电路中，所述下传模块包括第三开关管，所述第三开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第三开关管的输入端输入所述本级的时钟信号，所述第三开关管的输出端输出所述本级的下传信号。
在本发明所述的扫描驱动电路中，所述下拉模块包括第四开关管以及第五开关管，所述第四开关管的控制端输入所述下两级的扫描信号，所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输出端与所述第五开关管的输入端连接，所述第五开关管的控制端输入所述下两级的时钟信号，所述第五开关管的输出端输入所述本级的扫描信号。
在本发明所述的扫描驱动电路中，所述下拉维持模块包括第六开关管、第七开关管、第八开关管、第九开关管、第十开关管、第十一开关管、第十二开关管、第十三开关管、第十四开关管以及第十五开关管；
所述第六开关管的控制端输入所述恒压高电平，所述第六开关管的输入端输入所述恒压高电平，所述第六开关管的输出端分别与所述第七开关管的输出端、所述第八开关管的控制端以及第十开关管的控制端连接；
所述第七开关管的控制端分别与所述第一开关管的输出端以及所述第十一开关管的控制端连接，所述第七开关管的输入端与第一恒压低电平连接；
所述第八开关管的输入端输入所述恒压高电平，所述第八开关管的输出端分别与所述第九开关管的输出端、所述第十四开关管的控制端以及所述第十五开关管的控制端连接；
所述第九开关管的控制端与所述第一开关管的输出端连接，所述第九开关管的输入端分别与所述第十开关管的输出端以及所述第十一开关管的输出端连接；
所述第十开关管的输入端输入所述恒压高电平；
所述第十一开关管的输入端与第二恒压低电平连接；
所述第十二开关管的控制端与所述第一开关管的输出端连接，所述第十二开关管的输入端输入所述恒压高电平，所述第十二开关管的输出端分别与所述第十三开关管的输出端以及所述第十四开关管的输出端连接；
所述第十三开关管的控制端与所述第十五开关管的控制端连接，所述第十三开关管的输入端与所述第二恒压低电平连接；
所述第十四开关管的输入端与所述第一开关管的输出端连接；
所述第十五开关管的输入端与所述第一恒压低电平连接，所述第十五开关管的输出端与所述上拉模块的第二开关管的输出端连接。
在本发明所述的扫描驱动电路中，所述第一恒压低电平大于第二恒压低电平。
在本发明所述的扫描驱动电路中，所述自举电容设置在所述第一开关管的输出端以及所述上拉模块的第二开关管的输出端之间。
在本发明所述的扫描驱动电路中，所述下拉模块包括第四开关管以及第五开关管，所述第四开关管的控制端输入所述下两级的时钟信号，所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输出端与所述第五开关管的输入端连接，所述第五开关管的控制端输入所述下两级的扫描信号，所述第五开关管的输出端输入所述本级的扫描信号。
本发明实施例还提供一种扫描驱动电路，用于对级联的扫描线进行驱动操作，其包括：
上拉控制模块，用于接收上一级的下传信号，并根据所述上一级的下传信号生成相应的所述扫描线的扫描电平信号；
上拉模块，用于根据所述扫描电平信号以及本级的时钟信号，拉升相应的所述扫描线的扫描信号；
下拉模块，用于根据下两级的时钟信号以及下两级的扫描信号，拉低相应的所述扫描线的扫描信号
下拉维持模块，用于维持相应的所述扫描线的扫描信号的低电平；
下传模块，用于向下一级的上拉控制模块发送本级的下传信号；以及
自举电容，用于生成所述扫描线的扫描信号的高电平；
其中当所述上拉控制模块生成扫描电平信号时，所述上拉控制模块以及所述下拉维持模块使用恒压高电平防止漏电现象的产生；所述下拉模块使用本级的扫描信号防止漏电现象的产生。
在本发明所述的扫描驱动电路中，所述上拉控制模块包括第一开关管，所述第一开关管的控制端输入所述上一级的下传信号，所述第一开关管的输入端输入所述恒压高电平，所述第一开关管的输出端分别与所述上拉模块、所述下拉模块、所述下拉维持模块、所述下传模块以及所述自举电容连接。
在本发明所述的扫描驱动电路中，所述上拉模块包括第二开关管，所述第二开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第二开关管的输入端输入所述本级的时钟信号，所述第二开关管的输出端输出本级的扫描信号。
在本发明所述的扫描驱动电路中，所述下传模块包括第三开关管，所述第三开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第三开关管的输入端输入所述本级的时钟信号，所述第三开关管的输出端输出所述本级的下传信号。
在本发明所述的扫描驱动电路中，所述下拉模块包括第四开关管以及第五开关管，所述第四开关管的控制端输入所述下两级的扫描信号，所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输出端与所述第五开关管的输入端连接，所述第五开关管的控制端输入所述下两级的时钟信号，所述第五开关管的输出端输入所述本级的扫描信号。
在本发明所述的扫描驱动电路中，所述下拉维持模块包括第六开关管、第七开关管、第八开关管、第九开关管、第十开关管、第十一开关管、第十二开关管、第十三开关管、第十四开关管以及第十五开关管；
所述第六开关管的控制端输入所述恒压高电平，所述第六开关管的输入端输入所述恒压高电平，所述第六开关管的输出端与分别与所述第七开关管的输出端、所述第八开关管的控制端以及第十开关管的控制端连接；
所述第七开关管的控制端分别与所述第一开关管的输出端以及所述第十一开关管的控制端连接，所述第七开关管的输入端与第一恒压低电平连接；
所述第八开关管的输入端输入所述恒压高电平，所述第八开关管的输出端分别与所述第九开关管的输出端、所述第十四开关管的控制端以及所述第十五开关管的控制端连接；
所述第九开关管的控制端与所述第一开关管的输出端连接，所述第九开关管的输入端分别与所述第十开关管的输出端以及所述第十一开关管的输出端连接；
所述第十开关管的输入端输入所述恒压高电平；
所述第十一开关管的输入端与第二恒压低电平连接；
所述第十二开关管的控制端与所述第一开关管的输出端连接，所述第十二开关管的输入端输入所述恒压高电平，所述第十二开关管的输出端分别与所述第十三开关管的输出端以及所述第十四开关管的输出端连接；
所述第十三开关管的控制端与所述第十五开关管的控制端连接，所述第十三开关管的输入端与所述第二恒压低电平连接；
所述第十四开关管的输入端与所述第一开关管的输出端连接；
所述第十五开关管的输入端与所述第一恒压低电平连接，所述第十五开关管的输出端与所述上拉模块的第二开关管的输出端连接。
在本发明所述的扫描驱动电路中，所述第一恒压低电平大于第二恒压低电平。
在本发明所述的扫描驱动电路中，所述自举电容设置在所述第一开关管输出端以及所述上拉模块的第二开关管的输出端之间。
在本发明所述的扫描驱动电路中，所述下拉模块包括第四开关管以及第五开关管，所述第四开关管的控制端输入所述下两级的时钟信号，所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输出端与所述第五开关管的输入端连接，所述第五开关管的控制端输入所述下两级的扫描信号，所述第五开关管的输出端输入所述本级的扫描信号。
在本发明所述的扫描驱动电路中，所述下拉维持模块包括两个交替工作的第一下拉维持单元以及第二下拉维持单元。
 有益效果
相较于现有的扫描驱动电路，本发明的扫描驱动电路通过上拉控制模块、下拉维持模块以及下拉模块的设置，可以很好的避免漏电现象的产生，提高扫描驱动电路的可靠性；解决了现有的扫描驱动电路的容易发生漏电现象，从而影响扫描驱动电路的可靠性的技术问题。
 附图说明
图1为一种现有的扫描驱动电路的结构示意图；
图2为本发明的扫描驱动电路的第一优选实施例的结构示意图；
图3为本发明的扫描驱动电路的第一优选实施例的信号波形图；
图4为本发明的扫描驱动电路的第二优选实施例的结构示意图；
图5为本发明的扫描驱动电路的第三优选实施例的结构示意图；
图6为本发明的扫描驱动电路的第四优选实施例的结构示意图；
图7为本发明的扫描驱动电路的第五优选实施例的结构示意图。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
在图中，结构相似的单元是以相同标号表示。
请参照图2，图2为本发明的扫描驱动电路的第一优选实施例的结构示意图。本优选实施例的扫描驱动电路20包括上拉控制模块201、上拉模块202、下拉模块203、下拉维持模块204、下传模块205以及自举电容206。上拉控制模块201用于接收上一级的下传信号ST(N-1)，并根据上一级的下传信ST(N-1)号生成相应的扫描线的扫描电平信号Q(N)；上拉模块202用于根据扫描电平信号Q(N)以及本级的时钟信号CK(n)，拉升相应的扫描线的扫描信号G(N)；下拉模块203用于根据下两级的时钟信号CK(n+2)以及下两级的扫描信号G(N+2)，拉低相应的扫描线的扫描信号G(N)；下拉维持模块204用于维持相应的扫描线的扫描信号G(N)的低电平；下传模块205用于向下一级的上拉控制模块发送本级的下传信号ST(N)；自举电容206用于生成扫描线的扫描信号G(N)的高电平。
其中上拉控制模块201包括第一开关管T11，第一开关管T11的控制端输入上一级的下传信号ST(N-1)，第一开关管T11的输入端输入恒压高电平DCH，第一开关管T11的输出端分别与上拉模块202、下拉模块203、下拉维持模块204、下传模块205以及自举电容206连接。
上拉模块202包括第二开关管T21，第二开关管T21的控制端与上拉控制模块的第一开关管T11的输出端连接，第二开关管T21的输入端输入本级的时钟信号CK(n)，第二开关管T21的输出端输出本级的扫描信号G(N)。
下传模块205包括第三开关管T22，第三开关管T22的控制端与上拉控制模块201的第一开关管T11的输出端连接，第三开关管T22的输入端输入本级的时钟信号CK(n)，第三开关管T22的输出端输出本级的下传信号ST(N)。
下拉模块203包括第四开关管T411以及第五开关管T412，第四开关管T411的控制端输入下两级的扫描信号G(N+2)，第四开关管T411的输入端与上拉控制模块的第一开关管T11的输出端连接，第四开关管T411的输出端与第五开关管T412的输入端连接，第五开关管T412的控制端输入下两级的时钟信号CK(n+2)，第五开关管T412的输出端输入本级的扫描信号G(N)。
下拉维持模块204包括第六开关管T51、第七开关管T52、第八开关管T53、第九开关管T54、第十开关管T73、第十一开关管T74、第十二开关管T75、第十三开关管T76、第十四开关管T42以及第十五开关管T32。
第六开关管T51的控制端输入恒压高电平DCH，第六开关管T51的输入端输入恒压高电平DCH，第六开关管T51的输出端分别与第七开关管T52的输出端、第八开关管T53的控制端以及第十开关管T73的控制端连接。
第七开关管T52的控制端分别与第一开关管T11的输出端以及第十一开关管T74的控制端连接，第七开关管T52的输入端与第一恒压低电平VSS1连接.
第八开关管T53的输入端输入恒压高电平DCH，第八开关管T53的输出端分别与第九开关管T54的输出端、第十四开关管T42的控制端以及第十五开关管T32的控制端连接。
第九开关管T54的控制端与第一开关管T11的输出端连接，第九开关管T54的输入端分别与第十开关管T73的输出端以及第十一开关管T74的输出端连接。
第十开关管T73的输入端输入恒压高电平DCH；第十一开关管T74的输入端与第二恒压低电平DCL连接。
第十二开关管T75的控制端与第一开关管T11的输出端连接，第十二开关管T75的输入端输入恒压高电平DCH，第十二开关管T75的输出端分别与第十三开关管T76的输出端以及第十四开关管T42的输出端连接。
第十三开关管T76的控制端与第十五开关管T32的控制端连接，第十三开关管T76的输入端与第二恒压低点平DCL连接。
第十四开关管T42的输入端与第一开关管T11的输出端连接。
第十五开关管T32的输入端与第一恒压低电平VSS1连接，第十五开关管T32的输出端与上拉模块202的第二开关管T21的输出端连接。
自举电容206设置在第一开关管T11的输出端以及上拉模块202的第二开关管T21的输出端之间。
请参照图2和图3，图3为本发明的扫描驱动电路的第一优选实施例的信号波形图。本优选实施例的扫描驱动电路使用时，由启动信号STV启动扫描驱动电路，当上一级的下传信号ST(N-1)为高电平时，第一开关管T11导通，恒压高电平DCH通过第一开关管T11给自举电容206充电，使得参考点Q(N)上升到一较高的电平。随后上一级的下传信号ST(N-1)转为低电平，第一开关管T11断开，参考点Q(N)通过自举电容206维持一较高的电平，并且第二开关管T21和第三开关管T22导通。
随后本级的时钟信号CK(n)转为高电平，时钟信号CK(n)通过第二开关管T21继续给自举电容206充电，使得参考点Q(N)达到一更高的电平，本级的扫描信号G(N)以及本级的下传信号ST(N)也转为高电平。
此时参考点Q(N)为高电平状态，由于第一开关管T11的输入端与恒压高电平DCH连接，因此参考点Q(N)不会通过第一开关管T11产生漏电现象。
同时由于第七开关管T52、第九开关管T54、第十一开关管T74以及第十二开关管T75导通，参考点P(N)为低电平状态，从而第十四开关管T42为断开状态，恒压高电平DCH通过第十二开关管T75与第十四开关管T42的输出端连接，因此参考点Q(N)也不会通过第十四开关管T42产生漏电现象。
同时第四开关管T411和第五开关管T412为断开状态，但是第五开关管T412的输出端输入本级的扫描信号G(N)，该本级的扫描信号G(N)此时为一高电平状态，因此参考点Q(N)也不会通过第四开关管T411和第五开关管T412产生漏电现象。
综上所述，本优选实施例的扫描驱动电路20在高电平状态时，不会通过第一开关管T11、第十四开关管T42、第四开关管T411以及第五开关管T412产生漏电现象，提升了扫描驱动电路20的可靠性。
当下两级的扫描信号G(N+2)以及下两级的时钟信号CK(n+2)为高电平时，第四开关管T411以及第五开关管T412导通，同时本级的扫描信号G(N)为低电平，参考点Q(N)通过下拉模块进行放电。并且由于第七开关管T52断开，参考点P(N)在第六开关管T51和第八开关管T53的作用下转为高电平，这时第十三开关管T76和第十四开关管T42导通，参考点Q(N)通过第十四开关管T42、第十三开关管T76与第二恒压低电平DCL连接，这样保证了参考点Q(N)的低电位，对低电平的本级的扫描信号G(N)起到了维持作用。
为了便于对驱动电路进行解析，优选设置第一恒压低电平VSS1大于第二恒压低电平DCL，以便于对扫描驱动电路20中的各部件进行分开独立控制，第一恒压低电平VSS1和第二恒压低电平DCL的具体数值可根据实际情况进行设定。
本发明的扫描驱动电路通过上拉控制模块、下拉维持模块以及下拉模块的设置，可以很好的避免漏电现象的产生，提高扫描驱动电路的可靠性。
请参照图4，图4为本发明的扫描驱动电路的第二优选实施例的结构示意图。本优选实施例的扫描驱动电路与第一优选实施例的区别在于，下拉模块的第四开关管T411的控制端输入下两级的时钟信号CK(n+2)，第四开关管T411的输入端与上拉控制模块的第一开关管T11的输出端连接，第四开关管T411的输出端与第五开关管T412的输入端连接，第五开关管T412的控制端输入下两级的扫描信号G(N+2)，第五开关管T412的输出端输入本级的扫描信号G(N)。
本优选实施例对第一优选实施例的扫描驱动电路的下拉模块进行修改，使得不仅可以防止参考点Q(N)通过第四开关管和第五开关管造成漏电现象，并且可以避免下两级的时钟信号的脉冲信号影响到本级的扫描信号。
请参照图5，图5为本发明的扫描驱动电路的第三优选实施例的结构示意图。在第一优选实施例的基础上，本优选实施例的扫描驱动电路的下拉维持模块包括两个交替工作的第一下拉维持单元51以及第二下拉维持单元52，分别通过电压源LC1和电压源LC2来控制工作的下拉维持单元。第一下拉维持单元51和第二下拉维持单元52的工作原理与上述的第一优选实施例中的下拉维持模块的工作原理相同，具体请参见上述扫描驱动电路的第一优选实施例中的相关描述。
本优选实施例的扫描驱动电路设置有两个交替工作的下拉维持单元，这样可以较好的减轻各个下拉维持单元的电应力作用，进一步提高扫描驱动电路长时间工作的可靠性。
请参照图6，图6为本发明的扫描驱动电路的第四优选实施例的结构示意图。本优选实施例的扫描驱动电路与第三优选实施例的区别在于，下拉模块的第四开关管T411的控制端输入下两级的时钟信号CK(n+2)，第四开关管T411的输入端与上拉控制模块的第一开关管T11的输出端连接，第四开关管T411的输出端与第五开关管T412的输入端连接，第五开关管T412的控制端输入下两级的扫描信号G(N+2)，第五开关管T412的输出端输入本级的扫描信号G(N)。
本优选实施例对第三优选实施例的扫描驱动电路的下拉模块进行修改，使得不仅可以防止参考点Q(N)通过第四开关管和第五开关管造成漏电现象，并且可以避免下两级的时钟信号的脉冲信号影响到本级的扫描信号。
请参照图7，图7为本发明的扫描驱动电路的第五优选实施例的结构示意图。本优选实施例的扫描驱动电路与第一优选实施例的区别在于，本优选实施例的扫描驱动电路中没有对节点进行共享（T53的控制端与T73的控制端没有共用节点），虽然增加了一定的控制部件，但是进一步提高了本发明的扫描驱动电路的可靠性。
本发明的扫描驱动电路通过上拉控制模块、下拉维持模块以及下拉模块的设置，可以很好的避免漏电现象的产生，提高扫描驱动电路的可靠性；解决了现有的扫描驱动电路的容易发生漏电现象，从而影响扫描驱动电路的可靠性的技术问题。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (18)

  1. 一种扫描驱动电路，用于对级联的扫描线进行驱动操作，其包括：
    上拉控制模块，用于接收上一级的下传信号，并根据所述上一级的下传信号生成相应的所述扫描线的扫描电平信号；
    上拉模块，用于根据所述扫描电平信号以及本级的时钟信号，拉升相应的所述扫描线的扫描信号；
    下拉模块，用于根据下两级的时钟信号以及下两级的扫描信号，拉低相应的所述扫描线的扫描信号
    下拉维持模块，用于维持相应的所述扫描线的扫描信号的低电平，其包括两个交替工作的第一下拉维持单元以及第二下拉维持单元；
    下传模块，用于向下一级的上拉控制模块发送本级的下传信号；以及
    自举电容，用于生成所述扫描线的扫描信号的高电平；
    其中当所述上拉控制模块生成扫描电平信号时，所述上拉控制模块以及所述下拉维持模块使用恒压高电平防止漏电现象的产生；所述下拉模块使用本级的扫描信号防止漏电现象的产生；
    其中所述上拉控制模块包括第一开关管，所述第一开关管的控制端输入所述上一级的下传信号，所述第一开关管的输入端输入所述恒压高电平，所述第一开关管的输出端分别与所述上拉模块、所述下拉模块、所述下拉维持模块、所述下传模块以及所述自举电容连接。
  2. 根据权利要求1所述的扫描驱动电路，其中所述上拉模块包括第二开关管，所述第二开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第二开关管的输入端输入所述本级的时钟信号，所述第二开关管的输出端输出本级的扫描信号。
  3. 根据权利要求1所述的扫描驱动电路，其中所述下传模块包括第三开关管，所述第三开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第三开关管的输入端输入所述本级的时钟信号，所述第三开关管的输出端输出所述本级的下传信号。
  4. 根据权利要求1所述的扫描驱动电路，其中所述下拉模块包括第四开关管以及第五开关管，所述第四开关管的控制端输入所述下两级的扫描信号，所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输出端与所述第五开关管的输入端连接，所述第五开关管的控制端输入所述下两级的时钟信号，所述第五开关管的输出端输入所述本级的扫描信号。
  5. 根据权利要求1所述的扫描驱动电路，其中所述下拉维持模块包括第六开关管、第七开关管、第八开关管、第九开关管、第十开关管、第十一开关管、第十二开关管、第十三开关管、第十四开关管以及第十五开关管；
    所述第六开关管的控制端输入所述恒压高电平，所述第六开关管的输入端输入所述恒压高电平，所述第六开关管的输出端分别与所述第七开关管的输出端、所述第八开关管的控制端以及第十开关管的控制端连接；
    所述第七开关管的控制端分别与所述第一开关管的输出端以及所述第十一开关管的控制端连接，所述第七开关管的输入端与第一恒压低电平连接；
    所述第八开关管的输入端输入所述恒压高电平，所述第八开关管的输出端分别与所述第九开关管的输出端、所述第十四开关管的控制端以及所述第十五开关管的控制端连接；
    所述第九开关管的控制端与所述第一开关管的输出端连接，所述第九开关管的输入端分别与所述第十开关管的输出端以及所述第十一开关管的输出端连接；
    所述第十开关管的输入端输入所述恒压高电平；
    所述第十一开关管的输入端与第二恒压低电平连接；
    所述第十二开关管的控制端与所述第一开关管的输出端连接，所述第十二开关管的输入端输入所述恒压高电平，所述第十二开关管的输出端分别与所述第十三开关管的输出端以及所述第十四开关管的输出端连接；
    所述第十三开关管的控制端与所述第十五开关管的控制端连接，所述第十三开关管的输入端与所述第二恒压低电平连接；
    所述第十四开关管的输入端与所述第一开关管的输出端连接；
    所述第十五开关管的输入端与所述第一恒压低电平连接，所述第十五开关管的输出端与所述上拉模块的第二开关管的输出端连接。
  6. 根据权利要求5所述的扫描驱动电路，其中所述第一恒压低电平大于第二恒压低电平。
  7. 根据权利要求1所述的扫描驱动电路，其中所述自举电容设置在所述第一开关管的输出端以及所述上拉模块的第二开关管的输出端之间。
  8. 根据权利要求1所述的扫描驱动电路，其中所述下拉模块包括第四开关管以及第五开关管，所述第四开关管的控制端输入所述下两级的时钟信号，所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输出端与所述第五开关管的输入端连接，所述第五开关管的控制端输入所述下两级的扫描信号，所述第五开关管的输出端输入所述本级的扫描信号。
  9. 一种扫描驱动电路，用于对级联的扫描线进行驱动操作，其包括：
    上拉控制模块，用于接收上一级的下传信号，并根据所述上一级的下传信号生成相应的所述扫描线的扫描电平信号；
    上拉模块，用于根据所述扫描电平信号以及本级的时钟信号，拉升相应的所述扫描线的扫描信号；
    下拉模块，用于根据下两级的时钟信号以及下两级的扫描信号，拉低相应的所述扫描线的扫描信号
    下拉维持模块，用于维持相应的所述扫描线的扫描信号的低电平；
    下传模块，用于向下一级的上拉控制模块发送本级的下传信号；以及
    自举电容，用于生成所述扫描线的扫描信号的高电平；
    其中当所述上拉控制模块生成扫描电平信号时，所述上拉控制模块以及所述下拉维持模块使用恒压高电平防止漏电现象的产生；所述下拉模块使用本级的扫描信号防止漏电现象的产生。
  10. 根据权利要求9所述的扫描驱动电路，其中所述上拉控制模块包括第一开关管，所述第一开关管的控制端输入所述上一级的下传信号，所述第一开关管的输入端输入所述恒压高电平，所述第一开关管的输出端分别与所述上拉模块、所述下拉模块、所述下拉维持模块、所述下传模块以及所述自举电容连接。
  11. 根据权利要求10所述的扫描驱动电路，其中所述上拉模块包括第二开关管，所述第二开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第二开关管的输入端输入所述本级的时钟信号，所述第二开关管的输出端输出本级的扫描信号。
  12. 根据权利要求10所述的扫描驱动电路，其中所述下传模块包括第三开关管，所述第三开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第三开关管的输入端输入所述本级的时钟信号，所述第三开关管的输出端输出所述本级的下传信号。
  13. 根据权利要求10所述的扫描驱动电路，其中所述下拉模块包括第四开关管以及第五开关管，所述第四开关管的控制端输入所述下两级的扫描信号，所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输出端与所述第五开关管的输入端连接，所述第五开关管的控制端输入所述下两级的时钟信号，所述第五开关管的输出端输入所述本级的扫描信号。
  14. 根据权利要求10所述的扫描驱动电路，其中所述下拉维持模块包括第六开关管、第七开关管、第八开关管、第九开关管、第十开关管、第十一开关管、第十二开关管、第十三开关管、第十四开关管以及第十五开关管；
    所述第六开关管的控制端输入所述恒压高电平，所述第六开关管的输入端输入所述恒压高电平，所述第六开关管的输出端分别与所述第七开关管的输出端、所述第八开关管的控制端以及第十开关管的控制端连接；
    所述第七开关管的控制端分别与所述第一开关管的输出端以及所述第十一开关管的控制端连接，所述第七开关管的输入端与第一恒压低电平连接；
    所述第八开关管的输入端输入所述恒压高电平，所述第八开关管的输出端分别与所述第九开关管的输出端、所述第十四开关管的控制端以及所述第十五开关管的控制端连接；
    所述第九开关管的控制端与所述第一开关管的输出端连接，所述第九开关管的输入端分别与所述第十开关管的输出端以及所述第十一开关管的输出端连接；
    所述第十开关管的输入端输入所述恒压高电平；
    所述第十一开关管的输入端与第二恒压低电平连接；
    所述第十二开关管的控制端与所述第一开关管的输出端连接，所述第十二开关管的输入端输入所述恒压高电平，所述第十二开关管的输出端分别与所述第十三开关管的输出端以及所述第十四开关管的输出端连接；
    所述第十三开关管的控制端与所述第十五开关管的控制端连接，所述第十三开关管的输入端与所述第二恒压低电平连接；
    所述第十四开关管的输入端与所述第一开关管的输出端连接；
    所述第十五开关管的输入端与所述第一恒压低电平连接，所述第十五开关管的输出端与所述上拉模块的第二开关管的输出端连接。
  15. 根据权利要求14所述的扫描驱动电路，其中所述第一恒压低电平大于第二恒压低电平。
  16. 根据权利要求10所述的扫描驱动电路，其中所述自举电容设置在所述第一开关管的输出端以及所述上拉模块的第二开关管的输出端之间。
  17. 根据权利要求10所述的扫描驱动电路，其中所述下拉模块包括第四开关管以及第五开关管，所述第四开关管的控制端输入所述下两级的时钟信号，所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输出端与所述第五开关管的输入端连接，所述第五开关管的控制端输入所述下两级的扫描信号，所述第五开关管的输出端输入所述本级的扫描信号。
  18. 根据权利要求9所述的扫描驱动电路，其中所述下拉维持模块包括两个交替工作的第一下拉维持单元以及第二下拉维持单元。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020513592A (ja) * 2016-12-30 2020-05-14 深▲せん▼市華星光電技術有限公司Ｓｈｅｎｚｈｅｎ Ｃｈｉｎａ Ｓｔａｒ Ｏｐｔｏｅｌｅｃｔｒｏｎｉｃｓ Ｔｅｃｈｎｏｌｏｇｙ Ｃｏ．， Ｌｔｄ． 走査駆動回路、駆動回路及び表示装置

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104409058B (zh) * 2014-11-14 2017-02-22 深圳市华星光电技术有限公司 一种扫描驱动电路
CN104766576B (zh) * 2015-04-07 2017-06-27 深圳市华星光电技术有限公司 基于p型薄膜晶体管的goa电路
CN104851403B (zh) * 2015-06-01 2017-04-05 深圳市华星光电技术有限公司 基于氧化物半导体薄膜晶体管的goa电路
CN104882108B (zh) * 2015-06-08 2017-03-29 深圳市华星光电技术有限公司 基于氧化物半导体薄膜晶体管的goa电路
CN104992682B (zh) * 2015-07-03 2017-10-24 深圳市华星光电技术有限公司 一种扫描驱动电路
US10115362B2 (en) 2015-07-03 2018-10-30 Shenzhen China Star Optoelectronics Technology Co., Ltd. Scan-driving circuit
CN105047160B (zh) * 2015-08-24 2017-09-19 武汉华星光电技术有限公司 一种扫描驱动电路
CN106205458A (zh) * 2016-08-30 2016-12-07 深圳市华星光电技术有限公司 一种goa驱动单元
CN106157916A (zh) * 2016-08-31 2016-11-23 深圳市华星光电技术有限公司 一种栅极驱动单元及驱动电路
CN106251816B (zh) * 2016-08-31 2018-10-12 深圳市华星光电技术有限公司 一种栅极驱动电路及液晶显示装置
CN106128394B (zh) 2016-08-31 2018-06-19 深圳市华星光电技术有限公司 显示电路及具有该显示电路的液晶显示屏
CN106297714B (zh) * 2016-09-29 2018-11-27 深圳市华星光电技术有限公司 扫描驱动电路及显示装置
CN106571123B (zh) * 2016-10-18 2018-05-29 深圳市华星光电技术有限公司 Goa驱动电路及液晶显示装置
CN107134460B (zh) * 2017-04-11 2019-08-02 深圳市华星光电半导体显示技术有限公司 显示装置及其goa电路
CN106898290B (zh) * 2017-04-21 2019-08-02 深圳市华星光电半导体显示技术有限公司 扫描驱动电路
US10699659B2 (en) * 2017-09-27 2020-06-30 Shenzhen China Star Optoelectronics Technology Co. Ltd. Gate driver on array circuit and liquid crystal display with the same
CN109935208B (zh) * 2018-02-14 2021-03-02 京东方科技集团股份有限公司 移位寄存器单元、栅极驱动电路、显示装置以及驱动方法
US10825412B2 (en) * 2018-07-27 2020-11-03 Shenzhen China Star Optoelectronics Technology Co., Ltd. Liquid crystal panel including GOA circuit and driving method thereof
CN111243543B (zh) * 2020-03-05 2021-07-23 苏州华星光电技术有限公司 Goa电路、tft基板、显示装置及电子设备
CN117496894A (zh) 2020-12-26 2024-02-02 京东方科技集团股份有限公司 移位寄存器及其驱动方法、栅极驱动电路、显示装置
CN113628596B (zh) * 2021-07-23 2023-02-24 昆山龙腾光电股份有限公司 栅极驱动单元、栅极驱动电路及显示装置
CN113380178B (zh) * 2021-08-16 2022-01-04 惠科股份有限公司 显示面板的驱动电路和驱动装置
KR20240107488A (ko) * 2022-12-30 2024-07-09 엘지디스플레이 주식회사 게이트 구동 회로 및 이를 포함하는 표시 장치

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050040857A1 (en) * 2003-08-21 2005-02-24 International Business Machines Corporation Methods and arrangements for enhancing domino logic
US20080129348A1 (en) * 2005-04-05 2008-06-05 Uniram Technology Inc. High performance low power multiple-level-switching output drivers
US20120229189A1 (en) * 2011-03-09 2012-09-13 Christian Larsen High speed level shifters and method of operation
CN103928008A (zh) * 2014-04-24 2014-07-16 深圳市华星光电技术有限公司 一种用于液晶显示的goa电路及液晶显示装置
CN104200770A (zh) * 2014-06-23 2014-12-10 友达光电股份有限公司 显示面板

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2003241202A1 (en) 2002-06-10 2003-12-22 Samsung Electronics Co., Ltd. Shift register, liquid crystal display device having the shift register and method of driving scan lines using the same
TWI275051B (en) * 2003-10-16 2007-03-01 Pioneer Corp Organic electroluminescence display panel
US20060158421A1 (en) * 2004-12-20 2006-07-20 Kabushiki Kaisha Toshiba Driver circuit of display device and method of driving the same
KR101543320B1 (ko) * 2008-07-18 2015-08-11 엘지디스플레이 주식회사 액정표시장치의 구동방법
KR101752360B1 (ko) * 2010-10-28 2017-07-12 삼성디스플레이 주식회사 게이트 구동회로 및 이를 구비한 표시 장치
KR101963595B1 (ko) * 2012-01-12 2019-04-01 삼성디스플레이 주식회사 게이트 구동 회로 및 이를 구비한 표시 장치
CN103514840B (zh) * 2012-06-14 2016-12-21 瀚宇彩晶股份有限公司 集成门极驱动电路及液晶面板
TWI511459B (zh) * 2012-10-11 2015-12-01 Au Optronics Corp 可防止漏電之閘極驅動電路
CN103680453B (zh) * 2013-12-20 2015-09-16 深圳市华星光电技术有限公司 阵列基板行驱动电路
CN103956146B (zh) * 2014-04-17 2017-04-12 深圳市华星光电技术有限公司 一种液晶面板驱动电路、液晶显示装置及一种驱动方法
TWI486959B (zh) * 2014-05-05 2015-06-01 Au Optronics Corp 移位暫存器電路
CN104008742B (zh) * 2014-05-20 2016-06-29 深圳市华星光电技术有限公司 一种扫描驱动电路及一种液晶显示装置
CN104078022B (zh) * 2014-07-17 2016-03-09 深圳市华星光电技术有限公司 具有自我补偿功能的栅极驱动电路
CN104157260B (zh) * 2014-09-10 2016-09-28 深圳市华星光电技术有限公司 基于igzo制程的栅极驱动电路

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050040857A1 (en) * 2003-08-21 2005-02-24 International Business Machines Corporation Methods and arrangements for enhancing domino logic
US20080129348A1 (en) * 2005-04-05 2008-06-05 Uniram Technology Inc. High performance low power multiple-level-switching output drivers
US20120229189A1 (en) * 2011-03-09 2012-09-13 Christian Larsen High speed level shifters and method of operation
CN103928008A (zh) * 2014-04-24 2014-07-16 深圳市华星光电技术有限公司 一种用于液晶显示的goa电路及液晶显示装置
CN104200770A (zh) * 2014-06-23 2014-12-10 友达光电股份有限公司 显示面板

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020513592A (ja) * 2016-12-30 2020-05-14 深▲せん▼市華星光電技術有限公司Ｓｈｅｎｚｈｅｎ Ｃｈｉｎａ Ｓｔａｒ Ｏｐｔｏｅｌｅｃｔｒｏｎｉｃｓ Ｔｅｃｈｎｏｌｏｇｙ Ｃｏ．， Ｌｔｄ． 走査駆動回路、駆動回路及び表示装置

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