WO2016072326A1 - Élément électroluminescent à semi-conducteur - Google Patents

Élément électroluminescent à semi-conducteur Download PDF

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Publication number
WO2016072326A1
WO2016072326A1 PCT/JP2015/080347 JP2015080347W WO2016072326A1 WO 2016072326 A1 WO2016072326 A1 WO 2016072326A1 JP 2015080347 W JP2015080347 W JP 2015080347W WO 2016072326 A1 WO2016072326 A1 WO 2016072326A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor layer
region
electrode
light
type semiconductor
Prior art date
Application number
PCT/JP2015/080347
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English (en)
Japanese (ja)
Inventor
紗織 南部
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ウシオ電機株式会社
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Application filed by ウシオ電機株式会社 filed Critical ウシオ電機株式会社
Publication of WO2016072326A1 publication Critical patent/WO2016072326A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor

Definitions

  • a low-temperature buffer layer made of GaN is formed on the surface of the growth substrate, and an underlayer made of GaN is further formed thereon.
  • An example of a specific procedure is as follows.
  • the furnace pressure of the MOCVD apparatus is set to 100 kPa, and the furnace temperature is set to 830 ° C. Then, while flowing nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 1 slm as a carrier gas in the processing furnace, TMG having a flow rate of 10 ⁇ mol / min, trimethylindium (TMI) having a flow rate of 12 ⁇ mol / min, and A step of supplying ammonia at a flow rate of 300,000 ⁇ mol / min into the processing furnace for 48 seconds is performed.
  • the supply of TMA is stopped, the flow rate of Cp 2 Mg is changed to 0.2 ⁇ mol / min, and the source gas is supplied for 20 seconds, whereby the thickness is about 5 nm and the p-type impurity concentration is 1 ⁇ .
  • a p-type contact layer of about 10 20 / cm 3 may be formed.
  • the p-type semiconductor layer 31 includes this p-type contact layer.
  • FIG. 6A is a graph comparing the light extraction efficiency of the element of Reference Example 1 (see FIG. 4A) and the element of Reference Example 2 (see FIG. 4B), and FIG. 6B shows the element of Example 1 (see FIG. 1).
  • 4 is a graph comparing the light extraction efficiency of the device of Example 2 (see FIG. 2).
  • the element of Reference Example 2 in which the uneven shape 38 is provided on the upper surface of the n-type semiconductor layer 35 in the first region 41 has Reference Example 1 in which the upper surface of the n-type semiconductor layer 35 does not have unevenness. It is confirmed that the light extraction efficiency is improved as compared with the above element.
  • the graph of FIG. 6A the element of Reference Example 2 in which the uneven shape 38 is provided on the upper surface of the n-type semiconductor layer 35 in the first region 41 has Reference Example 1 in which the upper surface of the n-type semiconductor layer 35 does not have unevenness. It is confirmed that the light extraction efficiency is improved as compared with the above element.
  • FIG. 6C is a graph comparing the light extraction efficiency of the element of Reference Example 2 (see FIG. 4B) and the element of Reference Example 3 (see FIG. 4C), and FIG. 6D is the element of Example 2 (see FIG. 2). It is the graph which contrasted the light extraction efficiency of the element (refer FIG. 3) of Example 3.
  • FIG. According to the graph of FIG. 6C, the element of Reference Example 3 in which the uneven shape 39 is provided on the upper surface of the n-type semiconductor layer 35 in the second region 42 in addition to the uneven shape 38 is the n-type semiconductor in the first region 41.
  • the light extraction efficiency is lower than that of the element of Reference Example 2 in which the uneven shape 38 is provided on the upper surface of the layer 35 and the uneven shape 39 is not provided on the upper surface of the n-type semiconductor layer 35 in the second region 42.
  • the third embodiment is more than the second embodiment.
  • the light extraction efficiency is greatly improved.
  • the insulating layer 22 can also function as an etching stopper layer at the time of element isolation according to step S7.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

L'invention a pour but de fabriquer un élément électroluminescent à semi-conducteur dans lequel le flux lumineux est amélioré encore davantage par comparaison avec des éléments électroluminescents à semi-conducteur classiques. Pour atteindre ce but, l'invention porte sur un élément électroluminescent à semi-conducteur qui possède : une couche semi-conductrice comprenant une couche semi-conductrice du type n, une couche semi-conductrice du type p et une couche active disposée entre la couche semi-conductrice du type n et la couche semi-conductrice du type p ; une première électrode formée de manière à être contact avec une première surface de la couche semi-conductrice ; une seconde électrode formée de manière à être en contact avec une seconde surface, située à l'opposé de la première surface, de la couche semi-conductrice. La couche semi-conductrice présente, du côté de la première surface, une première région et une seconde région située à une hauteur supérieure à celle de la première région. La première électrode est formée dans la seconde région de la couche semi-conductrice et comporte un matériau présentant une forte réflectivité de la lumière émise par la couche active.
PCT/JP2015/080347 2014-11-05 2015-10-28 Élément électroluminescent à semi-conducteur WO2016072326A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014225367A JP2016092235A (ja) 2014-11-05 2014-11-05 半導体発光素子
JP2014-225367 2014-11-05

Publications (1)

Publication Number Publication Date
WO2016072326A1 true WO2016072326A1 (fr) 2016-05-12

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JP (1) JP2016092235A (fr)
TW (1) TW201631796A (fr)
WO (1) WO2016072326A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11894307B2 (en) 2018-04-05 2024-02-06 Suzhou Lekin Semiconductor Co., Ltd. Semiconductor device package
KR102471684B1 (ko) * 2018-04-05 2022-11-28 쑤저우 레킨 세미컨덕터 컴퍼니 리미티드 반도체 소자 패키지

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007103689A (ja) * 2005-10-05 2007-04-19 Matsushita Electric Ind Co Ltd 半導体発光装置
JP2010153792A (ja) * 2008-11-20 2010-07-08 Stanley Electric Co Ltd 光半導体装置の製造方法
JP2010541218A (ja) * 2007-09-28 2010-12-24 オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング ミラー層を有する薄膜ｌｅｄおよびその製造方法
JP2011228696A (ja) * 2010-04-15 2011-11-10 Lg Innotek Co Ltd 発光素子、発光素子パッケージ
JP2012033695A (ja) * 2010-07-30 2012-02-16 Stanley Electric Co Ltd 半導体発光装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007103689A (ja) * 2005-10-05 2007-04-19 Matsushita Electric Ind Co Ltd 半導体発光装置
JP2010541218A (ja) * 2007-09-28 2010-12-24 オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング ミラー層を有する薄膜ｌｅｄおよびその製造方法
JP2010153792A (ja) * 2008-11-20 2010-07-08 Stanley Electric Co Ltd 光半導体装置の製造方法
JP2011228696A (ja) * 2010-04-15 2011-11-10 Lg Innotek Co Ltd 発光素子、発光素子パッケージ
JP2012033695A (ja) * 2010-07-30 2012-02-16 Stanley Electric Co Ltd 半導体発光装置

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TW201631796A (zh) 2016-09-01
JP2016092235A (ja) 2016-05-23

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