WO2016072326A1

WO2016072326A1 - Semiconductor light-emitting element

Info

Publication number: WO2016072326A1
Application number: PCT/JP2015/080347
Authority: WO
Inventors: 紗織南部
Original assignee: ウシオ電機株式会社
Priority date: 2014-11-05
Filing date: 2015-10-28
Publication date: 2016-05-12
Also published as: JP2016092235A; TW201631796A

Abstract

To realize a semiconductor light-emitting element in which light output is further improved in comparison to conventional semiconductor light-emitting elements. A semiconductor light-emitting element, having: a semiconductor layer including an n-type semiconductor layer, a p-type semiconductor layer, and an active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer; a first electrode formed so as to be contact with a first surface of the semiconductor layer; and a second electrode formed so as to be in contact with a second surface on the opposite side from the first surface, of the semiconductor layer. The semiconductor layer has, on the first surface side, a first region and a second region located at a greater height position than that of the first region. The first electrode is formed in the second region of the semiconductor layer, and comprises a material exhibiting a high reflectivity with respect to light emitted from the active layer.

Description

Semiconductor light emitting device

The present invention relates to a semiconductor light emitting device configured to include an n-type semiconductor layer, a p-type semiconductor layer, and an active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer.

FIG. 8 is a cross-sectional view schematically showing the structure of a conventional semiconductor light emitting device (see, for example,

Patent Documents

1 and 2 below). A conventional semiconductor light emitting device 90 includes a conductive layer 92, a reflective electrode 93, a semiconductor layer 94, and an n-side electrode 98 on the upper surface of a substrate 91. The semiconductor layer 94 is formed by stacking a p-type semiconductor layer 95, an active layer 96, and an n-type semiconductor layer 97 in this order from the substrate 91 side. In the semiconductor light emitting device 90 shown in FIG. 8, the surface on the n-type semiconductor layer 97 side corresponds to the light extraction surface.

The reflective electrode 93 is made of a metal material and functions as an electrode (p-side electrode) by realizing ohmic contact between the p-type semiconductor layers 95. The reflective electrode 93 reflects the light emitted in the direction toward the substrate 91 (downward in the drawing) out of the light emitted from the active layer 96 and extracts it to the n-side semiconductor layer 97 side (upward in the drawing). It also serves to increase the extraction efficiency.

JP 2006-191068 A Japanese Patent No. 4161689

In recent years, further miniaturization and higher brightness have been demanded for semiconductor light emitting devices. An object of the present invention is to realize a semiconductor light emitting device having a light output further improved as compared with a conventional semiconductor light emitting device.

The semiconductor light emitting device of the present invention includes an n-type semiconductor layer, a p-type semiconductor layer, and a semiconductor layer including an active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer;
Of the surfaces of the semiconductor layer, a first electrode formed in contact with the first surface;
Of the surface of the semiconductor layer, having a second electrode formed in contact with the second surface opposite to the first surface,
The semiconductor layer has, on the first surface side, a first region and a second region having a height position higher than the first region,
The first electrode is formed in the second region of the semiconductor layer, and is made of a material exhibiting a high reflectance with respect to light emitted from the active layer.

According to the above configuration, the first electrode is made of a material that exhibits high reflectivity with respect to light emitted from the active layer. Thereby, since most of the light emitted from the active layer toward the first electrode can be reflected by the first electrode, the ratio of the light absorbed by the first electrode is greatly reduced. And since this 1st electrode is formed in the 2nd area | region where a height position is high among the 1st surface sides of a semiconductor layer, a part of light reflected with the 1st electrode is the 1st surface of a semiconductor layer. It is taken out to the outside through a side surface (for example, a slope) located at the boundary between the one region and the second region. As a result, the light extraction amount is greatly improved as compared with the conventional configuration.

Conventionally, Au or an alloy containing Au has been used exclusively as a material for an electrode formed on the light extraction surface side. This is considered that the above-mentioned material was selected from the viewpoint of ease of work in view of the fact that the material used as the bonding wire is Au when performing wire bonding to this electrode.

Since this electrode does not occupy a large area on the light extraction surface of the semiconductor light emitting device, conventionally, even if the electrode is made of Au, the amount of light absorbed by the electrode is not considered as a problem. It was. However, in recent years when small light-emitting elements exhibiting high luminance have been required, how to achieve high light extraction efficiency has become a problem.

The present inventor has not only made the electrode formed on the light extraction surface side with a highly reflective material by earnest research, but also made the height position of the light extraction surface different by providing a step with respect to the semiconductor layer. In other words, the present inventors have found that the light extraction efficiency is greatly improved as compared with the conventional art by disposing this electrode (first electrode) in a region having a high height (that is, in the second region).

Here, the material exhibiting high reflectance is preferably a material in which the ratio of the reflected light amount to the incident light amount is 50% or more, more preferably 60% or more, and 70% or more. More preferably, it is a material. The reflectance with respect to light having a wavelength of 365 nm is 35% of Au that is conventionally used as a material for the first electrode. On the other hand, the reflectance for light of the same wavelength is 90% for Al, 75% for Rh, and 75% for Ag. When the semiconductor light emitting element emits light having a wavelength of 350 nm or more and 550 nm or less, the first electrode can be made of Al, Rh, Ag, or a material containing these.

Furthermore, in addition to the above-described configuration, the semiconductor layer has a concavo-convex shape on the surface in at least one of the first region and the second region on the first surface side. It does n’t matter.

As described above, by forming the concavo-convex shape on the first surface side of the semiconductor layer, the light extraction amount can be greatly improved in combination with the first electrode made of a highly reflective material.

In the above configuration, the semiconductor layer may have a concavo-convex shape on the surface in both the first region and the second region on the first surface side.

According to the earnest study of the present inventors, it has been found that such a configuration can further enhance the effect of improving the light extraction amount.

By forming irregularities on the surface of the semiconductor layer in the second region, the light emitted from the active layer toward the first electrode is extracted outside without being reflected by the surface on the first surface side of the semiconductor layer. The proportion of light that can be increased. This is presumably because the amount of light incident at an angle greater than the critical angle with respect to the surface of the semiconductor layer was significantly reduced by forming irregularities on the surface of the semiconductor layer.

In addition to this, the amount of light extraction can be further increased by forming irregularities in the first region. The reason for this is not clear, but by forming irregularities on the surface of the semiconductor layer in the first region, a part of the light reflected by the first electrode can be reflected between the first region and the second region of the semiconductor layer. After traveling toward the first region through the side surface (slope) composed of the boundary portion, the amount of light that can be extracted outside is improved as a result of being scattered by the unevenness formed in the first region. Inferred.

In addition, as will be described later in the section “Mode for Carrying Out the Invention”, when the first electrode is made of conventional Au, the surface of both the first region and the second region of the semiconductor layer is uneven. It has been found that the amount of light extraction can be reduced as compared with the case where irregularities are formed only on the surface in the first region. This is because unevenness is formed on the surface of the semiconductor layer located at the bottom of the first electrode (that is, the surface of the semiconductor layer in the second region), so that light incident on the first electrode within the critical angle is formed. As a result of the increase in the amount, it is considered that the amount of light absorbed by the first electrode made of Au has increased. In other words, as in the present invention, the effect of improving the light extraction amount by forming irregularities in both the first region and the second region of the semiconductor layer is realized by configuring the first electrode with a highly reflective material. It is what is done.

In the above configuration,
The semiconductor layer is composed of a nitride semiconductor layer,
The first electrode may be made of a material containing Al, Rh, Ag, or an alloy thereof.

Further, the second electrode may be made of a material exhibiting a high reflectance with respect to light emitted from the active layer.

According to the present invention, it is possible to realize a semiconductor light emitting device having a significantly improved light extraction amount as compared with conventional devices.

It is sectional drawing which shows typically the structure of the semiconductor light-emitting device (Example 1) of 1st embodiment of this invention. It is sectional drawing which shows typically the structure of the semiconductor light-emitting device (Example 2) of 2nd embodiment of this invention. It is sectional drawing which shows typically the structure of the semiconductor light-emitting device (Example 3) of 3rd embodiment of this invention. It is sectional drawing which shows the structure of the semiconductor light-emitting device of the reference example 1 typically. It is sectional drawing which shows typically the structure of the semiconductor light-emitting device of the reference example 2. It is sectional drawing which shows typically the structure of the semiconductor light-emitting device of the reference example 3. 6 is a graph comparing the relationship between injection current and light output in each light emitting device of Example 1, Example 3, Comparative Example 1, and Reference Example 1. 4 is a graph comparing the light extraction efficiency of the element of Reference Example 1 and the element of Reference Example 2. 3 is a graph comparing the light extraction efficiency of the element of Example 1 and the element of Example 2. FIG. 10 is a graph comparing the light extraction efficiency of the element of Reference Example 2 and the element of Reference Example 3. 6 is a graph comparing the light extraction efficiency of the element of Example 2 and the element of Example 3. FIG. 4 is a graph comparing the light extraction efficiency of the element of Reference Example 2 and the element of Example 2. 10 is a graph comparing the light extraction efficiency of the element of Reference Example 3 and the element of Example 3. It is sectional drawing which shows typically the structure of the semiconductor light-emitting device of another embodiment of this invention. It is sectional drawing which shows typically the structure of the conventional semiconductor light-emitting device (comparative example 1).

The semiconductor light emitting device of the present invention will be described with reference to the drawings. In each figure, the dimensional ratio in the drawing does not necessarily match the actual dimensional ratio. Further, in the following, the expression AlGaN is described by omitting the composition ratio of Al and Ga, and does not indicate that the composition ratio is 1: 1. The same applies to InGaN and the like.

[First embodiment]
FIG. 1 is a cross-sectional view schematically showing the structure of the semiconductor light emitting device according to the first embodiment of the present invention.

<Construction>
The semiconductor light emitting device 1 includes a substrate 11, a conductive layer 20, a reflective electrode 21, a semiconductor layer 30, and an electrode 36. The semiconductor layer 30 is configured by stacking a p-type semiconductor layer 31, an active layer 33, and an n-type semiconductor layer 35 in this order from the substrate 11 side.

(Substrate 11)
The substrate 11 is made of a conductive substrate such as CuW, W, or Mo, or a semiconductor substrate such as Si.

(Conductive layer 20)
A conductive layer 20 is formed on the upper layer of the substrate 11. As an example, the conductive layer 20 includes a solder layer made of Au—Sn, Au—In, Au—Cu—Sn, Cu—Sn, Pd—Sn, or Sn, and a Pt-based metal (Ti and Pt). Alloy), a solder diffusion prevention layer made of W, Mo, or the like.

(Reflective electrode 21)
The reflective electrode 21 is made of, for example, Ag (including an Ag alloy), Al, Rh, or the like. It is assumed that the semiconductor light emitting element 1 takes out the light emitted from the active layer 33 in the upward direction on the paper of FIG. 1, and the reflective electrode 21 causes the light emitted from the active layer 33 downward on the paper to face upward. It has the function of reflecting and fulfills the function of increasing the light extraction efficiency. The reflective electrode 21 corresponds to a “second electrode”.

The reflective electrode 21 is in contact with one surface of the semiconductor layer 30 (the surface on the substrate 11 side and corresponding to the “second surface”), and when a voltage is applied between the substrate 11 and the electrode 36. A current path that flows to the electrode 36 through the substrate 11, the conductive layer 20, the reflective electrode 21, and the semiconductor layer 30 is formed.

(Semiconductor layer 30)
As described above, the semiconductor layer 30 is configured by stacking the p-type semiconductor layer 31, the active layer 33, and the n-type semiconductor layer 35 in this order from the substrate 11 side.

The p-type semiconductor layer 31 is made of, for example, GaN or AlGaN, and doped with p-type impurities such as Mg, Be, Zn, and C. Note that the p-type semiconductor layer 31 may include a p-type contact layer doped with a high concentration of p-type impurities on the side close to the reflective electrode 21.

The active layer 33 is formed of a semiconductor layer having a structure in which, for example, a light emitting layer made of InGaN and a barrier layer made of AlGaN are repeated. These layers may be undoped or p-type or n-type doped.

The n-type semiconductor layer 35 is made of, for example, AlGaN and doped with n-type impurities such as Si, Ge, S, Se, Sn, and Te.

As shown in FIG. 1, the semiconductor layer 30 has regions with different heights on the surface opposite to the substrate 11 (corresponding to the “first surface”). That is, the semiconductor layer 30 includes a first region 41 having a low height and a second region 42 having a height higher than that of the first region 41 on the first surface side.

More specifically, the n-type semiconductor layer 35 is configured to be thicker in the second region 42 than in the first region 41. Thereby, the height position of the semiconductor layer 30 is higher in the second region 42 than in the first region 41.

(Electrode 36)
The electrode 36 is formed on the upper surface of the n-type semiconductor layer 35 and in the second region 42 having a high height. The electrode 36 is made of a material that exhibits a reflectance of 50% or more with respect to light emitted from the active layer 33. Here, the electrode 36 is more preferably made of a material having a reflectance of 60% or more with respect to light emitted from the active layer 33, and is made of a material having a reflectance of 70% or more. Is more preferable.

In the present embodiment, a case where the wavelength of light emitted from the active layer 33 is 350 nm or more and 550 nm or less will be described. At this time, the electrode 36 can be made of Al, Rh, Ag, or a material containing these. The electrode 36 corresponds to a “first electrode”.

According to the above configuration, the point that the light output can be improved as compared with the conventional semiconductor light emitting device 90 shown in FIG. 8 will be described later with reference to an example.

<Production method>
Hereinafter, an example of a method for manufacturing the semiconductor light emitting device 1 shown in FIG. 1 will be described. This manufacturing method is merely an example, and the gas flow rate, the furnace temperature, the furnace pressure, and the like may be appropriately adjusted.

(Step S1)
First, the semiconductor layer 30 is epitaxially grown on a growth substrate composed of a sapphire substrate or the like. This step S1 is performed by the following procedure, for example.

First, the growth substrate is cleaned. More specifically, for this cleaning, for example, a c-plane sapphire substrate as a growth substrate is disposed in a processing furnace of an MOCVD (Metal Organic Chemical Vapor Deposition) apparatus, and the flow rate is increased in the processing furnace. This is done by raising the furnace temperature to 1150 ° C. while flowing 10 slm of hydrogen gas.

Next, a low-temperature buffer layer made of GaN is formed on the surface of the growth substrate, and an underlayer made of GaN is further formed thereon. An example of a specific procedure is as follows.

First, the furnace pressure of the МОCVD apparatus is set to 100 kPa, and the furnace temperature is set to 480 ° C. Then, while flowing nitrogen gas and hydrogen gas with a flow rate of 5 slm respectively as carrier gas into the processing furnace, trimethylgallium (TMG) with a flow rate of 50 μmol / min and ammonia with a flow rate of 250,000 μmol / min are used as the raw material gas in the processing furnace. For 68 seconds. Thereby, a low-temperature buffer layer made of GaN having a thickness of 20 nm is formed on the surface of the growth substrate.

Next, the furnace temperature of the MOCVD apparatus is raised to 1150 ° C. Then, while flowing nitrogen gas having a flow rate of 20 slm and hydrogen gas having a flow rate of 15 slm as a carrier gas in the processing furnace, TMG having a flow rate of 100 μmol / min and ammonia having a flow rate of 250,000 μmol / min are introduced into the processing furnace as source gases. Feed for 30 minutes. As a result, a base layer made of GaN having a thickness of 1.7 μm is formed on the surface of the low-temperature buffer layer.

Next, an n-type semiconductor layer 35 is formed on the underlayer. An example of a specific procedure is as follows.

First, with the furnace temperature kept at 1150 ° C., the furnace pressure of the MOCVD apparatus is set to 30 kPa. Then, while flowing nitrogen gas having a flow rate of 20 slm and hydrogen gas having a flow rate of 15 slm as a carrier gas into the processing furnace, TMG having a flow rate of 94 μmol / min, trimethylaluminum (TMA) having a flow rate of 6 μmol / min, Ammonia with a flow rate of 250,000 μmol / min and tetraethylsilane with a flow rate of 0.025 μmol / min are supplied into the treatment furnace for 60 minutes. Thus, Al _0.06 Ga _0.94 N having a Si concentration of 3 × 10 ¹⁹ / cm ³ and a thickness of 2 μm is formed.

After that, the supply of TMA is stopped, and another source gas is supplied for 6 seconds, thereby forming a protective layer made of n-type GaN having a thickness of 5 nm on the AlGaN layer. In this case, the n-type semiconductor layer 35 is composed of the AlGaN layer and the GaN layer.

In the above method, the case where Si is used as the n-type impurity contained in the n-type semiconductor layer 35 has been described. However, Ge, S, Se, Sn, or Te can be used as the n-type impurity in addition to Si. What is necessary is just to select raw material gas suitably according to the kind of dopant.

Next, an active layer 33 is formed on the n-type semiconductor layer 35. An example of a specific procedure is as follows.

First, the furnace pressure of the MOCVD apparatus is set to 100 kPa, and the furnace temperature is set to 830 ° C. Then, while flowing nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 1 slm as a carrier gas in the processing furnace, TMG having a flow rate of 10 μmol / min, trimethylindium (TMI) having a flow rate of 12 μmol / min, and A step of supplying ammonia at a flow rate of 300,000 μmol / min into the processing furnace for 48 seconds is performed. Thereafter, TMG having a flow rate of 10 μmol / min, TMA having a flow rate of 1.6 μmol / min, tetraethylsilane having a flow rate of 0.002 μmol / min, and ammonia having a flow rate of 300,000 μmol / min are supplied into the processing furnace for 120 seconds. Hereinafter, by repeating these two steps, the active layer 33 having a 15-cycle multiple quantum well structure composed of a light-emitting layer made of InGaN having a thickness of 2 nm and a barrier layer made of n-type AlGaN having a thickness of 7 nm is formed into an n-type. It is formed in the upper layer of the semiconductor layer 35.

Next, the p-type semiconductor layer 31 is formed on the active layer 33. An example of a specific procedure is as follows.

Subsequently, the furnace pressure of the MOCVD apparatus is maintained at 100 kPa, and the furnace temperature is raised to 1025 ° C. while nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 25 slm are allowed to flow into the processing furnace. Thereafter, as source gases, TMG with a flow rate of 35 μmol / min, TMA with a flow rate of 20 μmol / min, ammonia with a flow rate of 250,000 μmol / min, and biscyclopentadiene with a flow rate of 0.1 μmol / min for doping p-type impurities. Enilmagnesium (Cp ₂ Mg) is fed into the processing furnace for 60 seconds. Thus, a hole supply layer having a composition of Al _0.3 Ga _0.7 N having a thickness of 20 nm is formed on the surface of the active layer 33. Thereafter, by changing the flow rate of TMA to 4 μmol / min and supplying the source gas for 360 seconds, a hole supply layer having a composition of Al _0.13 Ga _0.87 N having a thickness of 120 nm is formed. By these hole supply layers, a p-type semiconductor layer 31 having an Mg concentration of about 3 × 10 ¹⁹ / cm ³ is formed.

After that, the supply of TMA is stopped, the flow rate of Cp ₂ Mg is changed to 0.2 μmol / min, and the source gas is supplied for 20 seconds, whereby the thickness is about 5 nm and the p-type impurity concentration is 1 ×. A p-type contact layer of about 10 ²⁰ / cm ³ may be formed. In this case, the p-type semiconductor layer 31 includes this p-type contact layer.

In the above method, the case where Mg is used as the p-type impurity contained in the p-type semiconductor layer 31 has been described. However, Be, Zn, C, or the like can be used as the p-type impurity in addition to Mg. What is necessary is just to select raw material gas suitably according to the kind of dopant.

(Step S2)
An activation process is performed on the wafer formed through step S1. More specifically, activation is performed at 650 ° C. for 15 minutes in a nitrogen atmosphere using an RTA (Rapid Thermal Anneal) device.

(Step S3)
The reflective electrode 21 is formed so as to cover the upper surface of the p-type semiconductor layer 31. Further, the conductive layer 20 is formed on the upper surface of the reflective electrode 21. An example of a specific procedure is as follows.

First, a reflective electrode 21 is formed by depositing Ni with a thickness of 0.7 nm and Ag with a thickness of 120 nm on the entire surface so as to cover the upper surface of the p-type semiconductor layer 31 with a sputtering apparatus. Next, contact annealing is performed at 400 ° C. for 2 minutes in a dry air or inert gas atmosphere using an RTA apparatus.

Next, a solder diffusion prevention layer is formed by depositing 100 nm of Ti and 200 nm of Pt on the upper surface of the reflective electrode 21 by an electron beam evaporation apparatus (EB apparatus) for three periods. After that, Ti having a thickness of 10 nm is deposited on the upper surface of the solder diffusion preventing layer, and then Au—Sn solder composed of Au 80% Sn 20% is deposited to a thickness of 3 μm to form a solder layer. The conductive layer 20 is constituted by the solder diffusion preventing layer and the solder layer.

(Step S4)
A solder diffusion prevention layer is formed on the substrate 11 prepared separately from the growth substrate by the same method as described in step S3. As the substrate 11, as described above, a conductive substrate such as CuW, W, or Mo, or a semiconductor substrate such as Si can be used.

(Step S5)
The growth substrate and the substrate 11 are bonded together. As an example, the upper surface (solder layer) of the conductive layer formed on the growth substrate and the solder diffusion prevention layer formed on the upper layer of the substrate 11 are bonded together at a temperature of 280 ° C. and a pressure of 0.2 MPa. .

In the substrate 11, a solder layer may be formed on the solder diffusion prevention layer, and the solder layer on the substrate 11 and the solder layer on the growth substrate may be bonded together.

(Step S6)
The growth substrate is peeled off from the wafer. An example of a specific procedure is as follows.

With the growth substrate facing up and the substrate 11 facing down, the interface between the growth substrate and the semiconductor layer 30 is decomposed by irradiating a KrF excimer laser from the growth substrate side. The sapphire constituting the growth substrate passes through the laser, while the underlying GaN absorbs the laser, so that the interface is heated to decompose GaN. As a result, the growth substrate is peeled off.

Thereafter, GaN remaining on the wafer is removed by wet etching using hydrochloric acid or the like, or dry etching using an ICP apparatus, and the n-type semiconductor layer 35 is exposed.

(Step S7)
Adjacent elements are separated as necessary. Specifically, the semiconductor layer 30 is etched with respect to a boundary region with an adjacent element using an ICP apparatus.

(Step S8)
With the n-type semiconductor layer 35 in the second region 42 masked, the n-type semiconductor layer 35 exposed, that is, the n-type semiconductor layer 35 in the first region 41 has a predetermined thickness using an ICP device. Only etch. As a result, the n-type semiconductor layer 35 is thin in the first region 41 and thick in the second region 42. As an example, the difference in thickness between the n-type semiconductor layer 35 in the first region 41 and the n-type semiconductor layer 35 in the second region 42 can be about 0.7 μm.

(Step S9)
The first electrode 36 is formed on the upper surface of the upper surface of the n-type semiconductor layer 35 in the second region 42 having a high height. More specifically, an electrode made of Ni having a thickness of 3 nm, Al having a thickness of 12 nm, Ti having a thickness of 30 nm, and Au having a thickness of 3 μm is formed.

As a subsequent process, the exposed side surfaces of the element are covered with an insulating layer as necessary. More specifically, an SiO ₂ film is formed by an EB apparatus. An SiN film may be formed. Then, the elements are separated from each other by, for example, a laser dicing apparatus, the back surface of the substrate 11 is joined to the package by, for example, Ag paste, and wire bonding is performed on the electrode 36.

[Second Embodiment]
FIG. 2 is a cross-sectional view schematically showing the structure of the semiconductor light emitting device according to the second embodiment of the present invention. In addition, the same code | symbol is attached | subjected about the same component as 1st embodiment, and detailed description is abbreviate | omitted.

In the semiconductor light emitting device 1 shown in FIG. 2, compared to the configuration of the first embodiment, a fine uneven shape 38 is formed on the surface of the n-type semiconductor layer 35 located in the first region 41. The only difference is that The height of the uneven shape 38 can be set to 0.2 to 0.5 μm as an example. With this configuration, the fact that the light output can be improved as compared with the conventional semiconductor light emitting device 90 shown in FIG. 8 will be described later with reference to an example.

The semiconductor light emitting device 1 of the present embodiment can be manufactured by the following procedure. First, steps S1 to S8 are executed by the same method as in the first embodiment. Thereafter, with the n-type semiconductor layer 35 in the second region 42 masked, an alkaline solution such as KOH is immersed in the exposed n-type semiconductor layer 35 in the first region 41. As a result, the irregular shape 38 is formed on the upper surface of the n-type semiconductor layer 35 only in the first region 41. Then, the process after step S9 is performed by the method similar to 1st embodiment.

[Third embodiment]
FIG. 3 is a cross-sectional view schematically showing the structure of the semiconductor light emitting device according to the third embodiment of the present invention. In addition, the same code | symbol is attached | subjected about the same component as 1st embodiment, and detailed description is abbreviate | omitted.

3 is different from the configuration of the second embodiment in that the semiconductor light emitting element 1 has a fine uneven shape 39 in the second region 42 as well. The concavo-convex shape 39 can be set to 0.2 to 0.5 μm as an example, similarly to the concavo-convex shape 38 in the first region 41. With this configuration, the fact that the light output can be improved as compared with the conventional semiconductor light emitting device 90 shown in FIG. 8 will be described later with reference to an example.

The semiconductor light emitting device 1 of the present embodiment can be manufactured by the same method as the semiconductor light emitting device 1 of the second embodiment. That is, after executing Steps S1 to S8, an alkaline solution such as KOH is immersed in the entire upper surface of the n-type semiconductor layer 35. As a result, uneven shapes (38, 39) are formed on both the upper surface of the n-type semiconductor layer 35 in the first region 41 and the upper surface of the n-type semiconductor layer 35 in the second region 42. Then, the process after step S9 is performed by the method similar to 1st embodiment.

Compared with the semiconductor light emitting device 1 of the second embodiment in which the concavo-convex shape 38 is formed only on the upper surface of the n type semiconductor layer 35 in the first region 41, the semiconductor light emitting device 1 of the third embodiment has the n-type semiconductor layer 35. Since the concavo-convex shape (38, 39) may be formed on the entire upper surface or almost the entire upper surface, the steps for forming the concavo-convex can be simplified.

[Verification]
Hereinafter, the point that the light output is improved by the semiconductor light emitting device 1 of each of the above-described embodiments as compared with the conventional semiconductor light emitting device 90 will be described.

(Example)
The semiconductor light emitting device 1 of the first embodiment (see FIG. 1) is taken as Example 1, the semiconductor light emitting device 1 of the second embodiment (see FIG. 2) is taken as Example 2, and the semiconductor light emitting device 1 of the third embodiment ( Example 3) (see FIG. 3).

(Comparative example, reference example)
The semiconductor light emitting device 90 shown in FIG.

The semiconductor light-emitting element provided with the conventional electrode 98 which consists of Au instead of the electrode 36 with respect to the element of Example 1 was made into the reference example 1 (refer FIG. 4A). In contrast to the element of Example 2, a semiconductor light-emitting element including a conventional electrode 98 made of Au instead of the electrode 36 was used as Reference Example 2 (see FIG. 4B). A semiconductor light-emitting element including a conventional electrode 98 made of Au in place of the electrode 36 with respect to the element of Example 3 was referred to as Reference Example 3 (see FIG. 4C).

(Verification 1)
Each element of Example 1, Example 3, Comparative Example 1, and Reference Example 1 was manufactured based on the above method, and the relationship between injection current and light output was compared. The result is shown in FIG.

In each element, the dimension of the surface parallel to the substrate (11, 91) of the n-type semiconductor layer (35, 97) is 50 μm, and parallel to the substrate (11, 91) of the electrode (36, 98). The dimensions of all the surfaces are 20 μm, and the height of the electrodes (36, 98) is 3.2 μm. In each element of Example 1, Example 3, and Reference Example 1, the difference in thickness of the n-type semiconductor layer 35 in the first region 41 and the second region 42 is 0.7 μm. The height of the concavo-convex shape (38, 39) in this element is 0.2 to 0.5 μm.

According to FIG. 5, the light output at the same current injection was improved in the order of Comparative Example 1, Reference Example 1, Example 1, and Example 3. Specifically, at the time of 1A injection, the light output of the element of Example 1 is improved by 2% over the light output of the element of Reference Example 1, and the light output of the element of Example 3 is the light output of the element of Example 1. The output was further improved by 6%.

(Verification 2)
Information on the physical properties of each layer, the film thickness of each layer, the element conditions such as the height of the electrodes (36, 98), and information on a plurality of light source positions in the active layer 33. Of the light emitted at each light source position, The proportion of light extracted outside was calculated by the FDTD method. The elements of Examples 1 to 3, Reference Examples 1 to 3, and Comparative Example 1 have the same materials and dimensions other than the different parts described above.

More specifically, seven light sources (2A, 2B, 2C, 2D2E, 2F, and 2G) arranged at equal intervals were defined. In each element of Examples 1 to 3 and Reference Examples 1 to 3, the

light sources

2A, 2B, and 2C are located in the second region 42, and the

light sources

2E, 2F, and 2G are located in the first region 41, The light source 2 </ b> D is located immediately below the boundary between the first region 41 and the second region 42 and where the side surface (slope) of the n-type semiconductor layer 35 is exposed. In addition, each light source (2A to 2G) of the element of Comparative Example 1 was set at a position corresponding to each light source (2A to 2G) of the element of Example 1.

6A is a graph comparing the light extraction efficiency of the element of Reference Example 1 (see FIG. 4A) and the element of Reference Example 2 (see FIG. 4B), and FIG. 6B shows the element of Example 1 (see FIG. 1). 4 is a graph comparing the light extraction efficiency of the device of Example 2 (see FIG. 2). According to the graph of FIG. 6A, the element of Reference Example 2 in which the uneven shape 38 is provided on the upper surface of the n-type semiconductor layer 35 in the first region 41 has Reference Example 1 in which the upper surface of the n-type semiconductor layer 35 does not have unevenness. It is confirmed that the light extraction efficiency is improved as compared with the above element. Similarly, according to the graph of FIG. 6B, the element of Example 2 in which the uneven shape 38 is provided on the upper surface of the n-type semiconductor layer 35 in the first region 41 does not have unevenness on the upper surface of the n-type semiconductor layer 35. It is confirmed that the light extraction efficiency is improved as compared with the element of Example 1.

6C is a graph comparing the light extraction efficiency of the element of Reference Example 2 (see FIG. 4B) and the element of Reference Example 3 (see FIG. 4C), and FIG. 6D is the element of Example 2 (see FIG. 2). It is the graph which contrasted the light extraction efficiency of the element (refer FIG. 3) of Example 3. FIG. According to the graph of FIG. 6C, the element of Reference Example 3 in which the uneven shape 39 is provided on the upper surface of the n-type semiconductor layer 35 in the second region 42 in addition to the uneven shape 38 is the n-type semiconductor in the first region 41. The light extraction efficiency is lower than that of the element of Reference Example 2 in which the uneven shape 38 is provided on the upper surface of the layer 35 and the uneven shape 39 is not provided on the upper surface of the n-type semiconductor layer 35 in the second region 42.

On the other hand, according to the graph of FIG. 6D, the element of Example 3 in which the uneven shape 39 is provided on the upper surface of the n-type semiconductor layer 35 in the second region 42 in addition to the uneven shape 38 is in the first region 41. The light extraction efficiency is improved as compared with the element of Example 2 in which the uneven shape 38 is provided on the upper surface of the n-type semiconductor layer 35 and the uneven surface 39 is not provided on the upper surface of the n-type semiconductor layer 35 in the second region 42. Yes. In particular, with respect to the light from the light source 2D near the place where the height position of the n-type semiconductor layer 35 is different (step difference) and the light from the light sources (2C, 2E, 2F) located in the vicinity thereof, the third embodiment is more than the second embodiment. The light extraction efficiency is greatly improved.

That is, from the results of FIG. 6C and FIG. 6D, the action of providing the uneven shape 39 on the upper surface of the n-type semiconductor layer 35 in the second region 42 is different because the materials of the electrodes (36, 98) are different. It is confirmed that

6E is a graph comparing the light extraction efficiency of the element of Reference Example 2 (see FIG. 4B) and the element of Example 2 (see FIG. 2), and FIG. 6F is the element of Reference Example 3 (see FIG. 4C). It is the graph which contrasted the light extraction efficiency of the element (refer FIG. 3) of Example 3. FIG. According to FIG. 6E and FIG. 6F, when the materials of the electrodes (36, 98) are made different under the same conditions, the elements of Example 2 and Example 3 having the electrode 36 made of a highly reflective material. It is confirmed that the light extraction efficiency is improved compared to the elements of Reference Example 2 and Reference Example 3 having the electrode 98 made of a material (Au) having a low reflectance. Specifically, the light extraction efficiency of the element of Example 2 is about 0.5 to 2% higher than the element of Reference Example 2, and the element of Example 3 is 1 to 2% higher than the element of Reference Example 3. It was confirmed that the light extraction efficiency was improved by about 4%.

(Discussion based on verification results)
From the results of FIG. 5, it was confirmed that the light output of the device of Reference Example 1 was improved as compared with the device of Comparative Example 1. This is because by providing a step in the n-type semiconductor layer 35, the side surface of the portion forming the step, that is, the side surface (slope surface) of the n-type semiconductor layer 35 located at the interface between the first region 41 and the second region 42. This suggests that the light output has increased due to the extraction of light from the outside.

Furthermore, from the results of FIG. 5, it was confirmed that the light output of the device of Example 1 was higher than that of the device of Reference Example 1. This suggests that providing a step in the n-type semiconductor layer 35 and providing an electrode 36 made of a highly reflective material on the upper surface of the n-type semiconductor layer 35 can further increase the light output. Conceivable.

In the case of the element of Example 1 having the electrode 36 made of a material exhibiting a high reflectance with respect to the light emitted from the active layer 33, much of the light emitted from the active layer 33 toward the electrode 36 is the electrode 36. A part of this reflected light can be taken out from the side surface of the step of the n-type semiconductor layer 35. In the case of the element of Reference Example 1 having the electrode 98 made of a material having a low reflectance with respect to the light emitted from the active layer 33, much of the light emitted from the active layer 33 toward the electrode 98 is absorbed by the electrode 98. Therefore, the light reflected by the electrode 98 is hardly extracted outside from the side surface of the step of the n-type semiconductor layer 35. For this reason, it is considered that the light output of the device of Example 1 was improved as compared with the device of Reference Example 1.

In the element of Comparative Example 1, when the electrode 36 made of a material exhibiting a high reflectance with respect to the light emitted from the active layer 33 is used instead of the electrode 98, the radiation from the active layer 33 toward the electrode 36 is emitted. Although the emitted light is reflected by the electrode 36, most of the reflected light travels again toward the active layer 33. This light is reflected by the reflective electrode 21 formed closer to the substrate 11 than the active layer 33 and travels toward the electrode 36 again. In this way, while the reflection is repeated a plurality of times, the incident angle with respect to the surface of the n-type semiconductor layer 97 changes little by little, and it is conceivable that any of them will be taken out from the upper surface of the n-type semiconductor layer 97. The light is attenuated during this time. That is, the electrode formed on the upper surface of the n-type semiconductor layer 35 is made of a material exhibiting a high reflectance with respect to the light emitted from the active layer 33, and a step is provided in the n-type semiconductor layer 35 to increase the height. By forming the electrode 36 in the upper surface, that is, in the second region 42, the effect of taking out the light reflected by the electrode 36 with high efficiency to the outside is enhanced.

From the results of FIG. 6A, it was confirmed that the light extraction efficiency of the device of Reference Example 2 was improved as compared with the device of Reference Example 1. Further, from the result of FIG. 6B, it was confirmed that the light extraction efficiency of the device of Example 2 was improved as compared with the device of Example 1. From these results, it can be seen that the element in which the concavo-convex shape 38 is provided on the upper surface of the n-type semiconductor layer 35 in the first region 41 has an improved light output than the element in which the upper surface of the n-type semiconductor layer 35 is flattened. .

Light traveling from the active layer 33 toward the electrode 36 (upper surface) or light reflected from the reflective electrode 21 and traveling toward the electrode 36 (upper surface) is incident on the upper surface of the n-type semiconductor layer 35. The Here, when the upper surface of the n-type semiconductor layer 35 is flat, a part of light is incident on the surface of the n-type semiconductor layer 35 at an angle greater than a critical angle, and this light is incident on the n-type semiconductor layer. The light is reflected by the surface 35 and proceeds again to the active layer 33 side. On the other hand, when the concavo-convex shape 38 is formed on the upper surface of the n-type semiconductor layer 35 in the first region 41, the surface of the n-type semiconductor layer 35 is at an angle greater than the critical angle in the first region 41. Since the amount of incident light is greatly reduced, the amount of light that can be extracted outside without being reflected by the n-type semiconductor layer 35 is increased.

From the result of FIG. 6C, it was confirmed that the light extraction efficiency of the device of Reference Example 3 was lower than that of the device of Reference Example 2. On the other hand, from the result of FIG. 6D, it was confirmed that the light extraction efficiency of the device of Example 3 was improved as compared with the device of Example 2. From these results, when the uneven shape is formed on the upper surface of the n-type semiconductor layer 35 in the second region 42 in addition to the first region 41, the effect differs depending on the material of the electrodes (36, 98). I understand.

In the case of the element of Reference Example 3 having the electrode 98 made of a material having a low reflectance and having the concavo-convex shape 39 provided on the upper surface of the n-type semiconductor layer 35 in the second region 42, it is within a critical angle with respect to the electrode 98. As a result of the increase in the amount of incident light, the amount of light absorbed by the electrode 98 increases. For this reason, it is surmised that the light extraction efficiency of the device of Reference Example 3 is lower than that of the device of Reference Example 2.

On the other hand, in the case of the element of Example 3 having the electrode 36 made of a material having high reflectivity and having the uneven shape 39 on the upper surface of the n-type semiconductor layer 35 in the second region 42, it is incident on the electrode 36. Even if the amount of light to be increased increases, most of the light is reflected by the electrode 36. A part of this light is extracted through the surface of the uneven shape 39 and the side surface (slope) of the step of the n-type semiconductor layer 35. In addition, some of the light reflected by the electrode 36 may travel toward the upper surface of the n-type semiconductor layer 35 in the first region 41, but part of this light is in the first region 41. It is considered that the concavo-convex shape formed is scattered and taken out to the outside. For these reasons, by having the electrode 36 made of a highly reflective material and forming an uneven shape (38.39) on the upper surface of the n-type semiconductor layer 35 in the first region 41 and the second region 42. It is considered that the effect of greatly improving the light extraction amount can be obtained.

The results in FIGS. 6E and 6F appear to be consistent with the above considerations. That is, from the result of FIG. 6E, when comparing the element of Example 2 and the reference example 2 in which the concavo-convex shape 38 is formed on the upper surface of the n-type semiconductor layer 35 in the first region 41, the electrode 36 made of a highly reflective material. The light extraction efficiency is improved in the second example having the above-mentioned reference example 2 having the electrode 98 made of a material (Au) having a low reflectance. Further, from the result of FIG. 6F, when the element of Example 3 and the reference example 3 in which the uneven shape (38, 39) is formed on the upper surface of the n-type semiconductor layer 35 in the first region 41 and the second region 42 is compared. In Example 3, which has the electrode 36 made of a highly reflective material, the light extraction efficiency is improved over the reference example 3 having the electrode 98 made of a material (Au) having a low reflectance.

[Another embodiment]
Hereinafter, the configuration of another embodiment will be described.

<1> FIGS. 1 to 3 each show a configuration in which one electrode 36 is provided on the upper surface of the n-type semiconductor layer 35. However, a plurality of electrodes 36 may be provided on the upper surface of the n-type semiconductor layer 35. At this time, for the purpose of spreading the current in a direction parallel to the surface of the substrate 11, the insulating layer 22 may be provided at a position facing the electrode 36 in a direction orthogonal to the surface of the substrate 11 (see FIG. 7). ).

In the case of manufacturing the semiconductor light emitting device 1 shown in FIG. 7, after step S < _b > ₂ , for example, after forming SiO ₂ with a film thickness of about 200 nm to form the insulating layer 22, step S < _b > 3 may be executed. . At this time, in step S <b> 3, the conductive layer 20 may be formed so as to cover the upper surfaces of the p-type semiconductor layer 31 and the insulating layer 22. The insulating layer 22 only needs to be an insulating material, and may be composed of SiN or Al ₂ O ₃ in addition to SiO ₂ .

The insulating layer 22 can also function as an etching stopper layer at the time of element isolation according to step S7.

Note that the semiconductor light emitting device shown in FIG. 7 is configured to include a plurality of electrodes 36 and a plurality of insulating layers 22 in the semiconductor light emitting device of the first embodiment shown in FIG. However, the semiconductor light emitting device of the second embodiment shown in FIG. 2 and the semiconductor light emitting device shown in FIG. 3 may be configured to include the plurality of electrodes 36 and the insulating layer 22 similarly.

<2> In the above-described embodiment, the configuration in which the side close to the substrate 11 is the p-type semiconductor layer 31 and light is extracted from the n-type semiconductor layer 35 side has been described, but the n-type semiconductor layer 35 and the p-type semiconductor layer 31 The configuration may be reversed. In this case, the p-type semiconductor layer 31 is thicker in the second region 42 than in the first region 41, and the height position in the second region 42 is higher than the height position in the first region 41. Is also expensive. An electrode 36 is formed on the upper surface of the p-type semiconductor layer 31 in the second region 42.

1: Semiconductor light emitting device 2A to 2G of the present invention: Light source 11: Substrate 20: Conductive layer 21: Reflective electrode (second electrode)
22: insulating layer 30: semiconductor layer 31: p-type semiconductor layer 33: active layer 35: n-type semiconductor layer 36: electrode (first electrode)
38, 39: Uneven shape 41: First region 42: Second region 90: Conventional semiconductor light emitting device 91: Substrate 92: Conductive layer 93: Reflective electrode 94: Semiconductor layer 95: P-type semiconductor layer 96: Active layer 97: n-type semiconductor layer 98: n-side electrode

Claims

a semiconductor layer including an n-type semiconductor layer, a p-type semiconductor layer, and an active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer;
Of the surfaces of the semiconductor layer, a first electrode formed in contact with the first surface;
Of the surface of the semiconductor layer, having a second electrode formed in contact with the second surface opposite to the first surface,
The semiconductor layer has, on the first surface side, a first region and a second region having a height position higher than the first region,
The first electrode is formed in the second region of the semiconductor layer, and is made of a material exhibiting a high reflectance with respect to light emitted from the active layer. element.
2. The semiconductor layer has a concavo-convex shape on a surface thereof in at least one of the first region and the second region on the first surface side. The semiconductor light-emitting device described in 1.
3. The semiconductor light emitting device according to claim 2, wherein the semiconductor layer has a concavo-convex shape on a surface in both the first region and the second region on the first surface side. 4. element.
The semiconductor layer is composed of a nitride semiconductor layer,
4. The semiconductor light emitting device according to claim 1, wherein the first electrode is made of a material containing Al, Rh, Ag, or an alloy thereof.