TW201631796A - Semiconductor light-emitting element - Google Patents

Abstract

To realize a semiconductor light-emitting element in which light output is further improved in comparison to conventional semiconductor light-emitting elements. A semiconductor light-emitting element, having: a semiconductor layer including an n-type semiconductor layer, a p-type semiconductor layer, and an active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer; a first electrode formed so as to be contact with a first surface of the semiconductor layer; and a second electrode formed so as to be in contact with a second surface on the opposite side from the first surface, of the semiconductor layer. The semiconductor layer has, on the first surface side, a first region and a second region located at a greater height position than that of the first region. The first electrode is formed in the second region of the semiconductor layer, and comprises a material exhibiting a high reflectivity with respect to light emitted from the active layer.

Description

Semiconductor light-emitting element

The present invention relates to a semiconductor light-emitting device comprising an n-type semiconductor layer, a p-type semiconductor layer, and an active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer.

Fig. 8 is a cross-sectional view showing the structure of a conventional semiconductor light emitting element (see, for example, Patent Documents 1 and 2 below). The conventional semiconductor light-emitting device 90 is provided with a conductive layer 92, a reflective electrode 93, a semiconductor layer 94, and an n-side electrode 98 on a substrate 91. The semiconductor layer 94 is formed by sequentially laminating a p-type semiconductor layer 95, an active layer 96, and an n-type semiconductor layer 97 from the substrate 91 side. In the semiconductor light emitting element 90 shown in FIG. 8, the surface on the side of the n-type semiconductor layer 97 corresponds to the light extraction surface.

The reflective electrode 93 is made of a metal material and has a function as an electrode (p-side electrode) by ohmic connection between the p-type semiconductor layers 95. The reflective electrode 93 is reflected by the light emitted to the active layer 96 in the direction in which the light is emitted toward the substrate 91 (the surface is downward), and is taken out to the side of the n-side semiconductor layer 97 (the surface is upward), and is also used for lifting. The purpose of light extraction efficiency.

[Previous Technical Literature] [Patent Literature]

[Patent Document 1] Japanese Laid-Open Patent Publication No. 2006-191068

[Patent Document 2] Japanese Patent No. 4161689

In recent years, even in semiconductor light-emitting elements, further miniaturization and high luminance have been demanded. It is an object of the present invention to achieve a semiconductor light emitting element that enhances light output more than prior semiconductor light emitting elements.

A semiconductor light emitting device according to the present invention includes a semiconductor layer including an n-type semiconductor layer, a p-type semiconductor layer, and an active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer; and a first electrode Formed in contact with the first surface of the surface of the semiconductor layer; and the second electrode is formed in contact with the second surface on the opposite side of the first surface of the surface of the semiconductor layer; the semiconductor layer a first region having a first region and a second region higher than the first region; the first electrode being formed in the second region of the semiconductor layer In the domain, a material exhibiting high reflectance for light emitted from the active layer is formed.

According to the foregoing configuration, the first electrode is composed of a material exhibiting high reflectance for light emitted from the active layer. Thereby, since the majority of the light radiated from the active layer toward the first electrode can be reflected by the first electrode, the proportion of the light absorbed by the first electrode is greatly reduced. Then, the first electrode is formed in the first surface side of the semiconductor layer and in the second region having a high height position, so a part of the light reflected in the first electrode passes through the first region and the second region located in the semiconductor layer. The side of the marginal portion (for example, a slope) is taken out to the outside. Thereby, the amount of light extraction is greatly increased compared to the previous configuration.

Previously, as the material forming the electrode on the light extraction surface side, Au or an alloy containing Au was used. In view of the fact that in the case of wire bonding the electrode, the material used as the bonding wire is Au, and the above-mentioned material is selected from the viewpoint of easy work.

The area occupied by the electrode on the light extraction surface of the semiconductor light emitting element is not too large. Therefore, even if the electrode is constituted by Au, the amount of light absorbed by the electrode is not considered to be a problem. However, in recent years, how to realize high-light extraction efficiency has become a problem in recent years in which a small-sized light-emitting element that is required to be high in brightness is required.

The inventors of the present invention found out that the electrode formed on the side of the light extraction surface is formed not only by a highly reflective material but also by providing a step difference to the semiconductor layer, and the height position of the light extraction surface is different, and is used in the height position. Configuring the electrode in a high region (ie, in the second region) (First electrode), the light extraction efficiency is greatly increased more than before.

Here, the material indicating the high reflectance is preferably a material having a ratio of the amount of reflected light incident on the amount of incident light of 50% or more, more preferably 60% or more, and more preferably 70% or more. For the reflectance of light having a wavelength of 365 nm, previously, Au used as a material of the first electrode was 35%. On the other hand, for the reflectance of light of the same wavelength, Al is 90%, Rh is 75%, and Ag is 75%. Further, when the semiconductor light emitting element has a structure that emits light having a wavelength of 350 nm or more and 550 nm or less, the first electrode may be made of Al, Rh, Ag, or the like.

Further, in addition to the above-described structure, the semiconductor layer may be formed on the first surface side, and the surface may have an uneven shape in at least one of the first region and the second region.

As described above, the first surface side of the semiconductor layer is formed into a concavo-convex shape, and the first electrode is made to interact with the high-reflection material, so that the amount of light extraction can be greatly increased.

In the above configuration, the semiconductor layer may be formed on the first surface side, and the surface may have an uneven shape in a region of both the first region and the second region.

According to the intensive research of the inventors of the present invention, it has been found that as such a configuration, the effect of the amount of light extraction can be further enhanced.

The unevenness is formed on the surface of the semiconductor layer in the second region, and the ratio of the light that is emitted from the active layer toward the first electrode and that is not reflected by the first surface side of the semiconductor layer and can be taken out to the outside can be increased. this In order to form irregularities on the surface of the semiconductor layer, the amount of light incident on the surface of the semiconductor layer at an angle equal to or greater than the critical angle is greatly reduced.

In addition, by forming irregularities in the first region, the amount of light taken out can be further increased. This reason is not necessarily the case, but it is presumed that irregularities are formed on the surface of the semiconductor layer in the first region, and a part of the light reflected by the first electrode passes through the margin of the first region and the second region of the semiconductor layer. The side surface (beveled surface) formed by the portion is moved toward the first region, and as a result of the irregularities formed in the first region, the amount of light that can be taken out to the outside is increased.

In the item of the "embodiment", as described later, when the first electrode is formed of the former Au, the surface of both the first region and the second region of the semiconductor layer is formed with irregularities, compared to the first The surface in the area is in a state of unevenness, and the amount of light extraction may be lowered. It is presumed that the reason is that the surface of the semiconductor layer located at the bottom of the first electrode (that is, the surface of the semiconductor layer in the second region) is formed with irregularities, and the amount of light incident on the first electrode at a critical angle is increased. As a result, the amount of light absorbed by the first electrode composed of Au increases. In other words, in the present invention, the effect of improving the amount of light extraction by the unevenness of both the first region and the second region of the semiconductor layer is achieved by the fact that the first electrode is formed of a highly reflective material.

In the above structure, the semiconductor layer is formed of a nitride semiconductor layer, and the first electrode may be made of Al, Rh, Ag, or a material containing the alloy.

Further, the second electrode may be formed of a material exhibiting high reflectance with respect to light emitted from the active layer.

According to the present invention, it is possible to realize a semiconductor light emitting element which greatly increases the amount of light extraction compared to the prior art.

1‧‧‧Semiconductor light-emitting element of the present invention

2A~2G‧‧‧Light source

11‧‧‧Substrate

20‧‧‧ Conductive layer

21‧‧‧Reflective electrode (second electrode)

22‧‧‧Insulation

30‧‧‧Semiconductor layer

31‧‧‧p-type semiconductor layer

33‧‧‧Active layer

35‧‧‧n type semiconductor layer

36‧‧‧electrode (first electrode)

38,39‧‧‧ concave shape

41‧‧‧First area

42‧‧‧Second area

90‧‧‧Previous semiconductor light-emitting elements

91‧‧‧Substrate

92‧‧‧ Conductive layer

93‧‧‧Reflective electrode

94‧‧‧Semiconductor layer

95‧‧‧p-type semiconductor layer

96‧‧‧Active layer

97‧‧‧n type semiconductor layer

98‧‧‧n side electrode

Fig. 1 is a cross-sectional view showing the structure of a semiconductor light emitting element (Example 1) according to a first embodiment of the present invention.

Fig. 2 is a cross-sectional view showing the structure of a semiconductor light emitting device (Example 2) according to a second embodiment of the present invention.

Fig. 3 is a cross-sectional view showing the structure of a semiconductor light emitting device (Embodiment 3) according to a third embodiment of the present invention.

4A] A cross-sectional view showing a configuration of a semiconductor light emitting element of Reference Example 1 is disclosed.

4B] A cross-sectional view showing a configuration of a semiconductor light emitting element of Reference Example 2 is disclosed.

4C] A cross-sectional view showing a configuration of a semiconductor light emitting element of Reference Example 3 is disclosed.

Fig. 5 is a graph comparing the relationship between the injection current and the light output in each of the light-emitting elements of Example 1, Example 3, Comparative Example 1, and Reference Example 1.

[Fig. 6A] Comparison of the elements of Reference Example 1 and the elements of Reference Example 2 A chart of efficiency.

6B is a graph showing the light extraction efficiency of the elements of Comparative Example 1 and the elements of Example 2.

6C] A graph comparing the light extraction efficiency of the element of Reference Example 2 with the element of Reference Example 3.

6D] A graph comparing the light extraction efficiency of the element of Reference Example 2 and the element of Example 3.

6E] A graph comparing the light extraction efficiency of the element of Reference Example 2 with the element of Example 2.

6F] A graph comparing the light extraction efficiency of the element of Reference Example 3 with the element of Example 3.

Fig. 7 is a cross-sectional view showing the structure of a semiconductor light emitting element according to another embodiment of the present invention.

Fig. 8 is a cross-sectional view showing the configuration of a conventional semiconductor light-emitting element (Comparative Example 1).

The semiconductor light-emitting device of the present invention will be described with reference to the drawings. Furthermore, in each of the figures, the size ratio of the drawing does not necessarily coincide with the actual size ratio. Further, hereinafter, the expression of AlGaN omits the composition ratio of Al to Ga, and does not indicate that the composition ratio is 1:1. The same applies to InGaN and the like.

[First Embodiment]

Fig. 1 is a cross-sectional view showing the structure of a semiconductor light emitting element according to a first embodiment of the present invention.

<structure>

The semiconductor light emitting element 1 includes a substrate 11, a conductive layer 20, a reflective electrode 21, a semiconductor layer 30, and an electrode 36. The semiconductor layer 30 is formed by sequentially laminating a p-type semiconductor layer 31, an active layer 33, and an n-type semiconductor layer 35 from the substrate 11 side.

(substrate 11)

The substrate 11 is made of a conductive substrate such as CuW, W, or Mo, or a semiconductor substrate such as Si.

(conductive layer 20)

A conductive layer 20 is formed on the upper layer of the substrate 11. As an example, the conductive layer 20 includes a solder layer composed of Au-Sn, Au-In, Au-Cu-Sn, Cu-Sn, Pd-Sn, or Sn, and a Pt-based metal (Ti and Pt). Solder diffusion preventing layer composed of alloy, W, Mo, or the like.

(Reflective electrode 21)

The reflective electrode 21 is made of, for example, Ag (including an Ag alloy), Al, Rh, or the like. The semiconductor light-emitting device 1 is intended to take out the light emitted from the active layer 33 to the direction of the paper surface of FIG. 1, and the reflective electrode 21 has a function of reflecting the light radiated downward from the active layer 33 toward the paper surface. The function of increasing luminous efficiency. The reflective electrode 21 corresponds to the "second electrode".

The reflective electrode 21 is in contact with one surface of the semiconductor layer 30 (the surface on the substrate 11 side, corresponding to the "second surface"), and when a voltage is applied between the substrate 11 and the electrode 36, the substrate 11 and the conductive layer 20 are formed and reflected. The current path of the electrode 21 and the semiconductor layer 30 flowing to the electrode 36.

(semiconductor layer 30)

As described above, the semiconductor layer 30 is formed by sequentially laminating the p-type semiconductor layer 31, the active layer 33, and the n-type semiconductor layer 35 from the substrate 11 side.

The p-type semiconductor layer 31 is made of, for example, GaN or AlGaN, and is doped with a p-type impurity such as Mg, Be, Zn, or C. In addition, the p-type semiconductor layer 31 may be a p-type contact layer provided on the side close to the reflective electrode 21 and doped with a p-type impurity at a high concentration.

The active layer 33 is formed, for example, of a semiconductor layer having a structure in which a light-emitting layer made of InGaN and a barrier layer made of AlGaN are repeated. These layers may be used as an undoped type, and may be doped p-type or n-type.

The n-type semiconductor layer 35 is made of, for example, AlGaN, and is doped with an n-type impurity such as Si, Ge, S, Se, Sn, or Te.

As shown in FIG. 1, the semiconductor layer 30 is a region having a different height from the surface (corresponding to the "first surface") on the side opposite to the substrate 11. That is, the semiconductor layer 30 is in the first side, and has a lower height. A region 41 is associated with a second region 42 having a height that is higher than the first region 41.

More specifically, the n-type semiconductor layer 35 is configured to be thicker in the second region 42 than in the first region 41. Thereby, the height position of the semiconductor layer 30 is higher in the second region 42 than in the first region 41.

(electrode 36)

The electrode 36 is formed on the upper surface of the n-type semiconductor layer 35 and in the second region 42 having a higher height position. The electrode 36 is made of a material having a reflectance of 50% or more with respect to light emitted in the active layer 33. Here, the electrode 36 is preferably made of a material having a reflectance of 60% or more for light emitted in the active layer 33, and more preferably a material having a reflectance of 70% or more.

In the present embodiment, a case where the wavelength of the light that emits light in the active layer 33 is 350 nm or more and 550 nm or less will be described. At this time, the electrode 36 can be composed of Al, Rh, Ag, or a material containing the same. This electrode 36 corresponds to the "first electrode".

According to the above configuration, the light output is increased more than the previous semiconductor light-emitting element 90 shown in Fig. 8, and will be described later with reference to the embodiment.

<Production method>

Hereinafter, an example of a method of manufacturing the semiconductor light-emitting device 1 shown in FIG. 1 will be described. Further, this production method is only an example, and the flow rate of the gas, the temperature in the furnace, the pressure in the furnace, and the like may be appropriately adjusted.

(Step S1)

First, the semiconductor layer 30 is epitaxially grown on a growth substrate made of a sapphire substrate or the like. This step S1 is performed, for example, by the following steps.

First, the substrate is cleaned. More specifically, the c-plane sapphire substrate as a growth substrate is placed in a treatment furnace of a MOCVD (Metal Organic Chemical Vapor Deposition) apparatus, and the flow rate in the treatment furnace is 10 slm. The hydrogen gas is heated while the furnace temperature is raised to 1,150 ° C, for example.

Next, a low temperature buffer layer made of GaN is formed on the surface of the grown substrate, and a base layer made of GaN is formed on the upper layer. An example of a specific procedure is as follows.

First, the furnace internal pressure of the MOCVD apparatus was set to 100 kPa, and the furnace internal temperature was set to 480 °C. Then, while supplying nitrogen gas and hydrogen gas having a flow rate of 5 slm as a carrier gas in the treatment furnace, trimethylgallium (TMG) having a flow rate of 50 μmol/min and ammonia having a flow rate of 250,000 μmol/min were supplied as a raw material gas. 68 seconds to the inside of the furnace. Thereby, a low temperature buffer layer made of GaN having a thickness of 20 nm was formed on the surface of the grown substrate.

Next, the furnace temperature of the MOCVD apparatus was raised to 1,150 °C. Then, as a carrier gas in the treatment furnace, nitrogen gas having a flow rate of 20 slm and hydrogen gas having a flow rate of 15 slm are used as a raw material. For the gas, TMG having a flow rate of 100 μmol/min and ammonia having a flow rate of 250,000 μmol/min were supplied to the treatment furnace for 30 minutes. Thereby, a base layer made of GaN having a thickness of 1.7 μm was formed on the surface of the low temperature buffer layer.

Next, an n-type semiconductor layer 35 is formed on the upper layer of the underlying layer. An example of a specific procedure is as follows.

First, the furnace internal pressure of the MOCVD apparatus was set to 30 kPa while the furnace temperature was continuously set to 1,150 °C. Then, as a carrier gas, nitrogen gas having a flow rate of 20 slm and hydrogen gas having a flow rate of 15 slm were used as a carrier gas in the treatment furnace, and TMG having a flow rate of 94 μmol/min and trimethylaluminum having a flow rate of 6 μmol/min were used as a material gas. TMA), ammonia having a flow rate of 250,000 μmol/min, and tetraethyl decane having a flow rate of 0.025 μmol/min were supplied to the treatment furnace for 60 minutes. Thereby, Al _0.06 Ga _0.94 N having a thickness of 2 μm was formed at a Si concentration of 3 × 10 ¹⁹ /cm ³ .

In addition, after the supply of TMA is stopped and the source gas other than the source is supplied for 6 seconds, a protective layer made of n-type GaN having a thickness of 5 nm may be formed on the upper layer of the AlGaN layer. At this time, the n-type semiconductor layer 35 is formed of an AlGaN layer and a GaN layer.

In the above-described method, the case where the n-type impurity included in the n-type semiconductor layer 35 is used as Si has been described. However, as the n-type impurity, Ge, S, Se, Sn, or Te may be used in addition to Si. . The material gas can be appropriately selected depending on the type of the dopant.

Next, an active layer is formed on the upper layer of the n-type semiconductor layer 35. 33. An example of a specific procedure is as follows.

First, the furnace internal pressure of the MOCVD apparatus was set to 100 kPa, and the furnace internal temperature was set to 830 °C. Then, while supplying nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 1 slm as a carrier gas in the treatment furnace, TMG having a flow rate of 10 μmol/min and trimethyl indium having a flow rate of 12 μmol/min were used as a material gas. (TMI) and ammonia having a flow rate of 300,000 μmol/min were supplied to the inside of the furnace for 48 seconds. Thereafter, TMG having a flow rate of 10 μmol/min, TMA having a flow rate of 1.6 μmol/min, tetraethyl decane of 0.002 μmol/min, and ammonia having a flow rate of 300,000 μmol/min were supplied and supplied to the inside of the treatment furnace for 120 seconds. Hereinafter, an active layer of a 15-cycle multi-quantum well structure having a thickness of 2 nm and a light-emitting layer made of InGaN and a barrier layer made of n-type AlGaN having a thickness of 7 nm is repeated by repeating the two steps. 33 is formed on the upper layer of the n-type semiconductor layer 35.

Next, a p-type semiconductor layer 31 is formed on the upper layer of the active layer 33. An example of a specific procedure is as follows.

Then, while maintaining the pressure in the furnace of the MOCVD apparatus at 100 kPa, the inside of the treatment furnace was used as a carrier gas, and nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 25 slm were used to raise the temperature in the furnace to 1025 °C. Thereafter, as the material gas, TMG having a flow rate of 35 μmol/min, TMA having a flow rate of 20 μmol/min, ammonia having a flow rate of 250,000 μmol/min, and bis (cyclopentane) having a flow rate of 0.1 μmol/min for doping p-type impurities were used. Diene magnesium (Cp ₂ Mg) was supplied to the treatment furnace for 60 seconds. Thereby, a hole supply layer having a composition of Al _0.3 Ga _0.7 N having a thickness of 20 nm was formed on the surface of the active layer 33. Thereafter, by changing the flow rate of TMA to 4 μmol/min and supplying the raw material gas for 360 seconds, a hole supply layer having a composition of Al _0.13 Ga _0.87 N having a thickness of 120 nm was formed. By the holes supply layer, a p-type semiconductor layer 31 having a Mg concentration of, for example, about 3 × 10 ¹⁹ /cm ³ is formed.

Then, by stopping the supply of TMA, the flow rate of Cp ₂ Mg was changed to 0.2 μmol/min, and the raw material gas was supplied for 20 seconds to a thickness of about 5 nm, and the p-type impurity concentration was 1 × 10 A p-type contact layer of about ²⁰ /cm ³ may also be used. At this time, the p-type contact layer is also included in the p-type semiconductor layer 31.

In the above-described method, the case where the p-type impurity contained in the p-type semiconductor layer 31 is referred to as Mg is described. However, as the p-type impurity, Be, Zn, or C may be used in addition to Mg. The material gas can be appropriately selected depending on the type of the dopant.

(Step S2)

The wafer formed through the step S1 is subjected to an activation treatment. More specifically, it was subjected to an activation treatment at 650 ° C for 15 minutes in a nitrogen atmosphere using an RTA (Rapid Thermal Anneal) apparatus.

(Step S3)

At this time, the reflective electrode 21 is formed to cover the upper surface of the p-type semiconductor layer 31. Further, a conductive layer 20 is formed on the upper surface of the reflective electrode 21. An example of a specific procedure is as follows.

First, Ni was deposited to a thickness of 0.7 nm and Ag having a thickness of 120 nm on the entire surface so as to cover the upper surface of the p-type semiconductor layer 31 by a sputtering apparatus to form a reflective electrode 21. Next, contact annealing at 400 ° C for two minutes was carried out in an air or an inert gas atmosphere using an RTA apparatus.

Next, on the upper surface of the reflective electrode 21, an electron beam vapor deposition apparatus (EB apparatus) was used to form a film thickness of 100 nm and a film thickness of 200 nm, thereby forming a solder diffusion preventing layer. Further, after depositing Ti having a thickness of 10 nm on the upper surface of the solder diffusion preventing layer, an Au-Sn solder having a thickness of 3 μm and Au 80% Sn 20% was deposited to form a solder layer. The conductive layer 20 is formed by the solder diffusion preventing layer and the solder layer.

(Step S4)

Next, a solder diffusion preventing layer is formed on the substrate 11 prepared separately from the growth substrate in the same manner as described in the above step S3. As the substrate 11, as described above, a conductive substrate such as CuW, W, or Mo, or a semiconductor substrate such as Si can be used.

(Step S5)

The long substrate and the substrate 11 are bonded together. As an example, the upper surface (solder layer) of the conductive layer formed on the growth substrate and the solder diffusion prevention layer formed on the upper layer of the substrate 11 are bonded at a temperature of 280 ° C and a pressure of 0.2 MPa.

Further, in the substrate 11, a solder layer may be formed on the upper layer of the solder diffusion preventing layer, and the solder layer on the substrate 11 and the solder layer on the growth substrate 61 may be bonded.

(Step S6)

The substrate is grown from the wafer. An example of a specific procedure is as follows.

The KrF excimer laser is irradiated from the growth substrate side with the growth substrate facing upward and the substrate 11 facing downward, and the interface between the growth substrate and the semiconductor layer 30 is decomposed. The sapphire-based laser that constitutes the growth substrate passes through, and the lower layer of GaN absorbs the laser. Therefore, the interface is heated and the GaN is decomposed. Thereby, the grown substrate is peeled off.

Thereafter, GaN remaining on the wafer is removed by wet etching using hydrochloric acid or the like or dry etching using an ICP apparatus, and the n-type semiconductor layer 35 is exposed.

(Step S7)

The adjacent elements are separated from each other as necessary. Specifically, the semiconductor layer 30 is etched using an ICP device for the marginal region of the adjacent device.

(Step S8)

In the state where the n-type semiconductor layer 35 in the second region 42 is masked, the exposed n-type semiconductor layer 35, that is, in the first region 41 The n-type semiconductor layer 35 is etched only by a predetermined thickness using an ICP apparatus. Thereby, the n-type semiconductor layer 35 is thin in the first region 41 and thick in the second region 42. As an example, the difference between the thickness of the n-type semiconductor layer 35 in the first region 41 and the n-type semiconductor layer 35 in the second region 42 can be set to about 0.7 μm.

(Step S9)

In the upper surface of the n-type semiconductor layer 35, the first electrode 36 is formed on the upper surface in the second region 42 having a higher height position. More specifically, an electrode made of Ni having a film thickness of 3 nm, Al having a thickness of 12 nm, Ti having a thickness of 30 nm, and Au having a thickness of 3 μm was formed.

As a subsequent work, the side surface of the element exposed as necessary is covered with an insulating layer. More specifically, an EB device is used to form a SiO ₂ film. Further, a SiN film may be formed. Then, the elements are separated from each other by, for example, a laser cutting device, and the back surface of the substrate 11 is bonded to the package by, for example, Ag solder paste, and the electrodes 36 are wire-bonded.

[Second embodiment]

Fig. 2 is a cross-sectional view showing the structure of a semiconductor light emitting element according to a second embodiment of the present invention. In addition, the same components as those of the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

The semiconductor light-emitting device 1 shown in FIG. 2 is different from the structure of the first embodiment in that only the surface of the n-type semiconductor layer 35 is formed with a fine uneven shape 38 on the surface in the first region 41. with. The height of the uneven shape 38 is, for example, 0.2 to 0.5 μm. According to this configuration, the light output is increased more than the previous semiconductor light-emitting element 90 shown in Fig. 8, and will be described later with reference to the embodiment.

The semiconductor light-emitting device 1 of the present embodiment can be manufactured by the following procedure. First, steps S1 to S8 are executed by the same method as in the first embodiment. Thereafter, in the state in which the n-type semiconductor layer 35 in the second region 42 is masked, an alkaline solution such as KOH is impregnated into the exposed n-type semiconductor layer 35 in the first region 41. Thereby, the uneven shape 38 is formed on the upper surface of the n-type semiconductor layer 35 only in the first region 41. Thereafter, the process after step S9 is executed by the same method as the first embodiment.

[Third embodiment]

Fig. 3 is a cross-sectional view showing the structure of a semiconductor light emitting element according to a third embodiment of the present invention. In addition, the same components as those of the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

The semiconductor light-emitting device 1 shown in FIG. 3 is different from the structure of the second embodiment in that it has a fine uneven shape 39 in the second region 42. The uneven shape 39 is the same as the uneven shape 38 in the first region 41, and may be 0.2 to 0.5 μm as an example. According to this configuration, the light output is increased more than the previous semiconductor light-emitting element 90 shown in Fig. 8, and will be described later with reference to the embodiment.

The semiconductor light-emitting device 1 of the present embodiment can be manufactured by the same method as the semiconductor light-emitting device 1 of the second embodiment. also In other words, after the steps S1 to S8 are performed, an alkaline solution such as KOH is impregnated on the entire upper surface of the n-type semiconductor layer 35. Thereby, the uneven shape (38, 39) is formed on both the upper surface of the n-type semiconductor layer 35 in the first region 41 and the upper surface of the n-type semiconductor layer 35 in the second region 42. Thereafter, the process after step S9 is executed by the same method as the first embodiment.

The semiconductor light emitting element 1 of the second embodiment is formed of the n-type semiconductor layer 35 in comparison with the semiconductor light emitting element 1 of the second embodiment in which the uneven shape 38 is formed only on the upper surface of the n-type semiconductor layer 35 in the first region 41. It is only necessary to form the uneven shape (38, 39) on the entire surface or almost the entire surface, so that the step of forming the unevenness can be simplified.

[Inspection certificate]

Hereinafter, the semiconductor light-emitting device 1 of each of the above-described embodiments will be described with respect to the improvement of the light output from the conventional semiconductor light-emitting device 90.

(Example)

The semiconductor light-emitting device 1 (see FIG. 1) of the first embodiment is used as the first embodiment, and the semiconductor light-emitting device 1 (see FIG. 2) of the second embodiment is used as the first embodiment, and the semiconductor light-emitting device 1 of the third embodiment is used. (See Fig. 3) as an example.

(Comparative example, reference example)

The semiconductor light emitting element 90 shown in FIG. 8 was used as Comparative Example 1.

A semiconductor light-emitting device including the previous electrode 98 made of Au instead of the electrode 36 was used as the reference example 1 (see FIG. 4A). A semiconductor light-emitting device including the previous electrode 98 made of Au instead of the electrode 36 was used as the reference example 2 (see FIG. 4B). A semiconductor light-emitting device including the previous electrode 98 made of Au instead of the electrode 36 was used as the reference example 3 (see FIG. 4C).

(Verification 1)

The respective elements of Example 1, Example 3, Comparative Example 1, and Reference Example 1 were fabricated in accordance with the aforementioned method, and the relationship between the injection current and the light output was compared. This result is disclosed in Figure 5.

Further, in each of the elements, the size of the surface of the n-type semiconductor layer (35, 97) parallel to the substrate (11, 91) is 50 μm, and the electrodes (36, 98) are parallel to the substrate (11, 91). The dimensions of the faces were all 20 μm, and the height of the electrodes (36, 98) was 3.2 μm. Further, in each of the elements of the first embodiment, the third embodiment, and the reference example 1, the difference in thickness between the first region 41 and the n-type semiconductor layer 35 in the second region 42 was 0.7 μm, and the element of the third embodiment The height of the uneven shape (38, 39) is 0.2 to 0.5 μm.

According to Fig. 5, the light output at the same current injection is increased in the order of Comparative Example 1, Reference Example 1, Example 1, and Example 3. Specifically, when 1A is implanted, the light output of the element of Embodiment 1 is higher than that of Reference Example 1. The light output of the component was increased by 2%, and the light output of the component of Example 3 was increased by 6% over the light output of the component of Example 1.

(Verification 2)

The conditions of the physical properties of the respective layers, the film thickness of each layer, the height of the electrodes (36, 98), and the information of the positions of the plurality of light sources in the active layer 33 are calculated by the FDTD method to emit light at the positions of the respective light sources. The proportion of light that can be taken out to the outside. Further, the elements of Examples 1 to 3, Reference Examples 1 to 3, and Comparative Example 1 were identical in material and size other than the above-described differences.

More specifically, the light sources (2A, 2B, 2C, 2D, 2E, 2F, 2G) disposed at 7 intervals are defined. In each of the elements of Embodiments 1 to 3 and Reference Examples 1 to 3, the light sources 2A, 2B, and 2C are located in the second region 42, the light sources 2E, 2F, and 2G are located in the first region 41, and the light source 2D is located first. The edge of the region 41 and the second region 42 is located directly below the side where the side surface (bevel) of the n-type semiconductor layer 35 is exposed. Further, each of the light sources (2A to 2G) of the element of Comparative Example 1 was set to correspond to the position of each of the light sources (2A to 2G) of the element of Example 1.

6A is a graph comparing the light extraction efficiency of the element of the reference example 1 (refer to FIG. 4A) and the element of the reference example 2 (refer to FIG. 4B), and FIG. 6B is the element of the comparative example 1 (refer to FIG. 1) and the embodiment 2 A graph of the light extraction efficiency of the component (see Fig. 2). According to the graph of FIG. 6A, the element of Reference Example 2 in which the uneven shape 38 is provided on the upper surface of the n-type semiconductor layer 35 in the first region 41 can be confirmed as compared with the n-type semiconductor layer. The element of Reference Example 1 having no unevenness on the upper surface of 35 has an improved light extraction efficiency. Similarly, according to the graph of FIG. 6B, the element of the second embodiment in which the uneven shape 38 is provided on the upper surface of the n-type semiconductor layer 35 in the first region 41 can be confirmed, and the upper surface of the n-type semiconductor layer 35 has no unevenness. In the element of Example 1, the light extraction efficiency was improved.

6C is a graph comparing the light extraction efficiency of the element of the reference example 2 (refer to FIG. 4B) and the element of the reference example 3 (refer to FIG. 4C), and FIG. 6D is the element of the comparative example 2 (refer to FIG. 2) and the embodiment 3 A graph of the light extraction efficiency of the component (see Fig. 3). According to the graph of FIG. 6C, in addition to the uneven shape 38, the element of Reference Example 3 in which the uneven shape 39 is provided on the upper surface of the n-type semiconductor layer 35 in the second region 42 is compared with the n-type semiconductor in the first region 41. The uneven shape 38 is provided on the upper surface of the layer 35, and the element of Reference Example 2 in which the uneven shape 39 is not provided on the upper surface of the n-type semiconductor layer 35 in the second region 42 reduces the light extraction efficiency.

On the other hand, according to the graph of FIG. 6D, in addition to the uneven shape 38, the element of the third embodiment in which the uneven shape 39 is provided on the upper surface of the n-type semiconductor layer 35 in the second region 42 is compared with the first region 41. The uneven shape 38 is provided on the upper surface of the n-type semiconductor layer 35, and the element of the second embodiment in which the uneven shape 39 is not provided on the upper surface of the n-type semiconductor layer 35 in the second region 42 improves the light extraction efficiency. In particular, regarding the light source 2D from the vicinity of the height position (segment difference) close to the n-type semiconductor layer 35 and the light source (2C, 2E, 2F) located in the vicinity thereof, the light of Embodiment 3 is compared with that of Embodiment 2 The extraction efficiency is greatly improved.

That is, according to the results of FIG. 6C and FIG. 6D, the cause can be confirmed. The material of the electrodes (36, 98) is different, and the effect of providing the uneven shape 39 on the upper surface of the n-type semiconductor layer 35 in the second region 42 is also different.

6E is a graph comparing light extraction efficiency of the element of Reference Reference 2 (refer to FIG. 4B) and the element of Example 2 (refer to FIG. 2), and FIG. 6F is an element of Comparative Reference Example 3 (refer to FIG. 4C) and Embodiment 3 A graph of the light extraction efficiency of the component (see Fig. 3). 6E and 6F, it can be confirmed that each of the elements of the second embodiment and the third embodiment having the electrode 36 made of a highly reflective material is the same as the other conditions, and the electrodes (36, 98) are different in material. The light extraction efficiency is improved as compared with each of the components of Reference Example 2 and Reference Example 3 having the electrode 98 made of a material having a low reflectance (Au). Specifically, it can be confirmed that the element of the second embodiment has a light extraction efficiency of about 0.5 to 2% as compared with the element of the reference example 2, and the element of the third embodiment is also improved by 1 to 4 as compared with the element of the reference example 3. % light extraction efficiency.

(According to the inspection results)

From the results of FIG. 5, it was confirmed that the light output was improved in the element of Reference Example 1 as compared with the element of Comparative Example 1. This suggests that the step is provided by the n-type semiconductor layer 35, and the light is taken out from the side surface (bevel) of the n-type semiconductor layer 35 at the interface where the step is formed, that is, the side where the step is formed, that is, the interface between the first region 41 and the second region 42. By the light output will rise.

Further, from the results of FIG. 5, it was confirmed that the light output was improved in the element of the first embodiment as compared with the element of the reference example 1. This implies that the n-type semiconductor layer 35 will be formed of a highly reflective material in addition to the step difference. When the electrode 36 is disposed on the upper surface of the n-type semiconductor layer 35, an effect of further increasing the light output can be obtained.

In the case of the element of the embodiment 1 having the electrode 36 formed of the material exhibiting high reflectance from the light emitted from the active layer 33, most of the light radiated from the active layer 33 toward the electrode 36 is reflected at the electrode 36. A part of this reflected light is taken out from the side surface of the step of the n-type semiconductor layer 35 to the outside. In the case of the element of Reference Example 1 in which the electrode 98 is made of a material having a low reflectance to the light emitted from the active layer 33, most of the light emitted from the active layer 33 toward the electrode 98 is absorbed at the electrode 98, so that There is almost no case where the light reflected by the electrode 98 is taken out from the side surface of the step of the n-type semiconductor layer 35 to the outside. Therefore, the element of Example 1 has an improvement in light output compared to the element of Reference Example 1.

Further, in the element of Comparative Example 1, when the electrode 36 made of a material exhibiting high reflectance from the light emitted from the active layer 33 was used instead of the electrode 98, the light emitted from the active layer 33 toward the electrode 36 was at the electrode. 36 is reflected, but the reflected light mostly travels toward the side of the active layer 33 again. This light is reflected by the reflective electrode 21 formed on the substrate 11 side more than the active layer 33, and travels toward the electrode 36 again. As described above, while the reflection is repeated a plurality of times, the incident angle to the surface of the n-type semiconductor layer 97 gradually changes slightly, and is eventually taken out from the upper surface of the n-type semiconductor layer 97. However, the light is attenuated between repeated reflections. That is, an electrode formed on the upper surface of the n-type semiconductor layer 35 is formed of a material exhibiting high reflectance for light emitted from the active layer 33, and is used for n. The type semiconductor layer 35 is provided with a step, and the electrode 36 is formed on the upper side of the height position, that is, in the second region 42, and the effect of extracting the light reflected by the electrode 36 to the outside with high efficiency can be enhanced.

According to the results of FIG. 6A, it was confirmed that the element of Reference Example 2 has an improved light extraction efficiency as compared with the element of Reference Example 1. Further, from the results of Fig. 6B, it was confirmed that the light extraction efficiency of the element of the second embodiment was improved as compared with the element of the first embodiment. From these results, it is understood that the element having the uneven shape 38 is provided on the upper surface of the n-type semiconductor layer 35 in the first region 41, and the light output is improved compared to the element having the flat surface of the n-type semiconductor layer 35.

Light that travels from the active layer 33 toward the electrode 36 side (upper surface) or light that is reflected by the reflective electrode 21 toward the electrode 36 side (upper surface) is incident on the upper surface of the n-type semiconductor layer 35. Here, when the upper surface of the n-type semiconductor layer 35 is flat, a part of the light is incident on the surface of the n-type semiconductor layer 35 at an angle equal to or higher than the critical angle, and the light is reflected on the surface of the n-type semiconductor layer 35 again. It travels toward the side of the active layer 33. On the other hand, when the uneven shape 38 is formed on the upper surface of the n-type semiconductor layer 35 in the first region 41, the surface of the n-type semiconductor layer 35 is incident at an angle of a critical angle or more in the first region 41. Since the amount of light is greatly reduced, the amount of light that can be taken out to the outside without being reflected by the n-type semiconductor layer 35 increases.

According to the results of FIG. 6C, it was confirmed that the element of Reference Example 3 has a lower light extraction efficiency than the element of Reference Example 2. On the other hand, according to the result of FIG. 6D, it can be confirmed that the element of the embodiment 3 is compared with the embodiment 2 The components have improved light extraction efficiency. According to these results, it is understood that the effect is different depending on the material of the electrodes (36, 98), except that the uneven shape is formed on the upper surface of the n-type semiconductor layer 35 in the second region 42 except for the inside of the first region 41.

In the case of the electrode 98 having a material having a low reflectance and the element of the reference example 3 in which the uneven shape 39 is provided on the n-type semiconductor layer 35 in the second region 42, the electrode 98 is injected at a critical angle. The amount of light entering is increased, and as a result, the amount of light absorbed by the electrode 98 is increased. Therefore, it is presumed that the element of Reference Example 3 has a lower light extraction efficiency than the element of Reference Example 2.

On the other hand, in the case where the electrode 36 made of a material having a high reflectance and the element of the third embodiment in which the uneven shape 39 is provided on the upper surface of the n-type semiconductor layer 35 in the second region 42 is formed, even if it is incident to The amount of light of the electrode 36 is increased, and most of the light of the electrode 36 is also reflected. A part of the light is taken out through the side surface (bevel) of the surface of the uneven shape 39 and the step of the n-type semiconductor layer 35. Further, in the light reflected by the electrode 36, there is also a situation in which the upper surface of the n-type semiconductor layer 35 in the first region 41 is advanced, but a part of the light is formed by the uneven shape 38 formed in the first region 41. The mess was taken out to the outside. For these reasons, an uneven shape (38, 39) is formed on the upper surface of the n-type semiconductor layer 35 in the first region 41 and the second region 42 by using the electrode 36 made of a material having a high reflectance. Greatly improve the effect of light extraction.

The results of Figures 6E and 6F are consistent with the foregoing considerations. also In other words, according to the result of FIG. 6E, in comparison with the elements of the second embodiment and the reference example 2 in which the uneven shape 38 is formed on the upper surface of the n-type semiconductor layer 35 in the first region 41, the electrode 36 having a highly reflective material is implemented. In Example 2, the light extraction efficiency was improved as compared with Reference Example 2 having the electrode 98 made of a material having a low reflectance (Au). Further, according to the result of FIG. 6F, the elements of the third embodiment and the reference example 3 in which the uneven shape (38, 39) is formed on the upper surface of the n-type semiconductor layer 35 in the first region 41 and the second region 42 have In the third embodiment of the electrode 36 made of a highly reflective material, the light extraction efficiency was improved as compared with the reference example 3 having the electrode 98 made of a material having a low reflectance (Au).

[Other Embodiments]

Hereinafter, the structure of another embodiment will be described.

<1> In FIGS. 1 to 3, a structure in which one electrode 36 is provided on the upper surface of the n-type semiconductor layer 35 is shown. However, the plurality of electrodes 36 may be provided on the upper surface of the n-type semiconductor layer 35. In this case, in order to diffuse the current in a direction parallel to the surface of the substrate 11, the insulating layer 22 may be provided as a position facing the direction in which the electrode 36 faces the surface of the substrate 11 (see FIG. 7). .

When the semiconductor light-emitting device 1 shown in FIG. 7 is manufactured, after the end of step S2, for example, SiO ₂ having a film thickness of about 200 nm is formed, and after the insulating layer 22 is formed, step S3 may be performed. At this time, in step S3, the conductive layer 20 may be formed so as to cover the upper surfaces of the p-type semiconductor layer 31 and the insulating layer 22. Further, the insulating layer 22 may be an insulating material, and may be composed of SiN or Al ₂ O _{3 in} addition to SiO ₂ .

The insulating layer 22 may also have the function of an etch stop layer when the elements of step S7 are separated.

In addition, the semiconductor light-emitting device shown in FIG. 7 has a structure in which the plurality of electrodes 36 and the plurality of insulating layers 22 are provided in the semiconductor light-emitting device of the first embodiment shown in FIG. However, in the semiconductor light-emitting device of the second embodiment shown in FIG. 2 and the semiconductor light-emitting device shown in FIG. 3, a structure including the plurality of electrodes 36 and the insulating layer 22 may be similarly employed.

<2> In the above-described embodiment, the structure in which the light is taken out from the side of the n-type semiconductor layer 35 by the side closer to the substrate 11 as the p-type semiconductor layer 31 will be described. However, as the n-type semiconductor layer 35 and p The structure in which the position of the semiconductor layer 31 is reversed may be used. At this time, the thickness of the p-type semiconductor layer 31 in the second region 42 is thicker than the thickness in the first region 41, and the height position in the second region 42 is higher than the height position in the first region 41. Then, an electrode 36 is formed on the upper surface of the p-type semiconductor layer 31 in the second region 42.

1‧‧‧Semiconductor light-emitting element of the present invention

11‧‧‧Substrate

20‧‧‧ Conductive layer

21‧‧‧Reflective electrode

30‧‧‧Semiconductor layer

31‧‧‧p-type semiconductor layer

33‧‧‧Active layer

35‧‧‧n type semiconductor layer

36‧‧‧Electrode

41‧‧‧First area

42‧‧‧Second area

Claims (4)

A semiconductor light emitting device comprising: a semiconductor layer comprising an n-type semiconductor layer, a p-type semiconductor layer, and an active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer; and a first electrode; And forming a second electrode in contact with a second surface opposite to a first surface of the surface of the semiconductor layer; the semiconductor layer; a first region having a first region and a second region higher than the first region; the first electrode is formed in the second region of the semiconductor layer, The light emitted by the active layer is composed of a material exhibiting high reflectivity. The semiconductor light-emitting device according to the first aspect of the invention, wherein the semiconductor layer is on the first surface side, and has a surface having irregularities in at least one of the first region and the second region. shape. The semiconductor light-emitting device according to the second aspect of the invention, wherein the semiconductor layer is formed on the first surface side, and has a concave-convex shape on a surface of both of the first region and the second region. The semiconductor light-emitting device according to any one of claims 1 to 3, wherein the semiconductor layer is made of a nitride semiconductor layer; and the first electrode is made of Al, Rh, Ag or It consists of materials containing these alloys.