WO2015176493A1 - 显示基板及其制造方法和显示装置 - Google Patents

显示基板及其制造方法和显示装置 Download PDF

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Publication number
WO2015176493A1
WO2015176493A1 PCT/CN2014/089869 CN2014089869W WO2015176493A1 WO 2015176493 A1 WO2015176493 A1 WO 2015176493A1 CN 2014089869 W CN2014089869 W CN 2014089869W WO 2015176493 A1 WO2015176493 A1 WO 2015176493A1
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Prior art keywords
spacer
region
display substrate
substrate
manufacturing
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PCT/CN2014/089869
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English (en)
French (fr)
Inventor
张立
刘兴东
王灿
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京东方科技集团股份有限公司
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Publication of WO2015176493A1 publication Critical patent/WO2015176493A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a display substrate, a method of manufacturing the same, and a display device.
  • large-sized display devices may include: large-sized liquid crystal displays (LCDs) and active matrix organic light-emitting diodes. (Active Matrix/Organic Light Emitting Diode, referred to as: AMOLED) panel.
  • LCDs liquid crystal displays
  • AMOLED Active Matrix/Organic Light Emitting Diode
  • FIG. 1 is a schematic view showing the structure of a spacer and an electrode layer in the prior art.
  • the electrode layer 2 is formed on the spacer. Since the electrode layer 2 is coated on the outside of the spacer in Fig. 1, only the electrode layer 2 is shown in Fig. 1.
  • the spacer is high and the side of the spacer is a long straight side, and the higher spacer has a too steep slope, so when the electrode layer is formed or the spacer is under pressure during the packaging process, due to the coating
  • the electrode layer 2 on the pad is stress-concentrated, so that the electrode layer 2 coated on the spacer is liable to be difficult to overlap, resulting in a phenomenon in which the electrode layer 2 overlying the spacer is broken.
  • the electrode layer 2 is most likely to have a portion of the fault located above the side of the spacer and a portion bordering the bottom edge, as shown in FIG. 1, and the side and bottom borders are shown in FIG. The fault that appears at the place.
  • the electrode layer above the spacer tends to cause a fault in the electrode layer located above the spacer when the stress is concentrated. phenomenon.
  • the present invention provides a display substrate, a method of manufacturing the same, and a display device for preventing a phenomenon in which an electrode layer located above a spacer is broken.
  • the present invention provides a display substrate comprising: a substrate substrate, a spacer above the substrate substrate, and an electrode layer over the spacer, the spacer comprising A stepped structure composed of at least two steps.
  • the height of each step of the stepped structure is the same.
  • the width of at least two steps of the stepped structure decreases layer by layer in a direction away from the substrate.
  • the stepped structure is integrally formed.
  • the spacer has a thickness greater than 10 [mu]m.
  • each step of the stepped structure has a thickness of 2 ⁇ m to 4 ⁇ m.
  • the present invention further provides a display device comprising: a display substrate and a counter substrate disposed opposite to each other, wherein the display substrate is the display substrate.
  • the present invention also provides a method of manufacturing a display substrate, comprising:
  • the spacer Forming a spacer above the base substrate, the spacer comprising a stepped structure composed of at least two steps;
  • An electrode layer is formed over the spacer.
  • the step of forming a spacer above the base substrate comprises:
  • the spacer material layer is exposed once by a mask to form a fully-retained area, a partially-retained area, and a completely non-retained area;
  • the step of applying a layer of the spacer material over the substrate substrate comprises:
  • a layer of spacer material is applied over the substrate substrate by a plurality of spin coating processes.
  • the manufacturing method further includes:
  • the spacer material layer is prebaked at a prebaking temperature and a prebaking time ranging from 70 ° C to 140 ° C, and the prebaking time ranges from 30 seconds to 300 seconds.
  • the manufacturing method further includes:
  • the spacer is subjected to a post-baking treatment at a post-baking temperature and a post-baking time, the post-baking temperature ranging from 200 ° C to 270 ° C, and the post-baking time ranging from 20 minutes to 50 minutes.
  • the mask panel includes at least one light transmissive region in a region corresponding to the spacer, each of the light transmissive regions having a specific transmittance and a number of transmissive regions having different transmittances.
  • the number of step layers is the same as that of the stepped structure.
  • the light transmissive area is used to form the fully reserved area or the partially reserved area.
  • the mask comprises three light-transmissive regions in a region corresponding to the spacer, and the specific transmittance ranges of the three transparent regions are 1% to 10% and 20%, respectively. Up to 50% and 100%.
  • the mask panel includes at least one light transmissive region and at least one slit region in a region corresponding to the spacer, each of the slit regions having a specific width, the transparent region
  • the sum of the number of slit regions of different widths is equal to the number of step layers of the stepped structure.
  • the light-transmitting region is used to form a completely reserved region corresponding to one step in the stepped structure
  • the slit region is used to form a partial reserved region corresponding to the remaining steps in the stepped structure.
  • the mask plate includes a light transmissive region and two of the slit regions in a region corresponding to the spacer, and the specific width ranges of the two slit regions are respectively 0.8 ⁇ m to 1.2 ⁇ m and 1.8 ⁇ m to 2.2 ⁇ m, the specific transmittance of the light-transmitting region is 100%.
  • the spacer comprises a stepped structure composed of at least two steps, which effectively disperses the stress accumulated on the electrode layer above the spacer. Thereby, the phenomenon that the electrode layer located above the spacer is broken is avoided.
  • FIG. 1 is a schematic structural view of a spacer and an electrode layer in the prior art
  • FIG. 2 is a schematic structural diagram of a display substrate according to Embodiment 1 of the present invention.
  • FIG. 3 is a flowchart of a method for manufacturing a display substrate according to Embodiment 3 of the present invention.
  • Figure 4a is a schematic view showing the formation of a spacer material layer in the third embodiment
  • Figure 4b is a schematic view showing the exposure of the spacer material layer in the third embodiment
  • 4c is a schematic structural view of a mask in the third embodiment
  • 4d is another schematic structural view of the mask in the third embodiment.
  • 4e is a schematic view of a spacer formed in the third embodiment
  • 4f is a schematic view of an electrode layer formed in the third embodiment.
  • FIG. 2 is a schematic structural diagram of a display substrate according to Embodiment 1 of the present invention.
  • the display substrate includes: a substrate substrate (not shown), a spacer 1 located above the substrate substrate, and The electrode layer 2 above the spacer 1 includes a stepped structure.
  • This embodiment is described by taking a stepped structure of the spacer 1 including a three-layered step as an example, and the spacer 1 includes a step 11, a step 12, and a step 13.
  • the step 11, the step 12 and the step 13 are stacked, specifically, the step 13 is disposed above the step 12, and the step 12 is disposed above the step 11.
  • the number of layers of the step can be determined according to the height of the spacer 1.
  • the example of the stepped structure of other layers is not specifically described herein.
  • the long straight side of the spacer in the prior art is configured as a stepped structure, thereby effectively dispersing the stress accumulated on the electrode layer above the spacer.
  • the stepped structure is integrally formed.
  • the step 11, the step 12, and the step 13 are integrally formed. It should be noted that if the step 11, When the step 12 and the step 13 are integrally formed, the broken line drawn in Fig. 2 is a boundary line between the steps, and the broken line is for more clearly showing the stepped structure composed of the respective steps.
  • the height d1 of each step may be one of 2 ⁇ m to 4 ⁇ m, and the height of the spacer 1 may be greater than 10 ⁇ m.
  • the height of each step in the stepped structure is the same. As shown in FIG. 2, the steps 11, the step 12, and the step 13 have the same height.
  • the width of at least two steps of the stepped structure decreases layer by layer in a direction away from the substrate.
  • the widths of the step 11, the step 12, and the step 13 are decreased layer by layer, and the width of the step 11 is larger than the width of the step 12, and the width of the step 12 is larger than the width of the step 13.
  • the electrode layer 2 is located above the stepped structure. As shown in FIG. 2, the electrode layer 2 is located above the step 11, the step 12, and the step 13.
  • the material of the electrode layer 2 may include a metal, a transparent oxide or a transparent metal oxide.
  • the metal may include one of Mo, Cr, Al, Cu, Nd or any combination thereof;
  • the transparent oxide may include: ITO, IZO or ITZO;
  • the transparent metal oxide may include: Zn, In, Sn-based metal Transparent oxide.
  • the electrode layer 2 may be a common electrode; if the display substrate is applied to an Active Matrix/Organic Light Emitting Diode (AMOLED) device,
  • AMOLED Active Matrix/Organic Light Emitting Diode
  • the electrode layer 2 can be a cathode or an anode.
  • the substrate substrate under the spacer 1 is not specifically drawn in FIG. 2 of the embodiment.
  • the spacer comprises a stepped structure composed of at least two steps, effectively dispersing the stress accumulated on the electrode layer above the spacer, thereby avoiding the spacer.
  • the electrode layer above the object creates a phenomenon of a fault.
  • Embodiment 2 of the present invention provides a display device, which may include: a display substrate and a counter substrate disposed opposite to each other.
  • the display substrate can be the display substrate provided in the first embodiment, and details are not described herein again.
  • the display device may be a liquid crystal display device, and the display substrate may be colored
  • the film substrate and the counter substrate may be array substrates.
  • the display device may be a liquid crystal display device
  • the display substrate may be an array substrate
  • the opposite substrate may be a color film substrate.
  • the display device may be a liquid crystal display device
  • the display substrate may be a color filter on Array (COA)
  • the opposite substrate may be a glass substrate.
  • COA color filter on Array
  • the display device may be an AMOLED device
  • the display substrate may be an AMOLED substrate
  • the opposite substrate may be a glass substrate.
  • the spacer comprises a stepped structure composed of at least two steps, effectively dispersing the stress accumulated on the electrode layer above the spacer, thereby avoiding the spacer.
  • the electrode layer above the object creates a phenomenon of a fault.
  • Embodiment 3 of the present invention provides a method of manufacturing a display substrate, the method comprising: forming a spacer above a base substrate, the spacer comprising a stepped structure composed of at least two steps; and An electrode layer is formed above the mat.
  • FIG. 3 is a flowchart of a method for manufacturing a display substrate according to Embodiment 3 of the present invention. As shown in FIG. 3, the method includes:
  • Step 101 coating a spacer material layer over the base substrate.
  • FIG. 4a is a schematic view showing the formation of a spacer material layer in the third embodiment.
  • a spacer material layer 3 is formed over the base substrate.
  • the spacer material layer 3 can be applied over the substrate substrate by a plurality of spin coating processes.
  • the first spacer material sub-layer 31 may be spin-coated on the base substrate, and the rotational speed of the spin coating may range from 200r/20s to 400r/20s (200 to 400 revolutions per 20 seconds), the first partition The thickness d3 of the spacer material sub-layer 31 may range from 4 ⁇ m to 6 ⁇ m; the above-described spin coating process is repeatedly performed, and a second spacer material sub-layer 32 is spin-coated on the first spacer material sub-layer 31.
  • the rotational speed of the spin coating may be 200r/20s to 400r/20s, and the thickness d2 of the second spacer material sublayer 32 may range from 4 ⁇ m to 6 ⁇ m, so that the sum of the thicknesses D2 of the formed spacer material layer 3 is More than 10 ⁇ m.
  • the broken line in Fig. 4a is the boundary line between the two layers of the spacer material.
  • the display substrate is a color film substrate
  • the color film substrate may include a black matrix pattern and a color matrix pattern, and a flat layer is formed on the black matrix pattern and the color matrix pattern, and the step may be above the flat layer.
  • a layer of spacer material is applied. It should be noted that the substrate substrates under the spacers are not specifically drawn in the drawings of the embodiment.
  • Step 102 Perform a single exposure of the spacer material layer through the mask to form a fully-retained area, a partially-retained area, and a completely non-retained area.
  • Fig. 4b is a schematic view showing the exposure of the spacer material layer 3 in the third embodiment. As shown in Fig. 4b, the spacer material layer 3 is exposed once by the mask 4 to form a fully-retained area, a partially-retained area, and a completely non-retained area.
  • the mask 4 includes at least one light-transmitting region in a region corresponding to each of the spacers, and each of the light-transmitting regions has a specific transmittance, and the number and step of the light-transmitting regions having different transmittances The number of steps of the structure is the same, and the light-transmitting area is used to form a completely reserved area or a partially reserved area.
  • 4c is a schematic structural view of a mask in the third embodiment. As shown in FIG. 4c, taking a spacer structure including a stepped structure composed of three steps, the mask plate includes three light-transmitting regions in a region corresponding to each of the spacers, and three light-transmitting regions.
  • the specific transmittance ranges for the regions are 1% to 10%, 20% to 50%, and 100%, respectively.
  • the three light-transmitting regions are respectively a light-transmitting region 41, a light-transmitting region 42, and a light-transmitting region 43, wherein the specific transmittance of the light-transmitting region 41 ranges from 1% to 10%, and the specific transmission of the light-transmitting region 42
  • the rate ranges from 20% to 50%, and the specific transmittance of the light-transmitting region 43 is 100%.
  • the light-transmitting region 41 is used to form a partial retention area corresponding to the step 11
  • the light-transmitting region 42 is used to form a partial retention area corresponding to the step 12
  • the light-transmitting area 43 is used for A completely reserved area corresponding to the step 13 is formed.
  • the mask further includes an opaque region 47 in a region corresponding to each spacer, and the opaque region 47 is used to form a completely non-retained region.
  • the shape of each of the above steps can be controlled by the transmittance of the light-transmitting region of the mask.
  • the mask shown in Figure 4c is a Halftone mask (HTM).
  • the mask 4 includes at least one light transmissive area and at least one slit area in a region corresponding to each of the spacers, each slit area having a specific width, and the light transmissive area is used to form a stepped shape a layer of steps in the structure corresponding to the completely reserved area, the slit area is used to form a portion of the remaining portion of the stepped structure corresponding to the remaining area, the transparent area of the mask 4 in the area corresponding to each spacer
  • the sum of the number of slit regions of different widths is equal to the number of step layers of the stepped structure.
  • 4d is a schematic view showing another structure of the mask in the third embodiment. As shown in FIG.
  • the stepped structure of one spacer includes three steps, and the mask includes a light transmitting area and two slit areas in a light transmitting area corresponding to each spacer.
  • the specific width of the two slit regions ranges from 0.8 ⁇ m to 1.2 ⁇ m and 1.8 ⁇ m to 2.2 ⁇ m, respectively, and the specific transmittance of the light-transmitting region includes 100%. In practical applications, it is also possible to set a specific width of the slit region according to the needs of different products.
  • the mask plate includes a slit region 44, a slit region 45, and a light transmitting region 46 in a region corresponding to each spacer, wherein, preferably, the slit region 44 has a specific width d4 of 1 ⁇ m.
  • the specific width d5 of the slit region 45 is 2 ⁇ m, and the specific transmittance of the light-transmitting region 46 includes 100%.
  • the shape of the slit region 44 and the slit region 45 are both annular.
  • the slit region 44 is for forming a partial retention region corresponding to the step 11
  • the slit region 45 is for forming a partial retention region corresponding to the step 12
  • the light transmission region 46 It is used to form a completely reserved area corresponding to the step 13.
  • the mask further includes an opaque region 47 in a region corresponding to each spacer, and the opaque region 47 is used to form a completely non-retained region.
  • the respective step shapes of the stepped structure described above can be controlled by the width of the slit region of the mask.
  • the mask shown in Figure 4d is a Graytone Mask (GTM).
  • Step 103 developing the exposed substrate substrate, removing the non-retained portion in the completely non-retained region and the partially-retained region, and retaining the remaining portion in the fully-retained region and the partially-retained region to form a spacer.
  • FIG. 4e is a schematic view of a spacer formed in the third embodiment. As shown in Fig. 4b and Fig. 4e, the non-retained portion 51 in the completely non-retained region and the partially-retained region is removed by the developing process, and the remaining portion 52 and the remaining portion 52 in the partially-retained region are retained, thereby forming the spacer 1.
  • Step 104 forming an electrode layer on the spacer.
  • the electrode material layer 2 may be formed by patterning the electrode material layer by a patterning process.
  • the patterning process may include processes such as photoresist coating, exposure, development, etching, and photoresist stripping.
  • the material of the electrode layer 2 may include a metal, a transparent oxide or a transparent metal oxide.
  • the metal may include one of Mo, Cr, Al, Cu, Nd or any combination thereof;
  • the transparent oxide may include: ITO, IZO or ITZO;
  • the transparent metal oxide may include: Zn, In, Sn-based metal Transparent oxide.
  • the method may further include: pre-baking the spacer material layer with a pre-baking temperature and a pre-baking time.
  • the prebaking temperature ranges from 70 ° C to 140 ° C
  • the prebaking time ranges from 30 seconds to 300 seconds.
  • the spacer material layer can be pre-baked according to the self-property of the spacer material layer by using a lower pre-baking temperature and a shorter pre-baking time, which can effectively increase the developing solution in the subsequent developing process.
  • the rate of dissolution and sensitivity increase the contrast.
  • the method may further include: performing a post-baking treatment on the spacer after the drying temperature and the post-baking time.
  • the post-baking temperature ranges from 200 ° C to 270 ° C
  • the post-baking time ranges from 20 min to 50 min.
  • the post-baking treatment can promote the spacer to shape the spacer to form a desired topography.
  • the inclination angle of each step of the stepped structure can be adjusted by the prebaking temperature, the prebaking time, the post-baking temperature, and the post-baking time.
  • the manufacturing method of the display substrate provided in this embodiment can be used to manufacture the display substrate provided in the first embodiment.
  • the specific description of the display substrate can participate in the first embodiment.
  • the spacer includes a stepped structure composed of at least two steps, effectively dispersing stress accumulated on the electrode layer above the spacer, thereby The phenomenon that the electrode layer located above the spacer is broken is avoided.
  • the spacer material is formed by using a halftone mask or a gray tone mask to expose the spacer material layer once, thereby simplifying the manufacturing process.
  • the manufacturing method of the spacer is made simple and easy to implement.

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Abstract

提供了一种显示基板及其制造方法和显示装置。显示基板包括：衬底基板、位于衬底基板上方的隔垫物（1）和位于隔垫物（1）上方的电极层（2），隔垫物（1）包括由至少两层台阶（11，12，13）构成的台阶状结构。在提供的显示基板及其制造方法和显示装置的技术方案中，隔垫物（1）包括由至少两层台阶（11，12，13）构成的台阶状结构，有效分散了位于隔垫物（1）之上的电极层（2）上聚集的应力，从而避免了位于隔垫物（1）之上的电极层（2）产生断层的现象。

Description

显示基板及其制造方法和显示装置 技术领域
本发明涉及显示技术领域，特别涉及一种显示基板及其制造方法和显示装置。
背景技术
随着显示技术的发展，大尺寸的显示装置的应用越来越广泛，其中，大尺寸的显示装置可包括：大尺寸的液晶显示器(Liquid Crystal Display，简称：LCD)和有源矩阵有机发光二极管(Active Matrix/Organic Light Emitting Diode，简称：AMOLED)面板。由于大尺寸的显示装置存在封装盒厚(Cell Gap)的极限厚度问题，因此在大尺寸的显示装置中，为保证显示装置的盒厚则需要形成较高的隔垫物(Photo Spacer，简称：PS)，通常隔垫物的厚度达到10μm以上，并且需要在该隔垫物上形成电极层。
图1为现有技术中隔垫物和电极层的结构示意图。如图1所示，电极层2形成于隔垫物之上，由于图1中电极层2披覆于隔垫物的外部，因此图1中仅标注出了电极层2。隔垫物较高且该隔垫物的侧面为长直侧面，较高的隔垫物坡度过大，因此在形成电极层时或者在封装过程中隔垫物承受压力时，由于披覆于隔垫物之上的电极层2应力聚集，因此披覆于隔垫物之上的电极层2容易出现搭接困难，从而导致披覆于隔垫物之上的电极层2出现断层的现象。其中，电极层2最容易出现断层的部位位于隔垫物侧面之上的部分及与底边交界的部分，此种情况可参见图1中所示，图1中示出了侧面和底边交界处出现的断层。
综上所述，现有技术中，由于隔垫物较高且侧面为长直侧面，导致隔垫物之上的电极层在应力聚集时而易于导致位于隔垫物之上的电极层产生断层的现象。
发明内容
本发明提供一种显示基板及其制造方法和显示装置，用于避免位于隔垫物之上的电极层产生断层的现象。
为实现上述目的，本发明提供了一种显示基板，包括：衬底基板、位于所述衬底基板上方的隔垫物和位于所述隔垫物上方的电极层，所述隔垫物包括由至少两层台阶构成的台阶状结构。
可选地，所述台阶状结构的每层台阶的高度相同。
可选地，所述台阶状结构的至少两层台阶的宽度向远离所述衬底基板的方向逐层递减。
可选地，所述台阶状结构一体化形成。
可选地，所述隔垫物的厚度大于10μm。
可选地，所述台阶状结构的每层台阶的厚度为2μm至4μm。
为实现上述目的，本发明还提供了一种显示装置，包括：相对设置的显示基板和对置基板，所述显示基板采用上述显示基板。
为实现上述目的，本发明还提供了一种显示基板的制造方法，包括：
在衬底基板的上方形成隔垫物，所述隔垫物包括由至少两层台阶构成的台阶状结构；
在所述隔垫物的上方形成电极层。
可选地，所述在衬底基板的上方形成隔垫物的步骤包括：
在所述衬底基板的上方涂覆隔垫物材料层；
通过掩膜板对所述隔垫物材料层进行一次曝光，形成完全保留区域、部分保留区域和完全不保留区域；以及
对曝光后的衬底基板进行显影，去除所述完全不保留区域和部分保留区域中的不保留部分，并保留所述完全保留区域和所述部分保留区域中的保留部分以形成所述隔垫物。
可选地，所述在所述衬底基板的上方涂覆隔垫物材料层的步骤包括：
通过多次旋涂工艺在所述衬底基板的上方涂覆隔垫物材料层。
可选地，所述在所述衬底基板的上方涂覆隔垫物材料层之后，所述制造方法还包括：
以预烘温度和预烘时间对隔垫物材料层进行预烘烤处理，所述预烘温度范围为70℃至140℃，所述预烘时间范围为30秒至300秒。
可选地，所述对曝光后的衬底基板进行显影的步骤之后，所述制造方法还包括：
以后烘温度和后烘时间对隔垫物进行后烘烤处理，所述后烘温度范围为200℃至270℃，所述后烘时间范围为20分钟至50分钟。
可选地，所述掩膜板在与所述隔垫物对应的区域内包括至少一个透光区域，每个所述透光区域具有特定透过率，透过率不同的透光区域的数量与所述台阶状结构的台阶层数相同。其中，所述透光区域用于形成所述完全保留区域或者所述部分保留区域。
可选地，所述掩膜板在与所述隔垫物对应的区域内包括三个透光区域，三个所述透光区域的特定透过率范围分别为1％至10％、20％至50％以及100％。
可选地，所述掩膜板在与所述隔垫物对应的区域内包括至少一个透光区域和至少一个狭缝区域，每个所述狭缝区域具有特定宽度，，所述透光区域和不同宽度的所述狭缝区域的数量之和等于所述台阶状结构的台阶层数。其中，所述透光区域用于形成台阶状结构中的一层台阶对应的完全保留区域，所述狭缝区域用于形成台阶状结构中的其余台阶对应的部分保留区域。
可选地，所述掩膜板在与所述隔垫物对应的区域内包括一个透光区域和两个所述狭缝区域，两个所述狭缝区域的特定宽度范围分别为0.8μm至1.2μm以及1.8μm至2.2μm，透光区域的特定透过率为100％。
本发明具有以下有益效果：
本发明提供的显示基板及其制造方法和显示装置的技术方案中，隔垫物包括由至少两层台阶构成的台阶状结构，有效分散了位于隔垫物之上的电极层上聚集的应力，从而避免了位于隔垫物之上的电极层产生断层的现象。
附图说明
图1为现有技术中隔垫物和电极层的结构示意图；
图2为本发明实施例一提供的一种显示基板的结构示意图；
图3为本发明实施例三提供的一种显示基板的制造方法的流程图；
图4a为实施例三中形成隔垫物材料层的示意图；
图4b为实施例三中对隔垫物材料层进行一次曝光的示意图；
图4c为实施例三中掩膜板的一种结构示意图；
图4d为实施例三中掩膜板的另一种结构示意图；
图4e为实施例三中形成的隔垫物的示意图；
图4f为实施例三中形成的电极层的示意图。
具体实施方式
为使本领域的技术人员更好地理解本发明的技术方案，下面结合附图对本发明提供的显示基板及其制造方法和显示装置进行详细描述。
图2为本发明实施例一提供的一种显示基板的结构示意图，如图2所示，该显示基板包括：衬底基板(未示出)、位于衬底基板上方的隔垫物1和位于隔垫物1上方的电极层2，隔垫物1包括台阶状结构。
本实施例以隔垫物1的台阶状结构包括三层台阶为例进行描述，隔垫物1包括台阶11、台阶12和台阶13。台阶11、台阶12和台阶13层叠设置，具体地，台阶13设置于台阶12之上，台阶12设置于台阶11之上。在实际应用中，可根据隔垫物1的高度确定台阶的层数，其它层数的台阶状结构的例子此处不再具体描述。本实施例中，将现有技术中隔垫物的长直侧面构造成台阶状结构，从而有效分散了隔垫物之上的电极层上聚集的应力。
本实施例中，优选地，台阶状结构一体成型。如图2所示，台阶11、台阶12和台阶13一体成型。需要说明的是：若台阶11、 台阶12和台阶13一体成型时，图2中画出的虚线为各台阶之间的分界线，该虚线是为了更清楚的表示出由各个台阶构成的台阶状结构。
本实施例中，每层台阶的高度d1可为2μm至4μm中的一个高度，并且隔垫物1的高度可大于10μm。优选地，台阶状结构中的每层台阶的高度相同。如图2所示，台阶11、台阶12和台阶13的高度相同。
本实施例中，所述台阶状结构的至少两层台阶的宽度向远离衬底基板的方向逐层递减。如图2所示，台阶11、台阶12和台阶13的宽度逐层递减，则台阶11的宽度大于台阶12的宽度，而台阶12的宽度大于台阶13的宽度。
电极层2位于台阶状结构之上。如图2所示，电极层2位于台阶11、台阶12和台阶13之上。优选地，电极层2的材料可包括金属、透明氧化物或者透明金属氧化物。例如，金属可包括Mo、Cr、Al、Cu、Nd中的一种或其任意组合；透明氧化物可包括：ITO、IZO或者ITZO；透明金属氧化物可包括：含有Zn、In、Sn系金属的透明氧化物。例如：若该显示基板应用于液晶显示装置，则该电极层2可以为公共电极；若该显示基板应用于有源矩阵有机发光二极管(Active Matrix/Organic Light Emitting Diode，简称：AMOLED)装置，则该电极层2可以为阴极或者阳极。
需要说明的是：本实施例的图2中并未具体绘制位于隔垫物1下方的衬底基板。
本实施例提供的显示基板的技术方案中，隔垫物包括由至少两层台阶构成的台阶状结构，有效分散了位于隔垫物之上的电极层上聚集的应力，从而避免了位于隔垫物之上的电极层产生断层的现象。
本发明实施例二提供了一种显示装置，该显示装置可包括：相对设置的显示基板和对置基板。该显示基板可采用上述实施例一提供的显示基板，此处不再赘述。
可选地，显示装置可以为液晶显示装置，显示基板可以为彩 膜基板，对置基板可以为阵列基板。
可选地，显示装置可以为液晶显示装置，显示基板可以为阵列基板，对置基板可以为彩膜基板。
可选地，显示装置可以为液晶显示装置，显示基板可以为彩膜阵列基板(Color Filter on Array，简称：COA)，对置基板可以为玻璃基板。
可选地，显示装置可以为AMOLED装置，显示基板可以为AMOLED基板，对置基板可以为玻璃基板。
本实施例提供的显示装置的技术方案中，隔垫物包括由至少两层台阶构成的台阶状结构，有效分散了位于隔垫物之上的电极层上聚集的应力，从而避免了位于隔垫物之上的电极层产生断层的现象。
本发明实施例三提供了一种显示基板的制造方法，该方法包括：在衬底基板的上方形成隔垫物，所述隔垫物包括由至少两层台阶构成的台阶状结构；以及在隔垫物的上方形成电极层。
下面以一个具体的实例对实施例三中的显示基板的制造方法进行详细描述。图3为本发明实施例三提供的一种显示基板的制造方法的流程图，如图3所示，该方法包括：
步骤101、在衬底基板的上方涂覆隔垫物材料层。
图4a为实施例三中形成隔垫物材料层的示意图。如图4a所示，在衬底基板的上方形成隔垫物材料层3。优选地，可通过多次旋涂工艺在衬底基板的上方涂覆隔垫物材料层3。具体地，可在衬底基板的上方旋涂第一隔垫物材料子层31，旋涂的转速范围可以为200r/20s至400r/20s(每20秒200转至400转)，第一隔垫物材料子层31的厚度d3范围可以为4μm至6μm；重复执行上述旋涂工艺，在上述第一隔垫物材料子层31之上再旋涂一层第二隔垫物材料子层32，旋涂的转速可以为200r/20s至400r/20s，该第二隔垫物材料子层32的厚度d2范围可以为4μm至6μm，以使形成的隔垫物材料层3的厚度D2之和大于10μm。需要说明的是：图4a中的虚线为两层隔垫物材料子层的分界线。通过多次旋涂工艺可形 成很高的隔垫物材料层，本实施例中采用的是两次旋涂工艺。在实际应用中可根据隔垫物材料层的高度需要，确定相应的旋涂工艺的次数。
例如，若显示基板为彩膜基板时，该彩膜基板可包括黑矩阵图形和彩色矩阵图形，在黑矩阵图形和彩色矩阵图形之上形成有平坦层，则本步骤可以为在平坦层之上涂覆隔垫物材料层。需要说明的是，本实施例的各附图中并未具体绘制位于隔垫物下方的衬底基板。
步骤102、通过掩膜板对隔垫物材料层进行一次曝光，形成完全保留区域、部分保留区域和完全不保留区域。
图4b为实施例三中对隔垫物材料层3进行一次曝光的示意图。如图4b所示，通过掩膜板4对隔垫物材料层3进行一次曝光，形成完全保留区域、部分保留区域和完全不保留区域。
可选地，该掩膜板4在与每个隔垫物对应的区域内包括至少一个透光区域，每个透光区域具有特定透过率，透过率不同的透光区域的数量与台阶状结构的台阶层数相同，透光区域用于形成完全保留区域或者部分保留区域。图4c为实施例三中掩膜板的一种结构示意图。如图4c所示，以一个隔垫物包括由三个台阶构成的台阶状结构为例，则掩膜板在与每个隔垫物对应的区域内包括三个透光区域，三个透光区域的特定透过率范围分别为1％至10％、20％至50％以及100％。该三个透光区域分别为透光区域41、透光区域42和透光区域43，其中，透光区域41的特定透过率范围为1％至10％，透光区域42的特定透过率范围为20％至50％，透光区域43的特定透过率为100％。结合图2、图4b和图4c所示，透光区域41用于形成与台阶11对应的部分保留区域，透光区域42用于形成与台阶12对应的部分保留区域，透光区域43用于形成与台阶13对应的完全保留区域。另外，掩膜板在与每个隔垫物对应的区域内还包括不透光区域47，不透光区域47用于形成完全不保留区域。上述各个台阶的形状可通过掩膜板的透光区域的透过率来控制。图4c中所示的掩膜板为半色调掩膜板(Halftone mask，简称：HTM)。
可选地，该掩膜板4在与每个隔垫物对应的区域内包括至少一个透光区域和至少一个狭缝区域，每个狭缝区域具有特定宽度，透光区域用于形成台阶状结构中的一层台阶对应的完全保留区域，狭缝区域用于形成台阶状结构中的其余层台阶对应的部分保留区域，掩膜板4在与每个隔垫物对应区域内的透光区域和不同宽度的狭缝区域的数量之和等于台阶状结构的台阶层数。图4d为实施例三中掩膜板的另一种结构示意图。如图4d所示，以一个隔垫物的台阶状结构包括三个台阶为例，则掩膜板在与每个隔垫物对应的透光区域内包括一个透光区域和两个狭缝区域，两个狭缝区域的特定宽度范围分别为0.8μm至1.2μm以及1.8μm至2.2μm，透光区域的特定透过率包括100％。在实际应用中，还可以根据不同产品的需要设定狭缝区域的特定宽度。具体地，该掩膜板在与每个隔垫物对应的区域内包括狭缝区域44、狭缝区域45和透光区域46，其中，优选地，狭缝区域44的特定宽度d4为1μm，狭缝区域45的特定宽度d5为2μm，透光区域46的特定透过率包括100％。狭缝区域44以及狭缝区域45的形状均为环状。结合图2、图4b和图4d所示，其中，狭缝区域44用于形成与台阶11对应的部分保留区域，狭缝区域45用于形成与台阶12对应的部分保留区域，透光区域46用于形成与台阶13对应的完全保留区域。另外，掩膜板在与每个隔垫物对应的区域内还包括不透光区域47，不透光区域47用于形成完全不保留区域。上述台阶状结构的各个台阶形状可通过掩膜板的狭缝区域的宽度来控制。图4d中所示的掩膜板为灰调掩膜板(Graytone Mask，简称：GTM)。
步骤103、对曝光后的衬底基板进行显影，去除完全不保留区域和部分保留区域中的不保留部分，并保留完全保留区域和部分保留区域中的保留部分以形成隔垫物。
图4e为实施例三中形成的隔垫物的示意图。如图4b和图4e所示，通过显影工艺去除完全不保留区域和部分保留区域中的不保留部分51，并保留完全保留区域和部分保留区域中的保留部分52，从而形成隔垫物1。
步骤104、在隔垫物之上形成电极层。
图4f为实施例三中形成的电极层的示意图。如图4f所示，在隔垫物1之上沉积电极材料层，以形成电极层2。可选地，可以利用构图工艺对电极材料层进行构图工艺，形成电极层2。其中，构图工艺可包括光刻胶涂覆、曝光、显影、刻蚀以及光刻胶剥离等工艺。优选地，电极层2的材料可包括金属、透明氧化物或者透明金属氧化物。例如，金属可包括Mo、Cr、Al、Cu、Nd中的一种或其任意组合；透明氧化物可包括：ITO、IZO或者ITZO；透明金属氧化物可包括：含有Zn、In、Sn系金属的透明氧化物。
可选地，本实施例中，在步骤101和步骤102之间，所述方法还可以包括：以预烘温度和预烘时间对隔垫物材料层进行预烘烤处理。优选地，预烘温度范围为：70℃至140℃，预烘时间范围为：30秒至300秒。本实施例可根据隔垫物材料层的自身性质，采用较低的预烘温度和较短的预烘时间对隔垫物材料层进行预烘烤处理，可有效增大后续显影工艺中显影液的溶解速率和感光度，从而增大对比度。
可选地，本实施例中，在步骤103和步骤104之间，所述方法还可以包括：以后烘温度和后烘时间对隔垫物进行后烘烤处理。优选地，后烘温度范围为：200℃至270℃，后烘时间范围为：20min至50min。本实施例通过后烘烤处理，可促使隔垫物定型以利于隔垫物形成期望形貌。
本实施例中，台阶状结构的各个台阶的倾斜角可由预烘温度、预烘时间、后烘温度以及后烘时间来调节。
本实施例提供的显示基板的制造方法可用于制造上述实施例一提供的显示基板，对显示基板的具体描述可参加上述实施例一。
本实施例提供的显示基板的制造方法制造出的显示基板中，隔垫物包括由至少两层台阶构成的台阶状结构，有效分散了位于隔垫物之上的电极层上聚集的应力，从而避免了位于隔垫物之上的电极层产生断层的现象。采用半色调掩膜板或者灰调掩膜板对隔垫物材料层进行一次曝光即可形成隔垫物，从而有效简化了制造工艺， 使得隔垫物的制造方法简单且易于实现。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (18)

  1. 一种显示基板，包括：衬底基板、位于所述衬底基板上方的隔垫物和位于所述隔垫物上方的电极层，所述隔垫物包括由至少两层台阶构成的台阶状结构。
  2. 根据权利要求1所述的显示基板，其中，所述台阶状结构的每层台阶的高度相同。
  3. 根据权利要求1所述的显示基板，其中，所述台阶状结构的至少两层台阶的宽度向远离所述衬底基板的方向逐层递减。
  4. 根据权利要求1所述的显示基板，其中，所述台阶状结构一体化形成。
  5. 根据权利要求1所述的显示基板，其中，所述隔垫物的厚度大于10μm。
  6. 根据权利要求1所述的显示基板，其中，所述台阶状结构的每层台阶的厚度范围为2μm至4μm。
  7. 一种显示装置，包括相对设置的显示基板和对置基板，所述显示基板为上述权利要求1至6中任一项所述的显示基板。
  8. 一种显示基板的制造方法，包括：
    在衬底基板的上方形成隔垫物，所述隔垫物包括由至少两层台阶构成的台阶状结构；以及
    在所述隔垫物的上方形成电极层。
  9. 根据权利要求8所述的显示基板的制造方法，其中，所述在衬底基板的上方形成隔垫物的步骤包括：
    在所述衬底基板的上方涂覆隔垫物材料层；
    通过掩膜板对所述隔垫物材料层进行一次曝光，形成完全保留区域、部分保留区域和完全不保留区域；以及
    对曝光后的衬底基板进行显影，去除所述完全不保留区域和部分保留区域中的不保留部分，并保留所述完全保留区域和所述部分保留区域中的保留部分以形成所述隔垫物。
  10. 根据权利要求9所述的显示基板的制造方法，其中，所述在所述衬底基板的上方涂覆隔垫物材料层的步骤包括：
    通过多次旋涂工艺在所述衬底基板的上方涂覆隔垫物材料层。
  11. 根据权利要求9所述的显示基板的制造方法，其中，所述在所述衬底基板的上方涂覆隔垫物材料层之后，所述方法还包括：
    以预烘温度和预烘时间对隔垫物材料层进行预烘烤处理，所述预烘温度范围为70℃至140℃，所述预烘时间范围为30秒至300秒。
  12. 根据权利要求9所述的显示基板的制造方法，其中，所述对曝光后的衬底基板进行显影的步骤之后，所述制造方法还包括：
    以后烘温度和后烘时间对隔垫物进行后烘烤处理，所述后烘温度范围为200℃至270℃，所述后烘时间范围为20分钟至50分钟。
  13. 根据权利要求9所述的显示基板的制造方法，其中，所述掩膜板在与所述隔垫物对应的区域内包括至少一个透光区域，每个所述透光区域具有特定透过率，透过率不同的透光区域的数量与所述台阶状结构的台阶层数相同。
  14. 根据权利要求13所述的显示基板的制造方法，其中，所述透光区域用于形成所述完全保留区域或者所述部分保留区域。
  15. 根据权利要求13所述的显示基板的制造方法，其中，所述掩膜板在与所述隔垫物对应的区域内包括三个所述透光区域，三个所述透光区域的特定透过率范围分别为1％至10％、20％至50％以及100％。
  16. 根据权利要求9所述的显示基板的制造方法，其中，所述掩膜板在与所述隔垫物对应的区域内包括至少一个透光区域和至少一个狭缝区域，每个所述狭缝区域具有特定宽度，所述透光区域和不同宽度的所述狭缝区域的数量之和等于所述台阶状结构的台阶层数。
  17. 根据权利要求16所述的显示基板的制造方法，其中，所述透光区域用于形成台阶状结构中的一层台阶对应的完全保留区域，所述狭缝区域用于形成台阶状结构中的其余层台阶对应的部分保留区域。
  18. 根据权利要求16所述的显示基板的制造方法，其中，所述掩膜板在与所述隔垫物对应的区域内包括一个透光区域和两个所述狭缝区域，两个所述狭缝区域的特定宽度范围分别为0.8μm至1.2μm以及1.8μm至2.2μm，透光区域的特定透过率为100％。
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