WO2015109663A1 - 一种纳米超导量子干涉器件及其制作方法 - Google Patents

一种纳米超导量子干涉器件及其制作方法 Download PDF

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Publication number
WO2015109663A1
WO2015109663A1 PCT/CN2014/074880 CN2014074880W WO2015109663A1 WO 2015109663 A1 WO2015109663 A1 WO 2015109663A1 CN 2014074880 W CN2014074880 W CN 2014074880W WO 2015109663 A1 WO2015109663 A1 WO 2015109663A1
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superconducting
superconducting material
material layer
layer
nano
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PCT/CN2014/074880
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English (en)
French (fr)
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陈垒
王镇
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中国科学院上海微系统与信息技术研究所
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Priority to US15/124,668 priority Critical patent/US9741919B2/en
Publication of WO2015109663A1 publication Critical patent/WO2015109663A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/10—Junction-based devices
    • H10N60/12—Josephson-effect devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • H01L29/0669—Nanowires or nanotubes
    • H01L29/0676—Nanowires or nanotubes oriented perpendicular or at an angle to a substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H10N60/0156—Manufacture or treatment of devices comprising Nb or an alloy of Nb with one or more of the elements of group IVB, e.g. titanium, zirconium or hafnium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H10N60/0241—Manufacture or treatment of devices comprising nitrides or carbonitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H10N60/0912—Manufacture or treatment of Josephson-effect devices

Definitions

  • the invention belongs to the field of superconducting sub-information technology, and relates to a nano superconducting quantum interference device and a manufacturing method thereof. Background technique
  • the Superconducting Quantum Interference Device is a very sensitive magnetic sensor designed using the Josephson effect and can be used to detect magnetic fields as small as 10-15 Tesla (equivalent to several billionths of the Earth's magnetic field). The magnetic sensitivity sensor with the highest sensitivity is detected. SQUID magnetometers are mainly used for accurate measurement of weak magnetic fields in the fields of physics, chemistry, materials, geology, biology, medicine, etc., and continue to be popularized due to their outstanding high sensitivity. Nano-superconducting quantum interference devices (NanoSQUID) are a new type of device based on superconducting quantum interference devices (SQUID).
  • the main process for preparing nanoSQUID in the world is to directly describe the planar structure of superconducting rings and nano-junctions on superconducting films by electron beam exposure or focused ion beam etching.
  • this method is relatively straightforward, there are some Disadvantages.
  • the size of the nanoSQUID is limited by electron beam exposure or focused ion beam etching.
  • the diameter of the superconducting ring is at least around 50 nanometers, and it is difficult to break down to the true nanometer level.
  • nano-superconducting quantum interference devices now have a problem of small critical current and small depth of flux modulation curve, which is larger than traditional SQUID.
  • the main reason is that most of the superconducting materials with higher critical temperatures have shorter coherence lengths, and the length of the nano-junctions cannot be equal to their coherence lengths. Another reason is that the thickness of the nano-junctions and the superconducting ring pass through the same superconducting film. The thickness of the superconducting ring is limited by the nano-junction. The superconducting current still has phase gradient diffusion in the superconducting ring except the nano-junction.
  • an object of the present invention is to provide a nano-superconducting quantum interference device and a manufacturing method thereof, which are used to solve the problem that the length of the nano-junction in the prior art cannot be equivalent to the coherence length of the superconducting material.
  • the thickness of the superconducting ring is limited by the nano-junction, resulting in a problem of device performance degradation.
  • the present invention provides a method for fabricating a nano-superconducting quantum interference device, comprising at least the following steps:
  • step S4 the front side and the side surface of the structure obtained in step S3 are covered with a layer of insulating material;
  • the first superconducting material layer of the predetermined region is etched away and the substrate is exposed and further etched to form a recessed region in the substrate;
  • the portion of the insulating material located in the recessed region just fills the recessed region.
  • the insulating interlayer has a thickness ranging from 1 to 10 nm.
  • the material of the substrate is selected from at least one of MgO, sapphire, Si 3 N 4 , A1 2 0 3 and SiO 2 .
  • the material of the first superconducting material layer and the second superconducting material layer is selected from the group consisting of Nb ( ⁇ ), NbN (tantalum nitride), NbTi ( ⁇ titanium), and NbTiN ( ⁇ titanium nitride). At least one of them.
  • the present invention also provides a nano-superconducting quantum interference device comprising at least a planar superconducting structure and at least one nanowire formed on a surface of the planar superconducting structure, the planar superconducting structure comprising a substrate and discretely formed on the a first superconducting material layer and a second superconducting material layer on the surface of the substrate; an insulating interlayer formed between the first superconducting material layer and the second superconducting material layer; the second superconducting material layer An insulating material is formed between the substrate and the substrate; the nanowire is perpendicular to the insulating interlayer and connects the first layer of superconducting material and the second layer of superconducting material.
  • the device includes an insulating interlayer and two nanowires perpendicular to the insulating interlayer; the first superconducting material layer and the second superconducting material layer are respectively formed on both sides of the insulating interlayer And connected by the nanowires.
  • the device includes an insulating interlayer and two nanowires perpendicular to the insulating interlayer; the first superconducting material layer and the second superconducting material layer are respectively formed on both sides of the insulating interlayer And being connected by the nanowire; the device is formed with a groove or a through groove in a region between the two nanowires; the groove or the through groove partitions the insulating interlayer and penetrates the first superconducting material a layer and a second layer of superconducting material.
  • the device includes two insulating interlayers and a nanowire perpendicular to the insulating interlayer; the first superconducting material layer is formed at one end between the two insulating interlayers and extends outwardly at the other end;
  • the second superconducting material layer has a "U" shaped portion and a tail portion formed at the closed end of the U" shaped portion; the "U" shaped portion flared side end portions are respectively located outside the two insulating interlayers, the first super Forming a groove or a groove between the end of the conductive material layer between the two insulating interlayers and the closed end of the U"-shaped portion of the second layer of superconducting material; the groove or the groove extending through the first a superconducting material layer and a second superconducting material layer.
  • the device comprises two insulating interlayers and one nanowire perpendicular to the insulating interlayer; the first layer of superconducting material is formed between two insulating interlayers; the second layer of superconducting material is one a rectangular ring, a pair of sides of the rectangular ring are respectively located outside the two insulating interlayers, and another pair of sides respectively form a groove or a groove between the first layer of superconducting material; The through groove penetrates the first superconducting material layer and the second superconducting material layer.
  • the insulating interlayer has a thickness ranging from 1 to 10 nm.
  • a nano-superconducting quantum interference device and a method for fabricating the same have the following beneficial effects:
  • the nano-superconducting quantum interference device is fabricated, the superconducting ring and the nano-junction are divided into two main steps to realize .
  • the distance between the first superconducting material layer and the second superconducting material layer is determined by the insulating interlayer interposed therebetween, and the width thereof is controllable at the atomic scale, up to l ⁇ 10 nm.
  • Another feature is to separately generate superconducting nanowires perpendicular to the insulating gap by electron beam exposure.
  • the nanoSQUID is formed on the original superconducting structure, and the length and width of the nano-junction are determined by the thickness of the insulating interlayer and the width of the nanowire, respectively.
  • the width and length of the superconducting ring can be determined by the spacing of the nanowires and the width of the insulating interlayer, respectively.
  • the invention can simultaneously achieve the purpose that the nano-junction length is smaller than the coherence length of the superconducting material and the size of the superconducting ring is greatly reduced, thereby further reducing the minimum measurable spin number of the device.
  • the structure generated by electron beam lithography is simple and easy to reach the limit width of the technology.
  • the nanowire width of the nanoSQUID can be smaller than the prior art, and the critical current of the nanoSQUID is reduced.
  • FIG. 1 is a schematic cross-sectional view showing the growth of a first superconducting material layer on a substrate in a method for fabricating a nano-superconducting quantum interference device of the present invention.
  • Fig. 2 is a view showing the formation of a photoresist layer in the method of fabricating the nano-superconducting quantum interference device of the present invention.
  • Fig. 3 is a view showing the patterning of a photoresist layer in the method of fabricating the nano-superconducting quantum interference device of the present invention.
  • FIG. 4 is a schematic view showing etching of a first superconducting material layer in a method of fabricating a nano-superconducting quantum interference device of the present invention.
  • Fig. 5 is a view showing the covering of an insulating material in the method of fabricating the nano-superconducting quantum interference device of the present invention.
  • Fig. 6 is a view showing the growth of a second superconducting material layer in the method of fabricating the nano-superconducting quantum interference device of the present invention.
  • Fig. 7 is a view showing a planar superconducting structure obtained in the method for fabricating the nano-superconducting quantum interference device of the present invention.
  • FIG. 8 is a schematic cross-sectional view showing the nano-superconducting quantum interference device of the present invention.
  • Figure 9 shows a top view of the structure shown in Figure 8.
  • FIG. 10 is a schematic top plan view of the nano-superconducting quantum interference device of the present invention in the second embodiment.
  • Figure 11 is a schematic cross-sectional view showing the nano-superconducting quantum interference device of the present invention in the third embodiment.
  • Fig. 12 is a cross-sectional view showing the structure of the nano-superconducting quantum interference device of the present invention obtained in step S4 of the fourth embodiment.
  • FIG. 13 is a schematic top plan view showing a nano-superconducting quantum interference device of the present invention in Embodiment 4 Component label description
  • the invention provides a method for fabricating a nano-superconducting quantum interference device, which comprises at least the following steps:
  • step S3 etching the first superconducting material layer of the predetermined region, exposing the substrate, and leaving the remaining photoresist;
  • step S4 the front side and the side surface of the structure obtained in step S3 are covered with a layer of insulating material;
  • the present invention also provides a nano-superconducting quantum interference device comprising at least a planar superconducting structure and at least one nanowire formed on a surface of the planar superconducting structure, the planar superconducting structure comprising a substrate and discretely formed on the a first superconducting material layer and a second superconducting material layer on the surface of the substrate; an insulating interlayer formed between the first superconducting material layer and the second superconducting material layer; the second superconducting material layer An insulating material is formed between the substrate and the substrate; the nanowire is perpendicular to the insulating interlayer and connects the first layer of superconducting material and the second layer of superconducting material to form two parallel nano-junctions.
  • Embodiment 1 Embodiment 1
  • the present invention provides a method for fabricating a nano-superconducting quantum interference device. First, referring to FIG. 1, performing step S1: providing a substrate 1, and growing a first superconducting material layer 2 on the substrate 1.
  • the material of the substrate 1 is selected from at least one of MgO, sapphire, Si 3 N 4 , A1 2 0 3 and SiO 2 , or other materials that allow the growth of the superconducting thin film.
  • the substrate 1 is preferably a MgO substrate.
  • the material of the first superconducting material layer 2 is selected from at least one of Nb, NbN, NbTi and NbTiN, or other superconducting materials, and the first superconducting material layer 2 has a thickness ranging from 10 to 200 nm. In this embodiment, a 50 nm thick NbN is preferably grown on the substrate 1 by magnetron sputtering.
  • step S2 is performed: coating a surface of the first superconducting material layer 2 with a thickness of 200 to 1000 nm of the photoresist layer 3, and exposing the photoresist layer by ultraviolet exposure and development. 3 patterning to expose the surface of the first superconducting material layer 2 of the predetermined region.
  • the photoresist layer 3 has a thickness of 200 nm, is exposed to ultraviolet light using a mask having a rectangular pattern having a line width of 2 ⁇ m, and is developed to pattern the photoresist layer 3.
  • the preset area is exemplified by the left side of the substrate, as shown in FIG. 3 .
  • the lithographic pattern can be changed accordingly, that is, the pattern of the preset area can be changed, and is merely an example, and the scope of protection of the present invention should not be unduly limited.
  • step S3 is performed: etching the first superconducting material layer 2 of the predetermined region, that is, removing the first superconducting material layer 2 where the photoresist is not covered, exposing the substrate 1, and retain the remaining photoresist.
  • step S4 is performed: The front side and the side surface of the structure obtained in step S3 are covered with a layer of insulating material 4.
  • the photoresist is retained, and the isotropic property of the magnetron sputtering growth method is such that an insulating material having a thickness of 1 to 10 nm is grown on the front side and the side surface of the structure shown in FIG.
  • an upper surface of the exposed portion of the substrate 1 and an upper surface of the photoresist layer 3 are formed with an insulating material 4, the first superconducting material layer 2 and the photoresist layer.
  • the insulating material 4 is also formed on the side of the 3 side.
  • the insulating material is MgO 5 nm thick, for example, in other embodiments, the insulating material may be a Si 3 N 4, Al 2 0 3, Si0 2 and so on.
  • step S5 is performed: growing a second superconducting material layer 5 on the insulating material 4, and causing an upper surface of the second superconducting material layer 5 located in the predetermined region to be the first super The upper surface of the conductive material layer 2 is flush.
  • the material of the second superconducting material layer 5 is the same as the material of the first superconducting material layer 2, and the thickness is equal to the thickness of the first superconducting material layer 2 minus the thickness of the insulating material 4.
  • the upper surface of the second superconducting material layer 5 located in the predetermined region is flush with the upper surface of the first superconducting material layer 2.
  • the second superconducting material layer 5 in this embodiment is exemplified by NbN having a thickness of 45 nm.
  • step S6 is performed: stripping the photoresist layer 3 to remove the structure above the plane of the surface of the first superconducting material layer 2, and obtaining a planar superconducting structure in which at least one insulating interlayer 6 is implanted.
  • an insulating material 4 is disposed between the second superconducting material layer 5 and the substrate, and the first superconducting material layer 2 and the second super An insulating material between the conductive material layers 5 serves as the insulating interlayer 6.
  • step S7 is performed: ⁇ electron beam photoresist on the surface of the planar superconducting structure, electron beam exposure nanowire pattern, and then developing, growing a superconducting film on the surface of the planar superconducting structure Forming at least one nanowire 6 perpendicular to the insulating interlayer 6 and connecting the first superconducting material layer 2 and the second superconducting material layer 5, thereby forming two parallel nano-junctions, and then separating the electron beam light The gel is obtained to obtain a nano-superconducting quantum interference device.
  • an electron beam photoresist is coated on the surface of the planar superconducting structure, and two nanowire patterns with a distance of 10 nm and a width of 10 nm are exposed by an electron beam, and then developed, a 10 nm NbN superconducting film is grown, and the electrons are stripped.
  • beam resist thereby forming a superconducting ring area of only 50 nm nan oSQUID 2 in.
  • the distance between the two nanowires can be further reduced to achieve a smaller superconducting ring area.
  • the nano-junction refers to a superconducting film in which the nanowire overlaps with the insulating interlayer, and the length and the width thereof are respectively determined by the thickness of the insulating interlayer and the width of the nanowire;
  • the superconducting ring refers to The area enclosed by the two nano-junctions, the first superconducting layer and the second superconducting layer, the width and length of which can be determined by the spacing of the nanowires and the thickness of the insulating interlayer, respectively.
  • Fig. 8 a schematic sectional view of the nano-superconducting quantum interference device is shown, and Fig. 9 is a schematic plan view of the structure.
  • the thickness d of the insulating interlayer is shown in FIG.
  • two nanowires 6 are formed on the surface of the planar superconducting structure to form two parallel nano-junctions, thereby forming a nanoSQUID.
  • the length of the nano-junction and the width of the superconducting ring are determined by the growth thickness of the insulating material, and the size thereof is controllable on the thickness scale of the atomic layer, and the length of the nano-junction can be simultaneously achieved to be smaller than The coherence length of the superconducting material and the size of the superconducting ring are greatly reduced.
  • the superconducting ring and the nano-junction are divided into two main steps, which can separate the thickness of the superconducting ring and the nano-junction, increase the thickness of the superconducting material at both ends of the nano-junction, and eliminate the superconducting current outside the nano-junction.
  • the phase gradient spreads, thereby increasing the modulation depth of the device.
  • the present invention also provides a nano-superconducting quantum interference device.
  • a cross-sectional structural diagram of the device is shown. As shown, the device includes at least a planar superconducting structure and is formed on the surface of the planar superconducting structure.
  • At least one nanowire 7, the planar superconducting structure comprising a substrate 1 and a first superconducting material layer 2 and a second superconducting material layer 5 formed separately on the surface of the substrate; the first superconducting material An insulating interlayer 6 is formed between the layer 2 and the second superconducting material layer 5; an insulating material 4 is formed between the second superconducting material layer 5 and the substrate 1; the nanowire 7 is perpendicular to The insulating interlayer 6 is connected to the first superconducting material layer 2 and the second superconducting material layer 5.
  • the device includes an insulating interlayer 6 and two nanowires 7 perpendicular to the insulating interlayer 6.
  • FIG. 9 a top view of the device is shown.
  • the first superconducting material layer 2 and the second superconducting material layer 5 are respectively formed on both sides of the insulating interlayer 6 and are The nanowire 7 is connected.
  • the thickness of the insulating interlayer 6 ranges from 1 to 10 nm, and in this embodiment, preferably 5 nm. (Coherence length of NbN film).
  • the nano-superconducting quantum interference device of the invention has a small nano-junction line width (1 ⁇ 10 nm), which is smaller than the coherence length of the superconducting material, can reduce the critical current of the nanoSQUID; and the thickness of the superconducting ring is not limited by the nano-junction
  • the phase gradient diffusion of the superconducting current in the region outside the nanojunction can be eliminated by increasing the thickness of the superconducting material at both ends of the nanojunction, thereby increasing the modulation depth of the device.
  • Embodiment 1 shows a specific embodiment of the nano-superconducting quantum interference device of the present invention and a manufacturing method thereof. However, depending on the size and function of the device, the device can adopt other graphic designs, and the corresponding manufacturing methods are also fine-tuned. .
  • a method for fabricating a nano-superconducting quantum interference device further forms a groove or a groove in a region between two nanowires; Or a through trench partitions the insulating interlayer and penetrates the first layer of superconducting material and the second layer of superconducting material.
  • Fig. 10 is a plan view showing the structure of the device obtained in the present embodiment, in which a through trench 8 is shown, which penetrates the superconducting material layer and the substrate 1.
  • the through groove 8 may also be replaced by a groove that penetrates the superconducting material layer but does not pass through the substrate.
  • the purpose of the vias or recesses is to increase the area of the superconducting ring as required by the device design.
  • the nano-superconducting quantum interference device includes an insulating interlayer and two nanowires perpendicular to the insulating interlayer; the first superconducting material layer and the second superconducting material layer are respectively formed and Two sides of the insulating interlayer are connected by the nanowires; the device is located at a region between the two nanowires to form a groove or a through groove; the groove or the groove blocks the insulating interlayer and penetrates the a first layer of superconducting material and a second layer of superconducting material.
  • the thickness of the insulating interlayer ranges from 1 to 10 nm.
  • This embodiment uses substantially the same solution as the first embodiment, except that in the step S3, the first superconducting material layer of the predetermined region is etched away and the substrate is exposed, and then further performed. A suitable over-etching is performed to form a recessed region in the substrate; in the step S4, a portion of the insulating material located in the recessed region just fills the recessed region.
  • the nano-superconducting quantum interference device in the embodiment has the advantages that the first The superconducting material layer 2 and the second superconducting material layer 3 have the same thickness, so that the device is more symmetrical, and the insulating material 4 between the second superconducting material layer 2 and the substrate 1 can be used as a part of the substrate. , has no adverse effect on the device.
  • Embodiment 4
  • This embodiment uses substantially the same solution as the first embodiment, except that the nano-superconducting quantum interference device formed in the first embodiment includes only one insulating interlayer, and the nano-superconducting quantum interference device formed in this embodiment is
  • the invention comprises two insulating interlayers and a nanowire perpendicular to the insulating interlayer.
  • the graphic design can be changed in substantially the same manner as in the first embodiment.
  • the preset area is a substrate side, and in this embodiment, the preset area is two sides of the substrate.
  • a cross-sectional view of the structure obtained in step S4 in the present embodiment is shown. As shown, the regions on both sides of the first superconducting material layer 2 are removed, so that a portion of the insulating material 4 is formed on the surface. On both sides of the first portion of the first superconducting material layer 2, a nano-superconducting quantum interference device having two insulating interlayers 6 is obtained by subsequently forming a second superconducting superconducting material layer and stripping the photoresist.
  • FIG. 13 is a top plan view showing the nano-superconducting quantum interference device finally obtained in the embodiment, the device comprising two insulating interlayers 6 and a nanowire 7 perpendicular to the insulating interlayer; the first superconducting a material layer 2 - an end is formed between the two insulating interlayers 6 and extends outwardly at the other end; the second superconducting material layer 5 has a "U" shaped portion and a tail portion formed at the closed end of the U" shaped portion; The "U"-shaped flared side ends are respectively located outside the two insulating interlayers, and the first superconducting material layer 2 is located at an end between the two insulating interlayers and the second superconducting material layer 5 A groove or a through groove 8 is formed between the closed ends of the U" portion; the groove or the through groove extends through the first layer of superconducting material 2 and the second layer of superconducting material 5.
  • the thickness of the insulating interlayer ranges from
  • the advantages of the nano-superconducting quantum interference device of this embodiment over the first embodiment are as follows: In the first embodiment, two nanowires are included, and it is not easy to maintain the line width uniformity when forming, so that the size of the two nano-junctions is easily changed, and the influence is affected. Device performance; in this embodiment, only one nanowire is included, and the line width is uniform, so that the two nano-junctions have the same size.
  • This embodiment adopts substantially the same scheme as the fourth embodiment, except that the graphic design is different.
  • Ben The nano-superconducting quantum interference device formed by the embodiment can be used as a gradiometer to avoid background magnetic field interference.
  • FIG. 14 a top view of the nano-superconducting quantum interference device formed in the embodiment is shown.
  • the device includes two insulating interlayers 6 and a nanowire 7 perpendicular to the insulating interlayer;
  • the first superconducting material layer 2 is formed between the two insulating interlayers 6;
  • the second superconducting material layer 5 is a rectangular ring, and a pair of side edges of the rectangular ring are respectively located outside the two insulating interlayers 6, and Forming a groove or a through groove 8 between the pair of side edges and the first superconducting material layer 2; the groove or the through groove penetrating the first superconducting material layer 2 and the second superconducting material layer 5.
  • the thickness of the insulating interlayer ranges from 1 to 10 nm.
  • the nano-superconducting quantum interference device when the nano-superconducting quantum interference device is fabricated by the present invention, the superconducting ring and the nano-junction are divided into two main steps.
  • the distance between the first superconducting material layer and the second superconducting material layer is determined by the insulating interlayer interposed therebetween, and the width thereof is controllable at the atomic scale, up to l ⁇ 10 nm.
  • a superconducting nanowire perpendicular to the insulating gap is separately formed by electron beam exposure, and a nanoSQUID is formed on the original superconducting structure.
  • the thickness of the insulating interlayer simultaneously determines the width of the superconducting loop (superconducting loop) and the length of the nanojunction.
  • the line width and spacing of the nanowires simultaneously determine the width of the nanojunction and the length of the superconducting loop.
  • the invention can simultaneously achieve the purpose that the nano-junction length is smaller than the coherence length of the superconducting material and the size of the superconducting ring is greatly reduced, and the sensitivity of the device to a small amount of spin is increased.
  • the structure generated by electron beam lithography is simple and easy to reach the limit width of the technology.
  • the nanowire width of the nanoSQUID can be made smaller than the prior art, thereby reducing the critical current of the nanoSQUID. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

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Abstract

提供一种纳米超导量子干涉器件及其制作方法，包括以下步骤：S1:提供一衬底（1）并在其上生长第一超导材料层（2）；S2:形成光刻胶层（3）并图案化；S3:刻蚀掉所述预设区域的第一超导材料层（2）；S4:在步骤S3获得的结构正面及侧面覆盖一层绝缘材料（4）；S5:生长第二超导材料层（5）；S6:去掉所述第一超导材料层（2）上表面所在平面以上的结构，得到中间被植入至少一条绝缘夹层（6）的平面超导结构；S7:形成至少一条与所述绝缘夹层（6）垂直的纳米线（7），得到纳米超导量子干涉器件。

Description

一种纳米超导量子干涉器件及其制作方法
技术领域
本发明属于超导电子信息技术领域， 涉及一种纳米超导量子干涉器件及其制 作方法。 背景技术
超导量子干涉器件 (SQUID)是利用约瑟夫森 （Josephson) 效应设计的极灵敏 的磁传感器， 可用于探测小到 10-15Tesla的磁场 (相当于地磁场的几百亿分之一), 是目前为止检测灵敏度最高的磁敏传感器。 SQUID磁强计主要应用于物理、化学、 材料、 地质、 生物、 医学等领域各种弱磁场的精确测量， 因其突出的高灵敏度而 不断继续普及应用。 纳米超导量子干涉器件 (NanoSQUID)是基于超导量子干涉器 件 (SQUID)发展起来的一种新型器件。 它利用纳米结代替传统的隧穿结， 使得超 导环的面积可以得到大幅度的缩小， 器件的最小可测自旋数相应的得到大幅度的 增加， 从而提升了器件对于介观至微观尺寸的样品的灵敏度。此外， 它不但可以承 受较大的临界磁场， 而且由于超导环面积较小从而不易受到外界磁场干扰， 因此 无须作单独磁屏蔽隔离， 可以与样品直接耦合， 在表征微观样品的磁属性和探测 微观自旋中表现突出， 在生物分子结构研究， 量子信息， 新材料研究等多方面具 备应用前景。
目前国际上主要制备 nanoSQUID 的工艺是利用电子束曝光或者聚焦离子束 刻蚀的方法在超导薄膜上直接刻画超导环和纳米结的平面结构， 虽然这种方法比 较直接观简洁， 但是存在一些缺点。 首先， nanoSQUID的尺寸受到电子束曝光或 者聚焦离子束刻蚀的限制， 目前超导环直径最小在五十纳米附近， 很难再往下突 破达到真正的纳米级别。 其次， 现在纳米超导量子干涉器件存在临界电流和磁通 调制曲线深度较小问题， 它和传统 SQUID相比距离较大。 其中主要原因是大多 临界温度较高的超导材料的相干长度较短， 纳米结的长度无法做到和其相干长度 相当， 另一原因是纳米结的厚度和超导环是通过同一超导薄膜加工出来的， 超导 环的厚度受到纳米结的限制， 超导电流在超导环内除纳米结以外的区域仍然存在 着相位梯度扩散。
因此， 提供一种纳米超导量子干涉器件的制作方法以解决现有技术中纳米结 长度无法做到和超导材料的相干长度相当、 超导环厚度受到纳米结的限制从而导 致器件性能降低的问题实属必要。 发明内容
鉴于以上所述现有技术的缺点， 本发明的目的在于提供一种纳米超导量子干 涉器件及其制作方法， 用于解决现有技术中纳米结长度无法做到和超导材料的相 干长度相当、 超导环厚度受到纳米结的限制从而导致器件性能降低的问题。
为实现上述目的及其他相关目的， 本发明提供一种纳米超导量子干涉器件的 制作方法， 至少包括以下步骤：
S 1 : 提供一衬底， 在所述衬底上生长第一超导材料层；
S2: 在所述第一超导材料层表面形成光刻胶层并将所述光刻胶层图案化， 以 将预设区域的第一超导材料层表面暴露出来；
S3： 刻蚀掉所述预设区域的第一超导材料层， 暴露出所述衬底， 并保留剩余 光刻胶层；
S4: 在步骤 S3获得的结构正面及侧面覆盖一层绝缘材料；
S5: 在所述绝缘材料上生长第二超导材料层， 并使位于所述预设区域的第二 超导材料层的上表面与所述第一超导材料层上表面齐平；
S6: 去掉所述第一超导材料层上表面所在平面以上的结构， 得到中间被植入 至少一条绝缘夹层的平面超导结构；
S7: 在所述平面超导结构表面形成至少一条与所述绝缘夹层垂直并连接所述 第一超导材料层与所述第二超导材料层的纳米线， 从而形成两个并联的纳米结， 得到纳米超导量子干涉器件。
可选地， 于所述步骤 S3 中， 刻蚀掉所述预设区域的第一超导材料层并暴露 出所述衬底后进一步过刻蚀， 在所述衬底中形成一凹陷区域； 于所述步骤 S4中， 所述绝缘材料位于所述凹陷区域的部分刚好填满所述凹陷区域。
可选地， 所述绝缘夹层的厚度范围是 l~10 nm。
可选地， 所述衬底的材料选自 MgO、 蓝宝石、 Si3N4、 A1203及 Si02中的至少 一种。
可选地， 所述第一超导材料层与所述第二超导材料层的材料选自 Nb (铌)、 NbN (氮化铌）、 NbTi (铌钛） 及 NbTiN (铌钛氮） 中的至少一种。 本发明还提供一种纳米超导量子干涉器件， 至少包括平面超导结构及形成于 所述平面超导结构表面的至少一条纳米线， 所述平面超导结构包括衬底及分立形 成于所述衬底表面的第一超导材料层及第二超导材料层； 所述第一超导材料层与 所述第二超导材料层之间形成有绝缘夹层； 所述第二超导材料层与所述衬底之间 形成有绝缘材料； 所述纳米线垂直于所述绝缘夹层并连接所述第一超导材料层与 所述第二超导材料层。
可选地， 该器件包括一条绝缘夹层及两条垂直于所述绝缘夹层的纳米线； 所 述第一超导材料层与所述第二超导材料层分别形成与所述绝缘夹层的两侧并由所 述纳米线连接。
可选地， 该器件包括一条绝缘夹层及两条垂直于所述绝缘夹层的纳米线； 所 述第一超导材料层与所述第二超导材料层分别形成与所述绝缘夹层的两侧并由所 述纳米线连接； 所述器件位于两条纳米线之间的区域形成有一凹槽或通槽； 所述 凹槽或通槽将所述绝缘夹层隔断并贯穿所述第一超导材料层及第二超导材料层。
可选地， 该器件包括两条绝缘夹层及一条垂直于所述绝缘夹层的纳米线； 所 述第一超导材料层一端形成于两条绝缘夹层之间、 另一端向外延伸； 所述第二超 导材料层具有一 "U"型部及形成于该 U"型部闭合端的尾部； 所述 "U"型部张 开的侧翼端部分别位于两条绝缘夹层外侧， 所述第一超导材料层位于两条绝缘夹 层之间的端部与所述第二超导材料层的 U"型部闭合端之间形成一凹槽或通槽； 所述凹槽或通槽贯穿所述第一超导材料层及第二超导材料层。
可选地， 该器件包括两条绝缘夹层及一条垂直于所述绝缘夹层的纳米线； 所 述第一超导材料层形成于两条绝缘夹层之间； 所述第二超导材料层为一矩形环， 所述矩形环的一对侧边分别位于两条绝缘夹层外侧、 另一对侧边分别与所述第一 超导材料层之间形成一凹槽或通槽； 所述凹槽或通槽贯穿所述第一超导材料层及 第二超导材料层。
可选地， 所述绝缘夹层的厚度范围是 l~10 nm。
如上所述， 本发明的一种纳米超导量子干涉器件及其制作方法， 具有以下有 益效果： 本发明制作纳米超导量子干涉器件时， 将超导环和纳米结分成两个主要 步骤来实现。 本发明制作得到的纳米超导量子干涉器件中， 第一超导材料层与第 二超导材料层的间距由中间植入的绝缘夹层决定， 其宽度在原子尺度上可控， 可 达 l~10 nm。另一特征是利用电子束曝光单独生成垂直于绝缘缝隙的超导纳米线， 在原超导结构上形成 nanoSQUID,其纳米结的长度和宽度分别由绝缘夹层的厚度 和纳米线的宽度决定， 超导环的宽度和长度最小可以分别由纳米线的间距和绝缘 夹层的宽度决定。 本发明可以同时实现纳米结长度小于超导材料相干长度和超导 环的尺寸大幅减小的目的， 从而进一步减少器件的最小可测自旋数。 利用电子束 光刻生成的结构简单，易于达到此技术的极限宽度，制备 nanoSQUID的纳米结线 宽可小于现有技术， 减小 nanoSQUID的临界电流。 附图说明
图 1显示为本发明的纳米超导量子干涉器件的制作方法中在衬底上生长第一 超导材料层的剖面结构示意图。
图 2显示为本发明的纳米超导量子干涉器件的制作方法中形成光刻胶层的示 意图。
图 3显示为本发明的纳米超导量子干涉器件的制作方法中将光刻胶层图案化 的示意图。
图 4显示为本发明的纳米超导量子干涉器件的制作方法中刻蚀第一超导材料 层的示意图。
图 5显示为本发明的纳米超导量子干涉器件的制作方法中覆盖绝缘材料的的 示意图。
图 6显示为本发明的纳米超导量子干涉器件的制作方法中生长第二超导材料 层的示意图。
图 7显示为本发明的纳米超导量子干涉器件的制作方法中得到平面超导结构 的示意图。
图 8显示为本发明的纳米超导量子干涉器件的剖面结构示意图。
图 9显示为图 8所示结构的俯视图。
图 10显示为本发明的纳米超导量子干涉器件在实施例二中俯视结构示意图。 图 11 显示为本发明的纳米超导量子干涉器件在实施例三中的剖面结构示意 图。
图 12 显示为本发明的纳米超导量子干涉器件的制作方法在实施例四中步骤 S4获得结构的剖面示意图。
图 13 显示为本发明的纳米超导量子干涉器件在实施例四中的俯视结构示意 元件标号说明
1 衬底
2 第一超导材料层
3 光刻胶层
4 绝缘材料
5 第二超导材料层
6 绝缘夹层
7 纳米线
8 通槽
d 绝缘夹层的厚度 具体实施方式
以下通过特定的具体实例说明本发明的实施方式， 本领域技术人员可由本说 明书所揭露的内容轻易地了解本发明的其他优点与功效。 本发明还可以通过另外 不同的具体实施方式加以实施或应用， 本说明书中的各项细节也可以基于不同观 点与应用， 在没有背离本发明的精神下进行各种修饰或改变。
请参阅图 1至图 14。 需要说明的是， 本实施例中所提供的图示仅以示意方式 说明本发明的基本构想， 遂图式中仅显示与本发明中有关的组件而非按照实际实 施时的组件数目、 形状及尺寸绘制， 其实际实施时各组件的型态、 数量及比例可 为一种随意的改变， 且其组件布局型态也可能更为复杂。
本发明提供一种纳米超导量子干涉器件的制作方法， 至少包括以下步骤：
S 1 : 提供一衬底， 在所述衬底上生长第一超导材料层；
S2: 在所述第一超导材料层表面形成光刻胶层并将所述光刻胶层图案化， 以 将预设区域的第一超导材料层表面暴露出来；
S3： 刻蚀掉所述预设区域的第一超导材料层， 暴露出所述衬底， 并保留剩余 光刻胶； S4: 在步骤 S3获得的结构正面及侧面覆盖一层绝缘材料；
S5: 在所述绝缘材料上生长第二超导材料层， 并使位于所述预设区域的第二 超导材料层的上表面与所述第一超导材料层上表面齐平；
S6: 去掉所述第一超导材料层上表面所在平面以上的结构， 得到中间被植入 至少一条绝缘夹层的平面超导结构；
S7: 在所述平面超导结构表面形成至少一条与所述绝缘夹层垂直并连接所述 第一超导材料层与所述第二超导材料层的纳米线， 从而形成两个并联的纳米结， 得到纳米超导量子干涉器件。
本发明还提供一种纳米超导量子干涉器件， 至少包括平面超导结构及形成于 所述平面超导结构表面的至少一条纳米线， 所述平面超导结构包括衬底及分立形 成于所述衬底表面的第一超导材料层及第二超导材料层； 所述第一超导材料层与 所述第二超导材料层之间形成有绝缘夹层； 所述第二超导材料层与所述衬底之间 形成有绝缘材料； 所述纳米线垂直于所述绝缘夹层并连接所述第一超导材料层与 所述第二超导材料层， 形成两个并联的纳米结。 实施例一
本发明提供一种纳米超导量子干涉器件的制作方法， 首先请参阅图 1， 执行 步骤 S1 : 提供一衬底 1， 在所述衬底 1上生长第一超导材料层 2。
具体的， 所述衬底 1的材料选自 MgO、 蓝宝石、 Si3N4、 A1203及 Si02中的至 少一种， 或者其它允许超导薄膜生长的材料。 本实施例中， 所述衬底 1 优选为 MgO衬底。
所述第一超导材料层 2的材料选自 Nb、 NbN、 NbTi及 NbTiN中的至少一种， 或其它超导材料， 所述第一超导材料层 2的厚度范围是 10~200 nm。本实施例中， 优选采用磁控溅射法在所述衬底 1上生长一层 50 nm厚的 NbN。
请参阅图 2及图 3，执行步骤 S2:在所述第一超导材料层 2表面甩涂 200~1000 nm厚的光刻胶层 3， 并通过紫外曝光、 显影将所述光刻胶层 3图案化， 以将预设 区域的第一超导材料层 2表面暴露出来。
作为示例， 所述光刻胶层 3的厚度为 200 nm， 采用线宽为 2微米宽的长方形 图形的掩模紫外曝光， 再显影以将所述光刻胶层 3图案化。 本实施例中， 所述预 设区域以所述衬底左侧为例， 如图 3所示。 然而须知， 根据要制备的 nanoSQUID 器件大小的不同及功能的不同， 此处光刻图形可进行相应改变， 即所述预设区域 的图形可有所改变， 此处仅为示例， 不应过分限制本发明的保护范围。
请参阅图 4， 执行步骤 S3: 刻蚀掉所述预设区域的第一超导材料层 2， 即将 光刻胶没有覆盖的地方的第一超导材料层 2去掉， 暴露出所述衬底 1， 并保留剩 余光刻胶。
请参阅图 5， 执行步骤 S4: 在步骤 S3获得的结构正面及侧面覆盖一层绝缘 材料 4。
具体的， 留存光刻胶， 利用磁控溅射的生长方法的各向同性的性质， 在图 4 所示结构正面及侧面都生长 l~10 nm厚的绝缘材料。 如图 5所示， 所述衬底 1暴 露部分的上表面及所述光刻胶层 3的上表面均形成有绝缘材料 4， 所述第一超导 材料层 2及所述光刻胶层 3侧面亦形成有绝缘材料 4。 本实施例中， 所述绝缘材 料以 5 nm厚的 MgO为例，在其它实施例中，所述绝缘材料也可以为 Si3N4、Al203、 Si02等。
请参阅图 6， 执行步骤 S5: 在所述绝缘材料 4上生长第二超导材料层 5， 并 使位于所述预设区域的第二超导材料层 5的上表面与所述第一超导材料层 2上表 面齐平。
具体的，所述第二超导材料层 5的材料与所述第一超导材料层 2的材料相同， 厚度等于所述第一超导材料层 2的厚度减掉所述绝缘材料 4的厚度， 从而使得位 于所述预设区域的第二超导材料层 5的上表面与所述第一超导材料层 2上表面齐 平。 本实施例中所述第二超导材料层 5以 45 nm厚的 NbN为例。
请参阅图 7， 执行步骤 S6: 剥离光刻胶层 3以去掉所述第一超导材料层 2上 表面所在平面以上的结构，得到中间被植入至少一条绝缘夹层 6的平面超导结构。
如图 7所示， 所述平面超导结构中， 所述第二超导材料层 5与所述衬底之间 具有绝缘材料 4， 所述第一超导材料层 2与所述第二超导材料层 5之间的绝缘材 料作为绝缘夹层 6。
请参阅图 8及图 9，执行步骤 S7:在所述平面超导结构表面甩电子束光刻胶， 电子束曝光纳米线图形， 然后显影， 生长超导薄膜， 在所述平面超导结构表面形 成至少一条与所述绝缘夹层 6垂直并连接所述第一超导材料层 2与所述第二超导 材料层 5的纳米线 6， 从而形成两个并联的纳米结， 然后剥离电子束光刻胶， 得 到纳米超导量子干涉器件。 作为示例， 在所述平面超导结构表面甩涂电子束光刻胶， 电子束曝光两条平 行间隔 10 nm宽 10 nm的纳米线图形， 然后显影， 生长 10 nm NbN超导薄膜， 再 剥离电子束光刻胶， 从而形成超导环面积只有 50 nm2的 nanoSQUID。 在其它实 施例中， 也可以进一步缩小两条纳米线之间的距离， 以获得更小的超导环面积。
需要说明的是， 上述纳米结指的是所述纳米线与所述绝缘夹层重叠区域的超 导薄膜， 其长度和宽度分别由绝缘夹层的厚度和纳米线的宽度决定； 所述超导环 指的是两个纳米结、 所述第一超导层及第二超导层围成的区域， 其宽度和长度最 小可以分别由纳米线的间距和绝缘夹层的厚度决定。
如图 8所示， 显示为所述纳米超导量子干涉器件的剖面结构示意图， 图 9显 示为该结构的俯视示意图。 其中， 图 9中示出了绝缘夹层的厚度 d。 本实施例中， 在所述平面超导结构表面形成两条纳米线 6， 从而形成两个并联的纳米结， 从而 形成 nanoSQUID 。
本发明的纳米超导量子干涉器件的制作方法中， 纳米结的长度和超导环的宽 度由绝缘材料的生长厚度决定， 其大小在原子层厚度尺度上可控， 可同时实现纳 米结长度小于超导材料相干长度和超导环的尺寸大幅度减小的目的。 另一方面， 超导环和纳米结分成两个主要步骤来完成， 可以将超导环和纳米结的厚度分开， 增加纳米结两端超导材料的厚度， 消除超导电流在纳米结以外区域的相位梯度扩 散， 从而增加器件的调制深度。
本发明还提供一种纳米超导量子干涉器件， 请参阅图 8， 显示为该器件的剖 面结构示意图， 如图所示， 该器件至少包括平面超导结构及形成于所述平面超导 结构表面的至少一条纳米线 7， 所述平面超导结构包括衬底 1及分立形成于所述 衬底表面的第一超导材料层 2及第二超导材料层 5; 所述第一超导材料层 2与所 述第二超导材料层 5之间形成有绝缘夹层 6;所述第二超导材料层 5与所述衬底 1 之间形成有绝缘材料 4; 所述纳米线 7垂直于所述绝缘夹层 6并连接所述第一超 导材料层 2与所述第二超导材料层 5。
本实施例中， 所述器件包括一条绝缘夹层 6及两条垂直于所述绝缘夹层 6的 纳米线 7。请参阅图 9， 显示为该器件的俯视图， 如图所示， 所述第一超导材料层 2与所述第二超导材料层 5分别形成于所述绝缘夹层 6的两侧并由所述纳米线 7 连接。
具体的， 所述绝缘夹层 6的厚度范围是 l~10 nm， 本实施例中， 优选为 5 nm (NbN薄膜的相干长度）。
本发明的纳米超导量子干涉器件的纳米结线宽很小 （l~10 nm)， 小于超导材 料的相干长度，可以减小 nanoSQUID的临界电流；且超导环厚度不受纳米结的限 制， 从而可以通过增加纳米结两端超导材料的厚度来消除超导电流在纳米结以外 区域的相位梯度扩散， 从而增加器件的调制深度。 实施例二
实施例一给出了本发明的纳米超导量子干涉器件及其制作方法的一种具体实 施方式， 然而， 根据器件大小、 功能的不同， 器件可以采用其它图形设计， 相应 的制作方法也有所微调。
请参阅图 10，本实施例在实施例一的一种纳米超导量子干涉器件的制作方法 的基础上， 进一步在两条纳米线之间的区域形成一凹槽或通槽； 所述凹槽或通槽 将所述绝缘夹层隔断并贯穿所述第一超导材料层及第二超导材料层。图 10显示为 本实施例中得到的器件结构的俯视图， 其中示出了通槽 8， 所述通槽 8贯穿超导 材料层及衬底 1。 所述通槽 8也可以采用凹槽替代， 所述凹槽贯穿超导材料层但 未穿通所述衬底。 设置所述通槽或凹槽的目的是为了根据器件设计需要增加超导 环的面积。
本实施例中， 纳米超导量子干涉器件包括一条绝缘夹层及两条垂直于所述绝 缘夹层的纳米线； 所述第一超导材料层与所述第二超导材料层分别形成与所述绝 缘夹层的两侧并由所述纳米线连接； 所述器件位于两条纳米线之间的区域形成有 一凹槽或通槽； 所述凹槽或通槽将所述绝缘夹层隔断并贯穿所述第一超导材料层 及第二超导材料层。 所述绝缘夹层的厚度范围是 l~10 nm。 实施例三
本实施例与实施例一采用基本相同的方案， 不同之处在于， 于所述步骤 S3 中， 刻蚀掉所述预设区域的第一超导材料层并暴露出所述衬底后进一步进行适当 的过刻蚀， 在所述衬底中形成一凹陷区域； 于所述步骤 S4 中， 所述绝缘材料位 于所述凹陷区域的部分刚好填满所述凹陷区域。
请参阅图 11，显示为本实施例中形成的纳米超导量子干涉器件的剖面结构示 意图。 相对于实施例一， 本实施例中的纳米超导量子干涉器件的优点在于， 第一 超导材料层 2与第二超导材料层 3的厚度相同， 使得器件更为对称， 所述第二超 导材料层 2与所述衬底 1之间的绝缘材料 4可以作为衬底的一部分， 对器件没有 不良影响。 实施例四
本实施例与实施例一采用基本相同的方案， 不同之处在于， 实施例一中形成 的纳米超导量子干涉器件只包括一条绝缘夹层， 而本实施例中形成的纳米超导量 子干涉器件中包括两条绝缘夹层及一条垂直于所述绝缘夹层的纳米线。 制作时， 通过改变图形设计即可采用与实施例一基本相同的方法来实现。
具体的， 实施例一中， 所述预设区域为衬底一侧， 而本实施例中， 所述预设 区域为衬底两侧。
请参阅图 12， 显示为本实施例中于步骤 S4中获得的结构的剖面图， 如图所 示， 所述第一超导材料层 2两侧区域被去除， 从而使得部分绝缘材料 4形成于中 间部分的第一超导材料层 2的两侧， 通过后续形成第二超导超导材料层并剥离光 刻胶后， 即可得到具有两条绝缘夹层 6的纳米超导量子干涉器件。
请参阅图 13，显示为本实施例中最终得到纳米超导量子干涉器件的俯视示意 图， 该器件包括两条绝缘夹层 6及一条垂直于所述绝缘夹层的纳米线 7; 所述第 一超导材料层 2—端形成于两条绝缘夹层 6之间、 另一端向外延伸； 所述第二超 导材料层 5具有一 "U"型部及形成于该 U"型部闭合端的尾部； 所述 "U"型部 张开的侧翼端部分别位于两条绝缘夹层外侧， 所述第一超导材料层 2位于两条绝 缘夹层之间的端部与所述第二超导材料层 5的 U"型部闭合端之间形成一凹槽或 通槽 8;所述凹槽或通槽贯穿所述第一超导材料层 2及第二超导材料层 5。所述绝 缘夹层的厚度范围是 l~10 nm。
本实施例的纳米超导量子干涉器件相对于实施例一的优点是： 实施例一中包 括两条纳米线，形成时不容易保持线宽一致性，从而容易使两个纳米结大小不同， 影响器件性能； 而本实施例中只包括一条纳米线， 线宽一致， 使得两个纳米结的 大小相同。 实施例五
本实施例与实施例四采用基本相同的方案， 不同之处在于图形设计不同。 本 实施例形成的纳米超导量子干涉器件可以作为避免背景磁场干扰的梯度计。请参 阅图 14， 显示为本实施例中形成的纳米超导量子干涉器件的俯视图， 如图所示， 该器件包括两条绝缘夹层 6及一条垂直于所述绝缘夹层的纳米线 7;所述第一超 导材料层 2形成于两条绝缘夹层 6之间；所述第二超导材料层 5为一矩形环，所 述矩形环的一对侧边分别位于两条绝缘夹层 6外侧、另一对侧边分别与所述第一 超导材料层 2之间形成一凹槽或通槽 8;所述凹槽或通槽贯穿所述第一超导材料 层 2及第二超导材料层 5。 所述绝缘夹层的厚度范围是 l~10 nm。 综上所述， 本发明制作纳米超导量子干涉器件时， 将超导环和纳米结分成两 个主要步骤来实现。 本发明制作得到的纳米超导量子干涉器件中， 第一超导材料 层与第二超导材料层的间距由中间植入的绝缘夹层决定， 其宽度在原子尺度上可 控， 可达 l~10 nm。 另一特征是利用电子束曝光单独生成垂直于绝缘缝隙的超导 纳米线， 在原超导结构上形成 nanoSQUID, 绝缘夹层的厚度同时决定了超导回路 (超导环） 的宽度和纳米结的长度， 而纳米线的线宽和间距又同时决定了纳米结 的宽度和超导回路的长度。 本发明可以同时实现纳米结长度小于超导材料相干长 度和超导环的尺寸大幅减小的目的， 增加器件对少量自旋的灵敏度。 利用电子束 光刻生成的结构简单，易于达到此技术的极限宽度，制备 nanoSQUID的纳米结线 宽可小于现有技术， 从而减小 nanoSQUID的临界电流。所以， 本发明有效克服了 现有技术中的种种缺点而具高度产业利用价值。
上述实施例仅例示性说明本发明的原理及其功效， 而非用于限制本发明。 任 何熟悉此技术的人士皆可在不违背本发明的精神及范畴下， 对上述实施例进行修 饰或改变。 因此， 举凡所属技术领域中具有通常知识者在未脱离本发明所揭示的 精神与技术思想下所完成的一切等效修饰或改变， 仍应由本发明的权利要求所涵

Claims

权利要求书 、 一种纳米超导量子干涉器件的制作方法， 其特征在于， 至少包括以下步骤：
S1 : 提供一衬底， 在所述衬底上生长第一超导材料层；
S2: 在所述第一超导材料层表面形成光刻胶层并将所述光刻胶层图案化， 以将预设 区域的第一超导材料层表面暴露出来；
S3： 刻蚀掉所述预设区域的第一超导材料层， 暴露出所述衬底， 并保留剩余光刻 胶；
S4: 在步骤 S3获得的结构正面及侧面覆盖一层绝缘材料；
S5: 在所述绝缘材料上生长第二超导材料层， 并使位于所述预设区域的第二超导材 料层的上表面与所述第一超导材料层上表面齐平；
S6: 去掉所述第一超导材料层上表面所在平面以上的结构， 得到中间被植入至少一 条绝缘夹层的平面超导结构；
S7: 在所述平面超导结构表面形成至少一条与所述绝缘夹层垂直并连接所述第一超 导材料层与所述第二超导材料层的纳米线， 从而形成两个并联的纳米结， 得到纳米超导 量子干涉器件。 、 根据权利要求 1所述的纳米超导量子干涉器件的制作方法， 其特征在于： 于所述步骤 S3 中， 刻蚀掉所述预设区域的第一超导材料层并暴露出所述衬底后进一步过刻蚀， 在所述 衬底中形成一凹陷区域； 于所述步骤 S4中， 所述绝缘材料位于所述凹陷区域的部分刚好 填满所述凹陷区域。 、 根据权利要求 1 所述的纳米超导量子干涉器件的制作方法， 其特征在于： 所述绝缘夹层 的厚度范围是 l~10 nm。 、 根据权利要求 1 所述的纳米超导量子干涉器件的制作方法， 其特征在于： 所述衬底的材 料选自 MgO、 蓝宝石、 Si3N4、 A1203及 Si02中的至少一种。 、 根据权利要求 1 所述的纳米超导量子干涉器件的制作方法， 其特征在于： 所述第一超导 材料层与所述第二超导材料层的材料选自 Nb、 NbN、 NbTi及 NbTiN中的至少一种。 、 一种纳米超导量子干涉器件， 至少包括平面超导结构及形成于所述平面超导结构表面的 至少一条纳米线， 其特征在于：
所述平面超导结构包括衬底及分立形成于所述衬底表面的第一超导材料层及第二超 导材料层；
所述第一超导材料层与所述第二超导材料层之间形成有绝缘夹层； 所述第二超导材 料层与所述衬底之间形成有绝缘材料；
所述纳米线垂直于所述绝缘夹层并连接所述第一超导材料层与所述第二超导材料 层， 形成两个并联的纳米结。 、 根据权利要求 6 所述的纳米超导量子干涉器件， 其特征在于： 该器件包括一条绝缘夹层 及两条垂直于所述绝缘夹层的纳米线； 所述第一超导材料层与所述第二超导材料层分别 形成与所述绝缘夹层的两侧并由所述纳米线连接。 、 根据权利要求 6 所述的纳米超导量子干涉器件， 其特征在于： 该器件包括一条绝缘夹层 及两条垂直于所述绝缘夹层的纳米线； 所述第一超导材料层与所述第二超导材料层分别 形成与所述绝缘夹层的两侧并由所述纳米线连接； 所述器件位于两条纳米线之间的区域 形成有一凹槽或通槽； 所述凹槽或通槽将所述绝缘夹层隔断并贯穿所述第一超导材料层 及第二超导材料层。 、 根据权利要求 6 所述的纳米超导量子干涉器件， 其特征在于： 该器件包括两条绝缘夹层 及一条垂直于所述绝缘夹层的纳米线； 所述第一超导材料层一端形成于两条绝缘夹层之 间、 另一端向外延伸； 所述第二超导材料层具有一 "U"型部及形成于该 U"型部闭合 端的尾部； 所述 "U"型部张开的侧翼端部分别位于两条绝缘夹层外侧， 所述第一超导 材料层位于两条绝缘夹层之间的端部与所述第二超导材料层的 U"型部闭合端之间形成 一凹槽或通槽； 所述凹槽或通槽贯穿所述第一超导材料层及第二超导材料层。 、 根据权利要求 6 所述的纳米超导量子干涉器件， 其特征在于： 该器件包括两条绝缘夹 层及一条垂直于所述绝缘夹层的纳米线； 所述第一超导材料层形成于两条绝缘夹层之 间； 所述第二超导材料层为一矩形回路环， 所述矩形环的一对侧边分别位于两条绝缘夹 层外侧、 另一对侧边分别与所述第一超导材料层之间形成一凹槽或通槽； 所述凹槽或通 槽贯穿所述第一超导材料层及第二超导材料层。 、 根据权利要求 6~10任意一项所述的纳米超导量子干涉器件， 其特征在于： 所述绝缘夹 层的厚度范围是 l~10 nm。
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