WO2015107871A1 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- WO2015107871A1 WO2015107871A1 PCT/JP2015/000027 JP2015000027W WO2015107871A1 WO 2015107871 A1 WO2015107871 A1 WO 2015107871A1 JP 2015000027 W JP2015000027 W JP 2015000027W WO 2015107871 A1 WO2015107871 A1 WO 2015107871A1
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Definitions
- the present invention relates to a semiconductor device equipped with a semiconductor element.
- the semiconductor device is used, for example, as a drive control device for industrial equipment, a drive control device for home appliances equipped with a motor, an in-vehicle control device for electric vehicles or hybrid vehicles.
- Semiconductor devices are required to cope with high power of power devices such as industrial equipment, home appliances, and automobiles.
- the semiconductor device includes a semiconductor element typified by a power element. It may be difficult to extend the life of such a conventional semiconductor device.
- Patent Document 1 An example that approximates such background art is given in Patent Document 1 below.
- the semiconductor device includes a substrate, a first metal wiring, a first semiconductor element, a second semiconductor element, a second metal wiring, and a plurality of protrusions.
- the substrate is made of metal.
- the first metal wiring is disposed above the substrate.
- the first semiconductor element and the second semiconductor element are disposed above the first metal wiring.
- the second metal wiring is continuously disposed above the first semiconductor element and above the second semiconductor element.
- the second metal wiring electrically connects the first semiconductor element and the second semiconductor element.
- the plurality of protrusions are formed between each of the first semiconductor element and the second semiconductor element and the first metal wiring, and each of the first semiconductor element and the second semiconductor element and the second metal wiring. It is arrange
- This semiconductor device can achieve a long service life.
- FIG. 1A is a cross-sectional view showing the semiconductor device of the first embodiment.
- FIG. 1B is a cross-sectional view showing another semiconductor device of the first embodiment.
- FIG. 2 is a cross-sectional view showing the semiconductor device of the second embodiment.
- FIG. 3 is a cross-sectional view showing the semiconductor device of the third embodiment.
- FIG. 4 is a cross-sectional view showing the semiconductor device of the fourth embodiment.
- FIG. 5 is a cross-sectional view showing the main part of the semiconductor device of the fifth embodiment.
- FIG. 6 is a cross-sectional view showing the main parts of the semiconductor device of the sixth embodiment.
- FIG. 7 is a cross-sectional view showing the main parts of the semiconductor device of the seventh embodiment.
- FIG. 8 is a cross-sectional view showing the main parts of the semiconductor device of the eighth embodiment.
- FIG. 9 is a cross-sectional view showing the main part of the semiconductor device of the ninth embodiment.
- FIG. 1A is a cross-sectional view of the semiconductor device of the first embodiment. This semiconductor device is used in power equipment that requires high power.
- the semiconductor device includes a metal plate 1, a lead frame 3, a first semiconductor element 5a, a second semiconductor element 5b, a bus bar 6, and a plurality of protrusions 71a, 72a, 71b, 72b.
- the first semiconductor element 5 a and the second semiconductor element 5 b are disposed between the lead frame 3 and the bus bar 6.
- the protrusions 71 a and 72 a are disposed between the first semiconductor element 5 a and the bus bar 6.
- the protrusions 71 b and 72 b are disposed between the second semiconductor element 5 b and the bus bar 6.
- the distance between the lead frame 3 and the bus bar 6 can be increased by the protrusions 71a, 72a, 71b, 72b.
- the semiconductor device of the first embodiment includes a metal plate 1, an adhesive sheet 2, a lead frame 3, solder bumps 42a and 42b, a first semiconductor element 5a, and a second semiconductor device.
- the semiconductor element 5b, solder bumps 41a and 41b, protrusions 71a, 72a, 71b and 72b, a bus bar 6 and a spacer 8 are provided.
- the metal plate 1 corresponds to a substrate.
- the metal plate 1 releases the heat generated by the operation of the first semiconductor element 5a and the second semiconductor element 5b to the outside. That is, the metal plate 1 plays a role as a heat sink.
- the material of the metal plate 1 is, for example, copper or aluminum.
- the material of the metal plate 1 may be a metal other than copper or aluminum as long as the metal has a certain degree of rigidity.
- the adhesive sheet 2 is for stably bonding and fixing the metal plate 1 and the lead frame 3.
- the adhesive sheet 2 is disposed between the upper surface of the metal plate 1 and the lower surface of the lead frame 3.
- the adhesive sheet 2 has a laminated structure composed of a plurality of layers.
- the adhesive sheet 2 has an insulating layer and the contact bonding layer arrange
- the thickness of the insulating layer is about 190 ⁇ m to 210 ⁇ m.
- interposed the upper surface and lower surface of the insulating layer with the adhesive layer other than this structure may be sufficient.
- the insulating layer may be a plate made of alumina
- the adhesive layer may be a layer made of solder.
- the lead frame 3 corresponds to the first metal wiring.
- the lead frame 3 is a thin metal plate.
- the lead frame 3 is a wiring that connects the lower surfaces of the first semiconductor element 5a and the second semiconductor element 5b to the ground electrode.
- the lead frame 3 is disposed above the metal plate 1 and is disposed on the upper surface of the metal plate 1 via the adhesive sheet 2.
- the material of the lead frame 3 is, for example, iron or nickel.
- the solder bump 42a and the solder bump 42b correspond to conductive members, respectively.
- the solder bump 42a is disposed between the lead frame 3 and the first semiconductor element 5a.
- the solder bump 42b is disposed between the lead frame 3 and the second semiconductor element 5b.
- the thickness of each of the solder bumps 42a and 42b is 100 ⁇ m to 200 ⁇ m.
- the material of the solder bumps 42a and 42b is solder made of an alloy containing a metal such as tin and silver.
- the solder bumps 42a and 42b do not contain lead.
- solder bumps 42a and 42b may include particles having a diameter of 70 ⁇ m to 90 ⁇ m.
- the material of these particles may be silver or resin.
- the first semiconductor element 5a is a power element.
- a source electrode, a drain electrode, and a gate electrode are formed on the upper surface of the first semiconductor element 5a.
- the first semiconductor element 5a is disposed on the upper surface of the lead frame 3 via solder bumps 42a.
- a guard ring 9a is disposed on the outer periphery of the upper surface of the first semiconductor element 5a.
- the shape of the guard ring 9a is annular when viewed from the upper surface of the first semiconductor element 5a.
- the guard ring 9a reduces the strength of the electric field generated from the first semiconductor element 5a.
- the material of the guard ring 9a is metal.
- the second semiconductor element 5b is a diode.
- the second semiconductor element 5b is disposed on the upper surface of the lead frame 3 via solder bumps 42b.
- a guard ring 9b is disposed on the outer periphery of the upper surface of the second semiconductor element 5b.
- the shape of the guard ring 9b is annular when viewed from the upper surface of the second semiconductor element 5b.
- the guard ring 9b reduces the strength of the electric field generated from the second semiconductor element 5b.
- the material of the guard ring 9b is metal.
- the solder bump 41a and the solder bump 41b correspond to conductive members, respectively.
- the solder bump 41 a is disposed between the first semiconductor element 5 a and the bus bar 6.
- the solder bump 41 b is disposed between the second semiconductor element 5 b and the bus bar 6.
- the thicknesses of the solder bumps 41a and 41b are 100 ⁇ m to 200 ⁇ m, respectively.
- the material of the solder bumps 41a and 41b is the same as the material of the solder bumps 42a and 42b.
- the protrusion 71a, the protrusion 72a, the protrusion 71b, and the protrusion 72b are integrally formed with the bus bar 6 on the lower surface of the bus bar 6, respectively.
- the protrusions 71a, 72a, 71b, and 72b are bumps formed by melting metal wires used for so-called wire bonding.
- the material of the protrusions 71a, 72a, 71b, 72b is gold.
- the protrusions 71a and 72a are disposed between the first semiconductor element 5a and the bus bar 6.
- the number of protrusions 71a and 72a disposed on the upper surface of the first semiconductor element 5a is preferably two or more. Furthermore, three or more are more preferable. Accordingly, the protrusions 71a and 72a are stably disposed on the first semiconductor element 5a. Further, the protrusions 71a and 72a are preferably arranged at positions where they come into contact with corner portions on the upper surface of the first semiconductor element 5a. Accordingly, the protrusions 71a and 72a are stably disposed on the first semiconductor element 5a.
- the surfaces of the protrusions 71a and 72a that face the first semiconductor element 5a are flat surfaces.
- the flat surfaces of the protrusions 71a and 72a are in direct contact with the first semiconductor element 5a. Thereby, the physical connection between the protrusions 71a and 72a and the first semiconductor element 5a is stably maintained. Further, the electrical connection between the protrusions 71a and 72a and the first semiconductor element 5a is stably maintained. Furthermore, the tips of the protrusions 71a and 72a are arranged at positions that do not extend over a plurality of adjacent electrodes of the first semiconductor element 5a. Thereby, the electrical short between several electrodes can be suppressed.
- the volume of the solder bump 41a arranged around the protrusion 71a is smaller than the volume of the solder bump 41a arranged around the protrusion 72a inside the protrusion 71a.
- the solder bump 41a is prevented from getting around as much as possible around the outside of the protrusion 71a. Thereby, the influence of the electric field which the solder bump 41a receives can be suppressed. As a result, migration of the first semiconductor element 5a can be suppressed, and deterioration of the semiconductor device with time can be suppressed. In addition, electrical short-circuits with other semiconductor devices arranged next to each other can be suppressed.
- the protrusion 71b and the protrusion 72b are disposed between the second semiconductor element 5b and the bus bar 6.
- the number of the protrusions 71b and 72b disposed on the upper surface of the second semiconductor element 5b is preferably two or more. Furthermore, three or more are more preferable. Accordingly, the protrusions 71b and 72b are stably disposed on the second semiconductor element 5b.
- the protrusions 71b and 72b are preferably arranged at a position in contact with the corner portion on the upper surface of the second semiconductor element 5b. Accordingly, the protrusions 71b and 72b are stably disposed on the second semiconductor element 5b.
- the surfaces of the protrusions 71b and 72b that face the second semiconductor element 5b are flat surfaces.
- the flat surfaces of the protrusions 71b and 72b are in direct contact with the second semiconductor element 5b.
- the physical connection and electrical connection between the protrusions 71b and 72b and the second semiconductor element 5b are stably maintained.
- the tips of the protrusions 71b and 72b are arranged at positions that do not extend over a plurality of adjacent electrodes of the second semiconductor element 5b. Thereby, the electrical short between several electrodes can be suppressed.
- the volume of the solder bump 41b arranged around the protrusion 71b is smaller than the volume of the solder bump 41b arranged around the protrusion 72b inside the protrusion 71b.
- the solder bump 41b is prevented from getting around as much as possible around the outside of the protrusion 71b. Thereby, the influence of the electric field which the solder bump 41b receives can be suppressed. As a result, migration of the second semiconductor element 5b can be suppressed, and deterioration of the semiconductor device with time can be suppressed. In addition, electrical short-circuits with other semiconductor devices arranged next to each other can be suppressed.
- the bus bar 6 corresponds to the second metal wiring.
- the bus bar 6 is a metal plate.
- the bus bar 6 is disposed above the first semiconductor element 5a, and is disposed on the upper surface of the first semiconductor element 5a via solder bumps 41a. Further, the bus bar 6 is disposed above the second semiconductor element 5b, and is disposed on the upper surface of the second semiconductor element 5b via solder bumps 41b.
- the bus bar 6 is continuously arranged so as to straddle the upper side of the first semiconductor element 5a and the upper side of the second semiconductor element 5b.
- the bus bar 6 electrically connects the first semiconductor element 5a and the second semiconductor element 5b.
- the spacer 8 is sandwiched between the lead frame 3 and the bus bar 6.
- the spacer 8 can keep the distance between the lead frame 3 and the bus bar 6 at a constant distance.
- the metal plate 1 is prepared.
- the adhesive sheet 2 is bonded onto the metal plate 1.
- the lead frame 3 is arranged on the adhesive sheet 2 and the adhesive sheet 2 and the lead frame 3 are bonded.
- solder bumps 42 a and 42 b are formed on the lead frame 3.
- a spacer 8 is disposed in the center portion of the lead frame 3.
- the first semiconductor element 5a is disposed on the solder bump 42a.
- the second semiconductor element 5b is disposed on the solder bump 42b.
- solder bumps 41a are formed on the first semiconductor element 5a. Also, solder bumps 41b are formed on the second semiconductor element 5b.
- protrusions 71a, 72a, 71b, 72b are formed at predetermined positions of the bus bar 6.
- An integral flat metal plate is pressed to the tips of the protrusions 71a, 72a, 71b, 72b, and the heights of all the protrusions 71a, 72a, 71b, 72b are made uniform.
- the bus bar 6 is arranged so that the protrusions 71a and 72a face the first semiconductor element 5a and the protrusions 71b and 72b face the second semiconductor element 5b.
- solder bumps 41a and 41b and the solder bumps 42a and 42b are solidified by a reflow process.
- the semiconductor device of the first embodiment can be manufactured.
- the life of the semiconductor device can be extended.
- the reason will be described below.
- the distance between the first semiconductor element 5a and the bus bar 6 can be maintained at a predetermined size.
- the distance between the second semiconductor element 5b and the bus bar 6 can be kept at a predetermined size.
- interval between the lead frame 3 and the bus-bar 6 can also be maintained by the predetermined magnitude
- the semiconductor device of the first embodiment has high safety and durability, and can achieve a long life. Therefore, this semiconductor device is also useful as a semiconductor device used for automobile-related equipment.
- a plurality of protrusions 71a and 72a are disposed on the first semiconductor element 5a, and a plurality of protrusions 71b and 72b are disposed on the second semiconductor element 5b.
- bus bar 6 inclines.
- the distance between the first semiconductor element 5a and the bus bar 6 and the distance between the second semiconductor element 5b and the bus bar 6 can be maintained at a predetermined length with high accuracy.
- the distance between the bus bar 6 and the lead frame 3 can also be maintained at a predetermined length with high accuracy.
- the protrusions 71a, 72a, 71b, 72b have a flat surface facing one of the first semiconductor element 5a and the second semiconductor element 5b. Thereby, electrical connection and physical connection between the first semiconductor element 5a and the second semiconductor element 5b and the bus bar 6 can be improved.
- at least one of the plurality of protrusions 71a, 72a, 71b, 72b may have a flat surface facing one of the first semiconductor element 5a and the second semiconductor element 5b.
- FIG. 1B is a cross-sectional view of another semiconductor device according to the first embodiment.
- the bus bar 6 is provided with through holes 63a and 63b.
- the through holes 63 a and 63 b penetrate between the upper surface and the lower surface of the bus bar 6.
- the through-hole 63a is provided in a region of the bus bar 6 facing the first semiconductor element 5a. That is, the through hole 63a is provided in a region of the bus bar 6 facing the solder bump 41a.
- the through-hole 63b is provided in a region of the bus bar 6 facing the second semiconductor element 5b. That is, the through hole 63b is provided in a region of the bus bar 6 facing the solder bump 41b.
- the through hole 63a By providing the through hole 63a in this way, even if bubbles are generated in the solder bump 41a in the manufacturing process of the semiconductor device, the air of the bubbles can be discharged through the through hole 63a. Similarly, by providing the through hole 63b, air bubbles generated in the solder bump 41b can be released. As a result, the bonding strength between the first semiconductor element 5a and the second semiconductor element 5b and the bus bar 6 can be improved. Moreover, the bonding force can be maintained for a long time.
- a through hole may be formed in at least one of the region of the bus bar 6 facing the first semiconductor element 5a and the region facing the second semiconductor element 5b. In this case, bubbles of solder bumps facing the through holes can be reduced.
- the spacer 8 is provided between the lead frame 3 and the bus bar 6, but the spacer 8 is not necessarily a necessary component. Even when the spacer 8 is not provided, the inclination of the bus bar 6 can be suppressed by providing the protrusions 71a, 72a, 71b, 72b. Further, by providing the protrusions 71a, 72a, 71b, 72b, the distance between the lead frame 3 and the bus bar 6 can be stably maintained at a predetermined size.
- the solder bumps 41a, 41b, 42a, and 42b are used as the conductive members.
- the conductive member may be formed using a conductive adhesive made of gold, silver paste, resin containing metal fine particles, or the like.
- the first semiconductor element 5a is a power element and the second semiconductor element 5b is a diode.
- the first semiconductor element 5a and the second semiconductor element 5b are other semiconductors. It may be an element.
- FIG. 2 is a view showing a cross section of the semiconductor device of the second embodiment. Note that description of configurations common to the first embodiment is omitted.
- the semiconductor device includes a protrusion 73a and a protrusion 74a between the first semiconductor element 5a and the lead frame 3, as shown in FIG. Further, a protrusion 73 b and a protrusion 74 b are provided between the second semiconductor element 5 b and the lead frame 3.
- the protrusions 73a, 74a, 73b, and 74b are formed integrally with the lead frame 3 on the upper surface of the lead frame 3, respectively.
- the protrusions 73a, 74a, 73b, and 74b are bumps formed by melting metal.
- the number of protrusions 73a and 74a disposed on the lower surface of the first semiconductor element 5a is preferably two or more. Furthermore, three or more are more preferable. Accordingly, the first semiconductor element 5a is stably disposed on the protrusions 73a and 74a. Moreover, it is preferable that the tips of the protrusions 73a and 74a are in contact with a corner portion on the lower surface of the first semiconductor element 5a.
- the first semiconductor element 5a is stably arranged on the protrusions 73a and 74a.
- the surfaces of the protrusions 73a and 74a facing the first semiconductor element 5a are flat surfaces.
- the flat surfaces of the protrusions 73a and 74a are in direct contact with the first semiconductor element 5a.
- the physical connection and electrical connection between the protrusions 73a and 74a and the first semiconductor element 5a are stably maintained.
- the volume of the solder bump 42a disposed around the protrusion 73a is smaller than the volume of the solder bump 42a disposed around the protrusion 74a located inside the protrusion 73a.
- the solder bumps 42a are prevented from getting around as much as possible around the outside of the protrusion 73a. Thereby, the influence of the electric field which the solder bump 42a receives can be suppressed. As a result, migration of the first semiconductor element 5a can be suppressed, and deterioration of the semiconductor device with time can be suppressed. In addition, electrical shorts with other semiconductor devices arranged adjacent to each other can be suppressed.
- the number of protrusions 73b and 74b disposed on the lower surface of the second semiconductor element 5b is preferably two or more. Furthermore, three or more are more preferable.
- the second semiconductor element 5b is stably disposed on the protrusions 73b and 74b.
- the tips of the protrusions 73b and 74b are preferably in contact with the corner portion in the lower surface of the second semiconductor element 5b. Accordingly, the second semiconductor element 5b is stably disposed on the protrusions 73b and 74b.
- the surfaces of the protrusions 73b and 74b that face the second semiconductor element 5b are flat surfaces.
- the flat surfaces of the protrusions 73b and 74b are in direct contact with the second semiconductor element 5b. Thereby, the physical connection and electrical connection between the protrusions 73b and 74b and the second semiconductor element 5b are stably maintained.
- the volume of the solder bump 42b disposed around the protrusion 73b is smaller than the volume of the solder bump 42b disposed around the protrusion 74b located inside the protrusion 73b.
- the solder bumps 42b are prevented from getting around as much as possible around the outside of the protrusion 73b. Thereby, the influence of the electric field which the solder bump 42b receives can be suppressed. As a result, migration of the second semiconductor element 5b can be suppressed, and deterioration of the semiconductor device with time can be suppressed. In addition, electrical shorts with other semiconductor devices arranged adjacent to each other can be suppressed.
- the protrusions 73a, 74a, 73b, and 74b may be formed in the manufacturing method shown in the first embodiment before or after the lead frame 3 is placed on the adhesive sheet 2.
- the distance between the first semiconductor element 5a and the second semiconductor element 5b and the bus bar 6 can be kept at a predetermined size.
- the distance between the first semiconductor element 5a and the second semiconductor element 5b and the lead frame 3 can be maintained at a predetermined size. Therefore, the distance between the lead frame 3 and the bus bar 6 can be secured to a predetermined length. As a result, the influence of the electric field received by the first semiconductor element 5a and the second semiconductor element 5b can be reduced, and the life of the semiconductor device can be extended.
- the protrusions 73a, 74a, 73b, 74b have a flat surface facing one of the first semiconductor element 5a and the second semiconductor element 5b. Thereby, electrical connection and physical connection between the first semiconductor element 5a and the second semiconductor element 5b and the lead frame 3 can be improved.
- at least one of the plurality of protrusions 73a, 74a, 73b, and 74b may have a flat surface.
- FIG. 3 is a diagram illustrating a cross section of the semiconductor device of the third embodiment.
- description is abbreviate
- protrusions 73a and 74a are disposed between the first semiconductor element 5a and the lead frame 3, and the second semiconductor element 5b and the lead frame 3
- the protrusions 73b and 74b are disposed between the two. Projections are not arranged between the first semiconductor element 5 a and the bus bar 6 and between the second semiconductor and the bus bar 6.
- the first semiconductor element 5a and the bus bar 6 are connected by solder bumps 41a, and the second semiconductor element 5b and the bus bar 6 are connected by solder bumps 41b.
- the distance between the first semiconductor element 5a and the second semiconductor element 5b and the lead frame 3 can be kept at a predetermined size. . Therefore, the distance between the lead frame 3 and the bus bar 6 can be secured to a predetermined length or more. As a result, the influence of the electric field received by the first semiconductor element 5a and the second semiconductor element 5b can be reduced, and the life of the semiconductor device can be extended.
- FIG. 4 is a view showing a cross section of the semiconductor device of the fourth embodiment. Note that description of configurations common to the first embodiment is omitted.
- the protrusion 72a is in direct contact with the first semiconductor element 5a.
- the protrusion 71a is not in direct contact with the first semiconductor element 5a and is separated from the first semiconductor element 5a.
- the protrusion 72b is in direct contact with the second semiconductor element 5b.
- the protrusion 71b is not in direct contact with the second semiconductor element 5b and is separated from the second semiconductor element 5b.
- the protrusion 72a since the protrusion 72a is in direct contact with the first semiconductor element 5a, the conductivity between the first semiconductor element 5a and the bus bar 6 can be increased. Further, since the protrusion 72b is in direct contact with the second semiconductor element 5b, the conductivity between the second semiconductor element 5b and the bus bar 6 can be improved.
- the protrusion 71a is separated from the first semiconductor element 5a.
- the solder bump 41a flows between the first semiconductor element 5a and the protrusion 71a.
- substrate 1 is set
- the protrusion 71b is separated from the second semiconductor element 5b.
- the solder bump 42a flows between the second semiconductor element 5b and the protrusion 71b, and the parallelism between the substrate 1 and the bus bar 6 can be improved.
- At least one of the plurality of protrusions 71a, 72a, 71b, 72b can be improved in conductivity by being in direct contact with one of the first semiconductor element 5a and the second semiconductor element 5b.
- At least one of the plurality of protrusions 71a, 72a, 71b, 72b is configured to be separated from both the first semiconductor element 5a and the second semiconductor element 5b, whereby the bus bar 6 and the substrate
- the parallelism with 1 can be improved.
- FIG. 5 is a cross-sectional view showing the main part of the semiconductor device of the fifth embodiment.
- the description of the configuration common to the first embodiment is omitted.
- the main difference between the fifth embodiment and the first embodiment is the configuration and manufacturing method of the protrusions 71a, 72a, 71b, 72b.
- the protrusions 71a, 72a, 71b, 72b are formed by punching the bus bar 6. That is, in the fifth embodiment, the upper surface of the bus bar 6 is pressed downward using a mold to form the protrusions 71a, 72a, 71b, 72b. Thereby, a plurality of recesses 61a, 62a, 61b, 62b are formed on the upper surface of the bus bar 6. Each of the plurality of recesses 61a, 62a, 61b, 62b is paired with each of the plurality of protrusions 71a, 72a, 71b, 72b.
- the shape of the recesses 61a, 62a, 61b, 62b is a semi-elliptical sphere.
- the shape of the recesses 61a, 62a, 61b, 62b may be other than a semi-elliptical sphere, and may be a rectangular parallelepiped shape or a linear shape.
- the flexibility of the bus bar 6 is improved. Therefore, when the solder bumps 41a and 41b are thermally expanded in a reflow process of the solder bumps 41a and 41b, the bus bar 6 is elastically deformed. As a result, the stress load on the first semiconductor element 5a and the second semiconductor element 5b can be reduced. Then, the electrical resistance between the bus bar 6 and each of the first semiconductor element 5a and the second semiconductor element 5b is made uniform, and the potential is stabilized.
- the mold resin when the semiconductor device is covered with the mold resin, the mold resin enters the recesses 61a, 62a, 61b, and 62b. Therefore, the adhesion between the mold resin and the upper surface of the bus bar 6 is improved. It becomes difficult to form a gap between the mold resin and the bus bar 6, and problems such as accumulation of moisture from the mold resin in the gap can be suppressed.
- FIG. 6 is a cross-sectional view showing the main parts of the semiconductor device of the sixth embodiment.
- the protrusions 73a, 74a, 73b, and 74b are arranged between the lead frame 3 and each of the first semiconductor element 5a and the second semiconductor element 5b. ing.
- description of the configuration common to the third embodiment is omitted.
- the main difference between the sixth embodiment and the third embodiment is the configuration and manufacturing method of the protrusions 73a, 74a, 73b, and 74b.
- the protrusions 73a, 74a, 73b, and 74b shown in FIG. 6 are formed by punching the lead frame 3. That is, in the sixth embodiment, the lower surface of the lead frame 3 is pressed upward using a mold to form the protrusions 73a, 74a, 73b, and 74b. Thereby, a plurality of recesses 31a, 32a, 31b, and 32b are formed on the lower surface of the lead frame 3. Each of the plurality of recesses 31a, 32a, 31b, and 32b is paired with each of the plurality of protrusions 73a, 74a, 73b, and 74b.
- the shape of the recesses 31a, 32a, 31b, 32b is a semi-elliptical sphere.
- the shape of the recesses 31a, 32a, 31b, 32b may be other than a semi-elliptical sphere, and may be a rectangular parallelepiped shape or a linear shape.
- the flexibility of the lead frame 3 is improved. Therefore, even if the solder bumps 42a and 42b are thermally expanded in a reflow process of the solder bumps 42a and 42b, the lead frame 3 is elastically deformed. Therefore, the stress load on the first semiconductor element 5a and the second semiconductor element 5b can be reduced. As a result, the electrical resistance between the lead frame 3 and each of the first semiconductor element 5a and the second semiconductor element 5b becomes uniform, and the potential is stabilized.
- FIG. 7 is a cross-sectional view showing the main parts of the semiconductor device of the seventh embodiment.
- the protrusions 71a, 72a, 71b, 72b are formed by punching.
- recesses 61 a, 62 a, 61 b, 62 b are formed on the upper surface of the bus bar 6.
- the description of the configuration common to the fifth embodiment is omitted.
- the main difference between the seventh embodiment and the fifth embodiment is the configuration of the bus bar 6.
- the bus bar 6 is bent and connected to the lead frame 3.
- the bus bar 6 and the lead frame 3 are bonded by solder.
- the bus bar 6 since the bus bar 6 is bent, the flexibility of the bus bar 6 is improved. Therefore, when the solder bumps 41a and 41b are thermally expanded in a reflow process of the solder bumps 41a and 41b, the bus bar 6 is elastically deformed. As a result, the stress load on the first semiconductor element 5a and the second semiconductor element 5b can be reduced. Then, the electrical resistance between the bus bar 6 and each of the first semiconductor element 5a and the second semiconductor element 5b is made uniform, and the potential is stabilized.
- the source electrode formed on the upper surface of the first semiconductor element 5 a is connected to the lead frame 3 via the bus bar 6. That is, the source electrode is connected to the ground via the lead frame 3. Therefore, the generation of a potential between the source electrode and the lower surface of the first semiconductor element 5a can be suppressed, and the current coplus can be reduced.
- FIG. 8 is a cross-sectional view showing the main parts of the semiconductor device of the eighth embodiment.
- the protrusions 71a, 72a, 71b, 72b are formed by punching.
- recesses 61 a, 62 a, 61 b, 62 b are formed on the upper surface of the bus bar 6.
- description of the configuration common to the fifth embodiment is omitted.
- the main difference between the eighth embodiment and the fifth embodiment is the configuration of the bus bar 6 and the configuration of the first semiconductor element 5a and the second semiconductor element 5b.
- a convex portion 64 and a convex portion 65 are formed on the upper surface of the bus bar 6.
- the volume of the protrusions 64 and 65 is smaller than the volume of the protrusions 71a, 72a, 71b, and 72b.
- the tips of these convex portions 64 and 65 have a smaller area and are sharper than the tips of the protrusions 71a, 72a, 71b, and 72b.
- the bus bar 6 is formed by punching a metal plate from the lower surface to the upper surface shown in FIG. Therefore, convex portions 64 and 65 called so-called burrs are formed on the upper surface of the bus bar 6.
- protrusions 71a, 72a, 71b, and 72b are formed on the surface opposite to the surface on which the convex portions 64 and 65 are formed.
- the convex portions 64 and 65 having thin tips are arranged on the upper surface of the bus bar 6, the electric field is concentrated on the convex portions 64 and 65 as compared with the case where the convex portions 64 and 65 are arranged on the lower surface. Can be suppressed.
- the convex portions 64 and 65 can improve the adhesion between the mold resin and the upper surface of the bus bar 6.
- the shapes of the first semiconductor element 5a and the second semiconductor element 5b are shapes having rounded corners. Thereby, in the eighth embodiment, the electric field is less likely to concentrate on the first semiconductor element 5a and the second semiconductor element 5b.
- FIG. 9 is a cross-sectional view showing the semiconductor device of the ninth embodiment.
- the description of the configuration common to the first embodiment is omitted.
- the semiconductor device of the first embodiment shown in FIG. 1A is covered with a mold resin. That is, the semiconductor device shown in FIG. 9 includes a metal plate 1, a lead frame 3, a first semiconductor element 5a, a second semiconductor element 5b, a plurality of protrusions 71a, 72a, 71b, 72b, and a bus bar 6. Is integrally provided with a mold resin portion 10.
- the mold resin part 10 has a first region 10a, a second region 10b, and a third region 10c.
- the material of the first region 10a and the material of the third region 10c are the same. Therefore, the dielectric constant of the first region 10a is the same as that of the third region 10c.
- the material of the second region 10b is different from the material of the first region 10a and the third region 10c. Therefore, the dielectric constant of the second region 10b is different from the dielectric constants of the first region 10a and the third region 10c.
- the dielectric constants of the first region 10a and the third region 10c are made lower than the dielectric constant of the second region 10b.
- Electric field concentration can be made uniform.
- names relating to directions such as “upper surface”, “lower surface”, “upward”, “lower”, and the like are names based on directions that are convenient for the orientation of the drawing. Therefore, these names may be different depending on the direction in which the semiconductor device is arranged and the direction in which the semiconductor device is visually recognized.
- the semiconductor device of the above embodiment can suppress the deterioration of the semiconductor element. Therefore, it is useful for a control device for a moving body such as an automobile, a drive control device for home appliances, and the like that require high reliability.
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Abstract
Description
(1-1.概要)
図1Aは第1の実施形態の半導体装置の断面図である。この半導体装置は高電力を要する電力機器に用いられる。
以下、第1の実施形態の半導体装置の構成について詳細に説明する。
以下、第1の実施形態の半導体装置の製造方法について説明する。
以下、第1の実施形態の半導体装置の効果について説明する。
図1Bは、第1の実施形態の別の半導体装置の断面図である。
図2は、第2の実施形態の半導体装置の断面を示す図である。なお、第1の実施形態と共通する構成については説明を省略する。
図3は、第3の実施形態の半導体装置の断面を示す図である。なお、第1の実施形態または第2の実施形態と共通する構成については説明を省略する。
図4は、第4の実施形態の半導体装置の断面を示す図である。なお、第1の実施形態と共通する構成については説明を省略する。
図5は、第5の実施形態の半導体装置の要部を示す断面図である。第5の実施形態において、第1の実施形態と共通する構成については説明を省略する。第5の実施形態と第1の実施形態との主な違いは、突起71a、72a、71b、72bの構成および製造方法である。
図6は、第6の実施形態の半導体装置の要部を示す断面図である。第6の実施形態では、第3の実施形態と同様に、リードフレーム3と第一の半導体素子5aおよび第二の半導体素子5bのそれぞれとの間に突起73a、74a、73b、74bが配置されている。第6の実施形態において、第3の実施形態と共通する構成については説明を省略する。
図7は、第7の実施形態の半導体装置の要部を示す断面図である。第7の実施形態では、第5の実施形態と同様に、突起71a、72a、71b、72bがパンチング加工により形成されている。またバスバー6の上面には、凹部61a、62a、61b、62bが形成されている。第7の実施形態において、第5の実施形態と共通する構成については説明を省略する。
図8は、第8の実施形態の半導体装置の要部を示す断面図である。第8の実施形態では、第5の実施形態と同様に、突起71a、72a、71b、72bがパンチング加工により形成されている。またバスバー6の上面には、凹部61a、62a、61b、62bが形成されている。第8の実施形態において、第5の実施形態と共通する構成については説明を省略する。
図9は、第9の実施形態の半導体装置を示す断面図である。第9の実施形態において、第1の実施形態と共通する構成については説明を省略する。
2 接着シート
3 リードフレーム(第一の金属配線)
31a,32a,31b,32b 凹部
41a,42a 半田バンプ(導電部材)
41b,42b 半田バンプ(導電部材)
5a 第一の半導体素子
5b 第二の半導体素子
6 バスバー(第二の金属配線)
61a,62a,61b,62b 凹部
63a,63b 貫通孔
64,65 凸部
71a,72a,73a,74a,71b,72b,73b,74b 突起
8 スペーサ
9a,9b ガードリング
10 モールド樹脂部
10a 第一の領域
10b 第二の領域
10c 第三の領域
Claims (19)
- 金属からなる基板と、
前記基板の上方に配置された第一の金属配線と、
前記第一の金属配線の上方に配置された第一の半導体素子および第二の半導体素子と、
前記第一の半導体素子の上方および前記第二の半導体素子の上方に連続的に配置され、前記第一の半導体素子と前記第二の半導体素子とを電気的に接続する第二の金属配線と、
前記第一の半導体素子および前記第二の半導体素子のそれぞれと前記第一の金属配線との間、ならびに、前記第一の半導体素子および前記第二の半導体素子のそれぞれと前記第二の金属配線との間の少なくともいずれか一方に配置された複数の突起と、
を備えた、半導体装置。 - 前記第一の金属配線と前記第一の半導体素子との間、および前記第一の金属配線と前記第二の半導体素子との間に配置された複数の導電部材をさらに備えた、請求項1に記載の半導体装置。
- 前記第二の金属配線と前記第一の半導体素子との間、および前記第二の金属配線と前記第二の半導体素子との間に配置された複数の導電部材をさらに備えた、請求項1に記載の半導体装置。
- 前記複数の導電部材の材料は半田である、請求項2または請求項3に記載の半導体装置。
- 前記基板と前記第一の金属配線との間に配置された接着シートをさらに備えた、請求項1に記載の半導体装置。
- 前記接着シートは、
絶縁層と、
前記絶縁層の上面に配置された接着層と、
を有する、請求項5に記載の半導体装置。 - 前記第一の半導体素子はパワー素子であり、
前記第二の半導体素子はダイオードである、請求項1に記載の半導体装置。 - 前記第二の金属配線の、前記第一の半導体素子と対向する領域、および前記第二の半導体素子と対向する領域の少なくともいずれか一方には貫通孔が形成されている、請求項1に記載の半導体装置。
- 前記複数の突起は、前記第一の半導体素子と前記第一の金属配線との間に配置された二以上の突起と、前記第二の半導体素子と前記第一の金属配線との間に配置された二以上の突起とを含む、請求項1に記載の半導体装置。
- 前記複数の突起は、前記第一の半導体素子と前記第二の金属配線との間に配置された二以上の突起と、前記第二の半導体素子と前記第二の金属配線との間に配置された二以上の突起とを含む、請求項1に記載の半導体装置。
- 前記複数の突起のうちの少なくとも一つは、前記第一の半導体素子および前記第二の半導体素子の一方と対向する平坦な面を有する、請求項1に記載の半導体装置。
- 前記複数の突起のうちの少なくとも一つは、前記第一の半導体素子および前記第二の半導体素子の一方と直接接する、請求項1に記載の半導体装置。
- 前記複数の突起のうちの少なくとも一つは、前記第一の半導体素子および前記第二の半導体素子のいずれとも離れている、請求項1に記載の半導体装置。
- 前記複数の突起は、前記第一の半導体素子および前記第二の半導体素子のそれぞれと前記第一の金属配線との間に配置され、
前記第一の金属配線の下面には、複数の凹部が形成されている、請求項1に記載の半導体装置。 - 前記複数の突起は、前記第一の半導体素子および前記第二の半導体素子のそれぞれと前記第二の金属配線との間に配置され、
前記第二の金属配線の上面には、複数の凹部が形成されている、請求項1に記載の半導体装置。 - 前記第二の金属配線は、折れ曲がっていて、前記第一の金属配線と接続されている、請求項1に記載の半導体装置。
- 前記第一の半導体素子および第二の半導体素子の形状は丸みを帯びた角部を有する形状である、請求項1に記載の半導体装置。
- 前記第二の金属配線は、前記第二の金属配線の上面に設けられて、前記複数の突起よりも体積の小さい凸部を有する、請求項1に記載の半導体装置。
- 前記基板と、前記第一の金属配線と、前記第一の半導体素子と、前記第二の半導体素子と、前記複数の突起と、前記第二の金属配線とを一体的に覆うモールド樹脂部をさらに備え、
前記モールド樹脂部は、第一の領域と、前記第一の領域と異なる誘電率を有する第二の領域とを含む、請求項1に記載の半導体装置。
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