WO2015103837A1 - 薄膜晶体管及其制作方法、阵列基板及有机发光显示面板 - Google Patents

薄膜晶体管及其制作方法、阵列基板及有机发光显示面板 Download PDF

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WO2015103837A1
WO2015103837A1 PCT/CN2014/078846 CN2014078846W WO2015103837A1 WO 2015103837 A1 WO2015103837 A1 WO 2015103837A1 CN 2014078846 W CN2014078846 W CN 2014078846W WO 2015103837 A1 WO2015103837 A1 WO 2015103837A1
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layer
conductive
pattern
graphene
film transistor
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PCT/CN2014/078846
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English (en)
French (fr)
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田宗民
谢振宇
陈旭
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京东方科技集团股份有限公司
北京京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US14/415,909 priority Critical patent/US10186562B2/en
Publication of WO2015103837A1 publication Critical patent/WO2015103837A1/zh

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    • H01L29/78687—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys with a multilayer structure or superlattice structure
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    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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Definitions

  • Embodiments of the present disclosure relate to a thin film transistor and a method of fabricating the same, an array substrate, and an organic light-emitting display panel. Background technique
  • the organic light-emitting display panel refers to a panel including an organic light-emitting device, such as an OLED (Organic Light Emitting Diode) or other organic electroluminescent element EL (Electro Luminescent).
  • OLED Organic Light Emitting Diode
  • EL Electro Luminescent
  • the most commonly used light emitting device is an OLED.
  • the organic light emitting display panel is a panel of an organic light emitting display device, and an organic light emitting device is included in each pixel structure in the panel. Since the organic light emitting device is a self-luminous display device, no backlight is needed in the panel. .
  • Organic light-emitting devices have become a bright spot in the field of flat panel display due to their advantages of thinness, lightness, self-illumination, wide viewing angle, high definition, high brightness, fast response, low power consumption, wide temperature range, and strong shock resistance. Status.
  • the OLED light-emitting device is a current-driven light-emitting device, and the driving current required for normal operation is large.
  • a thin film transistor (TFT) that drives OLED light is very important. The higher the carrier mobility of the active layer in the TFT of the thin film transistor, the larger the driving current for driving the OLED.
  • the thin film transistor TFT in the organic light emitting display panel mainly includes an amorphous silicon TFT and a low temperature polysilicon TFT.
  • the mobility of the low temperature polysilicon TFT carriers is at least two orders of magnitude greater than the amorphous silicon TFT carrier mobility. Therefore, the thin film transistors in the conventional organic light emitting display panel are mostly low temperature polysilicon TFTs.
  • low-temperature polysilicon TFTs are relatively harsh. Generally, amorphous silicon is first deposited, then subjected to dehydrogenation treatment, subjected to laser annealing after treatment, and then exposed and etched. This process requires at least 3-4 mask processes. The process is complicated and the yield is relatively low. In addition, the low temperature polysilicon TFT is made at a high temperature and is not suitable for fabrication on a flexible substrate. Summary of the invention
  • Embodiments of the present disclosure provide a thin film transistor which has the advantages of a simple structure and a manufacturing process flow.
  • a thin film transistor includes at least an active layer, the active further including a first conductive layer and a second conductive layer that are in contact with the active layer on upper and lower sides of the active layer;
  • the first conductive layer and the second conductive layer are composed of a secondary electron emission layer having an electron multiplying function.
  • the secondary electron emission layer having an electron multiplying function is made of a metal oxide or a metal organic compound.
  • the first conductive layer has a thickness of 40 to 50 nm
  • the second conductive layer has a thickness of 40 to 50 nm
  • the carbon nanotube having a semiconductor property is a carbon oxide nanotube
  • the graphene having a semiconductor property is hydrogen graphene
  • the source and the drain are composed of a carbon nanotube or graphene material having a conductor property; the second conductive layer is located at the source and the drain A pole is disposed between the active layer and the source and the drain.
  • At least one embodiment of the present disclosure also provides an array substrate including a substrate substrate, a plurality of pixel units arranged in a matrix on the substrate substrate, each of the pixel units including the thin film transistor described above.
  • the array substrate further includes an organic light emitting device at each pixel unit, the organic light emitting device including at least a stacked cathode, an anode, and a light emitting layer between the cathode and the anode.
  • the anode is connected to a drain in the thin film transistor;
  • the organic light emitting device further includes a conductive film layer having a reflective effect disposed on the anode stack; or
  • the organic light emitting device further includes a conductive film layer having a reflective effect disposed on the cathode stack.
  • the base substrate is a flexible substrate.
  • At least one embodiment of the present disclosure also provides an organic light emitting display panel including the above array Column substrate.
  • At least one embodiment of the present disclosure also provides a method of fabricating a thin film transistor, comprising the steps of: an electrical layer and a second conductive layer; a material composition, wherein the first conductive layer and the second conductive layer are electronically multiplied Functional secondary electron emission layer.
  • the secondary electron emission layer having an electron multiplying function is made of a metal oxide or a metal organic compound.
  • the thin film transistor further includes a source and a drain
  • the method further includes:
  • a step of forming the source and the drain is performed, and the source and drain are made of carbon nanotubes or graphene having a conductor property.
  • the fabricating includes an active layer and a first conductive layer and a second conductive layer on the upper and lower sides of the active layer in contact with the active layer, including:
  • the base substrate Forming a two-layer secondary electron emission layer on the base substrate, and a carbon nanotube film layer or a graphene film layer between the secondary electron emission layers to form the first conductive layer pattern and active And a second conductive layer pattern, wherein the second conductive layer pattern is located between the source and the drain to be formed and the active layer and is disposed corresponding to the source and the drain to be formed.
  • the step of fabricating the source and the drain is performed, and the source and the drain are made of carbon nanotubes or graphene having a conductor property, specifically:
  • a substrate base on which the first conductive layer pattern, the active layer pattern, and the second conductive layer pattern are formed Depositing a layer of carbon nanotube or graphene film having a conductive property on the plate;
  • the carbon nanotube or graphene film layer having the conductive properties is patterned to form source and drain patterns on the second conductive layer pattern.
  • the first conductive layer has a thickness of 40 to 50 nm
  • the second conductive layer has a thickness of 40 to 50 nm
  • At least one embodiment of the present disclosure provides a method of fabricating an array substrate, including the steps of fabricating a thin film transistor of each pixel unit and the steps of fabricating the organic light emitting display device;
  • the step of fabricating the thin film transistor is fabricated by the above method of fabricating a thin film transistor.
  • the step of fabricating an organic light emitting display device includes: forming an anode pattern composed of carbon nanotubes or graphene having a conductor property on a base substrate on which the thin film transistor is formed, and An anode is connected to a drain of the thin film transistor; a pixel defining layer pattern is formed on the substrate substrate on which the anode pattern is formed;
  • the step of forming an anode pattern composed of carbon nanotubes or graphene having a conductor property on a base substrate on which the thin film transistor is formed includes: forming the thin film transistor Forming, on the base substrate, a conductive film layer having a reflective effect and a conductive film layer composed of carbon nanotubes or graphene having a conductive property on the conductive film layer;
  • the anode pattern is formed on a base substrate on which the above-described conductive film layer is formed by a patterning process.
  • the step of forming a cathode pattern on the light-emitting layer formed of carbon nanotubes or graphene having a conductor property on the base substrate on which the light-emitting layer pattern is formed includes:
  • a cathode pattern of the organic light-emitting device is formed on a base substrate on which the above-mentioned conductive film layer is formed by a patterning process.
  • the active layer is a carbon nano having semiconductor properties a tube or a graphene having a semiconductor property
  • the active layer, the first conductive layer and the second conductive layer can be prepared only by using a process condition similar to a chemical vapor deposition method or a coating method
  • the second conductive layer is a secondary electron emission layer having an electron multiplying function, when the thin film transistor
  • FIG. 1 is a schematic structural view of a thin film transistor according to a first embodiment of the present disclosure
  • FIG. 2 is a schematic structural view of an array substrate according to a second embodiment of the present disclosure.
  • FIG. 3 is a schematic structural view of a thin film transistor having a passivation layer according to an embodiment of the present disclosure
  • FIG. 4 is a schematic structural view of an organic light emitting display panel formed with a thin film transistor and an organic light emitting device according to an embodiment of the present disclosure. detailed description
  • Embodiments of the present disclosure provide a thin film transistor, a method for fabricating the same, an array substrate, and an organic light-emitting display panel for providing a thin film transistor, an array substrate, and an organic light-emitting display panel having a simple structure and a fabrication process.
  • the thin film transistor according to an embodiment of the present disclosure only needs to use a similar chemical vapor deposition method or coating
  • the process conditions of the method can prepare TFTs with high carrier mobility characteristics of low-temperature polysilicon, which reduces the process complexity of preparing high-performance TFTs.
  • Embodiment 1 Thin film transistor.
  • the thin film transistor includes at least an active layer 35, and further includes a first conductive layer 36 and a second conductive layer 37 that are in contact with the active layer 35 on the upper and lower sides of the active layer 35, that is, active.
  • the layer 35 is sandwiched between the first conductive layer 36 and the second conductive layer 37; wherein the active layer 35 is made of carbon nanotubes having semiconductor properties or graphene having semiconductor properties; the first conductive layer 36 and the first
  • the two conductive layers 37 are composed of a secondary electron emission layer having an electron multiplying function.
  • the thin film transistor generally further includes a gate electrode 31, a gate insulating layer 32 over the gate electrode 31, an active layer 35 over the gate insulating layer 32, a source 33 and a drain 34 above the active layer 35, and the like. .
  • the active layer is made of carbon nanotubes having semiconductor properties or graphene having semiconductor properties, and the active layer, the first conductive layer, and the second conductive layer need only use prior art. Mature process conditions similar to chemical vapor deposition or coating can be prepared, reducing the number of depositions, reducing the difference in damage and matching caused by the difference in the preparation process between layers, the preparation process is simple, and the manufacturing cost is low. Low cost and high yield.
  • the first conductive layer and the second conductive layer are composed of a secondary electron emission layer having an electron multiplying function, and when the thin film transistor TFT operates, electrons enter the first conductive layer and the second conductive layer through the active layer, due to the first
  • the conductive layer and the second conductive layer have the characteristics of secondary electron emission of electron multiplication function, and the electrons accelerate and advance in a rotating state, and multiple collisions occur between the electrons in the process, so that the electrons multiply and finally output.
  • the electrons grow geometrically, increasing the mobility of electrons, making the carrier mobility comparable to that of low-temperature polysilicon carrier mobility.
  • the secondary electron emission layer having an electron multiplying function is made of a metal oxide or a metal organic compound.
  • the metal oxide may be MgO (magnesium oxide) or BeO (yttrium oxide) or the like.
  • the metal organic compound also referred to as an organometallic compound, refers to a compound formed by combining a hydrocarbon group of an alkyl group (including a mercapto group, an ethyl group, a propyl group, a butyl group, etc.) and an aromatic group (a phenyl group, etc.) with a metal atom, and carbon.
  • a general term for a substance formed by direct bonding of an atom and a metal atom for example, a metal such as lithium, sodium, magnesium, calcium, cadmium, mercury, bismuth, aluminum, tin, or lead can form a relatively stable organometallic compound.
  • a metal such as lithium, sodium, magnesium, calcium, cadmium, mercury, bismuth, aluminum, tin, or lead
  • Both the metal oxide and the metal organic compound have an electron multiplying function and can be used as a secondary electron emission layer.
  • film layers having an electron multiplication function can also be used as the secondary electron emission layer, which is not limited herein.
  • the multiple of the electron multiplication is related to the film thickness of the secondary electron emission layer, and the degree of improvement of the TFT performance can be adjusted by controlling the thickness of the film.
  • the thickness of the secondary electron emission layer should not be too thick or too thin, according to an embodiment of the present disclosure.
  • the thickness of the first conductive layer and the second conductive layer are respectively between 40 and 50 nm (400-500 A), and the multiple of electrons can be increased to 150 or more.
  • carbon nanotubes and graphene Due to the special structure of carbon nanotubes and graphene, it can be used as a conductor or as a semiconductor after proper processing. For example, by treating oxygenated carbon nanotubes with ultraviolet light, it can be made into a semiconductor, through H 2 or Ar treatment can turn graphene into a semiconductor.
  • the carbon nanotubes having semiconductor properties may be carbon nanotubes having semiconductor properties after ultraviolet irradiation and being subjected to oxygen treatment, referred to as oxidized carbon nanotubes, and the oxidized carbon nanotubes are used as a nano material.
  • the graphene having semiconducting properties may be hydrogen-treated graphene having semiconductor properties, referred to as hydrogen graphene, which is more pure in hydrogen graphene.
  • the characteristics of graphene can be better utilized.
  • the process of specifically treating carbon nanotubes and graphene is similar to the technique known to the inventors and will not be described again here.
  • the source and the drain of the thin film transistor are composed of a carbon nanotube or graphene material having a conductor property, and the second conductive layer is located between the source and the drain and the active layer and The source and drain are set accordingly.
  • the second conductive layer 37 is located under the source 33 and the drain 34, and the second conductive layer 37 and the lower portion of the source 33 are
  • the second conductive layer 37 under the drain 34 is disposed opposite to form a slit having a set width corresponding to a slit formed between the source 33 and the drain 34. That is, a second conductive layer 37 is disposed under the source 33 and the drain 34, and the second conductive layer 37 has a slit to prevent the source 33 and the drain 34 from being electrically connected through the second conductive layer 37.
  • the arrangement can further ensure that the source 33 and the drain 34 remain insulated.
  • the TFT shown in FIG. 1 is a bottom gate type TFT
  • the thin film transistor according to the embodiment of the present disclosure may also be a top gate type TFT, a side gate type or a double gate type, etc., and is not specifically limited herein.
  • the specific structure of the TFT of the type is a source and a drain under the active layer, a gate insulating layer above the active layer, and a gate above the gate insulating layer.
  • a conductive layer and a second conductive layer are still located on the upper and lower sides of the active layer and are in contact with the active layer, except that the first conductive layer is located above the active layer, the second conductive layer is located below the active layer, and the second conductive layer Located above the source and drain.
  • the arrangement of the first conductive layer and the second conductive layer and the active layer, the source and the drain are similar to those of the above embodiment, and are not described herein again.
  • Embodiment 2 Array substrate.
  • the array substrate according to the second embodiment of the present disclosure is similar to the conventional technology, and includes a substrate substrate and a plurality of pixel units arranged in a matrix on the base substrate, wherein each of the pixel units includes at least one thin film transistor.
  • the thin film transistor is the thin film transistor according to the above embodiment.
  • the array substrate according to the second embodiment of the present disclosure further includes an organic light emitting device OLED located in each pixel unit, and the organic light emitting device includes at least a stacked cathode 41 and an anode 42 (also referred to as a pixel electrode). And an illuminating layer 43 between the cathode 41 and the anode 42, the anode 42 is connected to the drain 34 in the thin film transistor; wherein at least one of the cathode 41 and the anode 42 is made of carbon nanotube or graphene having a conductor property.
  • At least one of the cathode and the anode of the organic light emitting device OLED is made of carbon nanotube or graphene having a conductor property, since the atoms of the carbon nanotube or graphene exhibit a long range Ordered, showing good electrical conductivity.
  • the carbon nanotube or graphene having the conductor property has better conductivity, and the carrier transmission rate of the OLED is higher, which is advantageous for improvement.
  • the luminescent properties of OLEDs are Compared with the metal or metal oxide known to the inventors as the cathode 41 and the anode 42 of the OLED, the carbon nanotube or graphene having the conductor property has better conductivity, and the carrier transmission rate of the OLED is higher, which is advantageous for improvement.
  • the cathode, the light-emitting layer, and the anode may be sequentially stacked on the base substrate, and the positions of the anode and the cathode may be interchanged, and the anode and the thin film transistor need to be ensured regardless of the arrangement.
  • the drains in the connections are connected.
  • the anode 42 of the OLED is located on the base substrate 1
  • the light-emitting layer 43 is located on the anode 42
  • the cathode 41 is located on the light-emitting layer 43.
  • the construction of the OLED can be determined according to actual needs, and no specific restrictions are made here.
  • the carbon nanotube or graphene conductive film layer having a conductor property is transparent conductive a film layer
  • the anode further comprising a conductive film layer having a reflective effect disposed on the anode
  • the cathode further comprises a conductive film layer having a reflective effect disposed on the cathode stack.
  • the conductive film layer may be a film layer formed of Mo (molybdenum), Al (aluminum) or molybdenum aluminum alloy having a light reflecting effect.
  • the anode of the OLED includes a conductive film layer having a light-reflecting action on the substrate, and a carbon nanotube or a graphene conductive film layer having a conductive property as an anode on the conductive film layer having a light-reflecting effect.
  • the anode of the OLED according to the embodiment of the present disclosure uses a double-layer conductive film layer, that is, the opaque conductive film layer is combined with the transparent conductive film layer, and the pattern on the TFT substrate is effectively combined with the anode of the organic light-emitting element, thereby reducing the anode.
  • the wiring and the pattern on the TFT substrate occlude the light, which increases the light-emitting area; and the anode electrode is designed as a double layer, that is, the opaque metal is combined with the transparent conductive film, and the reflected light can be effectively utilized, so that the reflected light passes through
  • the organic light-emitting layer causes the organic light-emitting material of the light-emitting layer to realize photoluminescence, thereby further improving the light-emitting efficiency and brightness of the organic light-emitting device.
  • the transparent conductive film layer protects the reflective conductive film layer. Since the OLED further improves the utilization of light, the injection efficiency of electrons from the cathode and holes from the anode in the OLED is improved, thereby improving the luminous efficiency and image display quality of the organic light-emitting display panel.
  • the base substrate in the array substrate according to the above embodiment may be a glass substrate or a flexible substrate. If the base substrate is a flexible substrate, the flexible substrate may be made of a polymer material such as a polyvinyl alcohol film, a polyimide film, or a polyester film.
  • the existing low-temperature polycrystalline silicon is produced under high temperature conditions, and is not suitable for fabrication on a flexible substrate having a low heat resistance or a low melting point, thereby limiting the production of a high-performance, low-cost flexible display device or a display device such as an electronic paper.
  • the above-mentioned thin film transistor TFT provided by the present disclosure does not need to be performed under high temperature conditions (for example, a temperature exceeding 200 ° C), and can be deposited by chemical vapor deposition or coating, which simplifies the fabrication process of the flexible substrate. , reduce production costs.
  • a passivation layer 38 is formed on the TFT, and the passivation layer 38 is disposed on the anode 42 and the same layer. Between the source 33 and the drain 34.
  • the array substrate further includes a pixel defining layer 44 (i.e., a pixel spacer film) between the anode 42 and the light emitting layer 43.
  • Embodiment 3 Organic light emitting display panel.
  • An embodiment of the present disclosure also provides an organic light emitting display panel including the above array substrate.
  • the organic light emitting display panel may be any product or component having a display function, such as electronic paper,
  • OLED panels digital photo frames, mobile phones, tablets, etc.
  • the active layer in the thin film transistor is made of carbon nanotubes having semiconductor properties or graphene having semiconductor properties, so that semiconductor carrier mobility is relatively high. , making the stability of the organic light emitting display device higher.
  • a first conductive layer and a second conductive layer are respectively formed on the upper and lower sides of the active layer, and the first conductive layer and the second conductive layer are composed of a secondary electron emission layer having an electron multiplication function, so that the TFT is active.
  • the electrons in the layer are multiplied, and the final output electrons increase geometrically, increasing the mobility of the electrons, making the TFT carrier mobility so large that it can be compared with the low-temperature polysilicon carrier mobility.
  • Embodiment 4 A method of fabricating a thin film transistor.
  • a method of fabricating a thin film transistor comprising the steps of: a step of: a conductive layer and a second conductive layer; the active layer being composed of carbon nanotubes having semiconductor properties or having Made of graphene of a semiconductor nature, the first conductive layer and the second conductive layer are each composed of a secondary electron emission layer having an electron multiplying function.
  • the thin film transistor further includes other structures such as a gate, a source, a drain, and a gate insulating layer.
  • the steps of fabricating the thin film transistor including the above structure can be made by an existing method, and will not be described herein.
  • the materials of the gate, source, drain and gate insulating layers may be metals or alloys for making gate, source, drain and gate insulating layers known to those skilled in the art, or by carbon nanotubes or Made of graphene conductive material.
  • the secondary electron emission layer having an electron multiplying function is composed of a metal oxide or a metal organic compound material.
  • the step of a conductive layer and the second conductive layer may include:
  • Step S1 depositing a secondary electron emission layer having an electron multiplying function on the substrate to form the first conductive layer pattern
  • Step S12 depositing a layer of carbon nanotube film having semiconductor properties or a layer on the substrate on which the secondary electron emission layer having the electron multiplying function is formed by chemical vapor deposition or coating a graphene film layer having a semiconductor property for forming the active layer pattern, wherein the carbon nanotube film layer having a semiconductor property may be a carbon nanotube film layer irradiated by ultraviolet light and treated with oxygen, having a semiconductor property
  • the graphene film layer may be a hydrogen or argon treated graphene film layer;
  • Step S13 forming a second electron emission layer having an electron multiplying function on the substrate forming the carbon nanotube film layer having semiconductor properties or the graphene film layer having semiconductor properties, to form the second conductive layer Layer pattern
  • Step S14 patterning a two-layer secondary electron emission layer on the base substrate, and a carbon nanotube film layer having a semiconductor property or a graphene film layer having a semiconductor property between the secondary electron emission layers, Forming the first conductive layer pattern, the active layer pattern, and the second conductive layer pattern, and the second conductive layer pattern is located between a source and a drain to be formed and the active layer and to be formed The source and drain are set accordingly.
  • the second conductive layer is a pattern having a slit of a set width, that is, on a film layer formed of carbon nanotubes or graphene material (ie, active layer 35).
  • a film layer formed of carbon nanotubes or graphene material ie, active layer 35.
  • a layer of MgO (or BeO or a metal organic compound) may be deposited by sputtering techniques (the layer will be used to form the first conductive layer), and then a layer of UV is formed by chemical vapor deposition or coating.
  • Light-irradiated and oxygen-treated carbon nanotubes or graphene treated with hydrogen (or argon) (this layer will be used to make the active layer), and the treated carbon nanotubes or graphene have semiconductor properties;
  • a layer of MgO (or BeO or metal organic compound) is deposited again by sputtering techniques (this layer will be used to make the second conductive layer).
  • the step of fabricating the thin film transistor may further include fabricating the source and the drain Steps, including:
  • Step S15 depositing a carbon nanotube or graphene film layer having a conductive property on the base substrate on which the first conductive layer pattern, the active layer pattern and the second conductive layer pattern are formed;
  • Step S16 Perform a patterning process on the carbon nanotube or graphene film layer having the conductive property to form a source and drain pattern on the second conductive layer pattern.
  • the source layer is made of carbon nanotubes or graphene having semiconducting properties
  • the source and the drain are formed of a carbon nanotube or graphene material having a conductive property
  • etching conditions for forming an active layer, a source and a drain material are
  • the first conductive layer is similar to the second conductive layer, and can be completed by a mask, exposure, development lithography etching process, etc., which greatly saves the production process of the product and maximizes the yield of the product.
  • the problem of misalignment caused by multiple masking, exposure, development lithography etching, or the interaction between the layers caused by different etching conditions is avoided, resulting in a problem of a decrease in product yield.
  • the conventional thin film transistor may further include a gate electrode and a gate insulating layer, etc.
  • the manufacturing method may further include a step of forming a gate electrode and a gate insulating layer, etc., when the thin film transistor is a bottom gate type, the bottom gate type thin film transistor
  • the structure includes a gate insulating layer over the gate, an active layer over the gate insulating layer, and a source and a drain above the active layer, and further includes a first conductive layer under the active layer A layer, a second conductive layer above the active layer and below the source and drain.
  • Step 11-1 forming a pattern including a gate on the base substrate by a patterning process
  • a metal film layer such as a Mo (molybdenum) metal film layer
  • a substrate substrate a glass substrate or a flexible substrate (hereinafter referred to as a substrate substrate) by a conventional sputtering technique, and then performing a patterning process on the substrate shown in FIG.
  • a pattern including at least the gate electrode 31 is formed on 1, and a gate line pattern can also be formed.
  • Step 11-2 forming a gate insulating layer on the base substrate on which the gate line is formed by a patterning process
  • a gate insulating layer 32 covering the entire substrate 1 is formed on the gate 31 shown in Fig. 2 by a coating technique.
  • a second electron emission layer having an electron multiplying function may be deposited on the base substrate after the step 11-2 to form the first conductive layer pattern, and then the above steps S12-S16 are sequentially performed.
  • the top gate type thin film transistor When the thin film transistor is of a top gate type, the top gate type thin film transistor includes a source and a drain under the active layer, a gate insulating layer above the active layer, a gate above the gate insulating layer, and A first conductive layer above the active layer, a second conductive layer under the active layer and above the source and drain.
  • an exemplary fabrication method of the top gate type thin film transistor may be: Step 21, depositing a layer of carbon nanotube or graphene film having a conductive property on the substrate;
  • Step 22 performing a patterning process on the carbon nanotube or graphene film layer having a conductive property to form a source and drain pattern;
  • Step 23 depositing a secondary electron emission layer having an electron multiplying function on the substrate substrate forming the source and the drain to form the second conductive layer pattern;
  • This step 23 is slightly different from step S11 in the above example, except that in this embodiment, a thin film layer for forming a second conductive pattern is first deposited.
  • Step 24 depositing a layer of carbon nanotube film having semiconductor properties or graphene having semiconductor properties on a substrate on which the secondary electron emission layer having electron multiplying function is formed by chemical vapor deposition or coating method a film layer for forming the active layer pattern, the step is the same as step S12 above;
  • Step 25 forming a second electron emission layer having an electron multiplying function on the substrate after the step 24 to form the first conductive layer pattern;
  • Step 26 patterning a two-layer secondary electron emission layer on the substrate, and a carbon nanotube film layer having a semiconductor property or a graphene film layer having a semiconductor property between the secondary electron emission layers to form the a first conductive layer pattern, an active layer pattern and a second conductive layer pattern, and the second conductive layer pattern is located between the source and the drain and the active layer, and is disposed to correspond to the source And the drain.
  • step S14 is slightly different from step S14 in the above example, except that the second conductive layer is located above the source and the drain, and when the thin film transistor is of the bottom gate type, the second conductive layer is located at the source and the drain. Below.
  • Step 27 forming a gate insulating layer on the substrate on which the gate line is formed by a patterning process on the substrate after the step 26;
  • a gate insulating layer covering the entire substrate is formed on the substrate on which the first conductive layer pattern, the active layer pattern, and the second conductive layer pattern are formed by a coating technique.
  • Step 28 forming a pattern including a gate on the substrate by a patterning process on the substrate after the step 27;
  • a metal film layer such as a Mo (molybdenum) metal film layer, is deposited over the gate insulating layer according to a conventional sputtering technique, and then a pattern including at least a gate electrode is formed on the substrate by a patterning process.
  • a gate line pattern can be formed at the same time.
  • the first conductive layer pattern, the active layer pattern, the second conductive layer pattern, the source pattern, and the drain pattern in the above example may be formed in the same patterning process, or may be in multiple patterning processes. Formed in the middle.
  • the first conductive layer pattern, the active layer pattern, and the second conductive layer pattern are formed by the same patterning process, and the source and drain patterns are formed separately.
  • the first conductive layer pattern, the active layer pattern, the second conductive layer pattern, and the source and drain patterns are formed by the same patterning process.
  • the fabrication process of the thin film transistor is similar to that in the conventional technology, and will not be described herein. If the first conductive layer, the active layer, and the second conductive layer are completed in the same patterning process, or the first conductive layer, the active layer, the second conductive layer, the source and the drain are completed in the same patterning process, The product yield is high and the process is saved.
  • the first conductive layer has a thickness of 40-50 nm
  • the second conductive layer has a thickness of 40-50.
  • the method for fabricating a thin film transistor may further include: forming a passivation layer 38 in a conventional method and forming a via hole 47 in the passivation layer 38 (the area of the via 47 is as shown in FIG. Steps in the closed line shown in 2).
  • a passivation layer 38 is formed on the base substrate 1 on which the pattern of the active electrode 33 and the drain electrode 34 is formed by a patterning process, and a via hole 47 is formed on the passivation layer 38 in a region corresponding to the pattern of the drain electrode 34.
  • the resin is coated on the source and drain using a resin coating technique, and a passivation layer 38 as shown in FIG. 2 is formed by exposure, development, photolithography, etc., in which the passivation layer 38 and the drain are formed.
  • a correspondingly shaped opening is formed at the corresponding area of 34. Referring to FIG. 3, the opening is a via 47.
  • Embodiment 5 The manufacturing process of the array substrate.
  • a process of fabricating a thin film transistor including a pixel unit and a process of fabricating an OLED will be described below.
  • the fabrication process of the thin film transistor is any of the processes for fabricating the thin film transistor provided in the above embodiment, and the fabrication process of the OLED will be described below.
  • the OLED can be formed on the basis of the thin film transistor fabricated by the method provided in the above embodiments, the OLED including at least an anode, a pixel defining layer, a light emitting layer and a cathode.
  • the fabrication process of the OLED may include the following steps: Step S31, forming a conductive property on the substrate substrate on which the thin film transistor is formed
  • the carbon nanotube or graphene forms an anode pattern, and the anode is connected to the drain of the thin film transistor.
  • a sputtering method is used to deposit a layer of ITO or a coating technique to deposit a conductive carbon nanotube transparent conductive film (or graphene film) by exposure, development, photolithography, etc.
  • Step S32 forming a pixel defining layer pattern on the substrate on which the anode pattern is formed.
  • a layer of resin is coated on the substrate 1 on which the anode 42 is formed by a coating technique, and a pixel defining layer 44 is formed by exposure, development, photolithography, or the like.
  • the pixel defining layer 44 is a film layer surrounding the pixel region for preventing color mixing of light-emitting layers of different colors in adjacent pixel regions.
  • Step S33 forming a light-emitting layer pattern on the base substrate on which the pixel defining layer pattern is formed.
  • a light-emitting layer e.g., quinolinone
  • a pattern of the light-emitting layer 43 is formed by a patterning process.
  • a hole transport layer 45, an electron blocking layer (not shown in FIG. 4), a light emitting layer 43, and a hole blocking layer are formed over the pixel defining layer 44 using a coating technique or an evaporation technique and a patterning process (FIG. 4) Not shown) and the electron transport layer 46.
  • Step S34 forming a cathode pattern on the light-emitting layer made of a carbon nanotube or graphene material having a conductor property on the base substrate on which the light-emitting layer pattern is formed.
  • a carbon nanotube transparent conductive film (or graphene film) having a conductive property forms a pattern of the cathode 41 shown in FIG. 4 by a patterning process, and the cathode is connected to the cathode ground power source via a via (not shown) (Fig. Not shown in the middle), and an electric field is formed with the anode to drive the light-emitting layer to emit light.
  • At least one of the cathode and the anode in the OLED is made of a carbon nanotube or graphene material having a conductor property. Since the atoms of carbon nanotubes or graphene exhibit long-range order and have good electrical conductivity, the conductivity of carbon nanotubes or graphene is better than that of conventional metal or metal oxides as cathode 41 and anode 42 of OLED.
  • the OLED has a higher carrier transport rate, which is beneficial to improve the luminescence performance of the OLED.
  • a conductive film layer having a reflective effect may be disposed at the anode.
  • the process of forming the anode pattern in the above step S31 includes:
  • the anode pattern is formed on a base substrate on which the above-described conductive film layer is formed by a patterning process.
  • a sputtering film is used to sputter a conductive film layer on the source 33 and the drain 34, for example, Mo (molybdenum), A1 (aluminum) or molybdenum aluminum alloy having a reflective effect.
  • the formed film layer is then deposited by sputtering technology to deposit a layer of ITO or a coating method to deposit a layer of carbon nanotube transparent conductive film (or graphene film), which is formed by exposure, development, photolithography, etc. 4, the anode 42 pattern, the anode 42 includes a conductive film layer having a reflective effect on the drain electrode 34, and a carbon nanotube or graphene transparent conductive film having a conductive property on the conductive film layer.
  • a conductive film layer having a retroreflective effect may be disposed at the cathode. For example, the above steps
  • the process of forming a cathode by S34 can include:
  • a cathode pattern of the organic light-emitting device is formed on a base substrate on which the above-mentioned conductive film layer is formed by a patterning process.
  • a sputtering method is used to sputter a conductive film layer on the light-emitting layer on the substrate substrate on which the light-emitting layer pattern is formed, for example, by Mo (molybdenum), A1 (aluminum) or molybdenum aluminum alloy having a reflective effect.
  • the technique of developing, photolithography etching, etc. forms a cathode 42 pattern as shown in FIG. 4, and the cathode 42 includes a conductive film layer having a reflective effect on the light-emitting layer, and the carbon nanotube or graphene on the conductive film layer is transparent.
  • the anode of the OLED provided by the above embodiment uses a double-layer conductive film layer, that is, the opaque conductive film layer is combined with the transparent conductive film layer, and the TFT substrate is effectively combined with the anode of the organic light-emitting element, thereby reducing the anode wiring and the TFT substrate.
  • the pattern occludes part of the light to increase the light-emitting area; and the anode electrode is designed with a double-layer metal, that is, the opaque metal is combined with the transparent conductive film, and the light reflected by the anode can be effectively utilized, so that the reflected light passes through the organic light-emitting layer.
  • the organic light-emitting material of the light-emitting layer is caused to realize photoluminescence, and the light-emitting efficiency and brightness of the organic light-emitting device are further improved.
  • the conductive film layer can protect the conductive film layer having a reflective effect. Since the OLED further improves the utilization of light, the injection efficiency of electrons from the cathode and holes from the anode in the OLED is improved, thereby improving the luminous efficiency and image display quality of the organic light-emitting display panel.
  • the process of fabricating the above OLED may further include: coating a peripheral protective layer covering the entire substrate on the cathode, for example, coating a layer of resin using a resin coating technique, and then performing a patterning process to form a peripheral protection of the corresponding region.
  • the layer prevents damage of the pixel electrode and/or the luminescent organic substance by impurities such as air moisture.
  • each film layer is formed mainly by sputtering or coating, and a patterning process, the process flow is simple, and the requirements for the fabrication equipment are low, and the device for preparing the amorphous silicon TFT can be used. Fabricating TFTs with higher carrier mobility can reduce the cost of manufacturing products.
  • the patterning process may include only a photolithography process, or may include a photolithography process and an etching step, and may also include other processes for forming a predetermined pattern, such as printing, inkjet, etc.; Refers to the process of forming a film, exposing, developing, etc., using a photoresist, a mask, an exposure machine, or the like.
  • the corresponding patterning process can be selected in accordance with the structure to be formed in the embodiments of the present disclosure.

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Abstract

一种薄膜晶体管、用于制作该薄膜晶体管的方法以及包括该薄膜晶体管的阵列基板和有机发光显示面板。该薄膜晶体管至少包括由具有半导体性质的碳纳米管材料或具有半导体性质的石墨烯制成的有源层（35）；还包括位于所述有源层（35）上下两侧与有源层相接触的第一导电层（36）和第二导电层（37）；所述第一导电层（36）和第二导电层（37）由具有电子倍增功能的二次电子发射层构成。该薄膜晶体管具有结构简单和制作工艺简单的优点。

Description

薄膜晶体管及其制作方法、 阵列基板及有机发光显示面板 技术领域
本公开的实施例涉及一种薄膜晶体管及其制作方法、 阵列基板及有机发 光显示面板。 背景技术
有机发光显示面板是指包括有机发光器件的面板， 例如 OLED ( Organic Light Emitting Diode,有机发光二极管）或其他有机电致发光元件 EL (Electro Luminescent, 电致发光元件)。 最常用的发光器件为 OLED。 有机发光显示面 板为釆用有机发光显示器件的面板， 该面板中每一像素结构中包括一有机发 光器件， 由于有机发光器件是一种自发光的显示器件， 因此， 这类面板中无 需背光源。 有机发光器件因具有薄、 轻、 自发光、 宽视角、 高清晰、 高亮度、 响应快速、 低能耗、 使用温度范围广、 抗震能力强等优点， 逐渐成为平板显 示领域的亮点， 并将占据重要的地位。
OLED发光器件为电流驱动型发光器件， 正常工作时需要的驱动电流较 大。驱动电路为 OLED提供的驱动电流越大越能保证 OLED的正常工作，还 能降低有机发光显示面板的功耗。 驱动 OLED发光的薄膜晶体管 TFT ( Thin Film Transistor, 薄膜晶体管）非常重要， 薄膜晶体管 TFT中有源层载流子迁 移率越高， 驱动 OLED发光的驱动电流就越大。
目前， 有机发光显示面板中薄膜晶体管 TFT主要包括非晶硅 TFT和低 温多晶硅 TFT。 低温多晶硅 TFT载流子的迁移率比非晶硅 TFT载流子迁移 率大至少两个数量级。 因此， 现有有机发光显示面板中的薄膜晶体管大多是 低温多晶硅 TFT。
现有制作低温多晶硅 TFT的条件比较苛刻， 一般需要先沉积非晶硅， 然 后进行除氢处理， 经过处理后进行激光退火， 然后曝光刻蚀， 这一过程至少 需要经过 3-4掩模工序，工序复杂且良率比较低。此外，制作低温多晶硅 TFT 的温度较高， 不适合在柔性基板上制作。 发明内容
本公开的实施例提供了一种薄膜晶体管， 其具有结构和制作工艺流程较 简单的优点。
根据本公开的至少一个实施例的薄膜晶体管至少包括有源层， 所述有源 还包括位于所述有源层上下两侧与有源层相接触的第一导电层和第二导电 层； 所述第一导电层和第二导电层由具有电子倍增功能的二次电子发射层构 成。
根据本公开的一个实施例， 所述具有电子倍增功能的二次电子发射层由 金属氧化物或金属有机化合物制成。
根据本公开的一个实施例， 所述第一导电层的厚度为 40-50nm， 所述第 二导电层的厚度为 40-50nm。
根据本公开的一个实施例， 所述具有半导体性质的碳纳米管为氧化碳纳 米管， 所述具有半导体性质的石墨烯为氢气石墨烯。
根据本公开的一个实施例， 还包括源极和漏极， 所述源极和漏极由具有 导体性质的碳纳米管或石墨烯材料构成； 所述第二导电层位于所述源极和漏 极与所述有源层之间且与所述源极和漏极对应设置。
本公开的至少一个实施例还提供了一种阵列基板， 包括衬底基板， 设置 于所述衬底基板上呈矩阵分布的多个像素单元， 所述每一像素单元包括上述 薄膜晶体管。
根据本公开的一个实施例， 所述阵列基板还包括位于每一像素单元的有 机发光器件， 所述有机发光器件至少包括叠层设置的阴极、 阳极和位于阴极 和阳极之间的发光层， 所述阳极与所述薄膜晶体管中的漏极相连；
其中， 所述阴极和阳极至少之一由碳纳米管或石墨烯导电材料构成。 根据本公开的一个实施例， 所述有机发光器件还包括与所述阳极叠层设 置的具有反光作用的导电膜层； 或
所述有机发光器件还包括与所述阴极叠层设置的具有反光作用的导电膜 层。
根据本公开的一个实施例， 所述衬底基板为柔性基板。
本公开的至少一个实施例还提供了一种有机发光显示面板， 包括上述阵 列基板。
本公开的至少一个实施例还提供了一种薄膜晶体管的制作方法， 包括以 下步骤： 电层和第二导电层的步骤； 料构成， 所述第一导电层和第二导电层由具有电子倍增功能的二次电子发射 层构成。
根据本公开的一个实施例， 所述具有电子倍增功能的二次电子发射层由 金属氧化物或金属有机化合物制成。
根据本公开的一个实施例， 所述薄膜晶体管还包括源极和漏极， 所述方 法还包括：
制作包括所述源极和漏极的步骤， 且所述源极和漏极由具有导体性质的 碳纳米管或石墨烯制成。
根据本公开的一个实施例， 所述制作包括有源层以及位于所述有源层上 下两侧与有源层相接触的第一导电层和第二导电层的步骤， 包括：
在衬底基板上沉积一层具有电子倍增功能的二次电子发射层， 用以形成 所述第一导电层图形；
在形成有所述具有电子倍增功能的二次电子发射层的衬底基板上沉积一 层经紫外光照射且氧气处理后的碳纳米管膜层， 或沉积一层氢气或氩气处理 过的石墨烯膜层， 用以形成所述有源层图形；
在形成有碳纳米管膜层， 或石墨烯膜层的衬底基板上再次形成一层具有 电子倍增功能的二次电子发射层， 用以形成所述第二导电层图形；
对所述衬底基板上的两层二次电子发射层， 以及二次电子发射层之间的 碳纳米管膜层或石墨烯膜层进行构图工艺， 形成所述第一导电层图形、 有源 层图形和第二导电层图形， 且所述第二导电层图形位于待形成的源极和漏极 与所述有源层之间且与待形成的源极和漏极对应设置。
根据本公开的一个实施例， 所述制作包括所述源极和漏极的步骤， 且所 述源极和漏极由具有导体性质的碳纳米管或石墨烯制成， 具体为：
在形成有所述第一导电层图形、 有源层图形和第二导电层图形的衬底基 板上沉积一层具有导体性质的碳纳米管或石墨烯膜层；
对所述具有导体性质的碳纳米管或石墨烯膜层进行构图工艺， 形成位于 第二导电层图形上的源极和漏极图形。
根据本公开的一个实施例， 所述第一导电层的厚度为 40-50nm， 所述第 二导电层的厚度为 40-50nm。
本公开的至少一个实施例提供了一种阵列基板的制作方法， 包括制作每 一像素单元的薄膜晶体管的步骤以及制作有机发光显示器件的步骤；
所述制作薄膜晶体管的步骤由上述制作薄膜晶体管的方法制作而成。 根据本公开的一个实施例， 所述制作有机发光显示器件的步骤包括： 在形成有所述薄膜晶体管的衬底基板上形成由具有导体性质的碳纳米管 或石墨烯构成的阳极图形， 且所述阳极与所述薄膜晶体管的漏极相连； 在形成有所述阳极图形的衬底基板上形成像素界定层图形；
在形成有所述像素界定层图形的衬底基板上形成发光层图形； 在形成有所述发光层图形的衬底基板上形成位于发光层上由具有导体性 质的碳纳米管或石墨烯构成的阴极图形。
根据本公开的一个实施例， 所述在形成有所述薄膜晶体管的衬底基板上 形成由具有导体性质的碳纳米管或石墨烯构成的阳极图形的步骤包括： 在形成有所述薄膜晶体管的衬底基板上依次形成包括具有反光作用的导 电膜层和位于该导电膜层上由具有导体性质的碳纳米管或石墨烯构成的导电 膜层；
通过构图工艺在形成有上述导电膜层的衬底基板上形成所述阳极图形。 根据本公开的一个实施例， 所述在形成有所述发光层图形的衬底基板上 形成位于发光层上由具有导体性质的碳纳米管或石墨烯构成的阴极图形的步 骤包括：
在形成有所述发光层图形的衬底基板上形成位于发光层上具有反光作用 的导电膜层和位于该导电膜层上的由具有导体性质的碳纳米管或石墨烯构成 的导电膜层；
通过构图工艺在形成有上述导电膜层的衬底基板上形成所述有机发光器 件的阴极图形。
根据本公开实施例的薄膜晶体管中， 有源层为具有半导体性质的碳纳米 管或具有半导体性质的石墨烯， 有源层、 第一导电层和第二导电层只需要使 用类似化学气相沉积法或涂覆法的工艺条件就能够制备， 并且所述第一导电 层和第二导电层是具有电子倍增功能的二次电子发射层， 当所述薄膜晶体管
TFT工作时， 电子通过有源层进入第一导电层和第二导电层， 由于第一导电 层和第二导电层具有电子倍增功能的二次电子发射的特性， 电子会呈旋转状 加速前进， 在这过程中会发生多次的碰撞， 使得电子产生倍增作用， 最后输 出的电子成几何倍的增长， 增大了电子的迁移率， 使载流子迁移率大到可以 与低温多晶硅载流子迁移率相比拟。 附图说明
为了更清楚地说明本公开实施例的技术方案， 下面将对实施例的附图作 简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例， 而非对本公开的限制。
图 1为根据本公开的第一实施例的薄膜晶体管的结构示意图；
图 2为根据本公开的第二实施例的阵列基板的结构示意图；
图 3为根据本公开的一个实施例的具有钝化层的薄膜晶体管的结构示意 图； 以及
图 4为根据本公开的一个实施例的形成有薄膜晶体管和有机发光器件的 有机发光显示面板的结构示意图。 具体实施方式
为使本公开实施例的目的、 技术方案和优点更加清楚， 下面将结合本公 开实施例的附图， 对本公开实施例的技术方案进行清楚、 完整地描述。显然， 所描述的实施例是本公开的一部分实施例， 而不是全部的实施例。 基于所描 述的本公开的实施例， 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例， 都属于本公开保护的范围。
本公开实施例提供了一种薄膜晶体管及其制作方法、 阵列基板及有机发 光显示面板， 用以提供一种结构和制作工艺流程较简单的薄膜晶体管、 阵列 基板及有机发光显示面板。
根据本公开实施例的薄膜晶体管只需要使用类似化学气相沉积法或涂覆 法的工艺条件就能够制备出低温多晶硅具备的载流子高迁移率特性的 TFT， 降低了制备高性能 TFT的工艺复杂度。
以下将结合附图说明根据本公开实施例的薄膜晶体管及其制作方法、 阵 列基板及显示装置。
实施例一： 薄膜晶体管。
以下以图 1为例对根据本公开的一个实施例的薄膜晶体管进行说明。 如 图 1所示， 该薄膜晶体管至少包括有源层 35， 还包括位于有源层 35上下两 侧与有源层 35相接触的第一导电层 36和第二导电层 37， 即， 有源层 35夹 设于第一导电层 36和第二导电层 37之间；其中，有源层 35由具有半导体性 质的碳纳米管或具有半导体性质的石墨烯制成；第一导电层 36和第二导电层 37由具有电子倍增功能的二次电子发射层构成。
该薄膜晶体管通常还包括栅极 31、 位于栅极 31上方的栅极绝缘层 32、 位于栅极绝缘层 32上方的有源层 35， 位于有源层 35上方的源极 33和漏极 34等。
在该实施例提供的薄膜晶体管中， 有源层由具有半导体性质的碳纳米管 或具有半导体性质的石墨烯制成， 有源层、 第一导电层和第二导电层只需要 使用现有技术成熟的类似化学气相沉积法或涂覆法的工艺条件就能够制备， 减少了沉积的次数， 减小了层与层之间制备工艺差异造成的损伤与匹配度的 差异， 制备工艺简单， 制作成本低廉， 良率较高。 而且， 第一导电层和第二 导电层由具有电子倍增功能的二次电子发射层构成， 当薄膜晶体管 TFT工作 时， 电子通过有源层进入第一导电层和第二导电层， 由于第一导电层和第二 导电层具有电子倍增功能的二次电子发射的特性，电子会呈旋转状加速前进， 在这过程中电子之间会发生多次的碰撞， 使得电子产生倍增作用， 最后输出 的电子呈几何倍的增长， 增大了电子的迁移率， 使得载流子迁移率可与与低 温多晶硅载流子迁移率相比拟。
在该实施例的一个实施方式中， 所述具有电子倍增功能的二次电子发射 层由金属氧化物或金属有机化合物制成。
例如， 该金属氧化物可以为 MgO (氧化镁）或 BeO (氧化铍）等。 所述 金属有机化合物又称有机金属化合物， 是指烷基（包括曱基、 乙基、 丙基、 丁基等）和芳香基（苯基等） 的烃基与金属原子结合形成的化合物， 以及碳 原子与金属原子直接结合形成的物质的总称， 例如， 锂、 钠、 镁、 钙、 辞、 镉、 汞、 铍、 铝、 锡、 铅等金属均能形成较稳定的有机金属化合物。 金属氧 化物和金属有机化合物均具有电子倍增功能，可作为二次电子发射层， 当然， 也可以釆用其他具有电子倍增功能的膜层作为二次电子发射层， 在此不做限 定。
电子倍增的倍数与二次电子发射层的薄膜厚度有关， 通过控制薄膜厚度 可调整对 TFT性能的改善程度，一般二次电子发射层的厚度不宜过厚也不宜 过薄， 根据本公开实施例的所述第一导电层和第二导电层的厚度分别在 40-50nm之间 （400-500A ) ， 可以使电子的倍增倍数达到 150以上。
由于碳纳米管和石墨烯的特殊结构， 它既可以作为导体使用， 也可以在 适当的工艺处理后成为半导体， 例如， 通过紫外光照射氧气处理碳纳米管可 使之成为半导体，通过 H2或 Ar处理可使石墨烯变成半导体。在本实施例中， 所述具有半导体性质的碳纳米管可为经过紫外照射且经过氧气处理后的具有 半导体性质的碳纳米管， 简称氧化碳纳米管， 该氧化碳纳米管作为一种纳米 材料， 具有重量轻和良好的力学、 电学和化学性能； 所述具有半导体性质的 石墨烯可为经过氢气处理过的具有半导体性质的石墨烯， 简称氢气石墨烯， 该种氢气石墨烯成分更加纯净， 可更好地发挥石墨烯的特性。 具体处理碳纳 米管和石墨烯的过程与发明人已知的技术类似， 这里不再赘述。
该薄膜晶体管的源极和漏极由具有导体性质的碳纳米管或石墨烯材料构 成， 并且， 所述第二导电层位于所述源极和漏极与所述有源层之间且与所述 源极和漏极对应设置。
例如， 以底栅型的 TFT为例， 如图 1所示， 该第二导电层 37位于所述 源极 33和漏极 34的下方，所述源极 33下方的第二导电层 37和所述漏极 34 下方第二导电层 37相对设置以形成具有设定宽度的狭缝，所述狭缝与所述源 极 33与漏极 34之间形成的狭缝相对应。 也就是说， 源极 33和漏极 34下方 分别设置有第二导电层 37， 第二导电层 37具有一狭缝， 避免源极 33和漏极 34通过第二导电层 37电性相连，此种设置方式可进一步的保证源极 33与漏 极 34保持绝缘。
需要说明的是， 图 1所示的 TFT为底栅型 TFT， 根据本公开实施例的薄 膜晶体管也可以为顶栅型 TFT、 侧栅型或双栅型等， 这里不做具体限制。 例如， 当为顶栅型 TFT时， 该种类型 TFT的具体结构是有源层下方为 源极和漏极， 有源层上方为栅绝缘层， 栅绝缘层上方为栅极， 此时， 第一导 电层和第二导电层仍然位于有源层上下两侧且与有源层相接触， 只是第一导 电层位于有源层上方， 第二导电层位于有源层下方， 且第二导电层位于源极 和漏极的上方。
在其他型式的 TFT中， 上述第一导电层和第二导电层与有源层、 源极和 漏极的设置方式与上述实施例相似， 此处不再赘述。
实施例二： 阵列基板。
根据本公开第二实施例的阵列基板与惯常技术类似， 包括衬底基板及设 置于所述衬底基板上呈矩阵分布的多个像素单元， 所述每一像素单元至少包 括一个薄膜晶体管， 该薄膜晶体管为根据上述实施例的薄膜晶体管。
下文将对有机发光显示面板中的薄膜晶体管及有机发光器件 OLED的构 造进行说明。
参见图 2， 根据本公开第二实施例的阵列基板还包括位于每一像素单元 中的有机发光器件 OLED， 所述有机发光器件至少包括叠层设置的阴极 41、 阳极 42 (也称像素电极 )和位于阴极 41和阳极 42之间的发光层 43， 阳极 42与薄膜晶体管中的漏极 34相连； 其中， 阴极 41和阳极 42至少之一由具 有导体性质的碳纳米管或石墨烯制成。
在根据本公开第二实施例的阵列基板中，有机发光器件 OLED的阴极和 阳极至少之一由具有导体性质的碳纳米管或石墨烯制成， 由于碳纳米管或者 石墨烯的原子呈现长程有序排列， 表现出良好的导电性能。
相比较发明人已知的金属或金属氧化物作为 OLED的阴极 41和阳极 42， 具有导体性质的碳纳米管或者石墨烯的导电性能更好， OLED的载流子传输 率更高， 有利于提高 OLED的发光性能。
在根据本公开第二实施例的 OLED中， 阴极、 发光层和阳极可以依次叠 层设置于衬底基板上， 阳极和阴极的位置可以互换， 无论何种设置方式， 需 要保证阳极与薄膜晶体管中的漏极相连。如图 2所示， OLED的阳极 42位于 衬底基板 1上，发光层 43位于阳极 42上， 阴极 41位于发光层 43上。 OLED 的构造方式可以根据实际需求确定， 这里不做具体限制。
进一步的， 由于具有导体性质的碳纳米管或石墨烯导电膜层为透明导电 膜层， 所述阳极还包括与所述阳极叠层设置的具有反光作用的导电膜层； 和 / 或所述阴极还包括与所述阴极叠层设置的具有反光作用的导电膜层。 该导电 膜层可以为由具有反光作用的 Mo (钼） 、 A1 (铝）或钼铝合金形成的膜层 等。
OLED的阳极包括位于所述基板上的具有反光作用的导电膜层， 以及位 于所述具有反光作用的导电膜层上作为阳极的具有导体性质的碳纳米管或石 墨烯导电膜层。
根据本公开实施例的 OLED的阳极釆用双层导电膜层， 即不透明导电膜 层与透明导电膜层相结合，将 TFT衬底基板上的图形与有机发光元件的阳极 有效结合， 可以减少阳极布线和 TFT衬底基板上的图形对光的遮挡， 增大了 发光面积； 而且阳极电极设计为双层， 即不透明金属与透明导电薄膜相结合， 可以有效利用阳极反射的光， 使得反射光通过有机发光层， 致使发光层的有 机发光材料实现光致发光， 进一步提高了有机发光器件的发光效率和亮度。 透明的导电膜层会对反光作用的导电膜层起到保护作用。 由于 OLED进一步 提高了光的利用率，使得 OLED中来自阴极的电子和来自阳极的空穴的注入 效率提高， 进而改善了有机发光显示面板的发光效率和图像显示品质。
根据上述实施例的阵列基板中的衬底基板可以为玻璃基板， 也可以为柔 性基板。 如果所述衬底基板为柔性基板， 该柔性基板可由聚乙烯醇薄膜、 聚 酰亚胺薄膜、 聚酯薄膜等高分子材料制成。
现有低温多晶硅是在高温条件下制作的， 不适合在不耐热或熔点较低的 柔性基板上制作， 因此也就限制了制作高性能低成本的柔性显示装置或电子 纸等显示装置。 而本公开提供的上述薄膜晶体管 TFT， 无需在高温条件下进 行（例如超过 200 °C的温度） ， 釆用化学气相沉积法或涂覆法就可以沉积具 此， 可简化制作柔性基板的制作工艺， 降低制作成本。
需要说明的是， 如图 2所示， 与惯常阵列基板结构类似， 在制作 OLED 的各膜层之前， 还包括在 TFT上制作钝化层 38， 钝化层 38位于阳极 42与 同层设置的源极 33和漏极 34之间。 阵列基板还包括位于阳极 42和发光层 43之间的像素界定层 44 (即像素间隔膜） 。
实施例三： 有机发光显示面板。 本公开的实施例还提供了一种包括上述阵列基板的有机发光显示面板。 所述有机发光显示面板可以为任何具有显示功能的产品或部件，例如电子纸、
OLED面板、 数码相框、 手机、 平板电脑等。
在根据本公开的一个实施例的有机发光显示面板中， 薄膜晶体管中的有 源层由具有半导体性质的碳纳米管或具有半导体性质的石墨烯制成， 使得半 导体载流子迁移率相对较高， 使得有机发光显示器件的稳定性更高。 同时， 在有源层的上下两侧分别制作第一导电层和第二导电层， 所述第一导电层和 第二导电层由具有电子倍增功能的二次电子发射层构成，使得 TFT有源层内 的电子产生倍增作用， 最后输出的电子呈几何倍的增长， 增大了电子的迁移 率， 使得 TFT载流子迁移率大到可以与低温多晶硅载流子迁移率相比拟。
实施例四： 薄膜晶体管的制作方法。
根据本公开的第四实施例， 提供了一种制作薄膜晶体管的方法， 该方法 包括以下步骤： 导电层和第二导电层的步骤； 所述有源层由具有半导体性质的碳纳米管或具 有半导体性质的石墨烯制成， 所述第一导电层和第二导电层分别由具有电子 倍增功能的二次电子发射层构成。
薄膜晶体管还包括栅极、 源极、 漏极和栅极绝缘层等其他结构， 制作包 括上述结构的薄膜晶体管的步骤可釆用已有方法制作， 此处不再赘述。 上述 栅极、 源极、 漏极和栅极绝缘层的材料可以为本领域技术人员已知的制作栅 极、 源极、 漏极和栅极绝缘层的金属或合金， 或者由碳纳米管或石墨烯导电 材料构成。
例如， 所述具有电子倍增功能的二次电子发射层由金属氧化物或金属有 机化合物材料构成。 一导电层和第二导电层的步骤可以包括：
步骤 Sl l、在衬底基板上沉积一层具有电子倍增功能的二次电子发射层， 用以形成所述第一导电层图形；
步骤 S12、 釆用化学气相沉积法或涂覆法在形成有所述具有电子倍增功 能的二次电子发射层的基板上沉积一层具有半导体性质的碳纳米管膜层或具 有半导体性质的石墨烯膜层， 用以形成所述有源层图形， 其中， 具有半导体 性质的碳纳米管膜层可以是经紫外光照射且氧气处理后的碳纳米管膜层， 具 有半导体性质的石墨烯膜层可以是氢气或氩气处理过的石墨烯膜层；
步骤 S13、 在形成具有半导体性质的碳纳米管膜层， 或具有半导体性质 的石墨烯膜层的基板上再次形成一层具有电子倍增功能的二次电子发射层， 用以形成所述第二导电层图形；
步骤 S14、 对所述衬底基板上的两层二次电子发射层， 以及二次电子发 射层之间的具有半导体性质的碳纳米管膜层或具有半导体性质的石墨烯膜层 进行构图工艺， 形成所述第一导电层图形、 有源层图形和第二导电层图形， 且所述第二导电层图形位于待形成的源极和漏极与所述有源层之间且与待形 成的源极和漏极对应设置。
在本实施例中，参照图 2所示，第二导电层为具有设定宽度狭缝的图形， 也就是说， 在碳纳米管或石墨烯材料形成的膜层（即有源层 35 )上形成开口 以形成设定宽度的狭缝（即第二导电层），所述开口沿纵向延伸至有源层 35， 该狭缝与待形成的源极和漏极之间的狭缝相对应， 即源极 33和漏极 34之间 设置有与惯常技术类似的设定宽度的狭缝。
在本实施例中， 可由溅射技术沉积一层 MgO (或 BeO或金属有机化合 物）（该层将用于制作第一导电层)， 接着通过化学气相沉积法或涂覆法制作 一层经紫外光照射且氧气处理过的碳纳米管或用氢气（或氩气）处理过的石 墨烯（该层将用于制作有源层） ， 处理过的碳纳米管或石墨烯具备半导体的 性能；接着由溅射技术再次沉积一层 MgO (或 BeO或金属有机化合物） （该 层将用于制作第二导电层） 。
当该薄膜晶体管包括源极和漏极， 并且所述源极和漏极由具有导体性质 的碳纳米管或石墨烯构成时， 上述制作薄膜晶体管的步骤还可以包括制作所 述源极和漏极的步骤， 包括：
步骤 S15、 在形成有所述第一导电层图形、 有源层图形和第二导电层图 形的衬底基板上沉积一层具有导体性质的碳纳米管或石墨烯膜层；
步骤 S16、对所述具有导体性质的碳纳米管或石墨烯膜层进行构图工艺， 形成位于第二导电层图形上的源极和漏极图形。
本实施例中， 由于本公开有源层不同于现有非晶硅或多晶硅有源层， 有 源层由具有半导体性质的碳纳米管或石墨烯制成， 源极和漏极由具有导体性 质碳纳米管或石墨烯材料形成， 形成有源层、 源极和漏极材料的刻蚀条件与 第一导电层和第二导电层类似， 可以通过一次掩膜、 曝光、 显影光刻刻蚀等 工艺完成， 在大大节约了产品的制作工艺流程的同时， 还最大限度提高了产 品的良品率， 避免了经过多次掩膜、 曝光、 显影光刻刻蚀等工序带来的对准 偏差或不同刻蚀条件带来的膜层之间的相互影响， 导致产品良品率下降的问 题。
惯常薄膜晶体管还可以包括栅极和栅极绝缘层等， 上述制作方法中还可 以包括制作栅极和栅极绝缘层等的步骤， 当该薄膜晶体管为底栅型时， 底栅 型的薄膜晶体管的结构包括位于栅极上方的栅极绝缘层、 位于栅极绝缘层上 方的有源层、 以及位于有源层上方的源极和漏极， 并且， 还包括位于有源层 下方的第一导电层， 位于有源层上方以及源极和漏极的下方的第二导电层。
因此， 制作所述薄膜晶体管的过程中， 在上述的步骤 S11之前还可以包 括以下步骤：
步骤 11-1、 通过构图工艺在衬底基板上形成包括栅极的图形；
在玻璃基板或柔性基板（以下称为衬底基板）上釆用常规溅射技术沉积 一层金属膜层， 例如 Mo (钼）金属膜层， 然后通过构图工艺在图 2所示的 衬底基板 1上形成至少包括栅极 31的图形， 同时也可以形成栅线图形。
步骤 11-2、 通过构图工艺在形成有所述栅线的衬底基板上形成栅极绝缘 层；
例如， 釆用涂覆技术在图 2所示的栅极 31上形成覆盖整个衬底基板 1 的栅极绝缘层 32。
然后，可以在步骤 11-2后在衬底基板上沉积一层具有电子倍增功能的二 次电子发射层， 用以形成所述第一导电层图形， 然后， 依次执行上述步骤 S12-S16。
当该薄膜晶体管为顶栅型时， 顶栅型的薄膜晶体管包括位于有源层下方 的源极和漏极、 位于有源层上方的栅绝缘层， 位于栅绝缘层上方的栅极、 以 及位于有源层上方的第一导电层， 位于有源层下方并位于源极和漏极上方的 第二导电层。
因此， 所述顶栅型的薄膜晶体管的示例制作方法可以为： 步骤 21、 在衬底基板上沉积一层具有导体性质的碳纳米管或石墨烯膜 层；
步骤 22、 对所述具有导体性质的碳纳米管或石墨烯膜层进行构图工艺， 形成源极和漏极图形；
步骤 23、在形成所述源极和漏极的衬底基板上沉积一层具有电子倍增功 能的二次电子发射层， 用以形成所述第二导电层图形；
该步骤 23与上述示例中的步骤 S11稍有不同， 不同之处在于， 本实施 例中是先沉积用于制作第二导电图形的薄膜层。
步骤 24、釆用化学气相沉积法或涂覆法在形成有所述具有电子倍增功能 的二次电子发射层的基板上沉积一层具有半导体性质的碳纳米管膜层或具有 半导体性质的石墨烯膜层，用以形成所述有源层图形，该步骤与上述步骤 S12 相同；
步骤 25、 在步骤 24后的衬底基板上再次形成一层具有电子倍增功能的 二次电子发射层， 用以形成所述第一导电层图形；
步骤 26、 对所述基板上的两层二次电子发射层， 以及二次电子发射层之 间具有半导体性质的碳纳米管膜层或具有半导体性质的石墨烯膜层进行构图 工艺， 形成所述第一导电层图形、 有源层图形和第二导电层图形， 且所述第 二导电层图形位于源极和漏极与所述有源层之间， 并设置得对应于所述的源 极和漏极。
该步骤与上述示例中的步骤 S14稍有不同， 不同之处在于该第二导电层 位于源极和漏极上方， 而当薄膜晶体管为底栅型时， 第二导电层位于源极和 漏极下方。
步骤 27、 在步骤 26后的衬底基板上通过构图工艺在形成有所述栅线的 基板上形成栅极绝缘层；
例如， 釆用涂覆技术上在形成第一导电层图形、 有源层图形和第二导电 层图形的基板上形成覆盖整个基板的栅极绝缘层。
步骤 28、 在步骤 27后的衬底基板上通过构图工艺在基板上形成包括栅 极的图形；
例如， 栅极绝缘层上方按照常规溅射技术沉积一层金属膜层， 例如 Mo (钼）金属膜层， 然后通过构图工艺在基板上形成至少包括栅极的图形， 也 可以同时形成栅线图形。
需要说明的是， 上述示例中的所述第一导电层图形、 有源层图形、 第二 导电层图形、 源极图形和漏极图形可以在同一次构图工艺形成， 也可以在多 次构图工艺中形成。
例如， 所述第一导电层图形、 有源层图形， 和第二导电层图形由同一次 构图工艺形成， 所述源极和漏极图形单独形成。 或者， 所述第一导电层图形、 有源层图形、 第二导电层图形以及源极和漏极图形由同一次构图工艺形成。
该薄膜晶体管的制作过程与惯常技术中的制作工艺相似，此处不再赘述。 如果第一导电层、 有源层、 第二导电层在同一次构图工艺中完成， 或者第一 导电层、 有源层、 第二导电层、 源极和漏极在同一次构图工艺中完成， 产品 良品率较高且节约工艺流程。
上述示例中， 所述第一导电层的厚度为 40-50nm， 所述第二导电层的厚 度为 40-50
需要说明的是， 参照图 2所示， 上述制作薄膜晶体管的方法中还可以包 括釆用惯常方法中制作钝化层 38和在钝化层 38上制作过孔 47 (过孔 47所 在区域如图 2中闭合的虚线所示） 的步骤。 例如， 通过构图工艺在形成有源 极 33和漏极 34图形的衬底基板 1上形成钝化层 38， 以及形成在钝化层 38 上与漏极 34图形对应区域的过孔 47。
例如， 在源极和漏极上使用树脂涂覆技术涂覆树脂， 通过曝光、 显影、 光刻刻蚀等技术形成如图 2所示的钝化层 38，在该钝化层 38与漏极 34对应 的区域处形成设定大小的开口， 参见图 3， 该开口即为过孔 47
实施例五： 阵列基板的制作过程。
下文将对制作包括像素单元中的薄膜晶体管的过程以及制作 OLED的过 程进行描述。
薄膜晶体管的制作过程为上述实施例提供的制作薄膜晶体管的任一过 程， 以下将说明 OLED的制作过程。
可在上述实施例提供的方法制作的薄膜晶体管的基础上形成 OLED， 所 述 OLED至少包括阳极、 像素界定层、 发光层和阴极。
为产生如图 4所示的阵列基板， OLED的制作过程可以包括以下步骤： 步骤 S31、 在形成有所述薄膜晶体管的衬底基板上形成由具有导体性质 的碳纳米管或石墨烯形成的阳极图形， 且所述阳极与所述薄膜晶体管的漏极 相连。
例如， 釆用溅射技术沉积一层 ITO或者釆用涂覆技术沉积一层具有导体 性质的碳纳米管透明导电薄膜（或者石墨烯薄膜） ， 通过曝光、 显影、 光刻 刻蚀等技术形如图 4所示的阳极图形 42。
步骤 S32、 在形成有所述阳极图形的基板上形成像素界定层图形。
例如，如图 4所示，在形成有阳极 42的基板 1上釆用涂覆技术涂覆一层 树脂， 使用曝光、 显影， 光刻刻蚀等技术形成像素界定层 44。 像素界定层 44 是包围像素区域的膜层， 用于防止相邻像素区域不同颜色的发光层混色。
步骤 S33、在形成有所述像素界定层图形的衬底基板上形成发光层图形。 例如，如图 4所示，使用涂覆技术或蒸镀技术制作发光层（如喹啉酮类）， 然后通过构图工艺形成发光层 43 图形。 还可以制作空穴传输层和电子传输 层， 或者进一步还可以制作电子阻挡层和空穴阻挡层。 例如， 使用涂覆技术 或蒸镀技术以及构图工艺在像素界定层 44上方制作空穴传输层 45、 电子阻 挡层（图 4中未示出） 、 发光层 43、 空穴阻挡层（图 4中未示出）和电子传 输层 46。
步骤 S34、 在形成有所述发光层图形的衬底基板上形成位于发光层上由 具有导体性质的碳纳米管或石墨烯材料制成的阴极图形。 一层具有导体性质的碳纳米管透明导电薄膜（或石墨烯薄膜） ， 通过构图工 艺形成图 4所示的阴极 41的图形， 阴极经由过孔（图中未标示）与阴极接地 电源相连（图中未标示） ， 并与阳极形成电场， 驱动发光层发光。
在根据上述实施例的阵列基板中， OLED中阴极和阳极至少之一由具有 导体性质的碳纳米管或石墨烯材料制成。 由于碳纳米管或者石墨烯的原子呈 现长程有序排列， 具有良好的导电性能， 相比较惯常的金属或金属氧化物作 为 OLED的阴极 41和阳极 42，碳纳米管或者石墨烯的导电性能更好， OLED 的载流子传输率更高， 有利于提高 OLED的发光性能。
为了提高 OLED的光的利用效率， 可以在阳极处设置具有反光作用的导 电膜层。 例如， 上述步骤 S31形成阳极图形的过程包括：
在形成有所述薄膜晶体管的衬底基板上依次形成包括具有反光作用的导 电膜层和位于该导电膜层上由具有导体性质的碳纳米管或石墨烯制成的导电 膜层；
通过构图工艺在形成有上述导电膜层的衬底基板上形成所述阳极图形。 例如， 如图 4所示， 釆用溅射技术在源极 33和漏极 34上溅射一层导电 膜层， 例如， 由具有反光作用的 Mo (钼） 、 A1 (铝）或钼铝合金形成的膜 层， 然后通过溅射技术沉积一层 ITO或者釆用涂覆技术沉积一层碳纳米管透 明导电薄膜（或者石墨烯薄膜） ， 通过曝光、 显影、 光刻刻蚀等技术形成如 图 4所示的阳极 42图形，阳极 42包括位于漏极 34上的具有反光作用的导电 膜层、 以及位于导电膜层上的具有导体性质的碳纳米管或石墨烯透明导电薄 膜。
或者， 可以将具有反光作用的导电膜层设置在阴极处。 例如， 上述步骤
S34形成阴极的过程可以包括：
在形成有所述发光层图形的衬底基板上形成位于发光层上具有反光作用 的导电膜层和位于该导电膜层上的由具有导体性质的碳纳米管或石墨烯制成 的导电膜层； 以及
通过构图工艺在形成有上述导电膜层的衬底基板上形成所述有机发光器 件的阴极图形。
例如， 釆用溅射技术在形成有发光层图形的衬底基板上位于发光层上溅 射一层导电膜层， 例如由具有反光作用的 Mo (钼） 、 A1 (铝）或钼铝合金 形成的膜层等， 然后通过溅射技术沉积一层 ITO ( Indium Tin Oxides, 铟锡 氧化物）膜层或者釆用涂覆技术沉积一层碳纳米管透明导电薄膜（或者石墨 烯薄膜），通过曝光、显影、光刻刻蚀等技术形成如图 4所示的阴极 42图形， 阴极 42包括位于发光层上的具有反光作用的导电膜层，以及位于导电膜层上 的碳纳米管或石墨烯透明导电薄膜。
上述实施例提供的 OLED的阳极釆用双层导电膜层， 即不透明导电膜层 与透明导电膜层相结合， 将 TFT衬底与有机发光元件的阳极有效结合， 可以 减少阳极布线和 TFT衬底图案对一部分光的遮挡， 提高了发光面积； 而且阳 极电极釆用的是双层金属的设计， 即不透明金属与透明导电薄膜相结合， 可 以有效利用阳极反射的光， 使得反射光通过有机发光层， 致使发光层的有机 发光材料实现光致发光， 进一步提高了有机发光器件的发光效率和亮度。 透 明的导电膜层可以保护具有反光作用的导电膜层。 由于 OLED进一步提高了 光的利用率，使得 OLED中来自阴极的电子和来自阳极的空穴的注入效率提 高， 进而改善了有机发光显示面板的发光效率和图像显示品质。
需要说明的是， 制作上述 OLED的过程还可以包括： 在形成所述阴极上 覆盖整个基板的外围保护层， 例如使用树脂涂覆技术涂覆一层树脂， 然后进 行构图工艺形成对应区域的外围保护层，防止空气水分等杂质对像素电极和 / 或发光有机物的破坏。
根据本公开实施例的薄膜晶体管制作方法， 主要通过溅射或涂覆、 以及 构图工艺形成各膜层， 工艺流程简单， 对制作设备的要求较低， 釆用制备非 晶硅 TFT的设备就可以制作具有较高载流子迁移率的 TFT，可以降低产品的 制作成本。
在本公开的实施例中， 构图工艺可只包括光刻工艺， 或， 包括光刻工艺 以及刻蚀步骤， 同时还可以包括打印、喷墨等其他用于形成预定图形的工艺； 光刻工艺， 指的是利用光刻胶、 掩模板、 曝光机等用于形成图形的成膜、 曝 光、 显影等工艺过程。 可根据本公开实施例中所要形成的结构选择相应的构 图工艺。
以上所述仅是本公开的示范性实施方式， 而非用于限制本公开的保护范 围， 本公开的保护范围由所附的权利要求确定。
本申请要求于 2014年 1月 10日递交的中国专利申请第 201410012665.4 号的优先权， 在此全文引用上述中国专利申请公开的内容以作为本申请的一 部分。

Claims

权利要求书
有半导体性质的石墨烯制成的有源层； 还包括具有电子倍增功能的二次电子 发射层构成的第一导电层和第二导电层， 所述第一导电层和第二导电层分别 位于所述有源层上下两侧并与有源层相接触。
2、根据权利要求 1所述的薄膜晶体管， 其中， 所述具有电子倍增功能的 二次电子发射层由金属氧化物或金属有机化合物制成。
3、根据权利要求 1或 2所述的薄膜晶体管， 其中， 所述第一导电层的厚 度为 40-50匪， 所述第二导电层的厚度为 40-50nm。
4、根据权利要求 1至 3中任何一项所述的薄膜晶体管， 其中， 所述具有 半导体性质的碳纳米管为氧化碳纳米管， 所述具有半导体性质的石墨烯为氢 气石墨烯。
5、根据权利要求 1-4中任何一项所述的薄膜晶体管， 其还包括由具有导 体性质的碳纳米管或石墨烯制成的源极和漏极； 所述第二导电层位于所述源 极和漏极与所述有源层之间且与所述源极和漏极对应设置。
6、一种阵列基板，其包括衬底基板及设置于所述衬底基板上呈矩阵分布 的多个像素单元， 其中， 所述每一像素单元包括权利要求 1-5中任意一项所 述的薄膜晶体管。
7、根据权利要求 6所述的阵列基板，其还包括位于每一像素单元中的有 机发光器件， 所述有机发光器件至少包括叠层设置的阴极、 阳极和位于阴极 和阳极之间的发光层， 所述阳极与所述薄膜晶体管中的漏极相连；
其中， 所述阴极和阳极至少之一包括具有导体性质的碳纳米管膜层或石 墨烯膜层。
8、根据权利要求 7所述的阵列基板， 其中， 所述有机发光器件还包括与 所述阳极或所述阴极叠层设置的具有反光作用的导电膜层。
9、 根据权利要求 6-8中任何一项所述的阵列基板， 其中， 所述衬底基板 为柔性基板。
10、 一种有机发光显示面板， 其包括权利要求 6-9中任何一项所述的阵 列基板。
11、 一种薄膜晶体管的制作方法， 其包括以下步骤： 一导电层和第二导电层的步骤； 成， 所述第一导电层和第二导电层均由具有电子倍增功能的二次电子发射层 构成。
12、根据权利要求 11所述的方法， 其中， 所述具有电子倍增功能的二次 电子发射层由金属氧化物或金属有机化合物制成。
13、 根据权利要求 11或 12所述的方法， 其中， 所述薄膜晶体管还包括 源极和漏极， 所述方法还包括：
制作包括所述源极和漏极的步骤， 所述源极和漏极由具有导体性质的碳 纳米管或石墨烯制成。
14、根据权利要求 13所述的方法， 其中， 所述制作包括有源层以及位于 所述有源层上下两侧并与有源层相接触的第一导电层和第二导电层的步骤包 括：
在衬底基板上沉积一层具有电子倍增功能的二次电子发射层， 用以形成 所述第一导电层图形；
釆用化学气相沉积法或涂覆法在形成有所述具有电子倍增功能的二次电 子发射层的基板上沉积一层具有半导体性质的碳纳米管膜层， 或釆用化学气 相沉积法或涂覆法沉积一层具有半导体性质的石墨烯膜层， 用以形成所述有 源层图形；
在形成有具有半导体性质的碳纳米管膜层或具有半导体性质的石墨烯膜 层的衬底基板上再次形成一层具有电子倍增功能的二次电子发射层， 用以形 成所述第二导电层图形；
对所述衬底基板上的两层二次电子发射层， 以及二次电子发射层之间的 碳纳米管膜层或石墨烯膜层进行构图工艺， 形成所述第一导电层图形、 有源 层图形和第二导电层图形， 且所述第二导电层图形位于待形成的源极和漏极 与所述有源层之间且与待形成的源极和漏极对应设置。
15、根据权利要求 14所述的方法， 其中， 所述制作包括所述源极和漏极 的步骤包括： 在形成有所述第一导电层图形、 有源层图形和第二导电层图形的衬底基 板上沉积一层具有导体性质的碳纳米管或石墨烯膜层；
对所述具有导体性质的碳纳米管或石墨烯膜层进行构图工艺， 形成位于 第二导电层图形上的源极和漏极图形。
16、 根据权利要求 11至 15中任何一项所述的方法， 其中， 所述第一导 电层的厚度为 40-50nm， 所述第二导电层的厚度为 40-50
17、 一种阵列基板的制作方法， 其包括制作每一像素单元的薄膜晶体管 的步骤以及制作有机发光显示器件的步骤；
所述制作薄膜晶体管的步骤通过执行权利要求 11-16任一权项所述的方 法而实现。
18、根据权利要求 17所述的方法， 其中， 所述制作有机发光显示器件的 步骤包括：
在形成有所述薄膜晶体管的衬底基板上形成阳极图形， 且所述阳极与所 述薄膜晶体管的漏极相连；
在形成有所述阳极图形的衬底基板上形成像素界定层图形；
在形成有所述像素界定层图形的衬底基板上形成发光层图形； 在形成有所述发光层图形的衬底基板上形成位于发光层上的阴极图形； 其中， 所述阳极和 /或所述阴极由具有导体性质的碳纳米管或石墨烯制 成。
19、根据权利要求 18所述的方法， 其中， 所述在形成有所述薄膜晶体管 的衬底基板上形成阳极图形包括：
在形成有所述薄膜晶体管的衬底基板上依次形成具有反光作用的导电膜 层和位于该导电膜层上由具有导体性质的碳纳米管或石墨烯材料构成的导电 膜层；
通过构图工艺在形成有上述导电膜层的衬底基板上形成所述阳极图形。
20、根据权利要求 18所述的方法， 其中， 所述在形成有所述发光层图形 的基板上形成位于发光层上的阴极图形包括：
在形成有所述发光层图形的衬底基板上形成位于发光层上具有反光作用 的导电膜层和位于该导电膜层上由具有导体性质的碳纳米管或石墨烯制成的 导电膜层； 通过构图工艺在形成有上述导电膜层的衬底基板上形成所述有机发光 件的阴极图形。
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