WO2014208006A1 - Dispositif électronique et procédé de fabrication dudit dispositif électronique - Google Patents

Dispositif électronique et procédé de fabrication dudit dispositif électronique Download PDF

Info

Publication number
WO2014208006A1
WO2014208006A1 PCT/JP2014/002917 JP2014002917W WO2014208006A1 WO 2014208006 A1 WO2014208006 A1 WO 2014208006A1 JP 2014002917 W JP2014002917 W JP 2014002917W WO 2014208006 A1 WO2014208006 A1 WO 2014208006A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
mold resin
mold
electronic device
resin
Prior art date
Application number
PCT/JP2014/002917
Other languages
English (en)
Japanese (ja)
Inventor
祐紀 眞田
篤志 柏崎
Original Assignee
株式会社デンソー
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社デンソー filed Critical 株式会社デンソー
Publication of WO2014208006A1 publication Critical patent/WO2014208006A1/fr

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Definitions

  • the present disclosure relates to an electronic device in which an electronic component is mounted on one surface side of a substrate and the one surface side is sealed with a mold resin, and a manufacturing method thereof.
  • a surface pattern that is electrically connected to a land and an external circuit is formed on one surface of a substrate, and a solder resist that covers the surface pattern is formed.
  • the solder resist has an opening for exposing a portion of the surface pattern connected to an external circuit.
  • the electronic component is mounted on a land formed on one surface of the substrate via solder or the like.
  • One surface side of the substrate including the electronic component is sealed with a mold resin so that at least a portion of the surface pattern connected to the external circuit is exposed.
  • Such an electronic device is manufactured as follows. Specifically, first, a land and a surface pattern are formed on one surface of the substrate. And after forming the solder resist which covers a surface pattern, the opening part which exposes a part of surface pattern to a solder resist is formed. Next, an electronic component is mounted on the land via solder or the like. Subsequently, a mold having a recess formed on one surface is prepared, and one surface of the mold is pressed against one surface of the substrate so that the electronic component is disposed in the recess. Thereafter, a space between the substrate and the concave portion of the mold is filled with mold resin, whereby a single-sided mounting (half mold) electronic device in which one surface side of the substrate including the electronic component is sealed is manufactured.
  • a thick mold resin is formed when the side wall surface (end surface) of the mold resin is a surface perpendicular to the substrate on the side where the substrate protrudes beyond the resin.
  • the region suddenly changes to a region where no mold resin is formed. For this reason, peeling between mold resin and a substrate arises based on the stress resulting from the thermal expansion coefficient difference of mold resin and a substrate.
  • the mold resin has a trapezoidal cross section, and the mold resin extends from the upper surface of the mold resin, that is, from the surface opposite to the substrate to the surface that is in close contact with the substrate.
  • the side wall surface of the substrate may be tapered with respect to the substrate.
  • Patent Document 1 when the side wall surface of the mold resin is tapered from the upper surface of the mold resin to the surface that is in close contact with the substrate, the area of the tapered region increases. Since this tapered region is a dead space in which electronic components cannot be placed, an increase in the area of this region leads to an increase in the size of the electronic device.
  • the internal observation is performed by emitting ultrasonic waves perpendicular to the surface of the mold resin, but the ultrasonic waves are not reflected vertically in the tapered portion, Internal observation is not possible. For this reason, if the tapered region is wide, the region where the internal observation cannot be performed increases, and the internal observation of the mold resin cannot be performed satisfactorily.
  • This disclosure is intended to provide a semiconductor device.
  • an electronic device in a first aspect of the present disclosure, includes a substrate having a first surface and a second surface opposite to the first surface, an electronic component mounted on the first surface side of the substrate, and the substrate And a mold resin that seals the electronic component. At least a part of the substrate is disposed to the outside of the mold resin.
  • the mold resin has a tapered portion.
  • the mold resin has a lower surface facing the first surface of the substrate, an upper surface opposite to the lower surface, and a side surface sandwiched between the lower surface and the upper surface.
  • the tapered portion is disposed on the side surface of the mold resin and protrudes outward from the position on the lower surface side with respect to the upper surface.
  • the taper portion is inclined with respect to the first surface in a portion of the substrate disposed outside the mold resin. The taper portion gradually decreases in height from the first surface as it goes outward of the mold resin.
  • the end portion of the mold resin is provided with a portion where the thickness of the mold resin is reduced, and the taper portion is formed by gradually decreasing the thickness toward the outside of the mold resin. .
  • the stress caused by the difference in thermal expansion coefficient between the mold resin and the substrate is applied. Can be relaxed. Thereby, it becomes possible to suppress peeling between the mold resin and the substrate.
  • the tapered portion is not formed from the upper surface of the mold resin to one surface of the substrate, there are few regions that become the tapered portion. For this reason, internal observation by an ultrasonic flaw detector can be performed in almost all regions of the mold resin. Therefore, it becomes possible to better observe the inside of the mold resin.
  • An electronic device manufacturing method comprising a mold resin that is provided on a surface side and seals the electronic component includes preparing the substrate, mounting the electronic component on a first surface of the substrate, and mounting the electronic component The first mold is brought into contact with the second surface side of the substrate, a second mold having a cavity is disposed on the first surface side of the substrate, and a resin material is filled in the cavity.
  • the mold resin is formed by molding by sliding a plunger in the cavity and the opening of the first mold and applying heat and pressure.
  • die is made into the taper shape which the said cavity spreads gradually toward the 1st surface side of the said board
  • the mold resin has a lower surface facing the first surface of the substrate, an upper surface opposite to the lower surface, and a side surface sandwiched between the lower surface and the upper surface.
  • a tapered portion is formed that is disposed on a side surface of the mold resin and protrudes outward from a position on the lower surface side of the upper surface.
  • the taper portion is inclined with respect to the first surface in a portion of the substrate disposed outside the mold resin. The taper portion gradually decreases in height from the first surface as it goes outward of the mold resin.
  • the electronic device according to the first aspect can be manufactured, the peeling between the mold resin and the substrate can be suppressed, and the internal observation by the ultrasonic flaw detector can be performed. It is possible to manufacture an electronic device that can be satisfactorily performed in almost all areas.
  • FIG. 1 is a cross-sectional view of an electronic device according to a first embodiment of the present disclosure
  • 2 is a cross-sectional view taken along the line II-II in FIG.
  • FIG. 3 is an enlarged view of a region R in FIG.
  • FIG. 4 is a schematic cross-sectional view when the mold resin 40 in the electronic device shown in FIG. 1 is manufactured by compression molding.
  • FIG. 5 is an enlarged cross-sectional view of a portion corresponding to the region R in FIG. 1 for an electronic device according to a second embodiment of the present disclosure.
  • FIG. 6 is an enlarged cross-sectional view of a portion corresponding to the region R in FIG. 1 for an electronic device according to a third embodiment of the present disclosure.
  • the electronic device S1 is mounted on a vehicle such as an automobile, and is applied as a device for driving each device for the vehicle.
  • the electronic device S1 includes a substrate 10, electronic components 20, 30, a mold resin 40, a heat sink 50, a case 60, a lid 70, a heat radiating gel 80, and the like.
  • the substrate 10 is a plate-like member having one surface 11 on which the electronic components 20 and 30 are mounted and covered with the mold resin 40 and the other surface 12 which is the opposite surface. is there.
  • the substrate 10 is a plate-like member having a rectangular top surface as shown in FIG.
  • the substrate 10 is a wiring substrate based on a resin such as an epoxy resin, and is configured by, for example, a through substrate or a build-up substrate.
  • a wiring pattern (not shown) constituted by an inner layer wiring or a surface layer wiring is formed on the substrate 10, and the wiring pattern is extended to the outside of the mold resin 40, so that the electronic components 20, 30 and The electrical connection can be achieved.
  • through holes 13 provided with metal plating or the like connected to the wiring pattern are provided. Through this through hole 13, the wiring pattern can be electrically connected to the outside of the substrate.
  • the substrate 10 thus configured is supported by the case 60 at the four corners.
  • fixing holes 14 serving as through holes are formed at the four corners of the substrate 10, and after mechanical connection portions 64 protruding from the bottom surface 61 of the case 60 are fitted therein, the mechanical holes 64 are mechanically inserted.
  • the substrate 10 is supported on the case 60 by heat caulking the tip of the connecting portion 64.
  • the electronic components 20 and 30 are electrically connected to the wiring pattern by being mounted on the substrate 10 and may be any surface mounting component or through-hole mounting component.
  • the semiconductor element 20 and the passive element 30 are exemplified as the electronic components 20 and 30.
  • the semiconductor element 20 include a power element that generates a large amount of heat, such as a microcomputer, a control element, or an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor).
  • the semiconductor element 20 is connected to a land connected to the wiring pattern of the substrate 10 or a land formed by a part of the wiring pattern by a bonding wire 21 and a die bonding material 22 such as solder.
  • Examples of the passive element 30 include a chip resistor, a chip capacitor, and a crystal resonator.
  • the passive element 30 is connected to a land provided on the substrate 10 by a die bonding material 31 such as solder.
  • the mold resin 40 is composed of a thermosetting resin such as an epoxy resin, and is formed by a transfer molding method using a mold or a compression molding method. In the case of the present embodiment, a so-called half mold structure is formed in which the one surface 11 side of the substrate 10 is sealed with the mold resin 40 and the other surface 12 side of the substrate 10 is exposed without being sealed with the mold resin 40. .
  • the one surface 11 side of the substrate 10 is referred to as a lower surface, and the opposite side is referred to as an upper surface.
  • the upper surface of the mold resin 40 is a flat surface.
  • the center line may have a roof shape or a curved surface shape with the highest height from the first surface 11. Unevenness may be formed.
  • the mold resin 40 has a rectangular top surface, and the two opposite sides of the substrate 10, specifically, both sides perpendicular to the longitudinal direction of the substrate 10 are exposed. It is formed only on the inner side than both sides. That is, both ends in the longitudinal direction of the substrate 10 protrude from the mold resin 40 and are exposed from the mold resin 40 by being arranged to the outside.
  • a through hole 13 is disposed in a portion exposed from the mold resin 40, and an electrical connection between the wiring pattern formed on the substrate 10 and the outside is possible through the through hole 13.
  • both sides of the substrate 10 are exposed from the mold resin 40, so that the four corners of the substrate 10 are exposed. In the portion exposed from the mold resin 40, the substrate 10 is attached to the case 60 as described above. It is supported.
  • a taper portion 41 protruding in a tapered shape is provided on a part of the side surface of the mold resin 40, specifically, a portion of the side surface on the one surface 11 side of the substrate 10.
  • the side surface of the mold resin 40 is provided with a taper portion 41 by being inclined with respect to the one surface 11 at a portion on the upper surface side of the mold resin 40 and inclined with respect to the one surface 11 at a portion on the one surface 11 side.
  • the end portion of the mold resin 40 is provided with a portion where the thickness of the mold resin 40 from the lower position than the upper surface of the mold resin 40 is reduced, and gradually toward the outside of the mold resin 40.
  • the tapered portion 41 is formed by making it thinner.
  • the taper portion 41 is configured by gradually lowering the height from the one surface 11 of the mold resin 40 toward the outside of the mold 40.
  • the surface of the taper portion 41 is a flat surface, and is inclined at an arbitrary angle with respect to the one surface 11. The structure is inclined.
  • the thickness of the mold resin 40 in the taper portion 41 is lower than that of the electronic components 20 and 30 having the highest height from the one surface 11 of the substrate 10. For this reason, the area
  • the taper portion 41 by providing the taper portion 41, the thickness of the mold resin 40 is gradually reduced toward the outside of the mold resin 40. For this reason, in the terminal part of mold resin 40, since it does not change suddenly from the area where thick mold resin 40 is formed to the area where it is not formed, the difference in thermal expansion coefficient between mold resin 40 and substrate 10 occurs. The resulting stress can be relaxed. Thereby, peeling between the mold resin 40 and the substrate 10 can be suppressed. Further, since the tapered portion 41 is not formed so as to extend from the upper surface of the mold resin 40 to the one surface 11 of the substrate 10, there are few regions that become the tapered portion 41. For this reason, the internal observation by the ultrasonic flaw detector can be satisfactorily performed in most regions of the mold resin 40. Therefore, the inside observation of the mold resin 40 can be performed more favorably.
  • the position of the side surface of the mold resin 40 coincides with the position of the side surface of the substrate 10.
  • the side surface of the mold resin 40 is flat and is flush with the side surface of the substrate 10.
  • the heat sink 50 is made of a metal material having a high heat transfer coefficient, such as aluminum or copper, and is in close contact with the other surface 12 side of the substrate 10 via a bonding member 51.
  • a conductive adhesive containing a metal filler, a conductive material such as a solder material, or an insulating material such as a heat radiating gel or a heat radiating sheet is used.
  • the heat sink 50 plays a role of radiating heat when the heat generated by the electronic components 20 and 30 is transmitted from the other surface 12 side of the substrate 10 and is made of a metal material having high thermal conductivity, such as copper. Has been.
  • the semiconductor element 20 is composed of an IGBT or a MOSFET, since these are heating elements, they generate a lot of heat, but this heat is transmitted to the heat sink 50, so that the semiconductor elements 20 and the passive elements 30 High temperature is suppressed.
  • the heat sink 50 is thermally connected to the lid 70 via the heat radiating gel 80, and heat transferred from the back surface of the substrate 10 is further transmitted to the lid 70 through the heat radiating gel 80. Heat is radiated from 70 to the outside.
  • the case 60 is a rectangular housing that accommodates the electronic components 20 and 30 mounted on the one surface 11 side of the substrate 10 and sealed with the mold resin 40.
  • the case 60 is a member constituting the housing recess 63 in which the periphery of the bottom surface 61 is covered by the side wall surface 62, and the substrate 10 mounted with the electronic components 20 and 30 and sealed with the mold resin 40 is used.
  • the housing recess 63 the one surface 11 side faces the bottom surface 61 side.
  • the mechanical connection portion 64 that supports the substrate 10 is formed on the bottom surface 61 of the case 60.
  • the mechanical connection portion 64 is a stepped rod-like member that protrudes in the vertical direction from the bottom surface 61 and whose sectional dimensions are partially changed. Specifically, in the state before the substrate 10 is fixed, the mechanical connection portion 64 has a cross-sectional dimension on the bottom side larger than that of the fixing hole 14 formed in the substrate 10, and a cross-sectional dimension on the tip side is larger than the fixing hole 14. Is almost the same or slightly smaller. Because of such dimensions, the mechanical connection portion 64 holds the substrate 10 at the stepped portion between the front end side and the bottom surface side while the front end side is inserted into the fixing hole 14.
  • the front end side of the mechanical connection portion 64 is fitted into the fixing hole 14 and then heat caulked, so that a portion protruding from the substrate 10 has a cross-sectional dimension larger than that of the fixing hole 14 and a step difference from that portion.
  • the substrate 10 is sandwiched between and supported.
  • the protruding amount of the mechanical connection portion 64 is set lower than the height of the side wall surface 62 so that the substrate 10 enters the inside of the accommodating recess 63 rather than the tip of the side wall surface 62.
  • connection terminals 65 are erected on the bottom surface 61 of the case 60 in a direction perpendicular to the bottom surface 61.
  • each connection terminal 65 is made of a copper alloy that is tin-plated or nickel-plated.
  • Each of the plurality of connection terminals 65 is inserted through a through hole 13 formed in the substrate 10 and is electrically connected to the through hole 13 via a connection member 15 such as solder.
  • the case 60 is basically made of an insulator based on a resin such as PPS (polyphenylene sulfide) or PBT (polybutylene terephthalate), but includes a wiring pattern extending to the outside of the case 60. Yes.
  • a plurality of connection terminals 65 are connected to the wiring pattern, and the wiring pattern of the substrate 10 on which the electronic components 20 and 30 are mounted is electrically connected to the outside through the connection terminals 65 and the wiring pattern. Yes.
  • the lid 70 seals the inside of the case 60 by being connected to the opening end of the case 60, that is, the tip of the side wall surface 62.
  • the lid 70 is fixed to the case 60 via an adhesive or the like, for example.
  • the lid 70 is made of a metal material having a high heat transfer coefficient, such as aluminum or copper, and is made of a rectangular plate-like member.
  • the heat dissipating gel 80 is disposed between the heat sink 50 and the lid 70, and is disposed so as to be in contact with both, thereby transferring heat from the heat sink 50 to the lid 70.
  • the heat radiating gel 80 is made of a silicone oil compound having a high thermal conductivity.
  • the electronic device S1 As described above, the electronic device S1 according to the present embodiment is configured. Such an electronic device S1 is manufactured by the following manufacturing method.
  • the electronic components 20 and 30 are mounted on the one surface 11 of the substrate 10.
  • the substrate 10 on which the electronic components 20 and 30 are mounted is sealed with a mold resin 40 by a transfer molding method or a compression molding method.
  • FIG. 4 shows a state in which the resin sealing with the mold resin 40 is performed by, for example, compression molding.
  • a lower mold (first mold) 91, an upper mold (second mold) 92, and a plunger 93 are used as a mold 90 serving as a mold.
  • the substrate 10 is placed on the lower mold 91. It arrange
  • the resin powder used for compression molding is filled in the opening 92a of the upper die 92, and then the plunger 93 is slid in the opening 92a and heated and pressurized. Perform molding. Thereby, the mold resin 40 is formed.
  • the inner wall surface is tapered so that the cavity gradually expands toward the one surface 11.
  • a tapered portion 41 is formed in a portion of the side surface of the mold resin 40 on the one surface 11 side so that the thickness of the mold resin 40 gradually decreases as the mold resin 40 moves outward.
  • the substrate 10 is disposed in the housing recess 63 of the case 60 with the one surface 11 side facing the bottom surface 61 side.
  • the plurality of connection terminals 65 are inserted into the through holes 13 so that the tips of the mechanical connection portions 64 are fitted into the fixing holes 14.
  • the tip of the mechanical connection portion 64 is heat caulked, and the through hole 13 and the plurality of connection terminals 65 are connected by the connection member 15 by soldering or the like.
  • the lid 70 is disposed thereon, and the space between the lid 70 and the side wall surface 62 of the case 60 is fixed with an adhesive or the like. The electronic device S1 is completed.
  • the plunger 93 It is difficult to adjust the push-in amount. That is, the plunger 93 may be pushed too much, or conversely, the pushing amount of the plunger 93 may be insufficient. For this reason, the shape of the upper surface of the mold resin 40 changes according to the pushing amount of the plunger 93, and it is difficult to stably form a trapezoidal cross section, and the mold resin 40 extends from the upper surface of the mold resin 40 to the surface in contact with the substrate 10. It is difficult to taper the entire side surface.
  • the mold resin 40 can be stably formed in the same shape, and the problem that burrs are lost in a subsequent process does not occur.
  • the end portion of the mold resin 40 is provided with a portion in which the thickness of the mold resin 40 is reduced, and as it goes outward of the mold resin 40.
  • the taper portion 41 is formed by gradually reducing the thickness. For this reason, in the terminal part of mold resin 40, since it does not change suddenly from the area where thick mold resin 40 is formed to the area where it is not formed, the difference in thermal expansion coefficient between mold resin 40 and substrate 10 occurs. The resulting stress can be relaxed. Thereby, peeling between the mold resin 40 and the substrate 10 can be suppressed.
  • tapered portion 41 is not formed so as to extend from the upper surface of the mold resin 40 to the one surface 11 of the substrate 10, there are few regions that become the tapered portion 41. For this reason, the internal observation by the ultrasonic flaw detector can be satisfactorily performed in most regions of the mold resin 40. Therefore, it becomes possible to better observe the inside of the mold resin.
  • the tapered portion 41 is not formed in the entire region from the upper surface of the mold resin 40 to the one surface 11 of the substrate 10, and is formed from below the upper surface of the mold resin 40. Can be limited. For this reason, the electronic components 20 and 30 can be disposed up to the vicinity of the outer edge portion of the mold resin 40, the dead space can be reduced, and the enlargement of the electronic device S1 can be suppressed.
  • the boundary position between the portion other than the taper portion 41 and the taper portion 41 in the side surface of the mold resin 40 and the boundary position between the taper portion 41 and one surface of the substrate 10 are R-shaped. It is designed to be a curved surface. Thus, even if the surface of the taper portion 41 is curved, the same effect as that of the first embodiment can be obtained. In addition, by making the surface of the tapered portion 41 a curved surface, the stress caused by the difference in thermal expansion coefficient between the mold resin 40 and the substrate 10 at each boundary position can be changed smoothly. Thereby, it becomes possible to further suppress peeling between the mold resin 40 and the substrate 10.
  • the boundary position between the taper portion 41 and the portion other than the taper portion 41 on the side surface of the mold resin 40 is an R-shaped curved surface. As described above, even if the boundary position between the taper portion 41 and the portion other than the taper portion 41 on the side surface of the mold resin 40 is curved, the same effect as that of the first embodiment can be obtained. Moreover, the stress resulting from the difference in thermal expansion coefficient between the mold resin 40 and the substrate 10 at the boundary position can be changed smoothly. Thereby, it becomes possible to further suppress peeling between the mold resin 40 and the substrate 10.
  • an example of the electronic device S1 to which the electronic components 20 and 30 are mounted on the one surface 11 of the substrate 10 and then the electronic components 20 and 30 are sealed with the mold resin 40 is applied.
  • the one surface 11 side of the substrate 10, that is, the mold resin 40 side is arranged to face the bottom surface 61 side of the case 60, but the other surface 12 side, that is, the side opposite to the mold resin 40 is directed to the bottom surface 61 side. You may arrange in.
  • the formation position of the taper portion 41 is not limited to the shape described in each of the above embodiments as long as it is formed from a position below the upper surface of the mold resin 40.
  • the tapered portion 41 in order to further reduce the dead space, is provided from a position lower than the highest one of the electronic components 20 and 30.
  • the tapered portion 41 may be formed from the upper position.
  • only the boundary position between the taper portion 41 and the portion other than the taper portion 41 of the side surface of the mold resin 40 is a curved surface, but only the boundary position between the taper portion 41 and one surface of the substrate 10 is used. It may be a curved surface.
  • a plurality of mold resins 40 may be formed simultaneously.
  • the side surface of the mold resin 40 and the side surface of the substrate 10 are flush with each other. Therefore, even when a plurality of substrates 10 are formed using a multiple substrate in this way, the substrate 10 and the mold resin 40 having the structure described in the above embodiments can be manufactured.
  • the taper portions 41 can be formed on all sides of the mold resin 40 in a state before cutting, it is possible to further improve the mold release properties at the time of molding.
  • connection portion 64 is not limited to heat caulking, and may be press-fitting or screw-fixing.
  • connection between the connection terminal 65 and the through hole 13 is not limited to soldering, and may be a press fit or the like.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

Le dispositif électronique selon la présente invention comporte un substrat (10), des composants électroniques (20, 30) montés sur une première surface (11) dudit substrat, et une résine moulée (40) qui est disposée sur ladite première surface (11) et étanchéifie les composants électroniques. Une partie du substrat se trouve à l'extérieur de la résine moulée. La résine moulée comporte des sections effilées (41) qui sont situées sur les surfaces latérales de la résine moulée et dépassent vers l'extérieur depuis des positions situées en dessous de la surface supérieure de la résine moulée. Les sections effilées (41) forment un angle par rapport à la première surface susmentionnée, et à mesure que la distance croît depuis la résine moulée, leur hauteur décroît graduellement depuis la première surface.
PCT/JP2014/002917 2013-06-28 2014-06-03 Dispositif électronique et procédé de fabrication dudit dispositif électronique WO2014208006A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2013-136895 2013-06-28
JP2013136895A JP2015012158A (ja) 2013-06-28 2013-06-28 電子装置およびその電子装置の製造方法

Publications (1)

Publication Number Publication Date
WO2014208006A1 true WO2014208006A1 (fr) 2014-12-31

Family

ID=52141382

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2014/002917 WO2014208006A1 (fr) 2013-06-28 2014-06-03 Dispositif électronique et procédé de fabrication dudit dispositif électronique

Country Status (2)

Country Link
JP (1) JP2015012158A (fr)
WO (1) WO2014208006A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022003303A (ja) * 2017-05-22 2022-01-11 株式会社ササクラ 空調用放射パネル及びその製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05183072A (ja) * 1991-12-26 1993-07-23 Olympus Optical Co Ltd 半導体装置
JP2006108362A (ja) * 2004-10-05 2006-04-20 Sharp Corp 電子デバイスおよびそれを用いた電子機器
JP2006210958A (ja) * 1997-02-27 2006-08-10 Fujitsu Ltd 半導体装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11340378A (ja) * 1998-05-22 1999-12-10 Sanken Electric Co Ltd 半導体発光装置の製造方法
US20100102436A1 (en) * 2008-10-20 2010-04-29 United Test And Assembly Center Ltd. Shrink package on board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05183072A (ja) * 1991-12-26 1993-07-23 Olympus Optical Co Ltd 半導体装置
JP2006210958A (ja) * 1997-02-27 2006-08-10 Fujitsu Ltd 半導体装置
JP2006108362A (ja) * 2004-10-05 2006-04-20 Sharp Corp 電子デバイスおよびそれを用いた電子機器

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022003303A (ja) * 2017-05-22 2022-01-11 株式会社ササクラ 空調用放射パネル及びその製造方法
JP7233126B2 (ja) 2017-05-22 2023-03-06 株式会社ササクラ 空調用放射パネル及びその製造方法

Also Published As

Publication number Publication date
JP2015012158A (ja) 2015-01-19

Similar Documents

Publication Publication Date Title
US9795053B2 (en) Electronic device and method for manufacturing the electronic device
JP6252871B2 (ja) 回路構成体及び電気接続箱
EP3226292B1 (fr) Grille de connexion, dispositif à semi-conducteur, procédé de fabrication de grille de connexion et procédé de fabrication de dispositif à semi-conducteur
JP3855306B2 (ja) 電子部品搭載用放熱基板及びその製造方法
JP2010129868A (ja) 電力用半導体モジュール及びその製造方法
CN104303289A (zh) 电子模块及其制造方法
JPWO2013114647A1 (ja) 半導体装置とその製造方法
WO2014203521A1 (fr) Appareil électronique
JP5788584B2 (ja) 電子モジュールおよびその製造方法
JP5556531B2 (ja) 電子モジュールの取付構造
US11043443B2 (en) Electric device and heat radiator
WO2014208006A1 (fr) Dispositif électronique et procédé de fabrication dudit dispositif électronique
JP2004363183A (ja) 電子部品の放熱構造
JP2005191147A (ja) 混成集積回路装置の製造方法
CN107078106B (zh) 散热结构
JP2015002323A (ja) 電子装置
JP5062189B2 (ja) 半導体装置の実装構造
JP2015018864A (ja) 電子機器の熱管理構造
JP6171631B2 (ja) 電子装置の製造方法
TWI722724B (zh) 功率模組
JP7251446B2 (ja) 伝熱部材付基板及び伝熱部材付基板の製造方法
JP2015012061A (ja) 電子装置およびその電子装置の製造方法
JP2009277959A (ja) 半導体装置及びその製造方法
WO2020246224A1 (fr) Structure de circuit et boîte de connexion électrique
JP2015056521A (ja) 電子装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 14816993

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 14816993

Country of ref document: EP

Kind code of ref document: A1