WO2014173146A1 - 薄膜晶体管及其制作方法、阵列基板及显示装置 - Google Patents

薄膜晶体管及其制作方法、阵列基板及显示装置 Download PDF

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WO2014173146A1
WO2014173146A1 PCT/CN2013/089430 CN2013089430W WO2014173146A1 WO 2014173146 A1 WO2014173146 A1 WO 2014173146A1 CN 2013089430 W CN2013089430 W CN 2013089430W WO 2014173146 A1 WO2014173146 A1 WO 2014173146A1
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layer
thin film
film transistor
metal
oxide
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姜春生
方婧斐
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BOE Technology Group Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3434—Deposited materials, e.g. layers characterised by the chemical composition being oxide semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6314—Formation by oxidation, e.g. oxidation of the substrate of a metallic layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6938—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
    • H10P14/6939—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
    • H10P14/69391—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing aluminium, e.g. Al2O3

Definitions

  • Embodiments of the present invention relate to a thin film transistor, a method of fabricating the same, an array substrate, and a display device. Background technique
  • Both an oxide thin film transistor (TFT) and an amorphous silicon TFT can be used as a driving element for an organic light-emitting diode (OLED) display panel or a polymer light-emitting diode (PLED).
  • Display panels such as display panels.
  • the oxide TFT has a carrier concentration 10 times that of the amorphous silicon TFT as compared with the amorphous silicon TFT.
  • the oxide TFT can be produced by a magnetron sputtering method, so that the use of the oxide TFT does not require a drastic change in the conventional liquid crystal display panel production line.
  • oxide TFTs are more advantageous for the production of large-area display panels than polysilicon TFTs because of the limitations of equipment used in processes such as ion implantation and laser crystallization.
  • Fig. 1 is a schematic view showing the structure of a conventional oxide thin film transistor which is of a bottom gate type.
  • the fabrication process of the oxide TFT is as follows.
  • a gate metal is deposited on the glass substrate 110 and etched to form the gate electrode 120.
  • the gate insulating layer 130 and the oxide semiconductor layer are deposited, and the oxide semiconductor is usually formed of indium gallium zinc oxide (IGZO).
  • the active layer 140 is formed by etching the oxygen semiconductor layer by wet etching.
  • a SiOx (silicon oxide) layer is deposited and etched to form an etch stop layer 150.
  • a source 160 and a drain 170 are formed.
  • Embodiments of the present invention provide a method of fabricating a thin film transistor.
  • the method includes the steps of forming a gate, a gate insulating layer, an oxide active layer, and a source and drain on a substrate. After forming the oxide active layer, the method further includes the step of forming an etch barrier of the metal oxide on the oxide active layer.
  • the step of forming an etch barrier layer of a metal oxide on the oxide active layer includes: forming a metal layer on the oxide active layer; oxidizing the metal layer to form a metal oxide Etching barrier.
  • the step of forming a metal layer on the oxide active layer includes: applying a solution containing a metal ion onto the oxide active layer, and performing an electroless plating process on the oxide active layer The metal layer is formed.
  • the step of oxidizing the metal layer to form an etch stop layer of the metal oxide includes: heating the substrate on which the metal layer is formed, and simultaneously introducing oxygen.
  • the method further includes cleaning the substrate to remove excess The step of a solution containing a metal ion.
  • the metal ion is Al 3+ .
  • the metal ion-containing solution further includes: at least one of a complexing agent, a stabilizer, a surfactant, an accelerator, and a pH adjuster.
  • Embodiments of the present invention also provide a thin film transistor including: a gate electrode formed on a substrate, a gate insulating layer, an oxide active layer, and a source and drain.
  • the thin film transistor further includes an etch barrier layer made of a metal oxide formed on the oxide active layer.
  • the metal oxide is A1 2 0 3 .
  • Embodiments of the present invention also provide an array substrate including the above-described thin film transistor.
  • Embodiments of the present invention also provide a display device including the above array substrate.
  • 1 is a schematic structural view of a conventional oxide thin film transistor
  • FIG. 2 is a schematic view showing formation of a gate electrode, a gate insulating layer, and an oxide active layer on a substrate in a method of fabricating a thin film transistor according to an embodiment of the present invention
  • Figure 3 is a schematic view showing a solution containing aluminum ions coated on the structure obtained in Figure 2;
  • Figure 4 is a schematic view showing the formation of an aluminum film by a solution containing aluminum ions
  • Figure 5 is a schematic view showing oxidation of an aluminum thin film to form aluminum oxide
  • Fig. 6 is a schematic view showing the structure of a thin film transistor finally obtained after forming a source/drain electrode. detailed description
  • a gate, a gate insulating layer, an oxide active layer, and a source and drain are formed over a substrate.
  • an etch barrier layer of a metal oxide is formed thereon, i.e., the etch barrier layer is made of a metal oxide.
  • the production method includes the following steps:
  • Step 1 as shown in FIG. 2, a gate electrode 220, a gate insulating layer 230, and an oxide active layer 240 are sequentially formed on the substrate 210.
  • the gate electrode 220, the gate insulating layer 230, and the oxide active layer 240 may be formed by a patterning process, respectively.
  • the patterning process includes, for example, a process of photoresist coating, exposure, development, etching, and photoresist stripping.
  • the oxide active layer may be formed of IGZO.
  • Step two forming an etch barrier layer made of a metal oxide on the oxide active layer.
  • the step may include the steps of: forming a metal layer on the oxide active layer; and oxidizing the metal layer to form an etch stop layer of the metal oxide.
  • the step of forming a metal layer on the oxide active layer includes, for example, coating a solution containing metal ions on the oxide active layer, and applying the same by an electroless plating process.
  • a metal layer 250' is formed on the oxide active layer 240. Since the oxide active layer 240 and the gate insulating layer 230 are formed of materials of different properties, the metal layer 250' can be formed only on the oxide active layer 240 without forming an exposed gate by controlling the parameters of the electroless plating process.
  • On the insulating layer 230 as shown in FIG.
  • the metal ion-containing solution is applied to the surface of the substrate on which the oxide active layer is formed by spin coating.
  • the spin coating method is less expensive than the conventional technique in which SiOx prepared by chemical vapor deposition is used to form an etch barrier.
  • the spin coating equipment has a small footprint, is easy to implement, and consumes less energy.
  • the metal layer 250' is oxidized to form an etch barrier 250 of metal oxide.
  • the oxidation treatment can be carried out by heating the substrate on which the metal layer 250' is formed while simultaneously introducing a sufficient amount of oxygen (to completely oxidize the metal).
  • the metal ion-containing solution may further include one or two or more of a complexing agent, a stabilizer, a surfactant, an accelerator, and a pH adjuster.
  • the complexing agent may be ethylenediaminetetraacetic acid or tartaric acid, which on the one hand increases the polarization of the metal ions, smoothes the resulting metal layer, and on the other hand stabilizes the spin-coated solution.
  • the stabilizer may be Na 2 S, which ensures the stability of the metal ions.
  • the surfactant may be sodium tartrate, which lowers the surface tension of the solution, so that hydrogen generated by the reaction is easily detached from the surface of the formed metal layer to reduce hydrogen embrittlement.
  • the accelerator may be malonic acid, which may increase the rate of formation of the metal layer.
  • the pH regulator can be ammonia, which adjusts the pH of the solution to prevent dissolution of the metal layer.
  • chemical solution containing Al 3+ may be a salt solution containing Al 3+, such as brines containing ⁇ of Al 3+. As shown in Figure 3, SC ⁇ - is also included in the solution.
  • the source 260 and the drain 270 are formed. At this point, an oxide TFT as shown in Fig. 6 is finally formed.
  • the etch stop of the metal oxide is effective to block the effects of external moisture on the oxide TFT.
  • the oxide active layer is not damaged during the fabrication of the etch barrier of the metal oxide, so that the performance of the oxide TFT is not affected.
  • the method of fabricating the thin film transistor according to the embodiment of the present invention is not limited to the fabrication of the bottom gate type TFT, and is also applicable to the top gate type TFT.
  • a light shielding layer is sequentially formed on the substrate, The isolation layer of the edge, the source and drain, the oxide active layer, the etch stop layer, the gate insulating layer, and the gate.
  • the step of forming the etch barrier layer is similar to the bottom gate type and will not be described herein.
  • Embodiments of the present invention also provide a thin film transistor which can be fabricated as described above.
  • the thin film transistor includes: a gate electrode formed on a substrate, a gate insulating layer, an oxide active layer, and a source and drain.
  • the oxide active layer In order to better protect the oxide active layer, the performance of the TFT is not affected during the fabrication process, and the fabricated TFT is not affected by external moisture, and the thin film transistor further includes an oxide active layer.
  • An etch stop made of a metal oxide.
  • an etch barrier layer is located between the oxide active layer and the source and drain.
  • an etch barrier layer is located between the oxide active layer and the gate insulating layer.
  • Embodiments of the present invention also provide an array substrate.
  • the array substrate includes a plurality of gate lines and a plurality of data lines.
  • the plurality of gate lines and the plurality of data lines intersect to form a plurality of pixel units in the form of an array.
  • Each of the pixel units includes the above-described thin film transistor.
  • Embodiments of the present invention also provide a display device including the above array substrate.
  • the display device may be any product or component having a display function such as a liquid crystal display panel, an electronic paper, an OLED display panel, a PLED display panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.

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  • Thin Film Transistor (AREA)

Abstract

一种薄膜晶体管及其制作方法，一种包含该薄膜晶体管的阵列基板及显示装置。该方法包括在基板（210）上形成栅极（220）、栅绝缘层（230）、氧化物有源层（240）和源极（260）、漏极（270）的步骤。在形成氧化物有源层（240）之后，该方法还包括在氧化物有源层（240）上形成金属氧化物的刻蚀阻挡层（250）的步骤。

Description

薄膜晶体管及其制作方法、 阵列基板及显示装置 技术领域
本发明的实施例涉及一种薄膜晶体管及其制作方法、 阵列基板及显示装 置。 背景技术
氧化物薄膜晶体管（ Thin Film Transistor, TFT )与非晶硅 TFT均可作为 驱动元件用于有机发光二极管 （Organic Light-Emitting Diode, OLED )显示 面板、 高分子发光二极管 （polymer light-emitting diode, PLED )显示面板等 显示面板中。 氧化物 TFT与非晶硅 TFT相比， 其载流子浓度是非晶硅 TFT 的 10倍。 另外， 氧化物 TFT可通过磁控溅射的方法制备， 因此采用氧化物 TFT无需大幅改变传统的液晶显示面板生产线。 同时， 由于没有离子注入及 激光晶化等工艺所用设备的限制，相对于多晶硅 TFT, 氧化物 TFT更有利于 大面积的显示面板的生产。
图 1是传统氧化物薄膜晶体管的结构示意图， 该氧化物薄膜晶体管为底 栅型。 该氧化物 TFT的制作工艺如下。 在玻璃基板 110上沉积栅金属并刻蚀 形成栅极 120。 沉积栅绝缘层 130及氧化物半导体层， 氧化物半导体通常由 铟镓辞氧化物（indium gallium zinc oxide, IGZO )形成。 利用湿刻对氧 4匕物 半导体层进行刻蚀形成有源层 140。 沉积 SiOx (硅的氧化物）层并刻蚀形成 刻蚀阻挡层 150。 最后形成源极 160和漏极 170。
在上述制作工艺中， 在 SiOx的刻蚀阻挡层的制作过程中， 反应气氛中 的气体分子进入等离子体中， 被分解为带电离子， 这些带电离子具有非常高 的能量， 其在被等离子体喷射至基板时会产生轰击效应。 这种现象会在基板 上的 IGZO薄膜表面形成缺陷， 导致了 TFT性能的恶化。 另外， 采用 SiOx 形成刻蚀阻挡层时， 不能很好地防止水汽向有源层 140扩散， 进一步导致了 TFT性能的恶化。 另外， 沉积 SiOx薄膜时一般采用化学气相沉积（CVD ) 设备， 该设^介格昂贵， 占地面积大， 而且耗能很大。 发明内容
本发明的实施例提供了一种薄膜晶体管的制作方法。 该方法包括在基板 上形成栅极、 栅绝缘层、 氧化物有源层和源漏极的步骤。 在形成所述氧化物 有源层之后， 所述方法还包括在所述氧化物有源层上形成金属氧化物的刻蚀 阻挡层的步骤。
例如，在所述氧化物有源层上形成金属氧化物的刻蚀阻挡层的步骤包括： 在所述氧化物有源层上形成金属层； 对所述金属层进行氧化处理以形成金属 氧化物的刻蚀阻挡层。
例如， 在所述氧化物有源层上形成金属层的步骤包括： 将含有金属离子 的溶液涂覆到所述氧化物有源层上， 并通过化学镀工艺在所述氧化物有源层 上形成所述金属层。
例如， 对所述金属层进行氧化处理以形成金属氧化物的刻蚀阻挡层的步 骤包括： 对形成有所述金属层的基板进行加热， 并同时通入氧气。
例如， 在于所述氧化物有源层上形成金属层的步骤之后， 且在对所述金 属层进行氧化处理以形成金属氧化物的刻蚀阻挡层前， 所述方法还包括清洗 基板以去除多余的含有金属离子的溶液的步骤。
例如， 所述金属离子为 Al3+。
例如， 所述含有金属离子的溶液中还包括： 络合剂、 稳定剂、 表面活性 剂、 加速剂以及 PH值调节剂中至少一种。
例如，采用旋涂法来将含有金属离子的溶液涂覆到所述氧化物有源层上。 本发明的实施例还提供了一种薄膜晶体管， 包括：形成在基板上的栅极、 栅绝缘层、 氧化物有源层及源漏极。 所述薄膜晶体管还包括形成在氧化物有 源层上的由金属氧化物制成的刻蚀阻挡层。
例如， 所述金属氧化物为 A1203。
本发明的实施例还提供了一种阵列基板， 包括上述的薄膜晶体管。
本发明的实施例还提供了一种显示装置， 包括上述的阵列基板。 附图说明
为了更清楚地说明本发明实施例的技术方案， 下面将对实施例的附图作 筒单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例， 而非对本发明的限制。
图 1是传统氧化物薄膜晶体管的结构示意图；
图 2是在根据本发明实施例的薄膜晶体管的制作方法中在基板上形成栅 极、 栅绝缘层和氧化物有源层的示意图；
图 3是在图 2所得的结构上涂覆含有铝离子的溶液的示意图；
图 4是含有铝离子的溶液形成铝薄膜的示意图；
图 5是铝薄膜氧化形成氧化铝的示意图；
图 6是形成源漏电极后最终得到的薄膜晶体管的结构示意图。 具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合附图， 对本发明实施例的技术方案进行清楚、 完整地描述。 显然， 所描述的实施例 是本发明的一部分实施例， 而不是全部的实施例。 基于所描述的本发明的实 施例， 本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实 施例， 都属于本发明保护的范围。
在根据本发明实施例的薄膜晶体管制作方法中， 在基板之上形成栅极、 栅绝缘层、 氧化物有源层和源漏极。 在形成所述氧化物有源层之后， 在其上 形成金属氧化物的刻蚀阻挡层， 即刻蚀阻挡层由金属氧化物制成。
下面，以底栅型 TFT为例对根据本发明实施例的薄膜晶体管的制作方法 进行详细说明。 该制作方法包括如下步骤：
步骤一， 如图 2所示， 在基板上 210依次形成栅极 220、 栅绝缘层 230 及氧化物有源层 240。栅极 220、栅绝缘层 230和氧化物有源层 240可以分别 通过构图工艺形成。 构图工艺例如包括光刻胶涂敷、 曝光、 显影、 刻蚀及光 刻胶剥离等工艺。 氧化物有源层可以由 IGZO形成。
步骤二， 在氧化物有源层上形成由金属氧化物制成的刻蚀阻挡层。
例如， 该步骤可以包括如下步骤： 在所述氧化物有源层上形成金属层； 以及对该金属层进行氧化处理以形成金属氧化物的刻蚀阻挡层。
如图 3和 4所示， 在所述氧化物有源层上形成金属层的步骤例如包括： 在所述氧化物有源层上涂敷含有金属离子的溶液， 并通过化学镀工艺在所述 氧化物有源层 240上形成金属层 250' 。 由于氧化物有源层 240和栅绝缘层 230由不同性质的材料形成， 因此通 过控制化学镀工艺的参数可以使金属层 250' 仅形成在氧化物有源层 240上 而不形成在暴露的栅绝缘层 230上， 如图 4所示。
例如， 采用旋涂法将所述含有金属离子的溶液涂敷到形成有所述氧化物 有源层的基板表面。 与传统技术中采用化学气相沉积法制备的 SiOx来形成 刻蚀阻挡层的情形相比， 采用旋涂法的成本较低。 另外， 旋涂设备占地面积 小， 方便实施， 而且耗能较小。
接着， 如图 5所示， 对所述金属层 250' 进行氧化处理， 以形成金属氧 化物的刻蚀阻挡层 250。
由于形成金属层后， 金属层表面会有多余的旋涂溶液， 在氧化处理前还 可以先对多余的溶液进行清洗。 氧化处理可以采用对形成有金属层 250' 的 基板进行加热并同时通入足量氧气（使金属完全氧化） 的方式进行。
例如， 所述含有金属离子的溶液中还可以包括： 络合剂、 稳定剂、 表面 活性剂、 加速剂以及 PH值调节剂中一种或两种或多种。
络合剂可以为乙二胺四乙酸或酒石酸， 其一方面可使金属离子的极化增 大， 使所得的金属层细致光滑， 另一方面可使旋涂的溶液稳定。 稳定剂可以 为 Na2S, 其可以保证金属离子的稳定性。 表面活性剂可以为酒石酸钠， 其可 以降低溶液的表面张力， 使反应产生的氢气很容易从形成的金属层表面脱离 而降低氢脆作用。 加速剂可以为丙二酸， 其可以提高金属层的形成速率。 PH 调节剂可以为氨水， 其可以调节溶液的 PH值， 防止金属层溶解。
由于铝（A1 )具有易被氧化的化学特性， 因此优选采用含有 Al3+的化学 溶液。 进一步地， 含有 Al3+的化学溶液可以是含有 Al3+的盐溶液， 如含 Al3+ 的^ 酸盐溶液。 如图 3所示， 溶液中还包括 SC^—。
步骤三， 形成源极 260和漏极 270。 至此， 最终形成如图 6所示的氧化 物 TFT。
在根据本发明的实施例中， 金属氧化物的刻蚀阻挡层能够有效地阻挡外 界水汽对氧化物 TFT的影响。 另外， 在金属氧化物的刻蚀阻挡层的制作过程 中也不会对氧化物有源层产生损害， 从而不会影响氧化物 TFT的性能。
根据本发明实施例的薄膜晶体管的制作方法不限于制作底栅型 TFT, 对 于顶栅型 TFT也同样适用。 对于顶栅型 TFT, 在基板上依次形成遮光层、 绝 缘的隔离层、 源漏极， 氧化物有源层、 刻蚀阻挡层、 栅绝缘层及栅极。 形成 刻蚀阻挡层的步骤和底栅型类似， 此处不再赘述。
本发明的实施例还提供了一种薄膜晶体管， 该薄膜晶体管可以按上述方 法制作。 该薄膜晶体管包括： 形成在基板上的栅极、 栅绝缘层、 氧化物有源 层及源漏极。 为了更好地保护氧化物有源层， 使得 TFT的性能在制作过程中 不受影响， 并使得制成后的 TFT不受外界水汽的影响， 该薄膜晶体管还包括 形成在氧化物有源层上的由金属氧化物制成的刻蚀阻挡层。
对于底栅型 TFT, 刻蚀阻挡层位于氧化物有源层和源漏极之间。 对于顶 栅型 TFT, 刻蚀阻挡层位于氧化物有源层和栅绝缘层之间。
本发明的实施例还提供了一种阵列基板。 该阵列基板包括多条栅线和多 条数据线。 该多条栅线和多条数据线交叉形成阵列形式的多个像素单元。 每 个像素单元包括上述的薄膜晶体管。
本发明的实施例还提供了一种显示装置， 包括上述的阵列基板。 例如， 该显示装置可以为液晶显示面板、 电子纸、 OLED显示面板、 PLED显示面 板、 手机、 平板电脑、 电视机、 显示器、 笔记本电脑、 数码相框、 导航仪等 任何具有显示功能的产品或部件。
以上所述仅是本发明的示范性实施方式， 而非用于限制本发明的保护范 围， 本发明的保护范围由所附的权利要求确定。

Claims

权利要求书
1、 一种薄膜晶体管的制作方法， 包括在基板上形成栅极、栅绝缘层、 氧 化物有源层和源漏极的步骤，
其中在形成所述氧化物有源层之后， 所述方法还包括在所述氧化物有源 层上形成金属氧化物的刻蚀阻挡层的步骤。
2、如权利要求 1所述的薄膜晶体管的制作方法，其中在所述氧化物有源 层上形成金属氧化物的刻蚀阻挡层的步骤包括：
在所述氧化物有源层上形成金属层；
对所述金属层进行氧化处理以形成金属氧化物的刻蚀阻挡层。
3、如权利要求 2所述的薄膜晶体管的制作方法，其中在所述氧化物有源 层上形成金属层的步骤包括： 将含有金属离子的溶液涂覆到所述氧化物有源 层上， 并通过化学镀工艺在所述氧化物有源层上形成所述金属层。
4、如权利要求 3所述的薄膜晶体管的制作方法，其中对所述金属层进行 氧化处理以形成金属氧化物的刻蚀阻挡层的步骤包括：
对形成有所述金属层的基板进行加热， 并同时通入氧气。
5、如权利要求 3所述的薄膜晶体管的制作方法，其中在于所述氧化物有 源层上形成金属层的步骤之后， 且在对所述金属层进行氧化处理以形成金属 氧化物的刻蚀阻挡层前， 所述方法还包括清洗基板以去除多余的含有金属离 子的溶液的步骤。
6、 如权利要求 3 所述的薄膜晶体管的制作方法， 其中所述金属离子为
Al3+。
7、如权利要求 3所述的薄膜晶体管的制作方法，其中所述含有金属离子 的溶液中还包括： 络合剂、 稳定剂、 表面活性剂、 加速剂以及 PH值调节剂 中至少一种。
8、如权利要求 3所述的薄膜晶体管的制作方法，其中采用旋涂法来将含 有金属离子的溶液涂覆到所述氧化物有源层上。
9、 一种薄膜晶体管， 包括： 形成在基板上的栅极、 栅绝缘层、 氧化物有 源层及源漏极， 其中所述薄膜晶体管还包括形成在氧化物有源层上的由金属 氧化物制成的刻蚀阻挡层。 、 如权利要求 9所述的薄膜晶体管， 其中所述金属氧化物为 A120: 、 一种阵列基板， 包括如权利要求 9或 10所述的薄膜晶体管。 、 一种显示装置， 包括如权利要求 11所述的阵列基板。
PCT/CN2013/089430 2013-04-27 2013-12-13 薄膜晶体管及其制作方法、阵列基板及显示装置 Ceased WO2014173146A1 (zh)

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