WO2014030221A1 - 仮想計算機システム、管理計算機及び仮想計算機管理方法 - Google Patents
仮想計算機システム、管理計算機及び仮想計算機管理方法 Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
- G06F9/45558—Hypervisor-specific management and integration aspects
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/485—Task life-cycle, e.g. stopping, restarting, resuming execution
- G06F9/4856—Task life-cycle, e.g. stopping, restarting, resuming execution resumption being on a different machine, e.g. task migration, virtual machine migration
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
- G06F9/45558—Hypervisor-specific management and integration aspects
- G06F2009/4557—Distribution of virtual machine instances; Migration and load balancing
Definitions
- the present invention relates to management of a virtual machine system.
- the virtual computer system can construct one or a plurality of virtual computers (hereinafter referred to as “virtual computers”) on a single physical computer (hereinafter referred to as “physical computers”).
- the virtual machine system can operate an OS (Operating System) independently on each virtual machine (sometimes referred to as LPAR (Logical Partition)). As a result, a plurality of OSs can be operated simultaneously on one physical computer.
- OS Operating System
- LPAR Logical Partition
- Live migration is executed with the OS on LPAR running. Therefore, even when the data held in the memory is transferred from the migration source computer to the migration destination computer, the page is updated in the memory having a plurality of pages (storage areas) (for example, the data in the page). May be updated, or data to be transferred is newly written to the page). In this case, the updated page data is transferred to the migration destination computer.
- pages storage areas
- the updated page data is transferred to the migration destination computer.
- the user must operate the virtual machine system without any problems even when live migration is executed. Therefore, the administrator (user) of the virtual machine system has a need to manage and control the state related to live migration in more detail. For example, if the OS or the like on the LPAR frequently accesses the memory, transfer of the memory page updated by the access may occur many times, and live migration may not be completed indefinitely. Therefore, the user has a need to know in advance whether or not the live migration process is normally completed in order to properly operate the virtual machine system.
- An object of the present invention is to enable a user to grasp the state of live migration processing in a virtual machine system and appropriately manage and control a migration target.
- a virtual computer system includes a plurality of computers in which at least one virtual computer is operated by a hypervisor, and a management computer that manages the plurality of computers.
- the input unit that receives the operation input, and the first virtual machine operating on the first computer
- the progress information regarding the live migration for moving the first virtual machine from the first computer to the second computer is acquired from the first computer.
- generating a statistical information related to live migration based on the acquired progress information generating a statistical screen including the statistical information, and an output unit displaying the statistical screen.
- the process of “displaying” performed by the output unit may be to display a statistical screen on a display device of the management computer, or to a remote computer having a display device connected to the management computer. It is also possible to send information on the statistics screen. In the latter case, the remote computer displays a statistical screen on the display device of the remote computer based on the information received from the management computer.
- the user can grasp the state of the live migration process in the virtual machine system, and can appropriately manage and control the migration target.
- Functional configuration of the management computer Example of live migration selection screen.
- An example of generation and display of a memory map corresponding to the fourth display Sequence chart of live migration processing.
- the flowchart of the memory writing process of a 1st computer The modification of the flowchart of the memory write-in process of a 1st computer.
- the flowchart of the memory data transfer process of a 1st computer The flowchart of the data transfer process of the clean page of a 1st computer.
- the flowchart of the screen generation process in a management computer Explanatory drawing of the method of producing
- FIG. 1 shows the overall configuration of the virtual machine system.
- the virtual computer system 1 includes, for example, a first computer 4-1 and a second computer 4-2, a management computer 2, and a storage device 6.
- the first computer 4-1 and the second computer 4-2 may be referred to as the computer 4 without being distinguished.
- the management computer 2, the first computer 4-1, and the second computer 4-2 are connected by a communication network 41.
- the input unit 3a is connected to the management computer 2 via the input IF 15a.
- the output unit 3b is connected to the management computer 2 via the output IF 15b.
- the first computer 4-1 and the second computer 4-2 are connected to the storage device 6 via the FC cable 42 via an FC-SW (Fiber Channel-Switch) 5.
- FC-SW Fiber Channel-Switch
- FC-SW Fiber Channel-Switch
- other types of switches may be employed instead of the FC-SW 5
- other types of cables may be employed instead of the FC cable 42.
- the output unit 3b outputs the output information generated by the management computer 2.
- the output unit 3b displays screen information, for example.
- the input unit 3 a receives an input instruction from the user and transmits the input instruction to the management computer 2.
- the output unit 3b is, for example, a liquid crystal display that performs output using a screen, a speaker that performs output using sound, and the like.
- the input unit 3a is, for example, a keyboard, a mouse, a microphone, or the like. Furthermore, the touch panel display etc. which serve as the input part 3a and the output part 3b may be sufficient.
- the storage device 6 stores data related to the computer 4.
- the storage device 6 includes a disk unit 31 and an FC-HBA (Fiber Channel-Host Bus Adapter) 32. Note that other types of HBAs may be employed instead of the FC-HBA 32.
- FC-HBA Fiber Channel-Host Bus Adapter
- the FC cable 42 is connected to the FC-HBA 32.
- the storage device 6 writes the write data transmitted from the computer 4 to the disk unit 31.
- the storage device 6 reads the read data requested from the computer 4 from the disk unit 31 and returns it to the computer 4.
- the disk unit 31 includes, for example, an HDD (Hard Disk Drive), a flash memory, or the like.
- the computer 4 executes various arithmetic processes.
- the computer 4 includes, for example, a CPU (Central Processing Unit) 21, a memory 22, a hypervisor 23, a communication IF 25, and an FC-HBA 24. These elements 21 to 25 are connected by a bus (not shown) capable of bidirectional data transmission.
- a bus not shown
- the CPU 21 executes the computer program expanded in the memory 22.
- a plurality of CPUs 21 may be provided.
- the hypervisor 23 realizes a virtualization function.
- the computer 4 can execute only one OS on one chip set including the CPU 21 and the memory 22.
- the computer 4 can simultaneously execute a plurality of OSs on a single chip set including the CPU 21, the memory 22, and the like.
- the first LPAR 100-1 and the second LPAR 100-2 can be constructed as virtual machines on the hypervisor 23, and different OSs can be simultaneously executed in each of the first LPAR 100-1 and the second LPAR 100-2.
- the hypervisor 23 manages allocation (allocation) of resources such as the CPU 21 and the memory 22 to each LPAR (or OS). In other words, the hypervisor 23 appropriately allocates the resources of the physical CPU 21 and the memory 22 to a plurality of OSs that are simultaneously executed according to the situation at that time. From each OS, the virtual CPU and memory resources allocated from the hypervisor 23 are recognized as the actual CPU and memory. This virtual CPU and memory may be referred to as virtual CPU and virtual memory.
- the hypervisor 23 manages the relationship between each OS and a predetermined storage area of the storage device 6.
- the hypervisor 23 receives an instruction to write / read data to / from the storage apparatus 6 from a certain OS
- the hypervisor 23 transmits the instruction to the storage apparatus 6 via the FC-HBA 24.
- the hypervisor 23 receives a write / read response to a certain OS from the storage apparatus 6 via the FC-HBA 24, it transmits the received response to an appropriate OS.
- the two FC-HBAs 24 are provided in order to appropriately realize live migration and increase redundancy.
- the hypervisor 23 is executed, for example, as chipset firmware. That is, the hypervisor 23 can directly control and manage resources such as the physical CPU 21 and the memory 22.
- the hypervisor 23 may be realized as a physical chipset (for example, a physical storage resource that stores the hypervisor 23 as a computer program and a physical CPU that executes the hypervisor 23). It may be a circuit that functions as a hypervisor by having the physical CPU execute the hypervisor 23), or may be realized as a computer program executed on the physical CPU.
- the hypervisor 23 holds memory management information 102 that manages the correspondence between each LPAR 100 and the memory 22, and status management information 101 that manages information related to the settings and states of each LPAR 100 and the CPU 21. Next, the management information 101 and 102 will be described.
- FIG. 2 shows an example of the memory management information 102 that the hypervisor 23 has.
- the memory management information 102 manages the correspondence between the page address of the virtual memory provided to the OS running on the hypervisor 23 and the page address of the physical memory 22. That is, the hypervisor 23 manages the memory management information 102 for each LPAR 100.
- the memory management information 102 includes a virtual memory page start address 121, a physical memory page start address 122, a page size 123, a rewrite flag 124, and a transfer flag 125 as data items.
- a page is a unit of an area obtained by dividing a memory into a plurality of parts.
- a function of monitoring writing by the OS in units of pages is important.
- “Memory page” is a memory management unit handled by a memory management method generally called a paging method. That is, the memory area is handled not in units of 1 bit but in units of pages of a predetermined size (generally, 4 kBytes or 2 MBytes). For example, when data is updated even with one bit included in one page, the entire page is treated as being updated (rewritten).
- the virtual memory page start address 121 indicates the start address of a virtual memory page recognized by a certain OS.
- the physical memory page start address 122 indicates the start address of the physical memory page corresponding to the virtual memory page start address 121.
- the page size 123 indicates the size of the memory page starting from the virtual memory page start address 121 or the physical memory page start address.
- the rewrite flag 124 is a flag indicating whether or not rewriting has occurred in the memory page. That is, the rewrite flag 124 is a flag for managing, as a dirty page, a memory page that is rewritten due to a write request to the memory during live migration memory transfer. That is, the rewrite flag 124 is used to determine whether or not the corresponding memory page is a dirty page. When the rewrite flag 124 is “1”, it indicates that rewriting has occurred, and when the rewrite flag is “0”, it indicates that rewriting has not occurred. Details of the timing at which the rewrite flag 124 is updated will be described later. In order to manage the rewrite flag 124, it is necessary to always monitor access to the memory. For this reason, the read / write performance of the memory may be reduced as compared to when it is not monitored. Therefore, it is desirable that the rewrite flag 124 is not managed during normal operation (that is, when live migration is not being performed).
- a dirty page is a state in which the LPAR OS of the first computer 4-1 that is the migration source is operating, and the memory of the first computer 4-1 is the memory of the second computer 4-2 that is the migration destination.
- the live migration process to be transferred some writing by the OS or the like during data transfer to the second computer 4-2 as the migration destination among the plurality of pages of the memory of the first computer 4-1 as the migration source It is a page that has been rewritten by the above.
- the virtual memory used by the LPAR that is the migration source of live migration has page addresses 1 to 100.
- the page address is a virtual memory page address recognized by the OS on the LPAR, and may be different from the physical memory page address.
- the correspondence between the page addresses of the virtual memory and the physical memory is managed by the memory management information 102.
- the hypervisor 23 transfers the memory data from the page source 1 to the page destination computer one by one in order from the page address 1. At this time, if the Nth page (N is a positive integer) has already been rewritten, the transfer of the page is skipped.
- the hypervisor 23 confirms the state of the entire memory (page addresses 1 to 100). In the memory, there are a) a page that has been rewritten because it has been rewritten, and b) a page that has been rewritten after the transfer. In both cases a) and b), the rewrite flag 124 is “1”. The hypervisor 23 regards pages with the rewrite flag 124 set to “1” as dirty pages.
- the hypervisor 23 temporarily stops the migration source computer and proceeds to the final process of live migration in which all the remaining state and data at that time are transferred together. To do.
- a process of transferring the dirty page is performed. Thereafter, the rewriting of the memory by the operating computer and the data transfer of the dirty page by the hypervisor 23 are repeated until the dirty page amount becomes a predetermined threshold value or less.
- the transfer flag 125 is a flag indicating whether or not memory page data can be transferred (migration). When the transfer flag is “1”, transfer permission is indicated. When the transfer flag is “0”, the transfer is prohibited.
- the transfer flag 125 corresponding to the page is set to “0”.
- the transfer flag 125 corresponding to the page is set to “0”.
- the start address “ADDR_L0 (predetermined page address number)” in the virtual memory page is changed to the start address “ADDR_P0 (predetermined page address number)” in the physical memory page. Indicates correspondence.
- the size of this memory page is “MP0 (predetermined byte size)”. This memory page has been rewritten (rewrite flag 124 is “1”), and the data of this memory page is prohibited from being transferred (transfer flag 125 is “0”).
- FIG. 3 shows an example of the status management information 101 that the hypervisor 23 has.
- the status management information 101 manages execution status and setting information related to live migration processing of the LPAR 100. That is, the hypervisor 23 has status management information 101 for each LPAR 100.
- the status management information 101 includes information that can be changed depending on the execution state of the OS or the like on the LPAR 100 (hereinafter referred to as “status information”) and information that can be changed by a setting from the user (hereinafter referred to as “setting information”).
- the status management information 101 includes an item name 111, a value 112, and a setting flag 113 as data items.
- the setting flag 113 is “1”
- the user can set the value 112.
- the setting flag 112 is “0”
- the user cannot set the value 112.
- the status management information 101 includes, as an item name 111 related to live migration processing, for example, current time 115a, migration status 115b, executing command 115c, transferred data amount 115d, dirty page amount 115e, determination threshold 115f, transfer bandwidth It has an upper limit value 115g, a virtual CPU allocated resource upper limit value 115h, a DMA interrupt upper limit value 115i, and a timeout time 115j.
- the current time 115a is status information indicating the current time.
- the migration status 115b is status information indicating the current status of the live migration process.
- the migration status 115b includes information such as “not executed / executed / finally processed”, for example.
- the in-execution command 115c is status information indicating a command currently being executed in the live migration process.
- the transferred data amount 115d is status information indicating the total amount of data that has been transferred so far in the live migration process.
- the dirty page amount 115e is the amount of dirty pages currently remaining in the live migration process (in this embodiment, the number of dirty pages).
- the determination threshold value 115f is a setting value for determining the start of the final process of live migration.
- the final process of live migration refers to the remaining data that cannot be transferred while the OS or the like is running on the migration source LPAR by temporarily stopping the virtual CPU of the LPAR and transferring it to the migration destination LPAR. It is a process to transfer. That is, in the final process of live migration, the dirty pages that remain until the end are transferred together by temporarily stopping the virtual CPU of the LPAR. Here, the time during which the virtual CPU can be stopped without affecting the execution of the OS or the like on the LPAR is limited. Therefore, the final process of live migration must be started after the amount of dirty pages is sufficiently reduced.
- the determination threshold is used to determine whether the dirty page amount is small enough to start the final process of live migration.
- the transfer bandwidth upper limit value 115g is a setting value indicating the upper limit of the communication bandwidth that can be used for data transfer in the live migration process.
- the virtual CPU allocated resource upper limit value 115h is a setting value indicating the upper limit of the resource (physical CPU available time) allocated to the virtual CPU used by the migration source LPAR during live migration.
- the upper limit value 115h of the virtual CPU allocation resource is to temporarily reduce the processing performance of the OS or LPAR in order to suppress an increase in dirty pages during live migration, for example, when it is desired to complete live migration within a predetermined time. It is a value set to slow down and slow down.
- the DMA interrupt upper limit 115i is a setting value indicating the upper limit of the interrupt delay time from the DMA during the live migration process.
- the timeout time 115j is a setting value indicating the time until the timeout of the live migration process. The live migration process is forcibly canceled if it is not completed by this timeout time.
- Management computer 2 manages a plurality of computers 4.
- the management computer 2 includes, for example, a CPU 11, a memory 12, a storage 13, a communication IF 14, an input IF 15a, and an output IF 15b.
- the elements 11 to 15 are connected by a bus 16 capable of bidirectional data transmission. Has been.
- the CPU 11 executes a computer program developed in the memory 12 to realize various functions of the management computer 2 described later.
- the storage 13 holds computer programs and data.
- the computer program and data are expanded in the memory 12 as necessary and executed by the CPU 11.
- the communication IF 14 is connected to the communication network 41.
- the CPU 11 can transmit / receive data to / from each computer 4 through the communication IF 14.
- the input unit 3a is connected to the input IF 15a.
- the output unit 3b is connected to the output IF 15b.
- the CPU 11 outputs a screen display signal to the output unit 3b through the output IF 15b, and receives a signal related to a user operation from the input unit 3a through the input IF 15a.
- FIG. 4 shows the functional configuration of the management computer 2.
- the management computer 2 generates a GUI (Graphical User Interface) that allows the user to easily manage the plurality of computers 4.
- the management computer 2 receives an instruction from the user through the GUI, and transmits a command for realizing the instruction to each computer 4.
- GUI Graphic User Interface
- the management computer 2 has a screen input / output unit 201 and a screen generation unit 202.
- the screen input / output unit 201 outputs various screens (GUI) generated by the screen generation unit 202 described later to the output unit (display unit) 3b for display. Further, the screen input / output unit 201 selects a command group displayed as a GUI button or the like on the output unit 3b from the input unit 3a by a user operation, and the selection result is used as a user instruction to the screen generation unit 202 and / or migration. Tell the instruction unit 203. Based on the instruction transmitted from the screen input / output unit 201, the migration instruction unit 203 transmits a command related to live migration processing to each computer 4 and receives a response related to live migration processing from each computer 4.
- GUI screens
- the functions 201, 202, and 203 are realized, for example, by executing a corresponding computer program in the CPU 11. All or a part of the functions 201, 202, and 203 may be realized by dedicated hardware such as ASIC (Application Specific Integrated Circuit).
- ASIC Application Specific Integrated Circuit
- the screen generation unit 202 generates various screens related to live migration processing.
- the screen generation unit 202 generates, for example, a selection screen 211, a setting screen 212, a progress screen 213, a statistics screen 214, a memory map screen 215, and the like. Details of each screen will be described below.
- Fig. 5 shows an example of the selection screen for live migration processing.
- the user selects the LPAR 100 that is the target of the live migration process on the selection screen 211.
- the selection screen 211 includes a migration source selection area 301, a migration source LPAR information display area 303, a migration destination selection area 302, and a migration destination LPAR information display area 304.
- the selection screen 211 has a tuning button 305 and an execution button 306.
- the LPAR information of the selected first LPAR 307 is displayed in the migration source LPAR information display area 303.
- the chassis ID, HVM ID, LPAR number, and LPAR name of the first LPAR 307 are displayed.
- the LPAR information of the selected fourth LPAR 308 is displayed in the migration destination LPAR information display area 304.
- the user selects an unused LPAR as the migration destination.
- the tuning button 305 If the user selects the tuning button 305 before selecting the execution button 306, the screen transitions to the setting screen 212. Next, the setting screen 212 will be described.
- FIG. 6 shows an example of a setting screen 212 for live migration processing.
- the user can set setting values related to live migration processing on the setting screen 212.
- the setting screen 212 includes a timeout time setting area 311, a virtual CPU allocation resource upper limit setting area 312, a DMA interrupt upper limit setting area 313, a transfer bandwidth upper limit setting area 314, and a virtual CPU stop time setting. And a region 315.
- the setting screen 212 includes an OK button 317 and a cancel button 318.
- the maximum value of the time until the live migration process times out can be entered.
- the value input in the setting area 311 is set as the timeout time of the status management information 101.
- an upper limit (maximum value) of a resource (for example, a time during which a physical CPU is allocated) allocated to a virtual CPU that can use the migration source LPAR during live migration is displayed. Can be entered.
- the value input in the setting area 312 is set as the upper limit value 115h of the virtual CPU allocation resource in the status management information 101. In this way, during live migration execution, by deliberately setting an upper limit for the resources allocated to the virtual CPU and lowering the performance of the virtual CPU, the performance of the migration source LPAR is reduced, so that an increase in the amount of dirty pages can be suppressed. .
- an upper limit value of the interrupt delay time from the DMA at the time of live migration processing can be input.
- the value input to this setting area 313 is set to the DMA interrupt upper limit 115 i of the status management information 101.
- an upper limit value of a communication band used for data transfer of live migration processing can be input.
- the value input to the setting area 314 is set to the transfer bandwidth upper limit 115 g of the status management information 101.
- the virtual CPU stop time setting area 315 a time during which the virtual CPU can be stopped can be input.
- the value input to the setting area 315 is used to determine the start of the final process of live migration. That is, the value input to the setting area 315 is converted into a determination threshold value from the product of the upper limit value of the transfer bandwidth and set as the determination threshold value of the status management information 101.
- the values input in the setting areas 311 to 315 are set in the status management information 101.
- the OK button 317 is selected during the execution of the live migration process, the values input to the setting areas 311 to 315 are reflected in the live migration process being executed.
- Fig. 7 shows an example of a live migration progress screen.
- the execution button 306 is selected on the selection screen 211 shown in FIG. 5 and the live migration process is executed, the OS and virtual memory data of the first LPAR 307 are all transferred to the fourth LAPR virtual environment. . Furthermore, since it is “live” migration, the OS or the like of the first LPAR 307 continues to be executed even during transfer.
- the progress screen 213 displays progress information related to the live migration being executed.
- the progress screen 213 includes a migration source LPAR information display area 321, a migration destination LPAR information display area 322, a progress information display area 323, and a migration execution step display area 324.
- the progress screen 213 includes an extension button 325, a cancel button 326, a tuning button 327, and a statistical information button 328.
- the migration source LPAR information display area 321 LPAR information for specifying the migration source LAPR is displayed.
- the migration destination LPAR information display area 322 displays LPAR information for identifying the migration destination LPAR.
- the progress status display area 323 displays the progress status of live migration.
- the progress status for example, the start time 332 of the live migration process, the elapsed time 333 since the start of the live migration process, the expected remaining time until completion of the live migration process (estimated completion time) 335, the remaining until the timeout of the live migration process A time (timeout time) 334, a status 331 of a process currently being executed, and the like are displayed.
- the elapsed time 333 is obtained by calculating the difference between the time when the execution button 306 is selected and the current time of the management computer 2. Also, the remaining time 334 until timeout is obtained as a value obtained by subtracting the elapsed time 333 from the start of the live migration process from the timeout setting value (fixed value).
- the steps already executed in the live migration process, the steps being executed, the steps to be executed in the future, and the like are displayed in a list format.
- a step name, an execution state such as executed / executed / not executed, a time required for execution (execution time), a description of processing contents, and the like are displayed.
- the migration instruction unit 203 extends the timeout time of the live migration process.
- the cancel button 326 is selected, the migration instruction unit 203 cancels the live migration.
- the tuning button 327 is selected, the screen changes to the setting screen 212 shown in FIG. The value set on the setting screen 212 transitioned from the progress screen 213 is reflected in real time on the live migration process being executed.
- the statistical information button 328 is selected, a transition is made to a statistical screen 214 described later.
- the first example is a case where the user wants to confirm whether or not the live migration is completed according to the pre-design before the execution of the live migration or as estimated.
- the user estimates an approximate value of time required for memory transfer in live migration as “server memory amount / memory transfer speed”. Actually, because there is a dirty page, it may be longer than the value of the above formula. Therefore, the user gives an instruction to display the statistics screen 214 in order to check whether the live migration process is proceeding according to this estimate.
- the second example is a case where the user wants to pursue the cause when live migration does not end even after the expected end time, or to confirm the current situation for planning countermeasures.
- the user sees what the current status of live migration is (whether it takes more time to transfer because of dirty pages than expected, or the transfer rate or increase / decrease in dirty pages is an unexpected value) To display the statistics screen 214.
- the virtual computer system of this embodiment can know the detailed current status of live migration, so even if it is completed normally, a) a sufficient margin for the transfer rate and timeout time.
- the user may select the extension button 325 to extend the timeout time.
- the user may select the cancel button 326 to cancel the live migration process.
- the user may select the tuning button 327 and adjust resources used for the live migration process.
- the user may select the statistical information button 328 to confirm the statistical information and analyze the cause.
- FIG. 8 shows an example of the live migration statistics screen 214.
- the statistical screen 214 displays various statistical information related to live migration being executed.
- the statistics screen 214 includes a migration source LPAR information display area 341, a migration destination LPAR information display area 342, a statistics information display area 343, a transfer rate graph display area 344, and a dirty page amount graph display area 345. .
- the statistics screen 214 includes an extension button 346, a cancel button 347, a tuning button 348, a memory map button 349, and a progress status button 350. Since the extension button 346, the cancel button 347, and the tuning button 348 are the same as described above, the description thereof is omitted.
- the progress status button 350 is selected, the screen returns to the progress screen 213 shown in FIG.
- the memory map button 349 is selected, a memory map screen 215 described later is displayed.
- live migration the contents of the memory of the migration source computer are transferred to the memory of the migration destination computer.
- dirty pages must be considered. In other words, whether or not the live migration is completed within a predetermined time depends on whether or not the transfer of the dirty page is completed.
- the migration source LPAR information display area 341 the status management information 101 of the migration source LAPR being executed is displayed.
- the migration destination LPAR information display area 342 displays the status management information 101 of the migration destination LAPR being executed.
- the statistical information display area 343 displays statistical information related to the migration being executed in a table format. Next, the statistical information will be described.
- FIG. 9 is an example of a statistical information table displayed in the statistical information display area 343.
- the statistical information 103 displays time 131, transfer rate 132, average transfer rate 133, dirty page amount 134, dirty page amount increase / decrease 135, total transfer amount 136, and determination threshold value 137 as data items. To do.
- Time 131 is the time when the statistical information 103 is acquired from the computer 4.
- the transfer rate 132 indicates the transfer rate of transfer data from the migration source to the migration destination.
- the transfer rate 132 may be calculated based on the amount of data output from the communication IF 25 of the migration source computer 4, for example.
- a graph displayed in a transfer rate graph display area 344 described later is generated based on the value of the transfer rate 132.
- the average transfer rate 133 indicates an average of transfer rates 132 of transfer data at a predetermined time.
- Dirty page amount 134 indicates the amount of remaining dirty pages.
- a dirty page amount graph display area 345 to be described later is generated based on the value of the dirty page amount 134.
- the increase / decrease 135 in the dirty page amount indicates, for example, an increase / decrease value between the dirty page amount 104 related to the previous statistical information 103 and the dirty page amount 104 related to the current statistical information 103.
- the total transfer amount 136 indicates the amount of data that has been transferred so far.
- the determination threshold value 137 is a threshold value for determining whether or not to start the final process of live migration. This determination threshold value 137 corresponds to the determination threshold value of the status management information 101.
- FIG. 10 shows an example of a transfer rate graph 401 displayed in the transfer rate graph display area 344.
- the horizontal axis indicates time
- the vertical axis indicates transfer rate. That is, the user can know how the transfer rate of the transfer data changes with the elapse of time from the graph 401.
- the transfer rate temporarily decreases during a certain time period, if it is recovered after that, the user analyzes that there is no problem in the communication path between the migration source and the migration destination. can do. However, if the transfer rate becomes slow from a certain time and does not recover thereafter, the user can analyze that there may be a problem in the communication path between the migration source and the migration destination.
- FIG. 11 shows an example of a dirty page amount graph 402 displayed in the dirty page amount graph display area 345.
- the horizontal axis indicates time
- the vertical axis indicates dirty page amount. That is, the user can know how the dirty page amount changes with the elapse of time from the graph 402.
- the user can analyze that the migration process is smooth. However, if the dirty page amount does not decrease or the dirty page amount tends to increase from a certain time, the user can analyze that it may take time to complete the migration process.
- the cause can be determined to some extent by analyzing both the transfer rate graph 401 and the dirty page amount graph 402. Thereby, the user can take appropriate measures.
- the user can analyze that there may be a cause in the communication path between the migration source and the migration destination. Then, for example, it is possible to take measures such as stopping other applications that exclusively used the traffic on the communication path.
- the user can analyze that there may be a cause in the OS executed in the migration source LPAR. For example, it is possible to take measures such as stopping an application that frequently accesses the virtual memory on the LPAR OS.
- the user can select the tuning button 348, display the setting screen 212, and adjust resources required for live migration processing.
- the user can select the memory map button 349 to display a memory map screen 215 to be described later for further detailed analysis.
- a graph 402 showing change in dirty page amount is displayed together with a graph 401 showing change in transfer speed.
- a cause of the change in the transfer rate a cause other than the change in the dirty page amount, that is, a change in state information other than the dirty page amount can be considered. Therefore, as a graph for assisting the user in estimating the cause of the change in the transfer rate, instead of or in addition to the graph shown in FIG. A graph may be displayed.
- FIG. 12 shows an example of the memory map screen 215.
- the memory map screen 215 shows the state of the dirty page.
- the memory map screen 215 includes a previous button 361, a time display area 362, a next button 363, display selection buttons 364, 365, and 366, and a memory map display area 367.
- the time display area 362 the time corresponding to the memory map displayed in the memory map display area 367 is displayed.
- the previous button 361 is selected, if it exists, the previous memory map is displayed in the memory map display area 367.
- the next button 363 is pressed, if present, the memory map at the next time point is displayed in the memory map display area 367.
- the memory map is displayed in the memory map display area 367 by a display method corresponding to each.
- the memory map shown in the memory map display area 367 in FIG. 12 corresponds to a first display described later.
- generation and display of a memory map corresponding to the first display, the second display, the third display, and the fourth display will be described.
- FIG. 13 is an example of generation and display of a memory map related to the first display.
- the first display displays the state of the dirty page at a certain time as a graphical memory map.
- FIG. 13A shows the state of the dirty page at time T.
- Time T is the time when the state of the dirty page is checked.
- the state of this dirty page is managed by the memory management information 102 of the hypervisor 23 of the computer 4.
- a page with a value “1” is a dirty page
- a page with a value “0” is a page that is not a dirty page (hereinafter referred to as “clean page”). is there.
- FIG. 13A illustrates the rewrite flag 124 of the memory management information 102. Also in FIG. 13A, a page with a value “1” is a dirty page, and a page with a value “0” is a clean page.
- the state of the dirty page shown in FIG. 13A is displayed in the memory map display area 367 of FIG. 12 as a graphical memory map shown in FIG. 13B.
- Individual elements of the memory map shown in FIG. 13B may be referred to as map elements.
- the memory map has a plurality of map elements respectively corresponding to a plurality of pages constituting the memory. Each map element is, for example, a region (rectangular region in the illustrated example).
- the memory map according to the first display is, for example, a memory element corresponding to a dirty page (that is, a page having a value “1”) with a shaded memory element, and a clean page (that is, a page having a value “0”). Displayed as binary gradation with no multiplication.
- the user can confirm at a glance how many dirty pages remain in which page of the memory at a certain time by the memory map related to the first display.
- FIG. 14 is an example of generation and display of a memory map corresponding to the second display.
- the second display displays the frequency state of dirty pages in a certain time zone as a graphical memory map.
- FIG. 14A shows the state of the dirty page at times T3, T2, and T1 (T3> T2> T1).
- Times T3, T2, and T1 are times when the state of the dirty page is checked.
- the state of each dirty page is managed by the hypervisor 23 of the computer 4.
- a page with a value “1” is a dirty page, and a page with a value “0” is not a dirty page.
- FIG. 14 (B) is calculated by summing up the values (“0” or “1”) of each page at times T3, T2, and T1. This is called a dirty page frequency state. For example, if a certain page is “1” at any of the times T3, T2, and T1, the page is set to “3”. Similarly, when a certain page is “0” at any of the times T3, T2, and T1, the page is set to “0”. That is, in the dirty page frequency state, a page with a large value is updated more frequently.
- the frequency state of the dirty page is calculated by using the states of a plurality of dirty pages acquired by the management computer 2 from the migration source computer 4 at different times.
- the frequency state of the dirty page shown in FIG. 14 (B) is displayed in the memory map display area 367 of FIG. 12 as a graphical memory map as shown in FIG. 14 (C).
- the value “0” is not shaded
- the value “1” is lightly shaded
- the value “2” is darkly shaded.
- the portion with the value “3” is filled and displayed in multi-value gradation.
- the user can confirm at a glance which page is updated and how frequently in a certain time zone by the memory map related to the second display.
- FIG. 15 is an example of generation and display of a memory map corresponding to the third display.
- the third display displays the outline state of the dirty page at a certain time as a graphical memory map.
- FIG. 15A shows the state of the dirty page at time T.
- Time T is the time when the state of the dirty page is checked.
- a page with a value “1” is a dirty page
- a page with a value “0” is not a dirty page.
- Fig. 15 (B) is calculated by adding up the values of three pages. This is the outline state of the dirty page. For example, if the values of the three pages from the top of the memory are “1”, “1”, and “0”, respectively, they are added together to generate one page having “2”. Thereafter, this is repeated every three pages to generate a summary state of the dirty page as shown in FIG.
- the outline state of this dirty page is managed by the hypervisor 23 of the computer 4.
- the outline state of the dirty page shown in FIG. 15B is displayed in the memory map display area 367 of FIG. 12 as a graphical memory map as shown in FIG.
- the value “0” is not shaded
- the value “1” is lightly shaded
- the value “2” is dark shaded.
- the portion with the value “3” is filled and displayed in multi-value gradation.
- the amount of data managed by the hypervisor 23 can be reduced by converting the state of the dirty page shown in FIG. 15A to the outline state of the dirty page shown in FIG. Furthermore, the management computer 2 can reduce the amount of communication data between the management computer 2 and the computer by acquiring the outline state of the memory map from the computer 4.
- FIG. 16 is an example of generation and display of a memory map corresponding to the fourth display.
- the fourth display displays the number of memory updates in a certain time zone as a graphical memory map.
- FIG. 16A shows the number of times the memory is updated from a certain time to time T.
- the number of times this memory is updated is managed by the hypervisor 23 of the computer 4.
- the value of each page indicates the number of times the page has been updated. For example, a page with a value “3” indicates that the page has been updated three times during that time period.
- the memory update count shown in FIG. 16A is displayed in the memory map display area 367 of FIG. 12 as a graphical memory map as shown in FIG.
- the portion where the number of updates is 0 is not shaded
- the portion where the number of updates is 1 is thinly shaded
- the portion where the number of updates is 2 is shaded darkly
- the portion where the number of updates is 3 or more is filled and displayed in multi-value gradation.
- the user can confirm at a glance how many pages are updated in a certain time zone by the memory map related to the fourth display.
- FIG. 17 shows a sequence chart of the live migration process.
- processing among the management computer 2, the first computer 4-1, and the second computer 4-2 will be described with reference to FIG.
- the screen input / output unit 201 of the management computer 2 outputs the selection screen 211 to the output unit 3b (S101).
- the user selects the first LPAR 307 as the migration source, the fourth LPAR 308 as the migration destination, and the execute button 306 through the input unit 3a.
- the LPAR selection result is transmitted to the management computer 2 (S102).
- the migration instruction unit 203 of the management computer 2 requests the migration source first computer 4-1 and the migration destination second computer 4-2 to start live migration processing (S103).
- the first computer 4-1 and the second computer 4-2 notify the management computer 2 of the migration progress state (for example, the current execution step and state) as appropriate (for example, periodically) (S104).
- the hypervisor 23 of the first computer 4-1 transmits the configuration information of the migration source first LPAR 307 to the second computer 4-2 (S105).
- the hypervisor 23 of the second computer 4-2 defines the LPAR as the migration destination based on the configuration information received from the first computer 4-1.
- the hypervisor 23 of the first computer 4-1 executes memory data transfer with the second computer 4-2 (S 106). Details of this processing will be described later.
- the hypervisor 23 of the management computer 2 requests information on the transfer state from the first computer 4-1, as necessary (S107). In response to this request, the hypervisor 23 of the first computer 4-1 transmits information related to the transfer state (S108).
- the screen generation unit 202 of the management computer 2 generates a progress screen 213 and a statistics screen 214 using the acquired information regarding the transfer state, and outputs them to the output unit 3b (S109).
- the hypervisor 23 of the first computer 4-1 When the hypervisor 23 of the first computer 4-1 completes the memory data transfer process and starts the final migration process, the hypervisor 23 of the migration source LPAR is stopped (S110).
- the hypervisor 23 of the first computer 4-1 acquires the device status of the migration source LPAR and transmits it to the migration destination LPAR of the second computer 4-2 (S 111).
- the hypervisor 23 of the second computer 4-2 reflects the device status received from the first computer 4-1 in the migration destination LPAR (S112).
- the hypervisor 23 of the first computer 4-1 transfers the remaining dirty pages to the second computer 4-2 (S112).
- the hypervisor 23 of the second computer 4-2 reflects the dirty page received from the first computer 4-1 in the memory of the migration destination LPAR (S113).
- the hypervisor 23 of the second computer 4-2 starts the virtual CPU of the migration destination LPAR and starts executing the migration destination LPAR (S115).
- the hypervisor 23 of the first computer 4-1 deletes the migration source LPAR (S116).
- the hypervisor 23 of the first computer 4-1 and the second computer 4-2 notifies the management computer 2 that the live migration processing is completed (S117).
- the screen generator 202 of the management computer 2 Upon receiving this completion notification, the screen generator 202 of the management computer 2 generates a live migration process completion screen and outputs it to the output unit 3b (S118).
- FIG. 18 shows a flowchart of the memory writing process of the first computer 4-1.
- the hypervisor 23 of the first computer 4-1 confirms the page address of the data write destination (S201).
- the hypervisor 23 of the first computer 4-1 sets the rewrite flag of the memory management information 102 corresponding to the page address of the write destination to “1” and the transfer flag to “0” (S 202). That is, the hypervisor 23 of the first computer 4-1 registers that the memory page has been rewritten, and locks the data transfer of the memory page currently being rewritten. Then, the hypervisor 23 of the first computer 4-1 writes data to the memory page corresponding to the page address of the write destination (S 203).
- FIG. 19 shows a modification of the flowchart of the memory writing process of the first computer 4-1. This flowchart is a modification of the process shown in FIG.
- the hypervisor 23 of the first computer 4-1 confirms the page address of the data write destination (S301).
- the hypervisor 23 of the first computer 4-1 adds “1” to the rewrite flag of the memory management information 102 corresponding to the write destination address, and sets the transfer flag to “0” (S 202). That is, the value of the rewrite flag is added every time rewriting is performed.
- the first computer 4-1 writes data to the memory page corresponding to the write destination address (S403).
- FIG. 20 shows a flowchart of the memory data transfer process of the first computer 4-1. This flowchart is the process of the first computer 4-1 in the memory data transfer process (S 106) of the sequence chart shown in FIG.
- the hypervisor 23 of the first computer 4-1 sets the transfer flag of the memory management information 102 to “1” (S 401). That is, the hypervisor 23 of the first computer 4-1 releases the data transfer lock of the transfer target memory.
- the hypervisor 23 of the first computer 4-1 determines whether or not it is the first transfer process (S402). That is, it is determined that the process is not the process after recurring from step S405.
- the hypervisor 23 of the first computer 4-1 proceeds to the process of step S404.
- the hypervisor 23 of the first computer 4-1 sets the rewrite flag of the memory management information 102 to “0” (S403).
- the hypervisor 23 of the first computer 4-1 executes clean page data transfer processing (S ⁇ b> 404). Details of this processing will be described later.
- the hypervisor 23 of the first computer 4-1 determines whether or not the “dirty page amount is equal to or less than a threshold value” (S 405).
- This threshold value is a determination threshold value in the status management information 101 of FIG. If the “dirty page amount is equal to or less than the threshold” (S405: YES), the hypervisor 23 of the first computer 4-1 ends the process and proceeds to the final process of live migration. If “dirty page amount> threshold” (S405: NO), the hypervisor 23 of the first computer 4-1 returns to the process of step S401.
- FIG. 21 shows a flowchart of data transfer processing other than the dirty page of the first computer 4-1. This process corresponds to the data transfer process (S404) other than the dirty page in the flowchart shown in FIG.
- the hypervisor 23 of the first computer 4-1 initializes the address (S501).
- the hypervisor 23 of the first computer 4-1 reads the memory management information 102 (S 502).
- the hypervisor 23 of the first computer 4-1 determines whether or not it is the first transfer (S 503). First, the case of the first transfer (S503: YES) will be described.
- the hypervisor 23 of the first computer 4-1 determines whether the rewrite flag is “0” and the transfer flag is “1” (S 504). That is, the hypervisor 23 of the first computer 4-1 determines whether or not rewriting has occurred and transfer is permitted.
- step S504 If the determination in step S504 is negative (S504: NO), the hypervisor 23 of the first computer 4-1 proceeds directly to the process in step S510. That is, the hypervisor 23 of the first computer 4-1 does not perform data transfer.
- step S504 If the determination in step S504 is positive (S504: YES), the hypervisor 23 of the first computer 4-1 transfers the memory page data to the second computer 4-2 (S505), and proceeds to the process of step S510. .
- the hypervisor 23 of the first computer 4-1 determines whether the rewrite flag is “1” and the transfer flag is “1” (S 506). That is, the hypervisor 23 of the first computer 4-1 determines whether or not the data is rewritten and transfer is permitted.
- step S506 If the determination in step S506 is negative (S506: NO), the hypervisor 23 of the first computer 4-1 proceeds directly to the process in step S510. That is, the hypervisor 23 of the first computer 4-1 does not perform data transfer.
- step S506 If the determination in step S506 is positive (S506: YES), the hypervisor 23 of the first computer 4-1 transfers the data of the memory page to the second computer 4-2 (S507). Then, since the hypervisor 23 of the first computer 4-1 has completed the transfer of the rewritten data, the rewrite flag of the memory management information 102 is set to “0”, and the process proceeds to step S 510.
- step S510 the hypervisor 23 of the first computer 4-1 determines whether there is still a next memory page to be transferred (S510). If there is still a next memory page to be transferred (S510: YES), the hypervisor 23 of the first computer 4-1 sets the address of the next page (S511) and returns to the process of step S502. When there is no next memory page to be transferred (S510: NO), the hypervisor 23 of the first computer 4-1 ends the process and proceeds to the processes after step S404 shown in FIG.
- FIG. 22 shows a flowchart of the generation process of the progress screen 213 and the statistics screen 214 in the management computer 2.
- the screen generator 202 of the management computer 2 acquires progress information from the first computer 4-1 (S 601). This progress information holds the status management information 101 and the memory management information 102 of the first computer 4-1 at the time when this acquisition is executed.
- the screen generation unit 202 of the management computer 2 determines whether the previous progress information exists (S602).
- step S605 If there is no previous progress information (S602: NO), the screen generator 202 of the management computer 2 assumes that there is no difference or the like (S604), and proceeds to the process of step S605.
- the screen generation unit 202 of the management computer 2 calculates the difference between the previous progress information and the currently acquired progress information (S603), step The process proceeds to S605.
- the screen generator 202 of the management computer 2 generates a statistical information table, graph, memory map, and the like based on the difference calculated in step S603 (S605). Hereinafter, this generation will be further described.
- the status management information 101 included in the progress information has a transferred data amount 115d that is the total amount of data transferred up to that point (see FIG. 3). Therefore, the screen generation unit 202 calculates the difference between the previous transferred data amount 115d and the current transferred data amount 115d, thereby obtaining the data transfer amount in the time zone from the previous time to the current time. be able to.
- the screen generation unit 202 can calculate the data transfer rate in the time zone by calculating “data transfer amount / time zone”.
- the screen generation unit 202 generates a table and a graph 401 based on the data transfer amount and the data transfer speed.
- the screen generation unit 202 calculates an increase / decrease amount of the dirty page in the time zone from the previous time to the current time by calculating a difference between the previous dirty page amount 115e and the current dirty page amount 115e. be able to. Then, the screen generation unit 202 can calculate the increase / decrease speed of the dirty page amount in the time zone by calculating “the increase / decrease amount of the dirty page / time zone”. The screen generation unit 202 generates a table and a graph 402 based on the dirty page increase / decrease amount and the dirty page increase / decrease speed.
- the memory management information 102 included in the progress information has the value of the rewrite flag 124 of each page at that time (that is, the state of the dirty page).
- the screen generation unit 202 uses the value of the rewrite flag 124 to generate a memory map at that time. Further, the screen generation unit 202 may generate a memory map as shown in FIG. 14 or 16 using the past memory management information 102 and the current memory management information 102. Hereinafter, a method for generating a memory map from the memory management information 102 will be further described.
- FIG. 23 is an explanatory diagram of a method for generating a memory map from the memory management information 102.
- the screen generation unit 202 of the management computer 2 extracts the value of the rewrite flag 124 in order from the top of the page address from the memory management information 102 included in the progress information, and forms a one-dimensional data string (FIG. 23A). reference). Then, the screen generation unit 202 wraps the one-dimensional data string by a predetermined number (for example, 100) and converts it into data having two-dimensional coordinates (FIG. 23B).
- a predetermined number for example, 100
- the screen generation unit 202 generates, for example, an image in which the data having the value “0” is “no color” and the data having the value “1” is “colored” with respect to the data having the two-dimensional coordinates. Is displayed on the output unit 3b (FIG. 23C). Thereby, the rewrite situation in the memory at a certain point in time can be graphically expressed.
- the description returns to FIG.
- the screen generation unit 202 of the management computer 2 calculates the expected completion time of the live migration process based on the average transfer rate related to the data transfer (S607).
- the screen generation unit 202 of the management computer 2 determines whether “estimated completion time> timeout time” (S607).
- step S607 If “expected completion time ⁇ timeout time” (S607: NO), the screen generation unit 202 of the management computer 2 proceeds to the process of step S609 as it is.
- “expected completion time> timeout time” S607: YES
- the screen generation unit 202 of the management computer 2 generates a warning screen (S608), and proceeds to the process of step S609.
- step S609 the screen generator 202 of the management computer 2 generates a progress screen 213 or a statistics screen 214 and outputs it to the output unit 3b (S609). If a warning screen is generated in step S608, a screen including the warning screen is generated.
- a clean page is a page that stores data that has been migrated in live migration processing and has not been updated from the virtual machine after migration. good.
- other types of pages for example, free pages in which no data is stored may be managed.
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Abstract
Description
仮想CPU割当リソースの上限値115hは、ライブマイグレーション実行中において、マイグレーション元のLPARが使用する仮想CPUに割り当てられるリソース(物理CPUの利用可能時間)の上限を示す設定値である。つまり、仮想CPU割当リソースの上限値115hとは、例えばライブマイグレーションを所定時間内で完了させたい場合に、ライブマイグレーション中のダーティページの増加を抑えることを目的として、OSあるいはLPARの処理性能を一時的に落として遅くさせるために設定される値である。
Claims (15)
- ハイパバイザにより少なくとも1つ以上の仮想計算機が稼動する複数の計算機と、
前記複数の計算機を管理する管理計算機と、を備え、
前記管理計算機は、
操作者の操作入力を受ける入力部と、
第1計算機上で第1仮想計算機を稼動した状態で、前記第1仮想計算機を前記第1計算機から第2計算機に移行するライブマイグレーションに関する進捗情報を前記第1計算機から取得し、その取得した前記進捗情報に基づき前記ライブマイグレーションに関する統計情報を生成し、前記統計情報を含む統計画面を生成する画面生成部と、
前記統計画面を表示する出力部と、
を備える仮想計算機システム。
- 前記ハイパバイザは、
前記計算機が有する演算部及びメモリを論理的に分割した仮想演算部及び仮想メモリを、前記計算機で動作する仮想計算機に割り当て、
前記メモリと前記仮想メモリとの対応関係を前記仮想計算機毎に管理するメモリ管理情報を有し、
前記第1計算機のハイパバイザは、前記第1仮想計算機に割り当てられた前記第1計算機のメモリが有する情報を、前記第2計算機のメモリに転送する
請求項1記載の仮想計算機システム。
- 前記計算機のメモリは、前記メモリを分割した領域に対応するメモリページを複数有し、
前記メモリ管理情報は、前記メモリのメモリページと前記仮想メモリのメモリページとの対応関係及び前記メモリページの書き換えの有無を管理し、
前記画面生成部は、前記管理計算機の出力部が前記統計画面としてメモリマップを表示する場合、
前記第1計算機のハイパバイザから、前記第1仮想計算機のメモリ管理情報を取得し、
前記取得した第1仮想計算機のメモリ管理情報を参照して、書き換えのあるメモリページと書き換えの無いメモリページとを異なる表示形式としたメモリマップ画面を生成し、
前記メモリマップ画面を前記出力部に出力する
請求項2記載の仮想計算機システム。
- 前記書き換えのあるメモリページは、前記メモリ管理情報においてメモリページ書き換え有りの書き換えフラグが付与されたダーティページであり、
前記書き換えの無いメモリページは、前記メモリ管理情報においてメモリページ書き換え無しの書き換えフラグが付与されたクリーンページであり、
前記画面生成部は、前記取得したメモリ管理情報における書き換えフラグを参照して、前記メモリページ毎の書き換えフラグに基づき、前記メモリマップ画面を生成する
請求項3記載の仮想計算機システム。
- 前記メモリ管理情報は、前記ライブマイグレーションにおける前記メモリページの転送の可否を表す転送フラグを有する
請求項4記載の仮想計算機システム。
- 前記第1計算機のハイパバイザは、
前記ライブマイグレーションの実行状況に関する情報を前記仮想計算機毎に管理するステータス管理情報を更に有し、
前記画面生成部は、
前記第1計算機の前記ハイパバイザから各時点で前記ステータス管理情報を取得し、各時点で取得された前記ステータス管理情報を基に、前記ライブマイグレーション処理における所定種類の値の変化を表すグラフを有するグラフ画面を生成し、
前記出力部が、前記グラフ画面を表示する、
請求項4記載の仮想計算機システム。
- 前記ステータス管理情報は、前記ダーティページの合計量を有し、
前記所定種類の値は、前記ダーティページの合計量である
請求項6記載の仮想計算機システム。
- 前記ステータス管理情報は、前記第1計算機から前記第2計算機にマイグレーションが完了したメモリページの総量を有し、
前記画面生成部は、各時点の前記メモリページの総量に基づいてメモリページの転送速度を算出し、
前記所定種類の値は、前記メモリページの転送速度である
請求項7に記載の仮想計算機システム。
- 前記第1計算機のハイパバイザは、所定のタイムアウト時間を経過すると、前記ライブマイグレーション処理を中止し、
前記画面生成部は、
前記ダーティページの合計量及び前記メモリページの転送速度の時間的変化から前記ライブマイグレーション処理が完了するまでの残り時間を算出し、当該残り時間が、所定のタイムアウト時間までの残り時間よりも長い場合に、前記ライブマイグレーション処理が完了しない旨を示す警告画面を生成し、
前記出力部が、前記警告画面を表示する、
請求項8記載の仮想計算機システム。
- 前記画面生成部は、前記ライブマイグレーション処理の中止の要求を受け付ける中止受付画面を生成し、
前記出力部が、前記警告画面と共に前記中止受付画面を表示する、
請求項9記載の仮想計算機システム。
- 前記画面生成部は、
前記タイムアウト時間の延長の要求を受け付ける延長受付画面を生成し、
前記出力部が、前記警告画面と共に前記延長受付画面を表示する、
請求項10記載の仮想計算機システム。
- 前記第1計算機のハイパバイザは、前記ライブマイグレーション処理に関する設定情報を有し、当該設定情報に基づいて前記ライブマイグレーション処理を実行し、
前記画面生成部は、前記設定情報に関するパラメタの入力を受け付けるパラメタ入力画面を生成し、当該パラメタ入力画面において入力されたパラメタを前記ハイパバイザの有する前記設定情報に反映させる
請求項2記載の仮想計算機システム。
- 前記パラメタ入力画面は、前記ライブマイグレーション処理のタイムアウト時間の入力領域を有し、当該入力領域に入力された前記タイムアウト時間は、前記設定情報に反映され、
前記第1計算機のハイパバイザは、前記設定情報に反映された前記タイムアウト時間が経過すると、前記ライブマイグレーション処理を中止する
請求項12記載の仮想計算機システム。
- ハイパバイザにより少なくとも1つ以上の仮想計算機が稼動する複数の計算機を管理する管理計算機であって、
操作者の操作入力を受ける入力部と、
第1計算機上で第1仮想計算機を稼動した状態で、前記第1仮想計算機を前記第1計算機から第2計算機に移行するライブマイグレーションに関する進捗情報を前記第1計算機から取得し、その取得した前記進捗情報に基づき前記ライブマイグレーションに関する統計情報を生成し、前記統計情報を含む統計画面を生成する画面生成部と、
前記統計画面を表示する出力部と、
を備える管理計算機。
- ハイパバイザにより少なくとも1つ以上の仮想計算機が稼動する複数の計算機を管理する計算機管理方法であって、
操作者の操作入力を受け、
第1計算機上で第1仮想計算機を稼動した状態で、前記第1仮想計算機を前記第1計算機から第2計算機に移行するライブマイグレーションに関する進捗情報を前記第1計算機から取得し、
その取得した前記進捗情報に基づき前記ライブマイグレーションに関する統計情報を生成し、
前記統計情報を含む統計画面を生成し、
前記統計画面を表示する、
計算機管理方法。
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