WO2014013863A1 - 下部電極、及びプラズマ処理装置 - Google Patents
下部電極、及びプラズマ処理装置 Download PDFInfo
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- WO2014013863A1 WO2014013863A1 PCT/JP2013/068166 JP2013068166W WO2014013863A1 WO 2014013863 A1 WO2014013863 A1 WO 2014013863A1 JP 2013068166 W JP2013068166 W JP 2013068166W WO 2014013863 A1 WO2014013863 A1 WO 2014013863A1
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- Prior art keywords
- insulating layer
- lower electrode
- substrate
- electrostatic chuck
- focus ring
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- 238000009832 plasma treatment Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 claims abstract description 52
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims abstract description 46
- 229920002994 synthetic fiber Polymers 0.000 claims abstract description 22
- 239000011810 insulating material Substances 0.000 claims abstract description 9
- 238000012545 processing Methods 0.000 claims description 62
- 239000000463 material Substances 0.000 claims description 43
- 239000004570 mortar (masonry) Substances 0.000 claims description 4
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 abstract description 23
- 239000010408 film Substances 0.000 description 39
- 239000007789 gas Substances 0.000 description 31
- 238000000034 method Methods 0.000 description 10
- 238000009792 diffusion process Methods 0.000 description 7
- 238000001020 plasma etching Methods 0.000 description 7
- 239000003507 refrigerant Substances 0.000 description 7
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 6
- 229910010413 TiO 2 Inorganic materials 0.000 description 5
- 239000004020 conductor Substances 0.000 description 5
- 230000010287 polarization Effects 0.000 description 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 239000002245 particle Substances 0.000 description 4
- 239000007921 spray Substances 0.000 description 4
- 238000003860 storage Methods 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- 229910052719 titanium Inorganic materials 0.000 description 4
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000013459 approach Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000000427 thin-film deposition Methods 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 239000006227 byproduct Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000000498 cooling water Substances 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32532—Electrodes
- H01J37/32559—Protection means, e.g. coatings
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C4/00—Coating by spraying the coating material in the molten state, e.g. by flame, plasma or electric discharge
- C23C4/04—Coating by spraying the coating material in the molten state, e.g. by flame, plasma or electric discharge characterised by the coating material
- C23C4/10—Oxides, borides, carbides, nitrides or silicides; Mixtures thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32532—Electrodes
- H01J37/3255—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32532—Electrodes
- H01J37/32568—Relative arrangement or disposition of electrodes; moving means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32623—Mechanical discharge control means
- H01J37/32642—Focus rings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32715—Workpiece holder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
- H01L21/6833—Details of electrostatic chucks
Definitions
- Various aspects and embodiments of the present invention relate to a lower electrode and a plasma processing apparatus.
- plasma processing apparatuses that perform plasma processing for the purpose of thin film deposition or etching are widely used.
- the plasma processing apparatus include a plasma CVD (Chemical Vapor Deposition) apparatus that performs a thin film deposition process, a plasma etching apparatus that performs an etching process, and the like.
- the plasma processing apparatus is, for example, disposed in a processing container that defines a plasma processing space, a lower electrode that is provided in the processing container and on which a substrate to be processed is placed, and is opposed to the lower electrode through the plasma processing space.
- the upper electrode is provided.
- the lower electrode of the plasma processing apparatus has a conductive base material to which high-frequency power is applied, an insulating layer provided on the upper surface of the base material to cover the electrode, and electrostatically attracts the substrate to be processed to the insulating layer
- An electrostatic chuck and a focus ring disposed on the upper surface of the insulating layer of the electrostatic chuck so as to surround the periphery of the substrate to be processed are provided.
- a relatively large potential difference occurs between the focus ring and the substrate to be processed and the base material of the lower electrode, and this potential difference causes the base material of the substrate to be processed and the lower electrode or Electric discharge (arcing) may occur between the surrounding structures.
- arcing Electric discharge
- a discharge occurs between the substrate to be processed and the base material or peripheral structure of the lower electrode, the substrate to be processed and the chip on the substrate to be processed are damaged.
- a resistance pin formed of titania is embedded in the insulating layer of the electrostatic chuck, and the focus ring is interposed via the resistance pin. Is electrically connected to the base of the lower electrode.
- the resistance pin formed of titania is embedded in the insulating layer of the electrostatic chuck, the occurrence of discharge can be prevented, but the local impedance of the electrostatic pin between the insulating layer of the electrostatic chuck and the resistance pin can be prevented. Since the deviation occurs, it becomes difficult to maintain the uniformity of the surface to be processed of the substrate to be processed.
- Patent Document 2 a conductive sprayed film formed using a synthetic material in which titania is blended as an insulating material is provided on the entire surface of an insulating layer of an electrostatic chuck, and a substrate to be processed is electrostatically adsorbed on the sprayed film.
- the substrate to be processed and the base material of the lower electrode are electrically connected via the sprayed film containing titania, the potential difference between the substrate to be processed and the base material of the lower electrode can be reduced. As a result, the occurrence of discharge can be prevented.
- the substrate to be processed is electrostatically adsorbed on the sprayed film containing titania
- the discharge can be prevented
- the substrate to be processed is contaminated with titanium particles. That is, in the conventional technique, the substrate to be processed is directly adhered to the sprayed film containing titania, and therefore, the substrate to be processed may be contaminated by titanium particles dissociated from titania during the plasma processing.
- the lower electrode includes a conductive substrate, an electrostatic chuck, a focus ring, and a conductive sprayed film.
- High frequency power is applied to the conductive substrate.
- the electrostatic chuck has an insulating layer that is provided on the upper surface of the base material and covers the electrode, and electrostatically attracts a substrate to be processed, which is a processing target of plasma processing, to the insulating layer.
- the focus ring is disposed on the upper surface of the insulating layer of the electrostatic chuck so as to surround the periphery of the substrate to be processed.
- the conductive sprayed coating is disposed on a portion of the insulating layer of the electrostatic chuck sandwiched between the focus ring and the base material, and a synthetic material in which titania is blended in a predetermined weight ratio with the insulating material. It is formed using.
- a lower electrode and a plasma processing apparatus that can prevent a substrate from being contaminated by titanium particles while preventing discharge from being generated are realized.
- FIG. 1 is a longitudinal sectional view showing an outline of a configuration of a plasma processing apparatus according to an embodiment.
- FIG. 2 is a longitudinal sectional view schematically showing the configuration of the lower electrode according to the embodiment.
- FIG. 3 is a view for explaining the weight ratio of the synthetic material forming the sprayed film.
- FIG. 4 is a longitudinal sectional view showing a modification of the lower electrode according to the embodiment.
- FIG. 1 is a longitudinal sectional view showing an outline of a configuration of a plasma processing apparatus according to an embodiment.
- the plasma processing apparatus has a processing chamber (processing container) 1 that is airtight and electrically grounded.
- the processing chamber 1 is cylindrical and is made of, for example, aluminum, and defines a plasma processing space for performing plasma processing.
- a lower electrode 2 on which a semiconductor wafer W as a substrate to be processed is placed is provided in the processing chamber 1.
- the base 2a of the lower electrode 2 is made of a conductive metal such as aluminum.
- the lower electrode 2 is supported by a conductor support 4 via an insulating plate 3.
- a cylindrical inner wall member 3 a made of, for example, quartz is provided so as to surround the lower electrode 2 and the support base 4.
- a first RF power source 10a is connected to the base 2a of the lower electrode 2 via a first matching unit 11a, and a second RF power source 10b is connected via a second matching unit 11b.
- the first RF power supply 10a is for generating plasma, and high-frequency power of a predetermined frequency (27 MHz or more, for example, 40 MHz) is supplied from the first RF power supply 10a to the base material 2a of the lower electrode 2. It has become.
- the second RF power supply 10b is for ion attraction (bias), and the second RF power supply 10b has a predetermined frequency (13.56 MHz or less, for example, 3.5 MHz or lower) than that of the first RF power supply 10a. 2 MHz) is supplied to the base material 2a of the lower electrode 2.
- the detailed configuration of the lower electrode 2 will be described later.
- An upper electrode 16 is provided above the lower electrode 2 so as to face the lower electrode 2 through the plasma processing space of the processing chamber 1.
- the upper electrode 16 and the lower electrode 2 function as a pair of electrodes.
- a space between the upper electrode 16 and the lower electrode 2 becomes a plasma processing space for generating plasma.
- a refrigerant flow path 4a is formed inside the support base 4, and a refrigerant inlet pipe 4b and a refrigerant outlet pipe 4c are connected to the refrigerant flow path 4a.
- the support 4 and the lower electrode 2 can be controlled to a predetermined temperature by circulating an appropriate refrigerant such as cooling water through the refrigerant flow path 4a.
- a backside gas supply pipe 30 for supplying a cooling heat transfer gas (backside gas) such as helium gas is provided on the back side of the semiconductor wafer W so as to penetrate the lower electrode 2 and the like.
- the backside gas supply pipe 30 is connected to a backside gas supply source (not shown).
- the upper electrode 16 is provided on the top wall portion of the processing chamber 1.
- the upper electrode 16 includes a main body portion 16 a and an upper top plate 16 b that forms an electrode plate, and is supported on the upper portion of the processing chamber 1 via an insulating member 45.
- the main body portion 16a is made of a conductive material, for example, aluminum whose surface is anodized, and is configured such that the upper top plate 16b can be detachably supported at the lower portion thereof.
- a gas diffusion chamber 16c is provided inside the main body 16a, and a number of gas flow holes 16d are formed at the bottom of the main body 16a so as to be positioned below the gas diffusion chamber 16c. Further, the upper top plate 16b is provided with a gas introduction hole 16e so as to penetrate the upper top plate 16b in the thickness direction so as to overlap the above-described gas flow hole 16d. With such a configuration, the processing gas supplied to the gas diffusion chamber 16c is dispersed and supplied into the processing chamber 1 through the gas flow hole 16d and the gas introduction hole 16e. .
- the main body 16a and the like are provided with a pipe (not shown) for circulating the refrigerant, so that the upper electrode 16 can be cooled to a desired temperature during the plasma etching process.
- the main body portion 16a is formed with a gas introduction port 16f for introducing a processing gas into the gas diffusion chamber 16c.
- a gas supply pipe 15a is connected to the gas introduction port 16f, and a processing gas supply source 15 for supplying a processing gas for etching is connected to the other end of the gas supply pipe 15a.
- the gas supply pipe 15a is provided with a mass flow controller (MFC) 15b and an on-off valve V1 in order from the upstream side.
- MFC mass flow controller
- V1 on-off valve
- a variable DC power source 52 is electrically connected to the upper electrode 16 via a low pass filter (LPF) 51.
- the variable DC power supply 52 can be turned on / off by an on / off switch 53.
- the current / voltage of the variable DC power supply 52 and the on / off of the on / off switch 53 are controlled by a controller 60 described later.
- the controller 60 turns on as necessary.
- the off switch 53 is turned on, and a predetermined DC voltage is applied to the upper electrode 16.
- a cylindrical ground conductor 1 a is provided so as to extend from the side wall of the processing chamber 1 to a position higher than the height position of the upper electrode 16.
- the cylindrical ground conductor 1a has a top wall at the top.
- An exhaust port 71 is formed at the bottom of the processing chamber 1, and an exhaust device 73 is connected to the exhaust port 71 via an exhaust pipe 72.
- the exhaust device 73 has a vacuum pump, and the inside of the processing chamber 1 can be depressurized to a predetermined degree of vacuum by operating the vacuum pump.
- a loading / unloading port 74 for the semiconductor wafer W is provided on the side wall of the processing chamber 1, and a gate valve 75 for opening and closing the loading / unloading port 74 is provided at the loading / unloading port 74.
- Numerals 76 and 77 in the figure are depot shields that are detachable.
- the deposition shield 76 is provided along the inner wall surface of the processing chamber 1 and has a role of preventing the etching byproduct (depot) from adhering to the processing chamber 1.
- the deposition shield 76 is substantially the same as the semiconductor wafer W of the deposition shield 76.
- a conductive member (GND block) 79 connected to the ground in a direct current manner is provided, thereby preventing abnormal discharge.
- the operation of the plasma processing apparatus having the above configuration is comprehensively controlled by the controller 60.
- the control unit 60 includes a process controller that includes a CPU and controls each unit of the plasma processing apparatus, a user interface, and a storage unit.
- the user interface of the controller 60 is composed of a keyboard on which a process manager inputs commands to manage the plasma etching apparatus, a display that visualizes and displays the operating status of the plasma etching apparatus, and the like.
- the storage unit of the controller 60 stores a recipe in which a control program (software) for realizing various processes executed by the plasma etching apparatus under the control of the process controller, processing condition data, and the like are stored. Then, if necessary, an arbitrary recipe is called from the storage unit by an instruction from the user interface of the controller 60 and is executed by the process controller, so that the process in the plasma etching apparatus is performed under the control of the process controller of the controller 60. Desired processing is performed.
- recipes such as control programs and processing condition data may be stored in a computer-readable computer storage medium (eg, hard disk, CD, flexible disk, semiconductor memory, etc.), or It is also possible to transmit the data from other devices as needed via a dedicated line and use it online.
- FIG. 2 is a longitudinal sectional view schematically showing the configuration of the lower electrode according to the embodiment.
- the lower electrode 2 includes a substrate 2 a, an electrostatic chuck 6, a focus ring 5, and a sprayed film 100.
- the base material 2a is formed in a substantially cylindrical shape with a conductive metal such as aluminum.
- a first RF power supply 10a is connected to the base material 2a via a first matching device 11a, and a second RF power supply 10b is connected via a second matching device 11b.
- FIG. 2 the state of electrical connection between the substrate 2a and the first RF power source 10a and the second RF power source 10b is shown by an equivalent circuit. From the first RF power source 10a, high frequency power of a predetermined frequency (27 MHz or more, for example, 40 MHz) is supplied to the base material 2a of the lower electrode 2.
- a predetermined frequency 27 MHz or more, for example, 40 MHz
- high frequency power having a predetermined frequency (13.56 MHz or less, for example, 3.2 MHz) lower than that of the first RF power supply 10a is supplied to the base material 2a of the lower electrode 2.
- a polarization charge is generated between the substrate 2a and an electrode 6a of the electrostatic chuck 6 described later, but the polarization potential of the polarization charge is divided by a high-frequency application circuit connected to the substrate 2a. .
- the polarization potential of the polarization charge is determined by the high frequency application circuit constant and the chamber circuit constant.
- the electrostatic chuck 6 has an insulating layer 6b provided on the upper surface of the substrate 2a and covering the electrode 6a.
- a DC power supply 12 is connected to the electrode 6a.
- the insulating layer 6b is formed of an insulating material such as alumina (Al 2 O 3 ).
- the electrostatic chuck 6 electrostatically attracts the semiconductor wafer W to the insulating layer 6b based on a DC voltage applied from the DC power source 12 to the electrode 6a.
- the focus ring 5 is disposed on the upper surface of the insulating layer 6 b of the electrostatic chuck 6 so as to surround the periphery of the semiconductor wafer W.
- the focus ring 5 is formed in an annular shape from a conductive material such as silicon.
- the focus ring 5 is electrically connected to the base material 2 a of the lower electrode 2 through the conductive sprayed film 100.
- the sprayed film 100 is disposed in a portion of the insulating layer 6b of the electrostatic chuck 6 sandwiched between the focus ring 5 and the substrate 2a, and titania is blended in a predetermined weight ratio with the insulating material forming the insulating layer 6b. It is a conductive sprayed film formed using the synthesized material.
- the sprayed film 100 is a sprayed film containing titania (TiO 2 ) and has conductivity.
- the thermal spray film 100 is annularly disposed in a portion of the insulating layer 6b of the electrostatic chuck 6 sandwiched between the focus ring 5 and the substrate 2a, and electrically connects the focus ring 5 and the substrate 2a.
- the semiconductor wafer W is sandwiched between the focus ring 5 and the substrate 2a in the insulating layer 6b of the electrostatic chuck 6 so that the semiconductor wafer W does not directly adhere to the thermal spray film 100 containing titania (TiO 2 ).
- the sprayed film 100 is disposed at a portion separated from the semiconductor wafer W by a predetermined distance.
- the sprayed film 100 is formed using a synthetic material in which titania (TiO 2 ) is blended with an insulating material at a predetermined weight ratio.
- the sprayed film 100 uses a synthetic material (hereinafter referred to as “synthetic material” as appropriate) in which titania (TiO 2 ) is blended in a predetermined weight ratio with alumina (Al 2 O 3 ) as an insulating material. It is formed.
- the sprayed film 100 is made of a synthetic material so that the specific resistance of the insulating layer 6b of the electrostatic chuck 6 sandwiched between the focus ring 5 and the substrate 2a is 10 6 to 10 8 ⁇ ⁇ cm. It is formed using.
- a synthetic material is used so that the specific resistance of the sprayed film 100 in the insulating layer 6b of the electrostatic chuck 6 sandwiched between the focus ring 5 and the substrate 2a is 10 6 to 10 10 ⁇ ⁇ cm.
- the specific resistance of the insulating layer 6b of the electrostatic chuck 6 sandwiched between the focus ring 5 and the substrate 2a is set to a value smaller than 10 6 ⁇ ⁇ cm.
- the impedance of the focus ring 5 is smaller than that of the semiconductor wafer, the plasma is locally concentrated on the vicinity of the focus ring 5.
- the specific resistance of the insulating layer 6b of the electrostatic chuck 6 between the focus ring 5 and the substrate 2a is set to a value larger than 10 10 ⁇ ⁇ cm.
- the insulation between the focus ring 5 and the base material 2a in the insulating layer 6b of the electrostatic chuck 6 is excessively increased, so that the base material is removed from the focus ring 5 through the sprayed film 100.
- the sprayed film 100 is formed using a synthetic material so that the specific resistance of the portion sandwiched between the materials 2a is 10 6 to 10 10 ⁇ ⁇ cm.
- the semiconductor wafer W exposed to the plasma during the plasma processing and the focus ring 5 have substantially the same potential (for example, about minus 2000 V at the maximum) due to self-bias.
- the base material 2a of the lower electrode 2 becomes a positive potential due to the influence of a DC high voltage applied to the electrode 6a for electrostatic chuck.
- the thermal spray film 100 is made of a synthetic material so that the specific resistance of the insulating layer 6b of the electrostatic chuck 6 between the focus ring 5 and the substrate 2a is 10 6 to 10 10 ⁇ ⁇ cm. It is formed using. For this reason, an appropriate direct current corresponding to the potential difference between the focus ring 5 and the substrate 2 a flows through the sprayed film 100.
- the potential difference between the focus ring 5 and the base material 2a of the lower electrode 2 can be reduced, and the potential difference can be set to about 500V, for example. That is, the potential of the base material 2 a of the lower electrode 2 approaches the potential of the focus ring 5 by the generation of a direct current. As a result, the potential difference between the base material 2a of the lower electrode 2 and the semiconductor wafer W is also reduced, thereby preventing the occurrence of discharge between the semiconductor wafer W and the base material 2a of the lower electrode 2 or the surrounding structure. It is possible to improve the productivity by improving the chip yield of the semiconductor wafer W. Of course, it is also possible to prevent discharge from occurring between the focus ring 5 and the base material 2a of the lower electrode 2 or the surrounding structure.
- FIG. 3 is a view for explaining the weight ratio of the synthetic material forming the sprayed film.
- the vertical axis represents the magnitude of the specific resistance Rv [ ⁇ ⁇ cm] of the insulating layer 6 b of the electrostatic chuck 6 sandwiched between the focus ring 5 and the substrate 2 a
- the horizontal axis represents in synthetic material, showing a titania weight ratio [wt%] of (TiO 2) to alumina (Al 2 O 3).
- the magnitude of the specific resistance Rv [ ⁇ ⁇ cm] is expressed by the logarithm of the specific resistance Rv [ ⁇ ⁇ cm] with 10 as the base. As shown in a frame 150 in FIG.
- the focus ring 5 and the base material 2a are included in the insulating layer 6b of the electrostatic chuck 6.
- the specific resistance Rv of the sandwiched portion is 10 6 to 10 10 ⁇ ⁇ cm.
- the specific resistance Rv is 10 6 to 10 10 ⁇ ⁇ cm, a direct current flows from the focus ring 5 to the base material 2a through the sprayed film 100, thereby focusing the potential of the base material 2a of the lower electrode 2 It becomes possible to approach the potential of the ring 5.
- the weight ratio of titania to alumina in the synthetic material is 10 to 30 wt%
- the relative dielectric constant of the portion of the insulating layer 6b of the electrostatic chuck 6 sandwiched between the focus ring 5 and the substrate 2a. has been found to be maintained at 8-14. Therefore, in this embodiment, the weight ratio of titania to alumina in the synthetic material is set to 10 to 30 wt%.
- the sprayed film 100 containing titania is disposed in the insulating layer 6b of the electrostatic chuck 6 between the focus ring 5 and the base material 2a.
- An appropriate direct current corresponding to the potential difference between the focus ring 5 and the base material 2a can be passed through the sprayed film 100, and the sprayed film 100 containing titania can be separated from the semiconductor wafer W.
- titania contained in the sprayed film 100 while preventing discharge from occurring between the semiconductor wafer W and the substrate 2a of the lower electrode 2 or the peripheral structure during the plasma processing. The situation in which the semiconductor wafer W is contaminated by the titanium particles dissociated from can be avoided.
- FIG. 4 is a longitudinal sectional view showing a modification of the lower electrode according to the embodiment.
- the sprayed film 200 of the lower electrode 2 according to the modified example is disposed in a portion sandwiched between the focus ring 5 and the base material 2 a in the insulating layer 6 b of the electrostatic chuck 6. It is formed in a mortar shape in cross-sectional view.
- the sprayed film 200 is disposed in a portion of the insulating layer 6b of the electrostatic chuck 6 sandwiched between the focus ring 5 and the base material 2a, and tapers toward the base material 2a in a sectional view. It is formed in a mortar shape.
- the adhesion between the insulating layer 6b of the electrostatic chuck 6 and the sprayed film 200 can be improved by the sprayed film 200 formed in a mortar shape. It is possible to avoid a situation in which a gap serving as a resistance is generated between the electric chuck 6 and the insulating layer 6b. As a result, an appropriate direct current corresponding to the potential difference between the focus ring 5 and the base material 2a can be stably supplied to the sprayed film 200 during the plasma processing, so that the base material 2a of the semiconductor wafer W and the lower electrode 2 or It is possible to efficiently prevent discharge from occurring between the surrounding structures.
- Processing chamber (processing container) 2 Lower electrode 2a Base material 5 Focus ring 6 Electrostatic chuck 6a Electrode 6b Insulating layer 16 Upper electrode 100, 200 Thermal spray film
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Abstract
Description
2 下部電極
2a 基材
5 フォーカスリング
6 静電チャック
6a 電極
6b 絶縁層
16 上部電極
100、200 溶射膜
Claims (5)
- 高周波電力が印加される導電性の基材と、
前記基材の上面に設けられて電極を覆う絶縁層を有し、前記電極に印加される電圧に基づいて、プラズマ処理の処理対象となる被処理基板を前記絶縁層に静電吸着する静電チャックと、
前記静電チャックの前記絶縁層の上面に、前記被処理基板の周囲を囲むように配設されたフォーカスリングと、
前記静電チャックの前記絶縁層のうち前記フォーカスリングと前記基材とに挟まれた部分に配設され、前記絶縁層を形成する絶縁材料にチタニアが所定の重量比率で配合された合成材料を用いて形成された導電性の溶射膜と
を備えたことを特徴とする下部電極。 - 前記溶射膜は、前記静電チャックの前記絶縁層のうち前記フォーカスリングと前記基材とに挟まれた部分の比抵抗が106~1010Ω・cmとなるように、前記合成材料を用いて形成されることを特徴とする請求項1に記載の下部電極。
- 前記所定の重量比率は、10~30wt%であることを特徴とする請求項1に記載の下部電極。
- 前記溶射膜は、断面視ですり鉢形状に形成されることを特徴とする請求項1~3のいずれか一つに記載の下部電極。
- プラズマ処理空間を画成する処理容器と、
前記処理容器内に設けられ、被処理基板が載置される下部電極と、
前記プラズマ処理空間を介して前記下部電極と対向して配置された上部電極とを備えたプラズマ処理装置であって、
前記下部電極は、
高周波電力が印加される導電性の基材と、
前記基材の上面に設けられて電極を覆う絶縁層を有し、前記電極に印加される電圧に基づいて前記被処理基板を前記絶縁層に静電吸着する静電チャックと、
前記静電チャックの前記絶縁層の上面に、前記被処理基板の周囲を囲むように配設されたフォーカスリングと、
前記静電チャックの前記絶縁層のうち前記フォーカスリングと前記基材とに挟まれた部分に配設され、前記絶縁層を形成する絶縁材料にチタニアが所定の重量比率で配合された合成材料を用いて形成された溶射膜と
を備えたことを特徴とするプラズマ処理装置。
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US10083853B2 (en) * | 2015-10-19 | 2018-09-25 | Lam Research Corporation | Electrostatic chuck design for cooling-gas light-up prevention |
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WO2019087977A1 (ja) | 2017-10-30 | 2019-05-09 | 日本碍子株式会社 | 静電チャック及びその製法 |
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