Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D30/00—Field-effect transistors [FET]
  • H10D30/80—FETs having rectifying junction gate electrodes
  • H10D30/83—FETs having PN junction gate electrodes
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
  • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
  • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
  • H10D62/213—Channel regions of field-effect devices
  • H10D62/221—Channel regions of field-effect devices of FETs
  • H10D62/328—Channel regions of field-effect devices of FETs having PN junction gates
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
  • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
  • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
  • H10D62/343—Gate regions of field-effect devices having PN junction gates
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D64/00—Electrodes of devices having potential barriers
  • H10D64/111—Field plates
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
  • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
  • H10D62/113—Isolations within a component, i.e. internal isolations
  • H10D62/115—Dielectric isolations, e.g. air gaps
  • H10D62/116—Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
  • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
  • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
  • H10D62/149—Source or drain regions of field-effect devices

Definitions

• the second conductivity type channel layer is a second conductivity type injection layer formed by ion implantation.
• Field plates respectively located above the second conductivity type channel layer, the field plate extending to a portion of the surface of the drain field oxide region, the field plate and the second conductivity type channel layer and a dielectric layer is disposed between the drift regions of the second conductivity type;
• a channel layer 180 located in the second conductivity type channel layer a field plate 190 above 180, the field plate 190 extends to a portion of the surface of the drain field oxide region 130, the field plate 190 and the second conductive type channel layer 180 and the second conductive
• a dielectric layer 191 is disposed between the type drift regions 110; the drain D is electrically extracted by the second conductivity type drain heavily doped region 120; the source S is heavily doped by the field plate 190 and the second conductivity type source
• the impurity region 150 is electrically connected and then led out; the gate G is electrically led out by the first conductivity type gate heavily doped region 160.
• the field plate 190 may be a poly (poly) layer or a metal layer, and this embodiment is a polycrystalline layer.

Landscapes

• Insulated Gate Type Field-Effect Transistor (AREA)
• Junction Field-Effect Transistors (AREA)

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• 2012
  • 2012-06-12 CN CN201210192221.4A patent/CN103489912B/zh active Active
• 2013
  • 2013-06-10 EP EP13804198.3A patent/EP2860762B1/en active Active
  • 2013-06-10 JP JP2015516426A patent/JP6109931B2/ja active Active
  • 2013-06-10 WO PCT/CN2013/077119 patent/WO2013185604A1/zh not_active Ceased
  • 2013-06-10 US US14/407,599 patent/US9543451B2/en active Active

Patent Citations (3)

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