WO2013099286A1 - 多層配線基板 - Google Patents
多層配線基板 Download PDFInfo
- Publication number
- WO2013099286A1 WO2013099286A1 PCT/JP2012/008432 JP2012008432W WO2013099286A1 WO 2013099286 A1 WO2013099286 A1 WO 2013099286A1 JP 2012008432 W JP2012008432 W JP 2012008432W WO 2013099286 A1 WO2013099286 A1 WO 2013099286A1
- Authority
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- WIPO (PCT)
- Prior art keywords
- pattern
- signal line
- wiring board
- multilayer wiring
- board according
- Prior art date
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
- H05K1/0253—Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
- H05K1/0251—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
Definitions
- the present invention relates to a multilayer wiring board including vias connecting signal lines (transmission lines) in different layers.
- a through hole and a via As a structure for interconnecting wiring patterns in desired layers of a substrate having two or more wiring layers, there is a structure called a through hole and a via (or a via hole).
- a via a structure in which any inner layers of the multilayer substrate are connected by holes.
- FIG. 1 schematically shows a multilayer substrate including vias.
- FIG. 1 shows a four-layer structure of layer 1 which is the ground layer 11, layer 2 which is the signal line 12, layer 3 which is the signal line 13, and layer 4 which is the ground layer 14.
- the vias 15 connect the signal lines of layer 2 and layer 3.
- the signal line 12 is connected to, for example, a high frequency amplifier, and the signal line 13 is connected to, for example, an antenna.
- Patent Document 1 proposes a method for improving the electrical characteristics of the via structure. For example, for vias provided in the vertical direction of the insulating substrate, a method of pseudo-coaxializing using a plurality of ground layers arranged on the insulating substrate around the vias, or coaxial via holes separated by a predetermined distance around the vias by laser processing A multilayer laminated substrate having a structure in which a coaxial via hole is connected to a power supply and a ground layer is proposed.
- Patent Document 1 in a multilayer wiring board in which an insulating layer formed using a resin insulating film and a wiring layer formed using a conductor film are alternately laminated, An insulating resin layer is formed independently of a via hole connected to the transmission wiring and concentrically on a concentric circle separated by a constant distance at the periphery of the via by the insulating layer, without being connected to the signal wiring layer and the power supply and the ground layer.
- a multilayer wiring board having a via hole embedded in the above has been proposed.
- Patent Document 1 still has the problem that the structure is complicated and processing is not easy.
- An object of the present invention is to provide a multilayer wiring board which has a simple structure and is easy to process by taking impedance matching at a via connection.
- the multilayer wiring board according to the present invention has a configuration including a signal line, and a ground layer in which a pattern not covered with a metal film is formed at a position facing a part of the signal line.
- the impedance matching at the via connection can be achieved by the simple structure and the structure that can be easily processed.
- FIG. 3 is an exploded perspective view showing a wiring structure including a via according to the first embodiment of the present invention.
- the wiring structure in FIG. 3 shows a four-layer structure of a ground layer 101 (layer 1), a signal line 102 (layer 2), a signal line 103 (layer 3), and a ground layer 104 (layer 4).
- the via 105 connects the signal line 102 of layer 2 and the signal line 103 of layer 3.
- FIG. 4 shows a plan view of the ground layer 101 of FIG.
- a circular ring-shaped pattern not covered with a metal film for example, a copper foil (indicated by hatching in the figure) is formed at a position facing the via.
- FIG. 5 shows a general ⁇ / 4 transformer.
- a ⁇ / 4 transformer serving as the characteristic impedance Zt is inserted in the signal line.
- impedance matching at the connection portion between the signal lines 102 and 103 and the via 105 can be achieved. That is, impedance matching can be realized without using the ⁇ / 4 transformer which changes the line width shown in FIG. In addition, electric lines of force are concentrated in the vias 105, and the radiation loss of the electromagnetic wave emitted from the circular ring-shaped pattern can be reduced. Furthermore, impedance matching in the via connection portion 105 can be realized by simple processing of forming a pattern in the ground layer.
- the present invention is not limited to the circular ring-shaped pattern shown in FIG. 4, but as shown in FIG. 6 (a), a circular C-shaped pattern in which the metal film in the ring is connected at the ground and part of the ring.
- FIG. 6C the same effect as described above can be obtained by dividing the circular ring in which the metal film in the ring is connected to the ground at two different places of the ring.
- the present invention is not limited to a circle, and may be an elliptical ring-shaped pattern shown in FIG. 7 (a).
- the present invention is not limited to a circle and an ellipse, and may be a square ring pattern shown in FIG. 8 (a).
- a square C-shaped pattern shown in FIG. 8 (b) a square inverted C-shaped pattern shown in FIG. 8 (c), and a circle C in FIG.
- the pattern obtained by dividing the square ring shown in 2 into two may be used, and the same effect as described above can be obtained.
- the pattern obtained by dividing the circular ring shown in FIG. 6C into two may be the pattern obtained by dividing the circular ring shown in FIG. 9A into three, or the pattern obtained by dividing the circular ring into four as shown in FIG. However, it is desirable that the division pattern shape be line symmetrical.
- the pattern divided into n is It can be extended to (n is an integer of 0 or more).
- the shapes of the patterns divided into one in FIGS. 6, 7 and 8 are vertically symmetrical with respect to the paper surface.
- the impedances in the ring-shaped pattern and the C-shaped pattern are compared, these impedances are different.
- the metal film in the ring and the ground are C-type coupling and equalizing
- the metal film in the pattern and the ground are connected using a narrow line width Because of the L-type coupling and equalization.
- the configuration is simple, and the signal line and the via are formed.
- the impedance matching can be achieved at the connection portion of, and radiation loss of the electromagnetic wave emitted from the ring portion can be reduced.
- the formation of the pattern on the ground layer of layer 1 has been described, but the present invention is not limited to this, and the pattern may be formed on the ground layer of layer 4 in addition to the ground layer of layer 1 Good.
- the pattern formed in the ground layer of layer 1 and the pattern formed in the ground layer of layer 4 may be arbitrarily combined.
- FIG. 10 is an exploded perspective view showing a wiring structure including a via according to the second embodiment of the present invention.
- the ground layer 201 (layer 1) is formed at a position where a rectangular through hole faces the via 105 and a part of the signal line 102.
- One side of the through hole along the signal line 102 has a length of ⁇ / 4.
- the present invention is not limited to the rectangular through holes shown in FIG. 10, but as shown in FIG. 11 (a), rectangular through holes with one side having a length of ⁇ / 4 and different widths as shown in FIG.
- the same effect as described above can be obtained even with a convex through-hole in which two pairs of.
- the direction of the convex through holes can be adjusted in accordance with the impedances of the layer 2 and the layer 3 to the direction of the narrow rectangular portion. Therefore, the same effect as inserting a general multistage transformer into the signal line can be obtained, and impedance matching can be achieved even for a wider band signal.
- the signal line and the via are formed by forming a through hole having a length of ⁇ / 4 along the signal line at a position facing the via and part of the signal line in the ground layer. Impedance matching at the connection with
- ground layer in which the through holes in the present embodiment are formed and the ground layer in which the pattern in the first embodiment is formed may be arbitrarily combined. Further, in the present embodiment, one side of the through hole is described as ⁇ / 4 in FIGS. 10 and 11, but the same effect can be obtained even if the side is ⁇ / 32 or more and ⁇ / 2 or less. .
- FIG. 12 is a plan view showing a wiring structure according to Embodiment 3 of the present invention.
- an elliptical through hole is formed in the ground layer 401 at a position facing a part of the signal line 102.
- the elliptical through hole overlaps the signal line 102 with a length of ⁇ / 36 or more and ⁇ / 2 or less in the major axis direction.
- forming an elliptical through hole in the ground layer 401 corresponds to artificially changing the signal line, and impedance matching in the signal line can be achieved. Further, since the ground layer is located in the upper layer of the signal line, even after laying the signal line, the impedance can be adjusted only by adjusting the size of the through hole.
- the present invention is not limited to the elliptical through holes shown in FIG. 12, and as shown in FIG. 13, rectangular through holes may be provided on both sides of the major axis of the ellipse. However, the width of the rectangular through hole is narrower than the line width of the signal line.
- the length of a part of the major axis of the ellipse overlapping the signal line 102 is b, and the lengths to the end of the rectangle adjacent thereto are defined as a and c, respectively. It suffices to satisfy the relationship of a + c> b. This eliminates the need for designing the length of b strictly, and can reduce the design cost.
- the present invention is not limited to the elliptical through hole shown in FIG. 12, and as shown in FIG. 14, it may be a semi-elliptical shape in which the upper half of the ellipse is cut out.
- the semi-elliptical through holes overlap a portion of the width of the signal line.
- 12 and 13 show an example in which the impedance is adjusted by adjusting the length of the major axis of the ellipse (in the figure, the x-axis direction), but in FIG. 14 the minor axis of the ellipse (figure An example is shown in which the impedance is adjusted by adjusting the length in the y-axis direction).
- a semi-elliptical shape in which the upper half of the ellipse is cut out is taken as an example, but the cut-out amount is not limited to half, and varies depending on the adjustment amount of the impedance.
- the present invention is not limited thereto, and may be circular or square.
- Embodiment 4 In the fourth embodiment of the present invention, the case where impedance matching of signal lines is taken in a ground layer in which a land pattern is formed will be described.
- a land pattern is for arrange
- FIG. 15 is a plan view showing a wiring structure having a land pattern before impedance adjustment.
- a land pattern 502 is formed in the ground layer 501, and a through hole is formed around the land pattern 502.
- FIG. 15 shows that a part of the through hole overlaps the signal line 102.
- FIG. 16 is a plan view showing a wiring structure having a land pattern according to Embodiment 4 of the present invention.
- a through hole enlarged relative to the through hole in FIG. 15 is formed around the land pattern 502. A part of the through hole overlaps the signal line 102 with respect to the through hole in FIG.
- the impedance can be adjusted by enlarging the through hole and separating the signal line 102 and the ground layer 501.
- the present invention is not limited to the through holes shown in FIG. 16, but as shown in FIG. 17, the through holes of FIG. At this time, the impedance can be adjusted by overlapping the elliptical through hole with the signal line 102 and separating the signal line 102 and the ground layer 501.
- FIG. 18 is an exploded perspective view showing a wiring structure including a via according to another embodiment of the present invention.
- the wiring structure in FIG. 18 includes a signal line 302 (layer 3) connected to the via 301, a ground layer 304 (layer 2) in which a circular through hole 303 is formed at a position facing the via 301, and a through hole of the ground layer 304. It is a metal film 305 (layer 1) covering 303.
- the metal film as the layer 1, it is possible to lengthen the path where the via connection portion and the ground are coupled. Specifically, the electromagnetic wave components that were not emitted by reducing the through holes are mostly combined with the metal film, and because the metal film has a thickness, it is combined with the ground in the lateral direction. The overall degree of coupling can be reduced by passing through the metal film.
- the through holes correspond to patterns not covered by the metal film.
- the multilayer wiring board according to the present invention can be applied to, for example, a communication device that processes high frequency signals.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
図3は、本発明の実施の形態1に係るビアを含む配線構造を示す分解斜視図である。図3における配線構造は、グランド層101(レイヤ1)、信号ライン102(レイヤ2)、信号ライン103(レイヤ3)及びグランド層104(レイヤ4)の4層構造を示している。ビア105は、レイヤ2の信号ライン102とレイヤ3の信号ライン103とを接続している。
図10は、本発明の実施の形態2に係るビアを含む配線構造を示す分解斜視図である。図10における配線構造は、グランド層201(レイヤ1)は、方形の貫通穴がビア105及び信号ライン102の一部と対向する位置に形成される。信号ライン102に沿った貫通穴の一辺はλ/4の長さを有する。図10に示す貫通穴をグランド層201に形成することにより、信号ラインを擬似的に変更することに相当し、信号ラインとビアとの接続部におけるインピーダンス整合がとれる。
実施の形態1及び実施の形態2では、ビアにおけるインピーダンスの不整合を解消する場合について説明したが、本発明の実施の形態3では、ビアに限らず、信号ラインにおけるインピーダンス整合を取る場合について説明する。
本発明の実施の形態4では、ランドパターンが形成されたグランド層において、信号ラインのインピーダンス整合を取る場合について説明する。なお、ランドパターンとは、グランド層が形成された基板の上にさらに、部品または複数の基板を重ねる脚注を配置するためのものである。
図18は、本発明の他の実施の形態に係るビアを含む配線構造を示す分解斜視図である。図18における配線構造は、ビア301に接続する信号ライン302(レイヤ3)、ビア301と対向する位置に円形の貫通穴303が形成されたグランド層304(レイヤ2)、グランド層304の貫通穴303を覆う金属膜305(レイヤ1)である。
102、103、302 信号ライン
105、301 ビア
303 貫通穴
305 金属膜
502 ランドパターン
Claims (13)
- 信号ラインと、
前記信号ラインの一部と対向する位置に金属膜によって覆わないパターンが形成されたグランド層と、
を具備する多層配線基板。 - 前記パターンは、前記信号ラインと対向する長さがλ/36以上かつλ/2以下である、
請求項1に記載の多層配線基板。 - 前記パターンは、楕円形状である、
請求項1に記載の多層配線基板。 - 前記パターンは、前記信号ラインと対向する部分の両側に、前記信号ラインの線幅より狭い幅を有するパターンが連通してなる、
請求項1に記載の多層配線基板。 - 前記パターンは、前記信号ラインの幅方向に調整された長さを有する、
請求項1に記載の多層配線基板。 - 前記グランド層には、
ランドパターンと、
前記ランドパターンの周囲を金属膜によって覆わないパターンと、が形成された、
請求項1に記載の多層配線基板。 - 前記パターンは、
前記ランドパターンの周囲に形成された第1のパターンと、
前記第1のパターンと連通し、前記信号ラインと対向する位置に形成された金属膜によって覆わない第2のパターンとからなる、
請求項6に記載の多層配線基板。 - 前記パターンは、前記グランド層を貫く貫通穴である、
請求項1に記載の多層配線基板。 - 任意の複数の内層間を接続するビアを具備し、
前記グランド層には、前記ビアと対向する位置に、少なくとも前記ビアの一部を金属膜によって覆わないパターンが形成された、
請求項1に記載の多層配線基板。 - 前記パターンは、円形、楕円形、方形のいずれかの形状を有する請求項9に記載の多層配線基板。
- 前記パターンは、C型またはn分割型のいずれかの形状を有する請求項10に記載の多層配線基板。
- 前記グランド層は、前記ビアに接続する信号ラインに沿ってλ/4の長さを有する貫通穴が形成された請求項9に記載の多層配線基板。
- 前記貫通穴は、方形、凸型、テーパー状のいずれかの形状を有する請求項12に記載の多層配線基板。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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US14/122,889 US9232653B2 (en) | 2011-12-28 | 2012-12-28 | Multilayer wiring board |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2011289371 | 2011-12-28 | ||
JP2011-289371 | 2011-12-28 |
Publications (1)
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WO2013099286A1 true WO2013099286A1 (ja) | 2013-07-04 |
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PCT/JP2012/008432 WO2013099286A1 (ja) | 2011-12-28 | 2012-12-28 | 多層配線基板 |
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US (1) | US9232653B2 (ja) |
JP (1) | JPWO2013099286A1 (ja) |
WO (1) | WO2013099286A1 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2016204504A1 (ko) * | 2015-06-19 | 2016-12-22 | 엘지이노텍 주식회사 | 표면실장부품 모듈 |
KR20180002570A (ko) * | 2017-12-22 | 2018-01-08 | 엘지이노텍 주식회사 | 표면실장부품 모듈 |
WO2021187764A1 (ko) * | 2020-03-18 | 2021-09-23 | 삼성전자 주식회사 | 그라운드 배선을 포함하는 인쇄회로기판 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019098011A1 (ja) * | 2017-11-16 | 2019-05-23 | 株式会社村田製作所 | 樹脂多層基板、電子部品およびその実装構造 |
CN213522492U (zh) * | 2017-11-16 | 2021-06-22 | 株式会社村田制作所 | 树脂多层基板、电子部件及其安装构造 |
JP7207424B2 (ja) * | 2018-12-19 | 2023-01-18 | ソニーグループ株式会社 | 基板及び電子機器 |
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JP2000114722A (ja) * | 1998-09-30 | 2000-04-21 | Adtec:Kk | 印刷配線装置 |
JP2007288180A (ja) * | 2006-03-24 | 2007-11-01 | Kyocera Corp | 配線構造、多層配線基板および電子装置 |
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JP3710652B2 (ja) * | 1999-08-03 | 2005-10-26 | 三菱電機株式会社 | ストリップライン給電装置 |
GB2374984B (en) * | 2001-04-25 | 2004-10-06 | Ibm | A circuitised substrate for high-frequency applications |
JP2003060351A (ja) | 2001-08-17 | 2003-02-28 | Toppan Printing Co Ltd | 同軸ビアホール付き多層配線基板及びその製造方法 |
JP2003204209A (ja) * | 2002-01-07 | 2003-07-18 | Kyocera Corp | 高周波用配線基板 |
US20070222052A1 (en) | 2006-03-24 | 2007-09-27 | Kyocera Corporation | Wiring structure, multilayer wiring board, and electronic device |
US8476537B2 (en) * | 2007-08-31 | 2013-07-02 | Nec Corporation | Multi-layer substrate |
JP5887537B2 (ja) * | 2011-04-25 | 2016-03-16 | パナソニックIpマネジメント株式会社 | 回路基板 |
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2012
- 2012-12-28 WO PCT/JP2012/008432 patent/WO2013099286A1/ja active Application Filing
- 2012-12-28 JP JP2013534080A patent/JPWO2013099286A1/ja active Pending
- 2012-12-28 US US14/122,889 patent/US9232653B2/en not_active Expired - Fee Related
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JP2000114722A (ja) * | 1998-09-30 | 2000-04-21 | Adtec:Kk | 印刷配線装置 |
JP2007288180A (ja) * | 2006-03-24 | 2007-11-01 | Kyocera Corp | 配線構造、多層配線基板および電子装置 |
Cited By (5)
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WO2016204504A1 (ko) * | 2015-06-19 | 2016-12-22 | 엘지이노텍 주식회사 | 표면실장부품 모듈 |
US10736217B2 (en) | 2015-06-19 | 2020-08-04 | Lg Innotek Co., Ltd. | Surface mounted device module |
KR20180002570A (ko) * | 2017-12-22 | 2018-01-08 | 엘지이노텍 주식회사 | 표면실장부품 모듈 |
KR102048421B1 (ko) | 2017-12-22 | 2019-11-25 | 엘지이노텍 주식회사 | 표면실장부품 모듈 |
WO2021187764A1 (ko) * | 2020-03-18 | 2021-09-23 | 삼성전자 주식회사 | 그라운드 배선을 포함하는 인쇄회로기판 |
Also Published As
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US20140102778A1 (en) | 2014-04-17 |
US9232653B2 (en) | 2016-01-05 |
JPWO2013099286A1 (ja) | 2015-04-30 |
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