WO2013071689A1 - Method and analog circuit for implementing automatic switching of chaotic systems of integer order and fractional order - Google Patents

Method and analog circuit for implementing automatic switching of chaotic systems of integer order and fractional order Download PDF

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Publication number
WO2013071689A1
WO2013071689A1 PCT/CN2012/001384 CN2012001384W WO2013071689A1 WO 2013071689 A1 WO2013071689 A1 WO 2013071689A1 CN 2012001384 W CN2012001384 W CN 2012001384W WO 2013071689 A1 WO2013071689 A1 WO 2013071689A1
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pin
resistor
capacitor
vcc
pins
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PCT/CN2012/001384
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French (fr)
Chinese (zh)
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王忠林
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Wang Zhonglin
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/001Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals

Definitions

  • the invention relates to a method for realizing an integer-order and fractional-order automatic switching chaotic system by using an analog circuit, in particular to a method and an analog circuit for realizing an integer-order and fractional-order automatic switching chaotic system.
  • the technical problem to be solved by the present invention is to provide a method and an analog circuit for an integer-order and fractional-order automatic switching chaotic system.
  • the invention adopts the following technical means to achieve the object of the invention:
  • a method for realizing an integer order and fractional order automatic switching chaotic system characterized in that the method comprises the following steps: (1) According to the integer order chaotic system i:
  • the operational amplifier U1 is connected to a voltage comparator U6, analog switches U7, U8, multipliers U4, U5, the voltage comparator U6 is connected to analog switches U7, U8, and the multiplier U4 is connected to an operational amplifier U2, the operational amplifier U2 is connected to the analog switch U7, the multiplier U5 is connected to the operational amplifier U3, and the operational amplifier U3 is connected to the analog switch U8;
  • the first pin of the operational amplifier U1 is connected to the second pin through the resistor Rx, and is connected to the sixth pin of U1 through the resistor R1, and the third, fifth, ten, and 12th pins are grounded, and the fourth pin is connected.
  • the 11th pin is connected to VEE
  • the 6th pin is connected in parallel with the resistor Rcl l and the capacitor C 1 1 , then connected in parallel with Rcl2 and capacitor C 12, and then connected in parallel with Rcl 3 and capacitor C13
  • the 4th pin of U7 is connected, the capacitor C 10 is connected to the 5th pin of U7, the 7th pin is connected to the 9th pin of U6, and the 1st pin of U4 is connected, and the U7 is connected.
  • the 9-pin is connected to the first and third pins of U5, and the second pin of U2 is connected through the resistor R22.
  • the eighth pin I is connected to the 9th pin of U1 through the resistor R25.
  • the pin is connected to the second pin of U1 through the resistor R24 and the potentiometer R12, and is connected to the second pin of U2 through the resistor R24 and the potentiometer R23, and is connected to the 10th pin of the U7 through the resistor R24, and the 13th pin is passed.
  • the resistor R13 is connected to the 7th pin of U1, is connected to the 14th pin of U1 through the resistor R14, is connected to the 1st pin of U4, is connected to the 8th pin of U7, and is connected to the 1st pin of U5.
  • the third pin is connected, and the 14th pin is passed through the potentiometers R11 and U.
  • the second pin is connected; the first pin of the operational amplifier U2 is connected to the first pin through the resistor Ry, and is connected to the sixth pin of the U2 through the resistor R2, the third, fifth, ten, and twelve The pin is grounded, the fourth pin is connected to VCC, the eleventh pin is connected to VEE, the sixth pin is connected in parallel with the resistor Rc21 and the capacitor C21, and then connected in parallel with Rc22 and capacitor C22, and connected to R c 23 and capacitor C23.
  • the 13th pin is connected to the 3rd pin of U4 through the resistor R33, and is connected to the 8th pin of U8 through the resistor R33, and is connected to the 14th pin of U2 through the resistor R34.
  • foot connected U4 The third pin is connected to the second pin of U3 through the potentiometer R32;
  • the first pin of the operational amplifier U3 is connected to the first pin through the resistor Rz, and is connected to the ninth pin of the U2 through the resistor R31, and the second pin of the U3 is connected to the 14 pin of the U2 through the R32, the third pin.
  • the 4th pin is connected to VCC, the 5th, 6th, 7th, 8th, 9th, 10th, 12th, 13th, 14th are all suspended, the 11th pin is connected to VEE;
  • the first pin of the multiplier U4 is connected to the third pin of U1, the third pin is connected to the 14th pin of U2, the second, fourth, and sixth pins are grounded, and the fifth pin is connected to VEE, 7 pin is connected to the second pin of U2 through resistor R21, and the eighth pin is connected to VCC;
  • the first and third pins of the multiplier U5 are connected to the seventh pin of U1, the second, fourth, and sixth pins are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the U3 through the resistor R31. 2 pins, the 8th pin is connected to VCC;
  • the first, 2, 4, 5, 6, 7, 9, 10, 11, 12, 13 pins of the voltage comparator U6 are left floating, the third pin is connected to VCC; the eighth pin is passed through the resistors R02 and U7.
  • the first pin and the first pin of U8 are connected, the 12th pin is connected to VEE, and the 14th pin is connected to the first pin of U7 and the first pin of U8 through diode D1, and is connected through the resistor R01. VCC;
  • the first pin of the analog switch U7 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 6 pin of U1 through the fractional integration unit.
  • the 5th pin is connected to the 6 pin of U1 through the capacitor C10, the 8th pin is connected to the 7 pin of U1, the 9th pin is connected to the 7 pin of U2, and the 12th pin is connected to the 6 pin of U2 through C20.
  • the 13th pin is connected to the 6 pin of U2 through the fractional integration unit, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded.
  • the first pin of the analog switch U8 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 9 pin of U2 through the fractional integration unit.
  • the 5th pin is connected to the 9 pin of U2 through the capacitor C30, the 8th pin is connected to the 8 pin of U2, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded.
  • a circuit for implementing an integer-order and fractional-order ⁇ -switching chaotic system comprising: an operational amplifier U1, U2, U3 and a multiplier U4, U5 and a voltage comparator U6 and an analog switch U7, U8,
  • the operational amplifier U1 is connected to a voltage comparator U6, analog switches U7, U8, multipliers U4, U5, the voltage comparator U6 is connected to analog switches U7, U8, and the multiplier U4 is connected to an operational amplifier U2, the operational amplifier U2 is connected to the analog switch U7, the multiplier U5 is connected to the operational amplifier U3, the operational amplifier U3 is connected to the analog switch U8;
  • the first pin of the operational amplifier U1 is connected to the second pin through the resistor Rx, and is connected to the sixth pin of U1 through the resistor R1, and the third, fifth, ten, and 12th pins are grounded, and the fourth pin is connected.
  • female is connected to VEE
  • the 6th pin is connected in parallel with the resistor Rcll and the capacitor C11, then the parallel connection of Rcl2 and capacitor C12, and the parallel connection of Rcl3 and capacitor C13, and the fourth lead of U7
  • the pins are connected, through the capacitor C10 and the fifth pin of U7, the seventh pin and the U6
  • the 9th pin is connected, connected to the 1st pin of U4, connected to the 9th pin of U7, connected to the 1st and 3rd pins of U5, and connected to the 2nd pin of U2 through the resistor R22.
  • the 8th pin is connected to the 9th pin of U1 through the resistor R25, and the 9th pin is connected to the 2nd pin of U1 through the resistor R24 and the potentiometer R12, through the resistor R24 and the potentiometer R23 and the U2 pin 2 Connected, through the resistor R24 and U7 10th pin, the 13th pin is connected to the 7th pin of U1 through the resistor R13, through the resistor R14 and the 14th pin of U1, and the 1st pin of U4 Connected to the 8th pin of U7, connected to the 1st and 3rd pins of U5, the 14th pin is connected to the 2nd pin of U1 through potentiometer R1 1;
  • the first pin of U2 is connected to the second pin through the resistor Ry, the sixth pin of U2 is connected through the resistor R2, the third, fifth, ten, and 12 pins are grounded, and the fourth pin is connected to VCC.
  • the 13th pin is connected to the 3rd pin of U4 through resistor R33.
  • pin 14 is connected to pin 3 of U4, and connected to pin 2 of U3 via potentiometer R32:
  • the first pin of the operational amplifier U3 is connected to the second pin through the resistor Rz, and is connected to the ninth pin of the U2 through the resistor R31, and the second pin of the U3 is connected to the 14 pin of the U2 through the R32.
  • the ground is grounded, the 4th pin is connected to VCC, the 5th, 6th, 7th, 8th, 9th, 10th, 12th, 13th and 14th are all suspended, and the 11th pin is connected to VEE;
  • the first pin of the multiplier U4 is connected to the seventh pin of U1, the third pin is connected to the 14th pin of U2, the second, fourth, and sixth pins are grounded, and the fifth pin is connected to VEE, the seventh pin.
  • the pin is connected to the second pin of U2 through the resistor R21, and the eighth pin is connected to VCC;
  • the first and third pins of the multiplier U5 are connected to the seventh pin of U1, the second, fourth, and sixth pins are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the U3 through the resistor R31. 2 pins, the 8th pin is connected to VCC;
  • the first, 2, 4, 5, 6, 7, 9, 10, 11, 12, 13 pins of the voltage comparator U6 are left floating, the third pin is connected to VCC; the eighth pin is passed through the resistors R02 and U7.
  • the first pin I and the first pin of U8 are connected, the 12th pin is connected to VEE, and the 14th pin is connected to the first pin of U7 and the first pin of U8 through diode D1.
  • R01 is connected to VCC;
  • the first pin of the analog switch U7 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 6 pin of U1 through the fractional integration unit.
  • the 5th pin is connected to the 6 pin of U1 through the capacitor C10, the 8th pin is connected to the 7 pin of U1, the 9th pin is connected to the 7 pin of U2, and the 12th pin is connected to the U2 through C20.
  • the 6 pin, the 13th pin is connected to the 6 pin of U2 through the fractional integration unit, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded;
  • the first pin of the analog switch U8 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 9 pin of U2 through the fractional integration unit.
  • the 5th pin is connected to the 9 pin of U2 through the capacitor C30, the 8th pin is connected to the 8 pin of U2, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded.
  • FIG. 1 is a schematic diagram of a circuit connection structure according to a preferred embodiment of the present invention.
  • Figure 2 shows the structure of the peripheral circuit of the operational amplifier U1.
  • FIG. 3 shows the structure of the peripheral circuits of the operational amplifier U2 and the multiplier U4.
  • Figure 4 shows the structure of the peripheral circuits of the operational amplifier U3 and the multiplier U5.
  • Figure 5 is a schematic diagram showing the structure of the peripheral circuit of the voltage comparator U6.
  • Figure 6 is a schematic diagram showing the structure of the peripheral circuit of the analog switch U7.
  • Figure 7 is a schematic diagram showing the structure of the peripheral circuit of the analog switch U8.
  • An integer-order and fractional-order automatic switching chaotic system is first constructed.
  • An integer-order chaotic system i selected in the preferred embodiment is:
  • the selected fractional chaotic system ii is:
  • the operational amplifiers U1, U2, U3 are LF347, the multipliers U4, U5 are AD633JN, the voltage comparator U6 is LM339, the analog switches U7, U8 are CD4052;
  • the operational amplifier U1 is connected to the voltage comparator U6, the analog switch U7 U8, multiplier U4, U5, the voltage comparator U6 is connected to the analog switches U7, U8, the multiplier U4 is connected to the operational amplifier U2, the operational amplifier U2 is connected to the analog switch U7, and the multiplier U5 is connected to the operational amplifier U3, the operational amplifier U3 is connected to the analog switch U8;
  • the first pin of the operational amplifier U1 is connected to the second pin through the resistor Rx, and is connected to the sixth pin of U1 through the resistor R1, and the third, fifth, ten, and 12th pins are grounded, and the fourth pin is connected.
  • the 11th pin is connected to VEE
  • the 6th pin is connected in parallel with the resistor Rcl l and the capacitor C11, then the parallel connection of Rcl2 and capacitor C12, and the parallel connection of Rcl3 and capacitor C13, and the fourth lead of U7
  • the pin is connected, the capacitor C10 is connected to the fifth pin of U7, the seventh pin is connected to the 9th pin of U6, and is connected to the first pin of U4, and is connected to the 9th pin of U7.
  • the eighth pin is connected to the 9th pin of U1 through the resistor R25, and the 9th pin is connected to the potential R24 and the potential.
  • R12 is connected to the second pin of U1, and is connected to the second pin of U2 through the resistor R24 and the potentiometer R23, and is connected to the 10th pin of U7 through the resistor R24, and the 13th pin is passed through the resistor R13 and U1.
  • the pin is connected, connected to the 14th pin of U1 through the resistor R14, connected to the 1st pin of U4, connected to the 8th pin of U7, and the 1st pin and the 3rd pin of U5.
  • the first pin of the operational amplifier U2 is connected to the second pin through the resistor Ry, and is connected to the sixth pin of U2 through the resistor R2, and the third, fifth, ten, and 12th pins are grounded.
  • the fourth pin is connected to VCC
  • the eleventh pin is connected to VEE
  • the sixth pin is connected in parallel with the resistor Rc21 and the capacitor C21, and then connected in parallel with Rc22 and capacitor C22, and then connected in parallel with Rc23 and capacitor C23, and U7.
  • the 13th pin is connected, the capacitor C20 is connected to the 12th pin of U7, the 7th pin is connected to the 9th pin of U7, and the 8th pin is connected to the 8th pin of U8, the 9th pin
  • the pin is connected in parallel with the capacitor R33 and the capacitor C33, and then connected in parallel with the capacitor C32, and then connected in parallel with the capacitor C31, and connected to the fourth pin of the U8, through the fifth lead of the capacitor C30 and U8.
  • the pin is connected, the 13th pin is connected to the 3rd pin of U4 through the resistor R33, the 8th pin of the U8 is connected through the resistor R33, the 14th pin of the U2 is connected through the resistor R34, and the 14th pin is connected to the U4.
  • the third pin is connected to the second pin of U3 through the potentiometer R32;
  • the first pin of the operational amplifier U3 is connected to the second pin through the resistor Rz, and is connected to the ninth pin of the U2 through the resistor R31, and the second pin of the U3 is connected to the 14 pin of the U2 through the R32.
  • the ground is grounded, the 4th pin is connected to VCC, the 5th, 6th, 7th, 8th, 9th, 10th, 12th, 13th and 14th are all suspended, and the 11th pin is connected to VEE;
  • the first pin of the multiplier U4 is connected to the seventh pin of U1, the third pin is connected to the 14th pin of U2, the second, fourth, and sixth pins are grounded, and the fifth pin is connected to VEE, the seventh pin.
  • the pin is connected to the second pin of U2 through the resistor R21, and the eighth pin is connected to VCC;
  • the first and third pins of the multiplier U5 are connected to the third pin of U1, the second, fourth, and sixth pins are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the U3 through the resistor R31. 2 pins, the 8th pin is connected to VCC;
  • the first, 2, 4, 5, 6, 7, 9, 10, 11, 12, 13 pins of the voltage comparator U6 are left floating, the third pin is connected to VCC; the eighth pin is passed through the resistors R02 and U7.
  • the first pin and the first pin of U8 are connected, the 12th pin is connected to VEE, and the 14th pin is connected to the first pin of W and the first pin of U8 through diode D1, and is connected through the resistor R01. VCC;
  • the first pin of the analog switch U7 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 6 pin of U1 through the fractional integration unit.
  • the 5th pin is connected to the 6 pin of U1 through the capacitor C10, the 8th pin is connected to the 1 pin of U1, the 9th pin is connected to the ⁇ pin of U2, and the 12th pin is connected to the 6 pin of U2 through C20.
  • the 13th pin is connected to the 6 pin of U2 through the fractional integration unit, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded.
  • the first pin of the analog switch U8 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 9 pin of U2 through the fractional integration unit.
  • the 5th pin is connected to the 9 pin of U2 through the capacitor C30, the 8th pin is connected to the 8 pin of U2, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded.

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  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
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Abstract

The structure of an automatic switching chaotic system of an integer order and a fractional order, and an analog circuit implementation method are disclosed. The method comprises: an integer order chaotic system and a fractional order chaotic system forming an automatic switching system, and implementing the automatic switching chaotic system by using the analog circuit. Through the present invention, automatic switching between the integer order chaotic system and the fractional order chaotic system is implemented by using the analog circuit. The automatic switching chaotic system of the integer order and the fractional order is more complicated than the integer order chaotic system, the fractional order chaotic system, and the automatic switching system, and has the advantages of the three. The system provided by the present invention makes great sense in chaos-based secure communications and signal detection, and has desirable application prospects.

Description

一种实现整数阶与分数阶自动切换混沌系统的方法及模拟电路 技术领域  Method and analog circuit for realizing integer-order and fractional-order automatic switching chaotic system
本发明涉及一种利用模拟电路实现整数阶与分数阶自动切换混沌系统的方法, 具体地 讲, 涉及一种实现整数阶与分数阶自动切换混沌系统的方法及模拟电路。  The invention relates to a method for realizing an integer-order and fractional-order automatic switching chaotic system by using an analog circuit, in particular to a method and an analog circuit for realizing an integer-order and fractional-order automatic switching chaotic system.
背景技术 Background technique
用模拟电路实现整数阶混沌系统的方法文献中有较多的报道, 用模拟电路实现分数阶 混沌系统的方法文献中也有报道, 实现自动切换混沌系统的方法与电路文献也有报道, 但用 模拟电路实现整数阶与分数阶的自动切换混沌系统方法及电路却未见报道, 因为整数阶与分 数阶自动切换的混沌系统比整数阶混沌系统、 分数阶混沌系统及自动切换系统都复杂, 集中 了三者的优越性, 因此, 提出一种整数阶与分数阶自动切换混沌系统的设计方法, 并用模拟 电路实现这种混沌系统, 对于这种混沌系统的应用具有重要的意义。  Methods for implementing integer-order chaotic systems with analog circuits There are many reports in the literature. Methods for implementing fractional-order chaotic systems with analog circuits are also reported in the literature. Methods and circuit literature for implementing automatic switching chaotic systems have also been reported, but with analog circuits. The method and circuit for implementing automatic switching chaotic systems with integer order and fractional order have not been reported, because chaotic systems with integer order and fractional order automatic switching are more complex than integer order chaotic systems, fractional chaotic systems and automatic switching systems. Therefore, a design method of integer-order and fractional-order automatic switching chaotic systems is proposed, and the chaotic system is realized by analog circuits, which is of great significance for the application of such chaotic systems.
发明内容 Summary of the invention
本发明要解决的技术问题是提供一种整数阶与分数阶自动切换混沌系统的方法及模拟 电路。  The technical problem to be solved by the present invention is to provide a method and an analog circuit for an integer-order and fractional-order automatic switching chaotic system.
本发明采用如下技术手段实现发明目的:  The invention adopts the following technical means to achieve the object of the invention:
1、 一种实现整数阶与分数阶自动切换混沌系统的方法, 其特征是在于, 包括以下步骤: ( 1 ) 根据整数阶混沌系统 i为: A method for realizing an integer order and fractional order automatic switching chaotic system, characterized in that the method comprises the following steps: (1) According to the integer order chaotic system i:
dx l dt - a(y - x)  Dx l dt - a(y - x)
dx / dt = bx + cy - xz  Dx / dt = bx + cy - xz
dxl dt - x' - hz  Dxl dt - x' - hz
i a=20,b=14,c=10.6,h=2.8  i a=20, b=14, c=10.6, h=2.8
(2) 根据分数阶混沌系统 ii为:  (2) According to the fractional order chaotic system ii is:
dq X I dtq = a(y - x) d q XI dt q = a(y - x)
dqy I df = bx + cy-xz d q y I df = bx + cy-xz
d"z l dtq = x2 - hz d"zl dt q = x 2 - hz
ii 0<q<l, a=20,b=14,c=10.6,h=2.8  Ii 0<q<l, a=20, b=14, c=10.6, h=2.8
( 3 ) 构造一个选择函数系统 iii将混沌系统 i和 ii组成一个新的整数阶和分数阶自动切换混 v:
Figure imgf000002_0001
Figure imgf000003_0001
(3) Constructing a selection function system iii to form chaotic systems i and ii into a new integer-order and fractional-order automatic switching mixture v :
Figure imgf000002_0001
Figure imgf000003_0001
(4)按照混沌系统 iii 和 iv 构造模拟电路系统, 利用电压比较器 U6 获得模拟的高低电平, x>=0和 x<0, 作为选择函数的输入, 利用模拟开关 U7和 U8实现整数阶积分和分数阶积分 的交替输出, 利用运算放大器 Ul、 U2、 U3以及乘法器 U4、 U5得到整数阶和分数自动切换 混沌系统的模拟电路。 所述运算放大器 Ul、 U2、 U3 采用 LF347 , 乘法器 U4、 U5 采用 AD633JN,, 电压比较器 U6采用 LM339 , 模拟开关 U7、 U8采用 CD4052;  (4) Construct the analog circuit system according to chaotic systems iii and iv, and obtain the analog high and low level by using voltage comparator U6, x>=0 and x<0, as the input of the selection function, realize the integer order by using analog switches U7 and U8. The alternating output of integral and fractional integration, using the operational amplifiers Ul, U2, U3 and multipliers U4, U5 to obtain the analog circuit of the integer order and fractional automatic switching chaotic system. The operational amplifiers Ul, U2, U3 adopt LF347, the multipliers U4, U5 adopt AD633JN, the voltage comparator U6 adopts LM339, the analog switches U7, U8 adopt CD4052;
所述运算放大器 U1连接电压比较器 U6, 模拟开关 U7、 U8, 乘法器 U4、 U5, 所述电 压比较器 U6连接模拟开关 U7、 U8 , 所述乘法器 U4连接运算放大器 U2, 所述运算放大器 U2连接模拟开关 U7, 所述乘法器 U5连接运算放大器 U3 , 所述运算放大器 U3连接模拟开 关 U8 ;  The operational amplifier U1 is connected to a voltage comparator U6, analog switches U7, U8, multipliers U4, U5, the voltage comparator U6 is connected to analog switches U7, U8, and the multiplier U4 is connected to an operational amplifier U2, the operational amplifier U2 is connected to the analog switch U7, the multiplier U5 is connected to the operational amplifier U3, and the operational amplifier U3 is connected to the analog switch U8;
所述运算放大器 U1的第 1引脚通过电阻 Rx与第 2引脚相接, 通过电阻 R1与 U1的第 6引脚相接, 第 3、 5、 10、 12引脚接地, 第 4引脚接 VCC, 第 11 引脚接 VEE, 第 6引脚 先接电阻 Rcl l与电容 C 1 1的并联后, 再接 Rcl2与电容 C 12的并联, 又接 Rcl 3与电容 C13 的并联后, 与 U7第 4引脚相接, 通过电容 C 10与 U7的第 5引脚相接, 第 7引脚与 U6的 第 9引脚相接, 与 U4的第 1 引脚相接, 与 U7的第 9引脚相接, 与 U5的第 1, 3引脚相 接, 通过电阻 R22与 U2第 2引脚相接, 第 8 弓 I脚通过电阻 R25与 U1第 9引脚相接, 第 9 引脚通过电阻 R24和电位器 R12与 U1第 2引脚相接, 通过电阻 R24和电位器 R23与 U2第 2引脚相接, 通过电阻 R24与 U7第 10引脚相接, 第 13引脚通过电阻 R13与 U1第 7引脚 相接, 通过电阻 R14与 U1第 14引脚相接, 与 U4的第 1 引脚相接, 与 U7的第 8引脚相 接, 与 U5的第 1引脚、 第 3引脚相接, 第 14引脚通过电位器 R11与 U 1第 2引脚相接; 所述运算放大器 U2 的第 1引脚通过电阻 Ry与第 1引脚相接, 通过电阻 R2与 U2的 第 6引脚相接, 第 3、 5、 10、 12引脚接地, 第 4引脚接 VCC , 第 11 引脚接 VEE, 第 6引 脚先接电阻 Rc21与电容 C21 的并联后, 再接 Rc22与电容 C22的并联, 又接 Rc23与电容 C23的并联后, 与 U7第 13引脚相接,, 通过电容 C20与 U7的第 12引脚相接, 第 7引脚与 U7第 9引脚相接, 第 8引脚与 U8的第 8引脚相接, 第 9引脚先接电阻 Rc33与电容 C33的 并联, 再接 Rc32与电容 C32的并联, 又接 Rc31 与电容 C31 的并联后, 与 U8第 4引脚相 接,, 通过电容 C30与 U8的第 5引脚相接, 第 13引脚通过电阻 R33与 U4第 3引脚相接, 通过电阻 R33与 U8第 8引脚相接, 通过电阻 R34与 U2第 14引脚相接, 第 14弓 |脚接 U4 的第 3引脚, 通过电位器 R32与 U3第 2引脚相接; The first pin of the operational amplifier U1 is connected to the second pin through the resistor Rx, and is connected to the sixth pin of U1 through the resistor R1, and the third, fifth, ten, and 12th pins are grounded, and the fourth pin is connected. Connect to VCC, the 11th pin is connected to VEE, the 6th pin is connected in parallel with the resistor Rcl l and the capacitor C 1 1 , then connected in parallel with Rcl2 and capacitor C 12, and then connected in parallel with Rcl 3 and capacitor C13, The 4th pin of U7 is connected, the capacitor C 10 is connected to the 5th pin of U7, the 7th pin is connected to the 9th pin of U6, and the 1st pin of U4 is connected, and the U7 is connected. The 9-pin is connected to the first and third pins of U5, and the second pin of U2 is connected through the resistor R22. The eighth pin I is connected to the 9th pin of U1 through the resistor R25. The pin is connected to the second pin of U1 through the resistor R24 and the potentiometer R12, and is connected to the second pin of U2 through the resistor R24 and the potentiometer R23, and is connected to the 10th pin of the U7 through the resistor R24, and the 13th pin is passed. The resistor R13 is connected to the 7th pin of U1, is connected to the 14th pin of U1 through the resistor R14, is connected to the 1st pin of U4, is connected to the 8th pin of U7, and is connected to the 1st pin of U5. The third pin is connected, and the 14th pin is passed through the potentiometers R11 and U. 1 The second pin is connected; the first pin of the operational amplifier U2 is connected to the first pin through the resistor Ry, and is connected to the sixth pin of the U2 through the resistor R2, the third, fifth, ten, and twelve The pin is grounded, the fourth pin is connected to VCC, the eleventh pin is connected to VEE, the sixth pin is connected in parallel with the resistor Rc21 and the capacitor C21, and then connected in parallel with Rc22 and capacitor C22, and connected to R c 23 and capacitor C23. After parallel connection, it is connected to the 13th pin of U7, through the capacitor C20 and the 12th pin of U7, the 7th pin is connected with the 9th pin of U7, the 8th pin and the 8th pin of U8 The pin is connected, the 9th pin is connected in parallel with the resistor Rc33 and the capacitor C33, and then connected in parallel with the Rc32 and the capacitor C32, and then connected in parallel with the capacitor C31, and connected to the 4th pin of the U8, through the capacitor C30. It is connected to the 5th pin of U8. The 13th pin is connected to the 3rd pin of U4 through the resistor R33, and is connected to the 8th pin of U8 through the resistor R33, and is connected to the 14th pin of U2 through the resistor R34. 14th bow | foot connected U4 The third pin is connected to the second pin of U3 through the potentiometer R32;
所述运算放大器 U3第 1引脚通过电阻 Rz与第 引脚相接, 通过电阻 R31与 U2的第 9引脚相接, U3第 2引脚通过 R32接 U2的 14引脚, 第 3引脚接地, 第 4引脚接 VCC, 第 5、 6、 7、 8、 9、 10、 12、 13、 14均悬空, 第 11引脚接 VEE;  The first pin of the operational amplifier U3 is connected to the first pin through the resistor Rz, and is connected to the ninth pin of the U2 through the resistor R31, and the second pin of the U3 is connected to the 14 pin of the U2 through the R32, the third pin. Grounding, the 4th pin is connected to VCC, the 5th, 6th, 7th, 8th, 9th, 10th, 12th, 13th, 14th are all suspended, the 11th pin is connected to VEE;
所述乘法器 U4的第 1 引脚接 U1 的第 Ί引脚,,第 3引脚接 U2的第 14引脚, 第 2、 4、 6引脚均接地, 第 5引脚接 VEE, 第 7引脚接通过电阻 R21接 U2的第 2引脚, 第 8引 脚接 VCC;  The first pin of the multiplier U4 is connected to the third pin of U1, the third pin is connected to the 14th pin of U2, the second, fourth, and sixth pins are grounded, and the fifth pin is connected to VEE, 7 pin is connected to the second pin of U2 through resistor R21, and the eighth pin is connected to VCC;
所述乘法器 U5的第 1、 3引脚接 U1的第 7引脚, 第 2、 4、 6引脚均接地, 第 5引脚 接 VEE, 第 7引脚接通过电阻 R31接 U3的第 2引脚, 第 8引脚接 VCC;  The first and third pins of the multiplier U5 are connected to the seventh pin of U1, the second, fourth, and sixth pins are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the U3 through the resistor R31. 2 pins, the 8th pin is connected to VCC;
所述电压比较器 U6 的第 1、 2、 4、 5、 6、 7、 9、 10、 11、 12、 13 引脚悬空, 第 3 引 脚接 VCC; 第 8引脚通过电阻 R02与 U7的第 1引脚、 U8的第 1 引脚相接, 第 12引脚接 VEE, 第 14引脚通过二极管 D1与与 U7的第 1引脚、 U8的第 1引脚相接, 通过电阻 R01 接 VCC;  The first, 2, 4, 5, 6, 7, 9, 10, 11, 12, 13 pins of the voltage comparator U6 are left floating, the third pin is connected to VCC; the eighth pin is passed through the resistors R02 and U7. The first pin and the first pin of U8 are connected, the 12th pin is connected to VEE, and the 14th pin is connected to the first pin of U7 and the first pin of U8 through diode D1, and is connected through the resistor R01. VCC;
所述模拟开关 U7的第 1引脚通过电阻 R02接 U6的第 8引脚, 第 2引脚接 VCC, 第 3 引脚接 VEE, 第 4引脚通过分数阶积分单元接 U1的 6引脚, 第 5引脚通过电容 C10接 U1 的 6引脚, 第 8引脚接 U1的 7引脚, 第 9引脚接 U2的 7引脚, 第 12引脚通过 C20接 U2 的 6引脚, 第 13引脚通过分数阶积分单元接 U2的 6引脚, 第 14引脚接 VCC, 第 15、 16 引脚接地;  The first pin of the analog switch U7 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 6 pin of U1 through the fractional integration unit. The 5th pin is connected to the 6 pin of U1 through the capacitor C10, the 8th pin is connected to the 7 pin of U1, the 9th pin is connected to the 7 pin of U2, and the 12th pin is connected to the 6 pin of U2 through C20. The 13th pin is connected to the 6 pin of U2 through the fractional integration unit, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded.
所述模拟开关 U8的第 1引脚通过电阻 R02接 U6的第 8引脚, 第 2引脚接 VCC, 第 3 引脚接 VEE, 第 4引脚通过分数阶积分单元接 U2的 9引脚, 第 5引脚通过电容 C30接 U2 的 9引脚, 第 8引脚接 U2的 8引脚, 第 14引脚接 VCC, 第 15、 16引脚接地。  The first pin of the analog switch U8 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 9 pin of U2 through the fractional integration unit. The 5th pin is connected to the 9 pin of U2 through the capacitor C30, the 8th pin is connected to the 8 pin of U2, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded.
2、 一种实现整数阶和分数阶 β动切换混沌系统的电路, 其特征是在于, 包括运算放大 器 Ul、 U2、 U3与乘法器 U4、 U5及电压比较器 U6和模拟开关 U7、 U8组成, 所述运算放 大器 U1连接电压比较器 U6, 模拟开关 U7、 U8, 乘法器 U4、 U5 , 所述电压比较器 U6连 接模拟开关 U7、 U8, 所述乘法器 U4连接运算放大器 U2, 所述运算放大器 U2连接模拟开 关 U7, 所述乘法器 U5连接运算放大器 U3, 所述运算放大器 U3连接模拟开关 U8;  2. A circuit for implementing an integer-order and fractional-order β-switching chaotic system, comprising: an operational amplifier U1, U2, U3 and a multiplier U4, U5 and a voltage comparator U6 and an analog switch U7, U8, The operational amplifier U1 is connected to a voltage comparator U6, analog switches U7, U8, multipliers U4, U5, the voltage comparator U6 is connected to analog switches U7, U8, and the multiplier U4 is connected to an operational amplifier U2, the operational amplifier U2 is connected to the analog switch U7, the multiplier U5 is connected to the operational amplifier U3, the operational amplifier U3 is connected to the analog switch U8;
所述运算放大器 U1的第 1引脚通过电阻 Rx与第 2引脚相接, 通过电阻 R1与 U1的第 6引脚相接, 第 3、 5、 10、 12引脚接地, 第 4引脚接 VCC, 第 11 弓 |脚接 VEE, 第 6引脚 先接电阻 Rcll与电容 C11的并联后, 再接 Rcl2与电容 C12的并联, 又接 Rcl3与电容 C13 的并联后, 与 U7第 4引脚相接, 通过电容 C10与 U7的第 5引脚相接, 第 7引脚与 U6的 第 9引脚相接, 与 U4的第 1 引脚相接, 与 U7的第 9引脚相接, 与 U5的第 1, 3引脚相 接, 通过电阻 R22与 U2第 2引脚相接, 第 8 引脚通过电阻 R25与 U1第 9引脚相接, 第 9 引脚通过电阻 R24和电位器 R12与 U1第 2引脚相接, 通过电阻 R24和电位器 R23与 U2第 2引脚相接, 通过电阻 R24与 U7第 10引脚相接, 第 13引脚通过电阻 R13与 U1第 7引脚 相接, 通过电阻 R14与 U1 第 14引脚相接, 与 U4的第 1 引脚相接, 与 U7的第 8引脚相 接, 与 U5的第 1引脚、 第 3引脚相接, 第 14引脚通过电位器 R1 1与 U1第 2引脚相接; 所述运算放大器 U2 的第 1引脚通过电阻 Ry与第 2引脚相接, 通过电阻 R2与 U2的 第 6引脚相接, 第 3、 5、 10、 12引脚接地, 第 4引脚接 VCC, 第 11引脚接 VEE, 第 6引 脚先接电阻 Rc21与电容 C21 的并联后, 再接 Rc22与电容 C22的并联, 又接 Rc23与电容 C23的并联后, 与 U7第 13引脚相接,, 通过电容 C20与 U7的第 12引脚相接, 第 7引脚与 U7第 9引脚相接, 第 8引脚与 U8的第 8引脚相接, 第 9引脚先接电阻 Rc33与电容 C33的 并联, 再接 Rc32与电容 C32的并联, 又接 Rc31与电容 C31 的并联后, 与 U8第 4引脚相 接,, 通过电容 C30与 U8的第 5引脚相接, 第 13引脚通过电阻 R33与 U4第 3引脚相接, 通过电阻 R33与 U8第 8引脚相接, 通过电阻 R34与 U2第 14引脚相接, 第 14引脚接 U4 的第 3引脚, 通过电位器 R32与 U3第 2引脚相接: The first pin of the operational amplifier U1 is connected to the second pin through the resistor Rx, and is connected to the sixth pin of U1 through the resistor R1, and the third, fifth, ten, and 12th pins are grounded, and the fourth pin is connected. Connect to VCC, the 11th bow|female is connected to VEE, the 6th pin is connected in parallel with the resistor Rcll and the capacitor C11, then the parallel connection of Rcl2 and capacitor C12, and the parallel connection of Rcl3 and capacitor C13, and the fourth lead of U7 The pins are connected, through the capacitor C10 and the fifth pin of U7, the seventh pin and the U6 The 9th pin is connected, connected to the 1st pin of U4, connected to the 9th pin of U7, connected to the 1st and 3rd pins of U5, and connected to the 2nd pin of U2 through the resistor R22. The 8th pin is connected to the 9th pin of U1 through the resistor R25, and the 9th pin is connected to the 2nd pin of U1 through the resistor R24 and the potentiometer R12, through the resistor R24 and the potentiometer R23 and the U2 pin 2 Connected, through the resistor R24 and U7 10th pin, the 13th pin is connected to the 7th pin of U1 through the resistor R13, through the resistor R14 and the 14th pin of U1, and the 1st pin of U4 Connected to the 8th pin of U7, connected to the 1st and 3rd pins of U5, the 14th pin is connected to the 2nd pin of U1 through potentiometer R1 1; The first pin of U2 is connected to the second pin through the resistor Ry, the sixth pin of U2 is connected through the resistor R2, the third, fifth, ten, and 12 pins are grounded, and the fourth pin is connected to VCC. 11 pin is connected to VEE, the 6th pin is connected in parallel with the capacitor R21 and the capacitor C21. Then, the parallel connection between Rc22 and the capacitor C22 is connected, and the parallel connection between the Rc23 and the capacitor C23 is connected to the 13th pin of the U7. Through the capacitor C20 and the 12th pin of U7 The 7th pin is connected to the 9th pin of U7, the 8th pin is connected to the 8th pin of U8, the 9th pin is connected in parallel with the resistor Rc33 and the capacitor C33, and then the parallel connection of Rc32 and capacitor C32 is connected. After connecting Rc31 and capacitor C31 in parallel, it is connected to the 4th pin of U8, and is connected to the 5th pin of U8 through capacitor C30. The 13th pin is connected to the 3rd pin of U4 through resistor R33. Connected to the 8th pin of U8 through resistor R33, connected to pin 14 of U2 through resistor R34, pin 14 is connected to pin 3 of U4, and connected to pin 2 of U3 via potentiometer R32:
所述运算放大器 U3第 1引脚通过电阻 Rz与第 2引脚相接, 通过电阻 R31与 U2的第 9引脚相接, U3第 2引脚通过 R32接 U2的 14引脚, 第 3引脚接地, 第 4引脚接 VCC, 第 5、 6、 7、 8、 9、 10、 12、 13、 14均悬空, 第 11引脚接 VEE;  The first pin of the operational amplifier U3 is connected to the second pin through the resistor Rz, and is connected to the ninth pin of the U2 through the resistor R31, and the second pin of the U3 is connected to the 14 pin of the U2 through the R32. The ground is grounded, the 4th pin is connected to VCC, the 5th, 6th, 7th, 8th, 9th, 10th, 12th, 13th and 14th are all suspended, and the 11th pin is connected to VEE;
所述乘法器 U4的第 1 引脚接 U1 的第 7引脚, 第 3引脚接 U2的第 14引脚, 第 2、 4、 6引脚均接地, 第 5引脚接 VEE, 第 7引脚接通过电阻 R21接 U2的第 2引脚, 第 8引 脚接 VCC;  The first pin of the multiplier U4 is connected to the seventh pin of U1, the third pin is connected to the 14th pin of U2, the second, fourth, and sixth pins are grounded, and the fifth pin is connected to VEE, the seventh pin. The pin is connected to the second pin of U2 through the resistor R21, and the eighth pin is connected to VCC;
所述乘法器 U5的第 1、 3引脚接 U1的第 7引脚, 第 2、 4、 6引脚均接地, 第 5引脚 接 VEE, 第 7引脚接通过电阻 R31接 U3的第 2引脚, 第 8引脚接 VCC;  The first and third pins of the multiplier U5 are connected to the seventh pin of U1, the second, fourth, and sixth pins are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the U3 through the resistor R31. 2 pins, the 8th pin is connected to VCC;
所述电压比较器 U6的第 1、 2、 4、 5、 6、 7、 9、 10、 11、 12、 13 引脚悬空, 第 3 引 脚接 VCC; 第 8引脚通过电阻 R02与 U7的第 1弓 I脚、 U8的第 1 引脚相接, 第 12引脚接 VEE, 第 14引脚通过二极管 D1与与 U7的第 1引脚、 U8的第 1弓 I脚相接, 通过电阻 R01 接 VCC;  The first, 2, 4, 5, 6, 7, 9, 10, 11, 12, 13 pins of the voltage comparator U6 are left floating, the third pin is connected to VCC; the eighth pin is passed through the resistors R02 and U7. The first pin I and the first pin of U8 are connected, the 12th pin is connected to VEE, and the 14th pin is connected to the first pin of U7 and the first pin of U8 through diode D1. R01 is connected to VCC;
所述模拟开关 U7的第 1引脚通过电阻 R02接 U6的第 8引脚, 第 2引脚接 VCC, 第 3 引脚接 VEE, 第 4引脚通过分数阶积分单元接 U1的 6引脚, 第 5引脚通过电容 C10接 U1 的 6引脚, 第 8引脚接 U1的 7引脚, 第 9引脚接 U2的 7引脚, 第 12引脚通过 C20接 U2 的 6引脚, 第 13引脚通过分数阶积分单元接 U2的 6引脚, 第 14引脚接 VCC, 第 15、 16 引脚接地; The first pin of the analog switch U7 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 6 pin of U1 through the fractional integration unit. The 5th pin is connected to the 6 pin of U1 through the capacitor C10, the 8th pin is connected to the 7 pin of U1, the 9th pin is connected to the 7 pin of U2, and the 12th pin is connected to the U2 through C20. The 6 pin, the 13th pin is connected to the 6 pin of U2 through the fractional integration unit, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded;
所述模拟开关 U8的第 1引脚通过电阻 R02接 U6的第 8引脚, 第 2引脚接 VCC, 第 3 引脚接 VEE, 第 4引脚通过分数阶积分单元接 U2的 9引脚, 第 5引脚通过电容 C30接 U2 的 9引脚, 第 8引脚接 U2的 8引脚, 第 14引脚接 VCC, 第 15、 16引脚接地。  The first pin of the analog switch U8 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 9 pin of U2 through the fractional integration unit. The 5th pin is connected to the 9 pin of U2 through the capacitor C30, the 8th pin is connected to the 8 pin of U2, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded.
附图说明 DRAWINGS
图 1为本发明优选实施例的电路连接结构示意图。  FIG. 1 is a schematic diagram of a circuit connection structure according to a preferred embodiment of the present invention.
图 2为运算放大器 U1外围电路结构示意图。  Figure 2 shows the structure of the peripheral circuit of the operational amplifier U1.
图 3为运算放大器 U2和乘法器 U4外围电路结构示意图。  Figure 3 shows the structure of the peripheral circuits of the operational amplifier U2 and the multiplier U4.
图 4为运算放大器 U3和乘法器 U5外围电路结构示意图。  Figure 4 shows the structure of the peripheral circuits of the operational amplifier U3 and the multiplier U5.
图 5为电压比较器 U6外围电路结构示意图。  Figure 5 is a schematic diagram showing the structure of the peripheral circuit of the voltage comparator U6.
图 6为模拟开关 U7的外围电路结构示意图。  Figure 6 is a schematic diagram showing the structure of the peripheral circuit of the analog switch U7.
图 7为模拟开关 U8外围电路结构示意图。  Figure 7 is a schematic diagram showing the structure of the peripheral circuit of the analog switch U8.
具体实施方式 detailed description
下面结合附图和优选实施例对本发明作更进一步的详细描述。  The invention will now be described in further detail with reference to the drawings and preferred embodiments.
参见图 1-图 7, 首先构造整数阶与分数阶自动切换混沌系统, 本优选实施例选择的一 个整数阶混沌系统 i为:  Referring to Figures 1-7, an integer-order and fractional-order automatic switching chaotic system is first constructed. An integer-order chaotic system i selected in the preferred embodiment is:
dxl dt = a{y-x)  Dxl dt = a{y-x)
dxl dt-bx + cy-xz  Dxl dt-bx + cy-xz
dxl dt = x2 -h∑ Dxl dt = x 2 -h∑
a=20,b=14,c=10.6,h=2.8  a=20, b=14, c=10.6, h=2.8
选择的分数阶混沌系统 ii为: The selected fractional chaotic system ii is:
d"x/dt9 ^a(y-x) d"x/dt 9 ^a(yx)
dqy I df =bx + cy-xz d q y I df =bx + cy-xz
dqzl d =x2-hz d q zl d =x 2 -hz
ii 0<q<l,a=20,b=14,c=10.6,h=2.8  Ii 0<q<l, a=20, b=14, c=10.6, h=2.8
构造一个选择函数系统 iii, 将混沌系统 i和 ii组成一个新的整数阶与分数阶自动切换混沌系 统 iv:
Figure imgf000006_0001
df{x)x / dtf(x) = a(y - x)
Construct a selection function system iii, and combine chaotic systems i and ii into a new integer-order and fractional-order automatic switching chaotic system iv:
Figure imgf000006_0001
d f{x) x / dt f(x) = a(y - x)
' df{x)y I dtf ) ^ bx + cy - xz ' d f{x) y I dt f ) ^ bx + cy - xz
df[x)z / dtf ) ^ x2 - hz d f[x) z / dt f ) ^ x 2 - hz
iv  Iv
按照系统 iii和整数阶与分数阶自动切换混沌系统 iv构造模拟电路, 利用电压比较器 U6获 得模拟的高低电平, x>=0和 x<0, 作为选择函数的输入, 利用模拟开关 U7和 U8实现整数 阶积分和分数阶积分的交替输出, 利用运算放大器 Ul、 U2、 U3以及乘法器 U4、 U5得到整 数阶和分数自动切换混沌系统的模拟电路。 所述运算放大器 Ul、 U2、 U3采用 LF347, 乘法 器 U4、 U5采用 AD633JN,, 电压比较器 U6采用 LM339, 模拟开关 U7、 U8采用 CD4052; 所述运算放大器 U1连接电压比较器 U6, 模拟开关 U7、 U8, 乘法器 U4、 U5, 所述电 压比较器 U6连接模拟开关 U7、 U8, 所述乘法器 U4连接运算放大器 U2, 所述运算放大器 U2连接模拟开关 U7, 所述乘法器 U5连接运算放大器 U3, 所述运算放大器 U3连接模拟开 关 U8; According to system iii and integer-order and fractional-order automatic switching chaotic system iv to construct an analog circuit, using voltage comparator U6 to obtain the analog high and low level, x>=0 and x<0, as the input of the selection function, using analog switch U7 and U8 realizes the alternating output of integer order integral and fractional integral, and uses the operational amplifiers Ul, U2, U3 and multipliers U4, U5 to obtain the analog circuit of the integer order and fractional automatic switching chaotic system. The operational amplifiers U1, U2, U3 are LF347, the multipliers U4, U5 are AD633JN, the voltage comparator U6 is LM339, the analog switches U7, U8 are CD4052; the operational amplifier U1 is connected to the voltage comparator U6, the analog switch U7 U8, multiplier U4, U5, the voltage comparator U6 is connected to the analog switches U7, U8, the multiplier U4 is connected to the operational amplifier U2, the operational amplifier U2 is connected to the analog switch U7, and the multiplier U5 is connected to the operational amplifier U3, the operational amplifier U3 is connected to the analog switch U8;
所述运算放大器 U1的第 1引脚通过电阻 Rx与第 2引脚相接, 通过电阻 R1与 U1的第 6引脚相接, 第 3、 5、 10、 12引脚接地, 第 4引脚接 VCC, 第 11 引脚接 VEE, 第 6引脚 先接电阻 Rcl l与电容 C11的并联后, 再接 Rcl2与电容 C12的并联, 又接 Rcl3与电容 C13 的并联后, 与 U7第 4引脚相接, 通过电容 C10与 U7的第 5引脚相接, 第 7引脚与 U6的 第 9引脚相接, 与 U4的第 1 引脚相接, 与 U7的第 9引脚相接, 与 U5的第 1, 3引脚相 接, 通过电阻 R22与 U2第 2引脚相接, 第 8 引脚通过电阻 R25与 U1第 9引脚相接, 第 9 引脚通过电阻 R24和电位器 R12与 U1第 2引脚相接, 通过电阻 R24和电位器 R23与 U2第 2引脚相接, 通过电阻 R24与 U7第 10引脚相接, 第 13引脚通过电阻 R13与 U1第 7引脚 相接, 通过电阻 R14与 U1第 14引脚相接, 与 U4的第 1 引脚相接, 与 U7的第 8引脚相 接, 与 U5的第 1引脚、 第 3引脚相接, 第 14引脚通过电位器 R11与 U1第 2引脚相接; 所述运算放大器 U2 的第 1 引脚通过电阻 Ry与第 2引脚相接, 通过电阻 R2与 U2的 第 6引脚相接, 第 3、 5、 10、 12引脚接地, 第 4引脚接 VCC, 第 11引脚接 VEE, 第 6引 脚先接电阻 Rc21与电容 C21 的并联后, 再接 Rc22与电容 C22的并联, 又接 Rc23与电容 C23的并联后, 与 U7第 13引脚相接,, 通过电容 C20与 U7的第 12引脚相接, 第 7引脚与 U7第 9引脚相接, 第 8引脚与 U8的第 8引脚相接, 第 9引脚先接电阻 Rc33与电容 C33的 并联, 再接 Rc32与电容 C32的并联, 又接 Rc31 与电容 C31 的并联后, 与 U8第 4引脚相 接,, 通过电容 C30与 U8的第 5引脚相接, 第 13引脚通过电阻 R33与 U4第 3引脚相接, 通过电阻 R33与 U8第 8引脚相接, 通过电阻 R34与 U2第 14引脚相接, 第 14引脚接 U4 的第 3引脚, 通过电位器 R32与 U3第 2引脚相接; The first pin of the operational amplifier U1 is connected to the second pin through the resistor Rx, and is connected to the sixth pin of U1 through the resistor R1, and the third, fifth, ten, and 12th pins are grounded, and the fourth pin is connected. Connect to VCC, the 11th pin is connected to VEE, the 6th pin is connected in parallel with the resistor Rcl l and the capacitor C11, then the parallel connection of Rcl2 and capacitor C12, and the parallel connection of Rcl3 and capacitor C13, and the fourth lead of U7 The pin is connected, the capacitor C10 is connected to the fifth pin of U7, the seventh pin is connected to the 9th pin of U6, and is connected to the first pin of U4, and is connected to the 9th pin of U7. It is connected to the first and third pins of U5, and is connected to the second pin of U2 through the resistor R22. The eighth pin is connected to the 9th pin of U1 through the resistor R25, and the 9th pin is connected to the potential R24 and the potential. R12 is connected to the second pin of U1, and is connected to the second pin of U2 through the resistor R24 and the potentiometer R23, and is connected to the 10th pin of U7 through the resistor R24, and the 13th pin is passed through the resistor R13 and U1. The pin is connected, connected to the 14th pin of U1 through the resistor R14, connected to the 1st pin of U4, connected to the 8th pin of U7, and the 1st pin and the 3rd pin of U5. Connect, the 14th pin through the potentiometer R11 and U1 2nd lead The first pin of the operational amplifier U2 is connected to the second pin through the resistor Ry, and is connected to the sixth pin of U2 through the resistor R2, and the third, fifth, ten, and 12th pins are grounded. The fourth pin is connected to VCC, the eleventh pin is connected to VEE, the sixth pin is connected in parallel with the resistor Rc21 and the capacitor C21, and then connected in parallel with Rc22 and capacitor C22, and then connected in parallel with Rc23 and capacitor C23, and U7. The 13th pin is connected, the capacitor C20 is connected to the 12th pin of U7, the 7th pin is connected to the 9th pin of U7, and the 8th pin is connected to the 8th pin of U8, the 9th pin The pin is connected in parallel with the capacitor R33 and the capacitor C33, and then connected in parallel with the capacitor C32, and then connected in parallel with the capacitor C31, and connected to the fourth pin of the U8, through the fifth lead of the capacitor C30 and U8. The pin is connected, the 13th pin is connected to the 3rd pin of U4 through the resistor R33, the 8th pin of the U8 is connected through the resistor R33, the 14th pin of the U2 is connected through the resistor R34, and the 14th pin is connected to the U4. The third pin is connected to the second pin of U3 through the potentiometer R32;
所述运算放大器 U3第 1引脚通过电阻 Rz与第 2引脚相接, 通过电阻 R31与 U2的第 9引脚相接, U3第 2引脚通过 R32接 U2的 14引脚, 第 3引脚接地, 第 4引脚接 VCC, 第 5、 6、 7、 8、 9、 10、 12、 13、 14均悬空, 第 11引脚接 VEE;  The first pin of the operational amplifier U3 is connected to the second pin through the resistor Rz, and is connected to the ninth pin of the U2 through the resistor R31, and the second pin of the U3 is connected to the 14 pin of the U2 through the R32. The ground is grounded, the 4th pin is connected to VCC, the 5th, 6th, 7th, 8th, 9th, 10th, 12th, 13th and 14th are all suspended, and the 11th pin is connected to VEE;
所述乘法器 U4的第 1 引脚接 U1 的第 7引脚, 第 3引脚接 U2的第 14引脚, 第 2、 4、 6引脚均接地, 第 5引脚接 VEE, 第 7引脚接通过电阻 R21接 U2的第 2引脚, 第 8引 脚接 VCC;  The first pin of the multiplier U4 is connected to the seventh pin of U1, the third pin is connected to the 14th pin of U2, the second, fourth, and sixth pins are grounded, and the fifth pin is connected to VEE, the seventh pin. The pin is connected to the second pin of U2 through the resistor R21, and the eighth pin is connected to VCC;
所述乘法器 U5的第 1、 3引脚接 U1的第 Ί引脚, 第 2、 4、 6引脚均接地, 第 5引脚 接 VEE, 第 7引脚接通过电阻 R31接 U3的第 2引脚, 第 8引脚接 VCC;  The first and third pins of the multiplier U5 are connected to the third pin of U1, the second, fourth, and sixth pins are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the U3 through the resistor R31. 2 pins, the 8th pin is connected to VCC;
所述电压比较器 U6的第 1、 2、 4、 5、 6、 7、 9、 10、 11、 12、 13 引脚悬空, 第 3 引 脚接 VCC; 第 8引脚通过电阻 R02与 U7的第 1引脚、 U8的第 1 引脚相接, 第 12引脚接 VEE, 第 14引脚通过二极管 D1与与 W的第 1引脚、 U8的第 1引脚相接, 通过电阻 R01 接 VCC;  The first, 2, 4, 5, 6, 7, 9, 10, 11, 12, 13 pins of the voltage comparator U6 are left floating, the third pin is connected to VCC; the eighth pin is passed through the resistors R02 and U7. The first pin and the first pin of U8 are connected, the 12th pin is connected to VEE, and the 14th pin is connected to the first pin of W and the first pin of U8 through diode D1, and is connected through the resistor R01. VCC;
所述模拟开关 U7的第 1 引脚通过电阻 R02接 U6的第 8引脚, 第 2引脚接 VCC, 第 3 引脚接 VEE, 第 4引脚通过分数阶积分单元接 U1的 6引脚, 第 5引脚通过电容 C10接 U1 的 6引脚, 第 8引脚接 U1的 1引脚, 第 9引脚接 U2的 Ί引脚, 第 12引脚通过 C20接 U2 的 6引脚, 第 13引脚通过分数阶积分单元接 U2的 6引脚, 第 14引脚接 VCC, 第 15、 16 引脚接地;  The first pin of the analog switch U7 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 6 pin of U1 through the fractional integration unit. The 5th pin is connected to the 6 pin of U1 through the capacitor C10, the 8th pin is connected to the 1 pin of U1, the 9th pin is connected to the Ί pin of U2, and the 12th pin is connected to the 6 pin of U2 through C20. The 13th pin is connected to the 6 pin of U2 through the fractional integration unit, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded.
所述模拟开关 U8的第 1引脚通过电阻 R02接 U6的第 8引脚, 第 2引脚接 VCC, 第 3 引脚接 VEE, 第 4引脚通过分数阶积分单元接 U2的 9引脚, 第 5引脚通过电容 C30接 U2 的 9引脚, 第 8引脚接 U2的 8引脚, 第 14引脚接 VCC, 第 15、 16引脚接地。  The first pin of the analog switch U8 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 9 pin of U2 through the fractional integration unit. The 5th pin is connected to the 9 pin of U2 through the capacitor C30, the 8th pin is connected to the 8 pin of U2, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded.
当然, 上述说明并非对发明的限制, 本发明也不仅限于上述举例, 本技术领域的普通 技术人员在本发明的实质范围内所做出的变化、 改型、 添加或替换, 也属于本发明的保护范 围。  The above description is not intended to limit the invention, and the invention is not limited to the above examples, and variations, modifications, additions or substitutions made by those skilled in the art within the scope of the invention also belong to the invention. protected range.

Claims

权 利 要 求 书 Claim
1、 一种实现整数阶和分数阶自动切换混沌系统的方法, 其特征是在于, 包括 以下步骤:  A method for realizing an integer order and fractional order automatic switching chaotic system, characterized in that the method comprises the following steps:
( 1 )根据整数阶混沌系统 i为:  (1) According to the integer order chaotic system i is:
dxl dt = a(y-x)  Dxl dt = a(y-x)
dx/ dt = bx + cy-xz i a=20,b=14,c=10.6,h=2.8  Dx/ dt = bx + cy-xz i a=20, b=14, c=10.6, h=2.8
dxl dt- x1 ~ hz Dxl dt- x 1 ~ hz
( 2 )根据分数阶混沌系统 ii为:  (2) According to the fractional order chaotic system ii is:
dqxl df =a(y-x) d q xl df = a(yx)
- dqyldtq ^bx + cy-xz ii 0<q<l, a=20,b=14,c=10.6,h=2.8 - d q yldt q ^bx + cy-xz ii 0<q<l, a=20, b=14,c=10.6,h=2.8
dqz I df =x2 -hz d q z I df =x 2 -hz
(3)构造一个选择函数系统 iii将混沌系统 i和 ii组成一个新的整数阶和分 数阶自动切换混沌系统 iv:
Figure imgf000009_0001
(3) Construct a selection function system iii to form chaotic systems i and ii into a new integer-order and fractional-order automatic switching chaotic system iv:
Figure imgf000009_0001
'dfix)x/dtf(x) =a(y-x)'d fix) x/dt f(x) = a(yx)
xz iv Xz iv
Figure imgf000009_0002
Figure imgf000009_0002
(4)按照混沌系统 iii和 iv构造模拟电路系统, 利用电压比较器 U6获得模拟 的高低电平, x>=0和 x<0, 作为选择函数的输入, 利用模拟开关 U7和 U8实现 整数阶积分和分数阶积分的交替输出, 利用运算放大器 Ul、 U2、 U3 以及乘法 器 U4、 U5 得到整数阶和分数自动切换混沌系统的模拟电路。 所述运算放大器 Ul、 U2、 U3采用 LF347, 乘法器 U4、 U5采用 AD633JN,, 电压比较器 U6采用 LM339, 模拟开关 U7、 U8采用 CD4052;  (4) According to the chaotic system iii and iv, the analog circuit system is constructed, and the analog high and low level is obtained by the voltage comparator U6, x>=0 and x<0, as the input of the selection function, and the integer order is realized by the analog switches U7 and U8. The alternating output of integral and fractional integration uses the operational amplifiers Ul, U2, U3 and multipliers U4, U5 to obtain an analog circuit that automatically switches chaotic systems with integer order and fractional. The operational amplifiers Ul, U2, U3 use LF347, the multipliers U4, U5 use AD633JN, the voltage comparator U6 uses LM339, the analog switches U7, U8 use CD4052;
所述运算放大器 U1 连接电压比较器 U6, 模拟开关 U7、 U8, 乘法器 U4、 U5, 所述电压比较器 U6连接模拟开关 U7、 U8, 所述乘法器 U4连接运算放大器 U2, 所述运算放大器 U2 连接模拟开关 U7, 所述乘法器 U5 连接运算放大器 U3, 所述运算放大器 U3连接模拟开关 U8;  The operational amplifier U1 is connected to a voltage comparator U6, analog switches U7, U8, multipliers U4, U5, the voltage comparator U6 is connected to analog switches U7, U8, and the multiplier U4 is connected to an operational amplifier U2, the operational amplifier U2 is connected to the analog switch U7, the multiplier U5 is connected to the operational amplifier U3, the operational amplifier U3 is connected to the analog switch U8;
所述运算放大器 U1的第 1引脚通过电阻 Rx与第 2引脚相接, 通过电阻 R1 与 Ul的第 6引脚相接, 第 3、 The first pin of the operational amplifier U1 is connected to the second pin through the resistor Rx, and passes through the resistor R1. Connected to the 6th pin of Ul, the third,
5、 10、 12引脚接地, 第 4引脚接 VCC , 第 11引 脚接 VEE , 第 6 引脚先接电阻 Rcl l 与电容 C11 的并联后, 再接 Rcl 2 与电容 C12的并联, 又接 Rc l 3与电容 C13的并联后, 与 U7第 4引脚相接, 通过电容 C10与 U7的第 5引脚相接, 第 7引脚与 U6的第 9引脚相接, 与 U4的第 1引脚 相接, 与 U7的第 9引脚相接, 与 U5的第 1 , 3引脚相接, 通过电阻 R22与 U2 第 1引脚相接, 第 8 引脚通过电阻 R25与 U1第 9引脚相接, 第 9引脚通过电 阻 R24和电位器 R12与 U1第 2引脚相接, 通过电阻 R24和电位器 R23与 112第 2引脚相接, 通过电阻 R24与 U7第 10引脚相接, 第 13引脚通过电阻 R13与 U1 第 7 引脚相接, 通过电阻 R14与 U1 第 14 引脚相接, 与 U4的第 1 引脚相 接, 与 U7的第 8引脚相接, 与 U5的第 1引脚、 第 3引脚相接, 第 14引脚通 过电位器 R11与 U1第 2引脚相接; 5, 10, 12 pins are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, the 6th pin is connected in parallel with the resistor Rcl l and the capacitor C11, and then Rcl 2 is connected in parallel with the capacitor C12. Connect Rc l 3 and capacitor C13 in parallel, connect with the 4th pin of U7, connect the 5th pin of U7 through capacitor C10, the 7th pin and the 9th pin of U6, and U4 The first pin is connected, connected to the 9th pin of U7, connected to the 1st and 3rd pins of U5, connected to the 1st pin of U2 through the resistor R22, and the 8th pin is connected to the U1 through the resistors R25 and U1. The 9th pin is connected, the 9th pin is connected to the 2nd pin of U1 through the resistor R24 and the potentiometer R12, and the 2nd pin of the potentiometer R23 and 112 is connected through the resistor R24, and the 10th through the resistor R24 and U7 The pin is connected, the 13th pin is connected to the 7th pin of U1 through the resistor R13, the 14th pin of U1 is connected through the resistor R14, the 1st pin of U4 is connected, and the 8th pin of U7 Connected to the first pin and the third pin of U5, the 14th pin is connected to the second pin of U1 through the potentiometer R11;
所述运算放大器 U2 的第 1 引脚通过电阻 Ry与第 2引脚相接, 通过电阻 R2与 U2的第 6引脚相接, 第 3、 5、 10、 12引脚接地, 第 4引脚接 VCC , 第 11 引脚接 VEE , 第 6引脚先接电阻 Rc21与电容 C21的并联后, 再接 Rc22与电容 C22的并联, 又接 Rc23与电容 C23的并联后, 与 U7第 1 3引脚相接,, 通过电 容 C20与 U7的第 12引脚相接, 第 7引脚与 U7第 9引脚相接, 第 8引脚与 U8 的第 8引脚相接, 第 9引脚先接电阻 Rc33与电容 C33的并联, 再接 Rc 32与电 容 C32的并联, 又接 Rc 31与电容 C31的并联后, 与 U8第 4引脚相接,, 通过 电容 C30与 U8 的第 5 引脚相接, 第 1 3引脚通过电阻 R33与 U4第 3 引脚相 接, 通过电阻 R33与 U8第 8引脚相接, 通过电阻 R34与 U2第 14引脚相接, 第 14引脚接 U4的第 3引脚, 通过电位器 R32与 U3第 2引脚相接;  The first pin of the operational amplifier U2 is connected to the second pin through the resistor Ry, and is connected to the sixth pin of the U2 through the resistor R2, and the third, fifth, ten, and 12th pins are grounded, and the fourth pin is connected. Connect to VCC, the 11th pin is connected to VEE, the 6th pin is connected in parallel with the resistor Rc21 and the capacitor C21, then the parallel connection of Rc22 and capacitor C22, and the parallel connection of Rc23 and capacitor C23, and the 7th lead of U7 The pin is connected, through the capacitor C20 and the 12th pin of U7, the 7th pin is connected with the 9th pin of U7, the 8th pin is connected with the 8th pin of U8, the 9th pin is first Connect the resistor Rc33 and the capacitor C33 in parallel, and then connect Rc 32 and capacitor C32 in parallel, connect Rc 31 and capacitor C31 in parallel, connect with U8 pin 4, pass capacitor C30 and U8 pin 5. Connected, the 1st 3 pin is connected to the 3rd pin of U4 through the resistor R33, the 8th pin of U8 is connected through the resistor R33, the 14th pin of U2 is connected through the resistor R34, and the 14th pin is connected to the U4. The third pin is connected to the second pin of U3 through the potentiometer R32;
所述运算放大器 U3第 1引脚通过电阻 Rz与第 2引脚相接, 通过电阻 R31 与 U2的第 9 引脚相接, U3第 2 引脚通过 R32接 U2的 14 引脚, 第 3引脚接 地, 第 4引脚接 VCC , 第 5、 The first pin of the operational amplifier U3 is connected to the second pin through the resistor Rz, and is connected to the ninth pin of the U2 through the resistor R31, and the second pin of the U3 is connected to the 14 pin of the U 2 through the R32, the third pin. Pin ground, the fourth pin is connected to VCC, the fifth,
6、 6,
7、 7,
8、 8,
9、 9,
1 0、 12、 1 3、 14均悬空, 第 11引脚 接 VEE; 1 0, 12, 1 3, 14 are all suspended, the 11th pin is connected to VEE;
所述乘法器 U4的第 1引脚接 U1的第 7引脚, 第 3引脚接 U2的第 14引 脚, 第 2、 4、 6引脚均接地, 第 5引脚接 VEE, 第 7引脚接通过电阻 R21接 U2 的第 2引脚, 第 8引脚接 VCC; The first pin of the multiplier U4 is connected to the seventh pin of U1, and the third pin is connected to the 14th pin of U2. Pins, pins 2, 4, and 6 are grounded, the fifth pin is connected to VEE, the seventh pin is connected to the second pin of U2 through the resistor R21, and the eighth pin is connected to VCC;
所述乘法器 U5 的第 1、 3 引脚接 U1 的第 7 引脚, 第 2、 4、 6 引脚均接 地, 第 5引脚接 VEE, 第 7引脚接通过电阻 R31接 U3的第 2引脚, 第 8引脚接 VCC;  The first and third pins of the multiplier U5 are connected to the seventh pin of U1, the second, fourth, and sixth pins are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the U3 through the resistor R31. 2 pins, the 8th pin is connected to VCC;
所述电压比较器 U6的第 1、 2、 4、 5、 6、 7、 9、 10、  1, 2, 4, 5, 6, 7, 9, 10 of the voltage comparator U6,
11、 11,
12、 13引脚悬 空, 第 3引脚接 VCC; 第 8引脚通过电阻 R02与 U7的第 1引脚、 U8的第 1引 脚相接, 第 12引脚接 VEE, 第 14引脚通过二极管 D1与与 U7的第 1引脚、 U8 的第 1引脚相接, 通过电阻 R01接 VCC; 12, 13 pins are left floating, the third pin is connected to VCC; the 8th pin is connected to the 1st pin of U7 and the 1st pin of U8 through the resistor R02, the 12th pin is connected to VEE, the 14th pin is passed Diode D1 is connected to the first pin of U7 and the first pin of U8, and is connected to VCC through resistor R01;
所述模拟开关 U7的第 1引脚通过电阻 R02接 U6的第 8引脚, 第 2引脚接 VCC, 第 3引脚接 VEE, 第 4引脚通过分数阶积分单元接 U1的 6引脚, 第 5引 脚通过电容 C10接 U1的 6引脚, 第 8引脚接 U1的 7引脚, 第 9引脚接 U2的 7 引脚, 第 12引脚通过 C20接 U2的 6引脚, 第 13引脚通过分数阶积分单元接 U2的 6引脚, 第 14引脚接 VCC, 第 15、 16引脚接地;  The first pin of the analog switch U7 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 6 pin of U1 through the fractional integration unit. The 5th pin is connected to the 6 pin of U1 through the capacitor C10, the 8th pin is connected to the 7 pin of U1, the 9th pin is connected to the 7 pin of U2, and the 12th pin is connected to the 6 pin of U2 through C20. The 13th pin is connected to the 6 pin of U2 through the fractional integration unit, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded;
所述模拟开关 U8的第 1引脚通过电阻 R02接 U6的第 8引脚, 第 2引脚接 VCC, 第 3引脚接 VEE, 第 4引脚通过分数阶积分单元接 U2的 9引脚, 第 5引 脚通过电容 C30接 U2的 9引脚, 第 8引脚接 U2的 8引脚, 第 14引脚接 VCC, 第 15、 16引脚接地。  The first pin of the analog switch U8 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 9 pin of U2 through the fractional integration unit. The 5th pin is connected to the 9 pin of U2 through the capacitor C30, the 8th pin is connected to the 8 pin of U2, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded.
2、 一种实现整数阶和分数阶自动切换混沌系统的电路, 其特征是在于, 包括运算放大器 Ul、 U2、 U3 与乘法器 U4、 U5 及电压比较器 U6 和模拟开关 U7、 U8组成, 所述运算放大器 U1连接电压比较器 U6 , 模拟开关 U7、 U8 , 乘法 器 U4、 U5 , 所述电压比较器 U6连接模拟开关 U7、 U8, 所述乘法器 U4连接运 算放大器 U2 , 所述运算放大器 U2连接模拟开关 U7 , 所述乘法器 U5连接运算 放大器 U3 , 所述运算放大器 U3连接模拟开关 U8;  2. A circuit for realizing an integer-order and fractional-order automatic switching chaotic system, comprising: an operational amplifier U1, U2, U3 and a multiplier U4, U5 and a voltage comparator U6 and an analog switch U7, U8, The operational amplifier U1 is connected to the voltage comparator U6, the analog switches U7, U8, the multipliers U4, U5, the voltage comparator U6 is connected to the analog switches U7, U8, and the multiplier U4 is connected to the operational amplifier U2, the operational amplifier U2 Connecting the analog switch U7, the multiplier U5 is connected to the operational amplifier U3, the operational amplifier U3 is connected to the analog switch U8;
所述运算放大器 U1的第 1引脚通过电阻 Rx与第 2引脚相接, 通过电阻 R1 与 U1的第 6引脚相接, 第 3、 5、 10、 12引脚接地, 第 4引脚接 VCC, 第 11引 脚接 VEE, 第 6 引脚先接电阻 Rcl l 与电容 C11 的并联后, 再接 Rcl 2 与电容 C12的并联, 又接 Rcl 3与电容 C1 3的并联后, 与 U7第 4引脚相接, 通过电容 C10与 U7的第 5引脚相接, 第 7引脚与 U6的第 9引脚相接, 与 U4的第 1引脚 相接, 与 U7的第 9引脚相接, 与 U5的第 1 , 3引脚相接, 通过电阻 R22与 U2 第 2引脚相接, 第 8 引脚通过电阻 R25与 U1第 9引脚相接, 第 9引脚通过电 阻 R24和电位器 R12与 U1第 2引脚相接, 通过电阻 R24和电位器 R23与 U2第 2 引脚相接, 通过电阻 R24与 U7第 10引脚相接, 第 1 3 引脚通过电阻 R13与 U1第 7 引脚相接, 通过电阻 R14与 U1 第 14 引脚相接, 与 U4的第 1 引脚相 接, 与 U7的第 8引脚相接, 与 U5的第 1 引脚、 第 3引脚相接, 第 14引脚通 过电位器 R11与 U1第 2引脚相接; The first pin of the operational amplifier U1 is connected to the second pin through the resistor Rx, and is connected to the sixth pin of U1 through the resistor R1, and the third, fifth, ten, and 12th pins are grounded, and the fourth pin is connected. Connected to VCC, 11th The pin is connected to VEE. The 6th pin is connected in parallel with the capacitor R11 and the capacitor C11. Then, the Rcl 2 is connected in parallel with the capacitor C12. After the Rcl 3 is connected in parallel with the capacitor C1 3, it is connected to the 4th pin of the U7. The capacitor C10 is connected to the fifth pin of U7, the seventh pin is connected to the ninth pin of U6, and is connected to the first pin of U4, and is connected to the ninth pin of U7, and U5. The first and third pins are connected, and the second pin of U2 is connected through the resistor R22. The eighth pin is connected to the 9th pin of U1 through the resistor R25, and the 9th pin is connected to the R24 and the potentiometer R12 through the resistor R22. U1 pin 2 is connected, through resistor R24 and potentiometer R23 and U2 pin 2, through resistor R24 and U7 pin 10, pin 13 through resistor R13 and U1 pin 7 Connected to the 14th pin of U1 through resistor R14, connected to the 1st pin of U4, connected to the 8th pin of U7, and connected to the 1st and 3rd pins of U5. The 14th pin is connected to the 2nd pin of U1 through the potentiometer R11;
所述运算放大器 U2 的第 1 引脚通过电阻 Ry与第 2引脚相接, 通过电阻 R2与 U2的第 6引脚相接, 第 3、 5、 1 0、 12引脚接地, 第 4引脚接 VCC , 第 11 引脚接 VEE, 第 6引脚先接电阻 Rc21与电容 C21的并联后, 再接 Rc22与电容 C22的并联, 又接 Rc23与电容 C23的并联后, 与 U7第 1 3引脚相接,, 通过电 容 C20与 U7的第 12引脚相接, 第 7引脚与 U7第 9引脚相接, 第 8引脚与 U8 的第 8引脚相接, 第 9引脚先接电阻 Rc 33与电容 C33的并联, 再接 Rc 32与电 容 C32的并联, 又接 Rc 31与电容 C31的并联后, 与 U8第 4引脚相接,, 通过 电容 C30与 U8 的第 5 引脚相接, 第 1 3引脚通过电阻 R33与 U4第 3 引脚相 接, 通过电阻 R33与 U8第 8引脚相接, 通过电阻 R34与 U2第 14引脚相接, 第 14引脚接 U4的第 3引脚, 通过电位器 R32与 U3第 2引脚相接;  The first pin of the operational amplifier U2 is connected to the second pin through the resistor Ry, and is connected to the sixth pin of U2 through the resistor R2, and the third, fifth, ten, and 12 pins are grounded, and the fourth lead The pin is connected to VCC, the 11th pin is connected to VEE, the 6th pin is connected in parallel with the resistor Rc21 and the capacitor C21. Then, the parallel connection between Rc22 and capacitor C22 is connected, and the parallel connection between Rc23 and capacitor C23 is made. The pin is connected, the capacitor C20 is connected to the 12th pin of U7, the 7th pin is connected to the 9th pin of U7, the 8th pin is connected to the 8th pin of U8, the 9th pin First connect the resistor Rc 33 and the capacitor C33 in parallel, then connect Rc 32 and capacitor C32 in parallel, connect Rc 31 and capacitor C31 in parallel, connect with U8 pin 4, pass capacitor C30 and U8 5 The pin is connected, the 13th pin is connected to the 3rd pin of U4 through the resistor R33, the 8th pin of U8 is connected through the resistor R33, and the 14th pin of U2 is connected through the resistor R34, the 14th pin Connect the third pin of U4 to the second pin of U3 through potentiometer R32;
所述运算放大器 U3第 1引脚通过电阻 Rz与第 2引脚相接, 通过电阻 R31 与 U2的第 9 引脚相接, U3第 2 引脚通过 R32接 U2的 14 引脚, 第 3引脚接 地, 第 4引脚接 VCC , 第 5、 6、 7、 8、 9、 10、 12、  The first pin of the operational amplifier U3 is connected to the second pin through the resistor Rz, and is connected to the ninth pin of the U2 through the resistor R31, and the second pin of the U3 is connected to the 14 pin of the U2 through the R32, the third lead The ground is grounded, the 4th pin is connected to VCC, the 5th, 6th, 7th, 8th, 9th, 10th, 12th,
1 3、 14均悬空, 第 11引脚 接 VEE; 1 3, 14 are all suspended, the 11th pin is connected to VEE;
所述乘法器 U4的第 1 引脚接 U1的第 Ί引脚, 第 3引脚接 U2的第 14引 脚, 第 2、 4、 6引脚均接地, 第 5引脚接 VEE , 第 7引脚接通过电阻 R21接 U2 的第 2引脚, 第 8引脚接 VCC; The first pin of the multiplier U4 is connected to the third pin of U1, the third pin is connected to the 14th pin of U2, the second, fourth, and sixth pins are grounded, and the fifth pin is connected to VEE, the seventh pin. Pin is connected to U 2 through resistor R21 The second pin, the eighth pin is connected to VCC;
所述乘法器 U5 的第 1、 3 引脚接 U1 的第 1 引脚, 第 2、 4、 6 引脚均接 地, 第 5引脚接 VEE, 第 7引脚接通过电阻 R31接 U3的第 2引脚, 第 8引脚接 VCC;  The first and third pins of the multiplier U5 are connected to the first pin of U1, the second, fourth, and sixth pins are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the U3 through the resistor R31. 2 pins, the 8th pin is connected to VCC;
所述电压比较器 U6的第 1、 1、 4、 5、 6、 7、 9、 10、 11、 12、 13引脚悬 空, 第 3引脚接 VCC; 第 8引脚通过电阻 R02与 U7的第 1引脚、 U8的第 1引 脚相接, 第 12引脚接 VEE, 第 14引脚通过二极管 D1与与 U7的第 1引脚、 U8 的第 1引脚相接, 通过电阻 R01接 VCC;  The 1st, 1st, 4th, 5th, 6th, 7th, 9th, 10th, 11th, 12th, and 13th pins of the voltage comparator U6 are left floating, the third pin is connected to VCC; the eighth pin is passed through the resistors R02 and U7. The first pin and the first pin of U8 are connected, the 12th pin is connected to VEE, and the 14th pin is connected to the first pin of U7 and the first pin of U8 through diode D1, and is connected via resistor R01. VCC;
所述模拟开关 U7的第 1引脚通过电阻 R02接 U6的第 8引脚, 第 2引脚接 VCC, 第 3引脚接 VEE , 第 4引脚通过分数阶积分单元接 U1的 6引脚, 第 5引 脚通过电容 C1 0接 U1的 6引脚, 第 8引脚接 U1的 7引脚, 第 9引脚接 U2的 7 引脚, 第 12引脚通过 C20接 U2的 6引脚, 第 1 3引脚通过分数阶积分单元接 U2的 6引脚, 第 14引脚接 VCC , 第 15、 16引脚接地; The first pin of the analog switch U7 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 6 pin of U1 through the fractional integration unit. The 5th pin is connected to the 6 pin of U1 through the capacitor C1 0, the 8 pin is connected to the 7 pin of U1, the 9th pin is connected to the 7 pin of U 2 , and the 12th pin is connected to the 6 pin of U2 through C20. The 13th pin of the pin is connected to the 6 pin of U2 through the fractional integration unit, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded.
所述模拟开关 U8的第 1引脚通过电阻 R02接 U6的第 8引脚, 第 2引脚接 VCC , 第 3引脚接 VEE, 第 4引脚通过分数阶积分单元接 U2的 9引脚, 第 5引 脚通过电容 C30接 U2的 9引脚, 第 8引脚接 U2的 8引脚, 第 14引脚接 VCC , 第 15、 16引脚接地。 The first pin of the analog switch U8 is connected to the eighth pin of U6 through the resistor R02, the second pin is connected to VCC, the third pin is connected to VEE, and the fourth pin is connected to the 9 pin of U2 through the fractional integration unit. The 5th pin is connected to the 9 pin of U2 through the capacitor C30, the 8th pin is connected to the 8 pin of U2, the 14th pin is connected to VCC, and the 15th and 16th pins are grounded.
PCT/CN2012/001384 2011-11-18 2012-10-15 Method and analog circuit for implementing automatic switching of chaotic systems of integer order and fractional order WO2013071689A1 (en)

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