CN105049185A - 0.8-order mixed type and T type fractional order integral switching method and circuit - Google Patents

Abstract

The invention provides a 0.8-order mixed type and T type fractional order integral switching method and a 0.8-order mixed type and T type fractional order integral switching circuit. A mixed type 0.8-order fractional order integral and a 0.8-order T type fractional order integral perform selective control output via a 2-channel analog multiplexer, and the mixed type 0.8-order fractional order integral is selected to output while the control signal of the analogue switch is in high level, and the T type fractional order integral is selected to output while the control signal of the analog multiplexer is in low level, or, select mixed type 0.8-order fractional order integral output while the control signal of the analogue switch is in low level, and select T type fractional order integral output while the control signal of the analog multiplexer is in high level. The method and the circuit of the invention use the alternative analogue switch to achieve the automatic switching of a 0.8-order mixed type fractional order integral circuit and a 0.8-order T type fractional order integral circuit so as to improve the complexity of the 0.8-order fractional order integral while the 0.8-order fractional order integral circuit is used in secret communication, increase decoding difficulty and be conducive to the communication safety.

Description

A kind of 0.8 rank mixed type and T-shaped fractional order integration changing method and circuit

Technical field

The present invention relates to a kind of 0.8 rank fractional order integration changing method and circuit, particularly a kind of 0.8 rank mixed type and T-shaped fractional order integration changing method and circuit.

Background technology

The structure realizing 0.8 rank fractional order integration circuit mainly contains mixed type fractional order integration form, T-shaped fractional order integration form and T-shaped fractional order integration form, these the three kinds structures realizing 0.8 rank fractional order integration circuit are all made up of three partial ohmic and electric capacity, utilize above-mentioned three kinds of versions realize fractional order integration circuit Method and circuits oneself have report, but utilize the method switched between 0.8 multi-form rank fractional order integration circuit to realize 0.8 rank fractional order integration circuit have not been reported, the invention provides one and realize 0.8 rank mixed type and T-shaped fractional order integration changing method and circuit.

Summary of the invention

The technical problem to be solved in the present invention is to provide a kind of 0.8 rank mixed type fractional order integration and T-shaped fractional order integration changing method and circuit, and the present invention adopts following technological means to realize goal of the invention:

1, a kind of 0.8 rank mixed type and T-shaped fractional order integration changing method, it is characterized in that being: a kind of mixed type 0.8 rank fractional order integration and a kind of 0.8 T-shaped fractional order integration in rank carry out selection by alternative analog switch device and control to export, when the control signal of analog switch device is high level, mixed type 0.8 rank fractional order integration is selected to export, when the control signal of analog switch device is low level, T-shaped fractional order integration is selected to export, or, when the control signal of analog switch device is low level, mixed type 0.8 rank fractional order integration is selected to export, when the control signal of analog switch device is high level, T-shaped fractional order integration is selected to export.

2, a kind of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit, it is characterized in that: described a kind of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit are made up of the T-shaped fractional order integration circuit of 0.8 rank mixed type fractional order integration circuit and 0.8 rank and alternative analog switch U0 tri-part, described 0.8 rank mixed type fractional order integration circuit is made up of five parts, wherein resistance Rhx is in parallel with electric capacity Chx, form Part I, Part I is in parallel with electric capacity Chy again after connecting with resistance Rhy, form Part II, front two parts are in parallel with electric capacity Chz again after connecting with resistance Rhz, form Part III, first three part is in parallel with electric capacity Chw again after connecting with resistance Rhw, form Part IV, front four parts are in parallel with electric capacity Chu again after connecting with resistance Rhu, form Part V, output pin HA connects Part I, output pin HB connects Part V, the described 0.8 T-shaped fractional order integration circuit in rank is made up of five parts, wherein resistance RTx is in parallel with electric capacity CTx, form Part I, resistance RTy connects with electric capacity CTy, form Part II, Part II carries out in parallel with Part I, resistance RTz connects with electric capacity CTz, form Part III, Part III carries out in parallel with front two parts, resistance RTw connects with electric capacity CTw, form Part IV, Part IV carries out in parallel with first three part, resistance RTu connects with electric capacity CTu, form Part V, Part V carries out in parallel with front four parts, resistance output pin TA connects Part I, output pin TB connects Part V, the output pin HB of described 0.8 rank mixed type fractional order integration circuit connects the SB pin of described alternative analog switch U0, the output pin TB of described 0.8 rank T-shaped fractional order integration circuit connects the SA pin of described alternative analog switch U0, the output pin D of described alternative analog switch U0 is as the output of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit, the control pin IN of alternative analog switch U0 is as the control of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit, the output pin HA of described 0.8 rank mixed type fractional order integration circuit and the output pin TA of described 0.8 rank T-shaped fractional order integration circuit is respectively as the input pin of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit, described alternative analog switch U0 adopts ADG884, described resistance Rhx=31.10M, described potentiometer Rhx1=0K, described resistance Rhx2=22M, Rhx3=5.1M, Rhx4=2M, Rhx5=2M, described electric capacity Chx=1.097uF, described electric capacity Chx1=1uF, Chx2=68nF, Chx3=22nF, Chx4=6.8nF, described resistance Rhy=7.763M, described potentiometer Rhy1=2K, described resistance Rhy2=7.5M, Rhy3=200K, Rhy4=51K, Rhy5=20K, described electric capacity Chy=0.5073uF, described electric capacity Chy1=470nF, Chy2=33nF, Chy3=3.3nF, Chy4=1nF, described resistance Rhz=0.8377M, described potentiometer Rhz1=2.6K and described resistance Rhz2=820K, Rhz3=10K, Rhz4=5.1K, Rhz5=1K, described electric capacity Chz=0.2833uF, described electric capacity Chz1=220nF, Chz2=47nF, Chz3=10nF, Chz4=6.8nF, described resistance Rhw=84.47K, described potentiometer Rhw1=3.47K and described resistance Rhw2=51K, Rhw3=20K, Rhw4=10K, Rhw5=0K, described electric capacity Chw=0.1722uF, described electric capacity Chw1=100nF, Chw2=68nF, Chw3=2.2nF, Chw4=2.2nF, described resistance Rhu=8.578K, described potentiometer Rhu1=0.478K and described resistance Rhu2=5.1K, Rhu3=2K, Rhu4=1K, Rhu5=0K, described electric capacity Chu=188.4nF, described electric capacity Chu1=100nF, Chu2=68nF, Chu3=10nF, Chu4=10nF, described resistance RTx=39.80M, described potentiometer RTx1=0K and described resistance RTx2=22M, RTx3=15M, RTx4=2.7M, RTx5=100K, described electric capacity CTx=0.1884uF, described electric capacity CTx1=150nF, CTx2=33nF, CTx3=3.3nF, CTx4=2.2nF, described resistance RTy=9.839M, described potentiometer RTy1=0K and described resistance RTy2=9.1M, RTy3=680K, RTy4=56K, RTy5=3K, described electric capacity CTy=0.7619uF, described electric capacity CTy1=680nF, CTy2=47nF, CTy3=33nF, CTy4=2.2nF, described resistance RTz=0.933M, described potentiometer RTz1=0K and described resistance RTz2=910K, RTz3=20K, RTz4=3K, RTz5=0K, described electric capacity CTz=0.4520uF, described electric capacity CTz1=330nF, CTz2=100nF, CTz3=22nF, CTz4 are unsettled, described resistance RTw=0.09319M, described potentiometer RTw1=2.19K and described resistance RTw2=91K, RTw3=0K, RTw4=0K, RTw5=0K, described electric capacity CTw=0.2545uF, described electric capacity CTw1=220nF, CTw2=33nF, CTw3=1nF, CTw4 are unsettled, described resistance RTu=0.009555M, described potentiometer RTu1=0.455K and described resistance RTu2=9.1K, RTu3=0K, RTu4=20K, RTu5=0K, described electric capacity CTu=0.1396uF, described electric capacity CTu1=100nF, CTu2=33nF, CTu3=6.8nF, CTu4 are unsettled.

Useful fruit of the present invention is: the analog switch adopting alternative, achieve the automatic switchover of the T-shaped fractional order integration circuit of 0.8 rank mixed type fractional order integration circuit and 0.8 rank, make 0.8 rank fractional order integration circuit in secure communication time, improve the complexity of 0.8 rank fractional order integration, add the difficulty of decoding, be conducive to the fail safe communicated.

Accompanying drawing explanation

Fig. 1 is the inner actual connection layout of mixed type of the present invention and T-shaped fractional order integration commutation circuit.

Fig. 2 is mixed type of the present invention and the actual connection layout of T-shaped fractional order integration commutation circuit 0.8 rank Mixed Integro circuit.

Fig. 3 is mixed type of the present invention and the actual connection layout of the T-shaped integrating circuit in T-shaped fractional order integration commutation circuit 0.8 rank.

Fig. 4 is mixed type of the present invention and T-shaped fractional order integration commutation circuit schematic diagram.

Fig. 5 is the circuit connection structure schematic diagram of the preferred embodiment of the present invention.

Fig. 6, Fig. 7 and Fig. 8 are the actual connection layout of circuit of the present invention.

Embodiment

Below in conjunction with accompanying drawing and preferred embodiment, the present invention is further described in detail, see Fig. 1-Fig. 8.

1, a kind of 0.8 rank mixed type and T-shaped fractional order integration changing method, it is characterized in that being: a kind of mixed type 0.8 rank fractional order integration and a kind of 0.8 T-shaped fractional order integration in rank carry out selection by alternative analog switch device and control to export, when the control signal of analog switch device is high level, mixed type 0.8 rank fractional order integration is selected to export, when the control signal of analog switch device is low level, T-shaped fractional order integration is selected to export, or, when the control signal of analog switch device is low level, mixed type 0.8 rank fractional order integration is selected to export, when the control signal of analog switch device is high level, T-shaped fractional order integration is selected to export.

2, a kind of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit, it is characterized in that: described a kind of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit are made up of the T-shaped fractional order integration circuit of 0.8 rank mixed type fractional order integration circuit and 0.8 rank and alternative analog switch U0 tri-part, described 0.8 rank mixed type fractional order integration circuit is made up of five parts, wherein resistance Rhx is in parallel with electric capacity Chx, form Part I, Part I is in parallel with electric capacity Chy again after connecting with resistance Rhy, form Part II, front two parts are in parallel with electric capacity Chz again after connecting with resistance Rhz, form Part III, first three part is in parallel with electric capacity Chw again after connecting with resistance Rhw, form Part IV, front four parts are in parallel with electric capacity Chu again after connecting with resistance Rhu, form Part V, output pin HA connects Part I, output pin HB connects Part V, the described 0.8 T-shaped fractional order integration circuit in rank is made up of five parts, wherein resistance RTx is in parallel with electric capacity CTx, form Part I, resistance RTy connects with electric capacity CTy, form Part II, Part II carries out in parallel with Part I, resistance RTz connects with electric capacity CTz, form Part III, Part III carries out in parallel with front two parts, resistance RTw connects with electric capacity CTw, form Part IV, Part IV carries out in parallel with first three part, resistance RTu connects with electric capacity CTu, form Part V, Part V carries out in parallel with front four parts, resistance output pin TA connects Part I, output pin TB connects Part V, the output pin HB of described 0.8 rank mixed type fractional order integration circuit connects the SB pin of described alternative analog switch U0, the output pin TB of described 0.8 rank T-shaped fractional order integration circuit connects the SA pin of described alternative analog switch U0, the output pin D of described alternative analog switch U0 is as the output of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit, the control pin IN of alternative analog switch U0 is as the control of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit, the output pin HA of described 0.8 rank mixed type fractional order integration circuit and the output pin TA of described 0.8 rank T-shaped fractional order integration circuit is respectively as the input pin of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit, described alternative analog switch U0 adopts ADG884, described resistance Rhx=31.10M, described potentiometer Rhx1=0K, described resistance Rhx2=22M, Rhx3=5.1M, Rhx4=2M, Rhx5=2M, described electric capacity Chx=1.097uF, described electric capacity Chx1=1uF, Chx2=68nF, Chx3=22nF, Chx4=6.8nF, described resistance Rhy=7.763M, described potentiometer Rhy1=2K, described resistance Rhy2=7.5M, Rhy3=200K, Rhy4=51K, Rhy5=20K, described electric capacity Chy=0.5073uF, described electric capacity Chy1=470nF, Chy2=33nF, Chy3=3.3nF, Chy4=1nF, described resistance Rhz=0.8377M, described potentiometer Rhz1=2.6K and described resistance Rhz2=820K, Rhz3=10K, Rhz4=5.1K, Rhz5=1K, described electric capacity Chz=0.2833uF, described electric capacity Chz1=220nF, Chz2=47nF, Chz3=10nF, Chz4=6.8nF, described resistance Rhw=84.47K, described potentiometer Rhw1=3.47K and described resistance Rhw2=51K, Rhw3=20K, Rhw4=10K, Rhw5=0K, described electric capacity Chw=0.1722uF, described electric capacity Chw1=100nF, Chw2=68nF, Chw3=2.2nF, Chw4=2.2nF, described resistance Rhu=8.578K, described potentiometer Rhu1=0.478K and described resistance Rhu2=5.1K, Rhu3=2K, Rhu4=1K, Rhu5=0K, described electric capacity Chu=188.4nF, described electric capacity Chu1=100nF, Chu2=68nF, Chu3=10nF, Chu4=10nF, described resistance RTx=39.80M, described potentiometer RTx1=0K and described resistance RTx2=22M, RTx3=15M, RTx4=2.7M, RTx5=100K, described electric capacity CTx=0.1884uF, described electric capacity CTx1=150nF, CTx2=33nF, CTx3=3.3nF, CTx4=2.2nF, described resistance RTy=9.839M, described potentiometer RTy1=0K and described resistance RTy2=9.1M, RTy3=680K, RTy4=56K, RTy5=3K, described electric capacity CTy=0.7619uF, described electric capacity CTy1=680nF, CTy2=47nF, CTy3=33nF, CTy4=2.2nF, described resistance RTz=0.933M, described potentiometer RTz1=0K and described resistance RTz2=910K, RTz3=20K, RTz4=3K, RTz5=0K, described electric capacity CTz=0.4520uF, described electric capacity CTz1=330nF, CTz2=100nF, CTz3=22nF, CTz4 are unsettled, described resistance RTw=0.09319M, described potentiometer RTw1=2.19K and described resistance RTw2=91K, RTw3=0K, RTw4=0K, RTw5=0K, described electric capacity CTw=0.2545uF, described electric capacity CTw1=220nF, CTw2=33nF, CTw3=1nF, CTw4 are unsettled, described resistance RTu=0.009555M, described potentiometer RTu1=0.455K and described resistance RTu2=9.1K, RTu3=0K, RTu4=20K, RTu5=0K, described electric capacity CTu=0.1396uF, described electric capacity CTu1=100nF, CTu2=33nF, CTu3=6.8nF, CTu4 are unsettled.

3, based on the Zhang chaos system circuit of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit, it is characterized in that:

(1) Zhang chaos system i is:

$\begin{array}{ccc}\left\{\begin{array}{c}\frac{dx}{dt}=-ax+by-yz\\ \frac{dy}{dt}=x+xz\\ \frac{dz}{dt}=y^2-cz\end{array}\right.& i& a=10,b=28,c=2\end{array}$

(2) 0.8 rank Zhang chaos system ii are:

$\begin{array}{ccc}\left\{\begin{array}{c}\frac{d^{\mathrm{\α}}x}{{\mathrm{dt}}^{\mathrm{\α}}}=-ax+by-yz\\ \frac{d^{\mathrm{\α}}y}{{\mathrm{dt}}^{\mathrm{\α}}}=x+xz\\ \frac{d^{\mathrm{\α}}z}{{\mathrm{dt}}^{\mathrm{\α}}}=y^2-cz\end{array}\right.& ii& a=10,b=28,c=2,\mathrm{\α}=0.7\end{array}$

(3) according to 0.8 rank Zhang chaos system ii constructing analog circuit, utilize operational amplifier U1, operational amplifier U2 and resistance and 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U6, 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U7, 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U9 form anti-phase adder and anti-phase 0.8 rank integrator, utilize multiplier U3, multiplier U4 and multiplier U5 realizes multiplying and utilizes operational amplifier U8 to realize comparator, described operational amplifier U1, operational amplifier U2 and operational amplifier U8 adopts LF347N, described multiplier U3 and multiplier U4 adopts AD633JN,

Described operational amplifier U1 concatenation operation amplifier U8, multiplier U3, multiplier U4, multiplier U5 and 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U6, 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U7, described operational amplifier U2 connects multiplier U3, multiplier U4 and 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U9, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U1, described multiplier U5 concatenation operation amplifier U2, described operational amplifier U8 connects 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U6, 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U7 and 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U9,

1st pin of described operational amplifier U1 is connected by the 6th pin of resistance R9 and U1, 2nd pin is connected with the 1st pin by resistance R7, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin connects HA pin and the TA pin of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U7, 7th pin connects and exports y, connected with the 13rd pin by resistance R2, connect the D pin of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U7, connect the 1st pin of multiplier U3, connect the 1st and the 3rd pin of multiplier U5, 8th pin connects and exports x, connected with the 9th pin by resistance R4, connected with the 2nd pin by resistance R6, connect the 1st pin of multiplier U4, connect the D pin of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U6, 9th pin connects HA pin and the TA pin of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U6, 13rd pin is connected with the 14th pin by resistance R1, 14th pin is connected with the 9th pin by resistance R5,

Described operational amplifier U2 the 1st, 2,6,7 pins are unsettled, 3rd, 5,10,12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 8th pin exports z, connected with the 9th pin by resistance R13, connect the 3rd pin of multiplier U3, connect the 3rd pin of multiplier U4, connect the D pin of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U9,9th pin connects HA pin and the TA pin of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U9, and the 13rd pin connects the 14th pin by resistance R11, and the 14th pin connects the 9th pin by resistance R12;

1st pin of described operational amplifier U8 connects the IN pin of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U6 by resistance R14, by resistance R14 and resistance R15 ground connection, 2nd, 6, 9, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 7th pin connects the IN pin of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U7 by resistance R16, by resistance R16 and resistance R17 ground connection, 8th pin connects the IN pin of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U9 by resistance R18, by resistance R18 and resistance R19 ground connection, 13rd pin and the 14th pin unsettled,

1st pin of described multiplier U3 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 9th pin by resistance R3, and the 8th pin meets VCC;

1st pin of described multiplier U4 connects the 8th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 2nd pin by resistance R8, and the 8th pin meets VCC;

1st and the 3rd pin of described multiplier U5 connects the 7th pin of U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U2 the 13rd pin by resistance R10, and the 8th pin meets VCC;

HA and the TA pin of described 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U6 connects the 9th pin of operational amplifier U1, and D pin connects the 8th pin of operational amplifier U1;

HA and the TA pin of described 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U7 connects the 6th pin of operational amplifier U1, and D pin connects the 7th pin of operational amplifier U1;

HA and the TA pin of described 0.8 rank mixed type and T-shaped fractional order integration commutation circuit U9 connects the 9th pin of operational amplifier U2, and D pin connects the 8th pin of operational amplifier U2.

Resistance R1=R4=R5=R7=R9=R11=R12=10k Ω in circuit, R3=R8=R10=1k Ω, R2=3.57k Ω, R6=100k Ω, R8=1k Ω, R13=50k Ω, R20=R16=R18=100K Ω, R15=R17=R19=80K Ω.

Certainly, above-mentioned explanation is not limitation of the present invention, and the present invention is also not limited only to above-mentioned citing, and the change that those skilled in the art make in essential scope of the present invention, remodeling, interpolation or replacement, also belong to protection scope of the present invention.

Claims (2)

1. a rank mixed type and T-shaped fractional order integration changing method, it is characterized in that being: a kind of mixed type 0.8 rank fractional order integration and a kind of 0.8 T-shaped fractional order integration in rank carry out selection by alternative analog switch device and control to export, when the control signal of analog switch device is high level, mixed type 0.8 rank fractional order integration is selected to export, when the control signal of analog switch device is low level, T-shaped fractional order integration is selected to export, or, when the control signal of analog switch device is low level, mixed type 0.8 rank fractional order integration is selected to export, when the control signal of analog switch device is high level, T-shaped fractional order integration is selected to export.

2. a rank mixed type and T-shaped fractional order integration commutation circuit, it is characterized in that: described a kind of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit are made up of the T-shaped fractional order integration circuit of 0.8 rank mixed type fractional order integration circuit and 0.8 rank and alternative analog switch U0 tri-part, described 0.8 rank mixed type fractional order integration circuit is made up of five parts, wherein resistance Rhx is in parallel with electric capacity Chx, form Part I, Part I is in parallel with electric capacity Chy again after connecting with resistance Rhy, form Part II, front two parts are in parallel with electric capacity Chz again after connecting with resistance Rhz, form Part III, first three part is in parallel with electric capacity Chw again after connecting with resistance Rhw, form Part IV, front four parts are in parallel with electric capacity Chu again after connecting with resistance Rhu, form Part V, output pin HA connects Part I, output pin HB connects Part V, the described 0.8 T-shaped fractional order integration circuit in rank is made up of five parts, wherein resistance RTx is in parallel with electric capacity CTx, form Part I, resistance RTy connects with electric capacity CTy, form Part II, Part II carries out in parallel with Part I, resistance RTz connects with electric capacity CTz, form Part III, Part III carries out in parallel with front two parts, resistance RTw connects with electric capacity CTw, form Part IV, Part IV carries out in parallel with first three part, resistance RTu connects with electric capacity CTu, form Part V, Part V carries out in parallel with front four parts, resistance output pin TA connects Part I, output pin TB connects Part V, the output pin HB of described 0.8 rank mixed type fractional order integration circuit connects the SB pin of described alternative analog switch U0, the output pin TB of described 0.8 rank T-shaped fractional order integration circuit connects the SA pin of described alternative analog switch U0, the output pin D of described alternative analog switch U0 is as the output of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit, the control pin IN of alternative analog switch U0 is as the control of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit, the output pin HA of described 0.8 rank mixed type fractional order integration circuit and the output pin TA of described 0.8 rank T-shaped fractional order integration circuit is respectively as the input pin of 0.8 rank mixed type and T-shaped fractional order integration commutation circuit, described alternative analog switch U0 adopts ADG884, described resistance Rhx=31.10M, described potentiometer Rhx1=0K, described resistance Rhx2=22M, Rhx3=5.1M, Rhx4=2M, Rhx5=2M, described electric capacity Chx=1.097uF, described electric capacity Chx1=1uF, Chx2=68nF, Chx3=22nF, Chx4=6.8nF, described resistance Rhy=7.763M, described potentiometer Rhy1=2K, described resistance Rhy2=7.5M, Rhy3=200K, Rhy4=51K, Rhy5=20K, described electric capacity Chy=0.5073uF, described electric capacity Chy1=470nF, Chy2=33nF, Chy3=3.3nF, Chy4=1nF, described resistance Rhz=0.8377M, described potentiometer Rhz1=2.6K and described resistance Rhz2=820K, Rhz3=10K, Rhz4=5.1K, Rhz5=1K, described electric capacity Chz=0.2833uF, described electric capacity Chz1=220nF, Chz2=47nF, Chz3=10nF, Chz4=6.8nF, described resistance Rhw=84.47K, described potentiometer Rhw1=3.47K and described resistance Rhw2=51K, Rhw3=20K, Rhw4=10K, Rhw5=0K, described electric capacity Chw=0.1722uF, described electric capacity Chw1=100nF, Chw2=68nF, Chw3=2.2nF, Chw4=2.2nF, described resistance Rhu=8.578K, described potentiometer Rhu1=0.478K and described resistance Rhu2=5.1K, Rhu3=2K, Rhu4=1K, Rhu5=0K, described electric capacity Chu=188.4nF, described electric capacity Chu1=100nF, Chu2=68nF, Chu3=10nF, Chu4=10nF, described resistance RTx=39.80M, described potentiometer RTx1=0K and described resistance RTx2=22M, RTx3=15M, RTx4=2.7M, RTx5=100K, described electric capacity CTx=0.1884uF, described electric capacity CTx1=150nF, CTx2=33nF, CTx3=3.3nF, CTx4=2.2nF, described resistance RTy=9.839M, described potentiometer RTy1=0K and described resistance RTy2=9.1M, RTy3=680K, RTy4=56K, RTy5=3K, described electric capacity CTy=0.7619uF, described electric capacity CTy1=680nF, CTy2=47nF, CTy3=33nF, CTy4=2.2nF, described resistance RTz=0.933M, described potentiometer RTz1=0K and described resistance RTz2=910K, RTz3=20K, RTz4=3K, RTz5=0K, described electric capacity CTz=0.4520uF, described electric capacity CTz1=330nF, CTz2=100nF, CTz3=22nF, CTz4 are unsettled, described resistance RTw=0.09319M, described potentiometer RTw1=2.19K and described resistance RTw2=91K, RTw3=0K, RTw4=0K, RTw5=0K, described electric capacity CTw=0.2545uF, described electric capacity CTw1=220nF, CTw2=33nF, CTw3=1nF, CTw4 are unsettled, described resistance RTu=0.009555M, described potentiometer RTu1=0.455K and described resistance RTu2=9.1K, RTu3=0K, RTu4=20K, RTu5=0K, described electric capacity CTu=0.1396uF, described electric capacity CTu1=100nF, CTu2=33nF, CTu3=6.8nF, CTu4 are unsettled.