CN105162574A - 0.1-order hybrid and chained fractional order integral switching method and circuit - Google Patents

Abstract

The invention provides a 0.1-order hybrid and chained fractional order integral switching method and circuit. A hybrid 0.1-order fractional order integral and a 0.1-order chained fractional order integral are subjected to selective control output through an alternative analog switch; when a control signal of the analog switch is at a high level, the hybrid 0.1-order fractional order integral is selected for carrying out output; when the control signal of the analog switch is at a low level, the chained fractional order integral is selected for carrying out the output; or when the control signal of the analog switch is at a low level, the hybrid 0.1-order fractional order integral is selected for carrying out the output; and when the control signal of the analog switch is at the high level, the chained fractional order integral is selected for carrying out the output. The alternative analog switch is adopted to realize the automatic switching of a hybrid 0.1-order fractional order integral circuit and a 0.1-order chained fractional order integral circuit, the 0.1-order fractional order integral circuit is used for secret communication, the complexity of the 0.1-order fractional order integral is improved, and decoding difficulty is increased so as to be favorable for communication security.

Description

A kind of 0.1 rank mixed type and chain type fractional order integration changing method and circuit

Technical field

The present invention relates to a kind of 0.1 rank fractional order integration changing method and circuit, particularly a kind of 0.1 rank mixed type and chain type fractional order integration changing method and circuit.

Background technology

The structure realizing 0.1 rank fractional order integration circuit mainly contains mixed type fractional order integration form, chain type fractional order integration form and T-shaped fractional order integration form, these the three kinds structures realizing 0.1 rank fractional order integration circuit are all made up of three partial ohmic and electric capacity, utilize above-mentioned three kinds of versions realize fractional order integration circuit Method and circuits oneself have report, but utilize the method switched between 0.1 multi-form rank fractional order integration circuit to realize 0.1 rank fractional order integration circuit have not been reported, the invention provides one and realize 0.1 rank mixed type and chain type fractional order integration changing method and circuit.

Summary of the invention

The technical problem to be solved in the present invention is to provide a kind of 0.1 rank mixed type fractional order integration and chain type fractional order integration changing method and circuit, and the present invention adopts following technological means to realize goal of the invention:

1, a kind of 0.1 rank mixed type and chain type fractional order integration changing method, it is characterized in that being: a kind of mixed type 0.1 rank fractional order integration and a kind of 0.1 rank chain type fractional order integration carry out selection by alternative analog switch device and control to export, when the control signal of analog switch device is high level, mixed type 0.1 rank fractional order integration is selected to export, when the control signal of analog switch device is low level, chain type fractional order integration is selected to export, or, when the control signal of analog switch device is low level, mixed type 0.1 rank fractional order integration is selected to export, when the control signal of analog switch device is high level, chain type fractional order integration is selected to export.

2, a kind of 0.1 rank mixed type and chain type fractional order integration commutation circuit, it is characterized in that: described a kind of 0.1 rank mixed type and chain type fractional order integration commutation circuit are made up of 0.1 rank mixed type fractional order integration circuit and 0.1 rank chain type fractional order integration circuit and alternative analog switch U0 tri-part, described 0.1 rank mixed type fractional order integration circuit is made up of three parts, wherein resistance Rhx is in parallel with electric capacity Chx, form Part I, Part I is in parallel with electric capacity Chy again after connecting with resistance Rhy, form Part II, front two parts are in parallel with electric capacity Chz again after connecting with resistance Rhz, form Part III, output pin HA connects Part I, output pin HB connects Part III, described 0.1 rank chain type fractional order integration circuit is made up of three parts, wherein resistance Rlx is in parallel with electric capacity Clx, form Part I, resistance Rly is in parallel with electric capacity Cly, forms Part II, Part II is connected with Part I, resistance Rlz is in parallel with electric capacity Clz, and form Part III, Part III is connected with front two parts, output pin LA connects Part I, and output pin LB connects Part III, the output pin HB of described 0.1 rank mixed type fractional order integration circuit connects the SB pin of described alternative analog switch U0, the output pin LB of described 0.1 rank chain type fractional order integration circuit connects the SA pin of described alternative analog switch U0, the output pin D of described alternative analog switch U0 is as the output of 0.1 rank mixed type and chain type fractional order integration commutation circuit, the control pin IN of alternative analog switch U0 is as the control of 0.1 rank mixed type and chain type fractional order integration commutation circuit, the output pin HA of described 0.1 rank mixed type fractional order integration circuit and the output pin LA of described 0.1 rank chain type fractional order integration circuit is respectively as the input pin of 0.1 rank mixed type and chain type fractional order integration commutation circuit, described alternative analog switch U0 adopts ADG884, described resistance Rhx is composed in series by potentiometer Rhx1 and resistance Rhx2, Rhx3, Rhx4, Rhx5, and described electric capacity Chx is composed in parallel by electric capacity Chx1, Chx2, Chx3, Chx4, described resistance Rhy is composed in series by potentiometer Rhy1 and resistance Rhy2, Rhy3, Rhy4, Rhy5, and described electric capacity Chy, by electric capacity Chy1, Chy2, Chy3, Chy4, composes in parallel, described resistance Rhz is composed in series by potentiometer Rhz1 and resistance Rhz2, Rhz3, Rhz4, Rhz5, described electric capacity Chz is composed in parallel by electric capacity Chz1, Chz2, Chz3, Chz4, described resistance Rhx=0.6286M, described potentiometer Rhx1=3.5K, described resistance Rhx2=500K, Rhx3=100K, Rhx4=20K, Rhx5=5.1K, described electric capacity Chx=15.75uF, described electric capacity Chx1=10uF, Chx2=4.7uF, Chx3=1uF, Chx4=47nF, described resistance Rhy=0.3845M, described potentiometer Rhy1=3.5K, described resistance Rhy2=200K, Rhy3=100K, Rhy4=51K, Rhy5=30K, described electric capacity Chy=0.1569uF, described electric capacity Chy1=100nF, Chy2=47nF, Chy3=10nF, Chy4 are unsettled, described resistance Rhz=0.5718M, described potentiometer Rhz1=0.8K and described resistance Rhz2=500K, Rhz3=51K, Rhz4=20K, Rhz5=0K, described electric capacity Chz=0.631nF, described electric capacity Chz1=0.33nF, Chz2=0.33nF, Chz3 are unsettled, Chz4 is unsettled, described resistance RLx is composed in series by potentiometer RLx1 and resistance RLx2, RLx3, RLx4, RLx5, and described electric capacity CLx is composed in parallel by electric capacity CLx1, CLx2, CLx3, CLx4, described resistance RLy is composed in series by potentiometer RLy1 and resistance RLy2, RLy3, RLy4, RLy5, and described electric capacity CLy, by electric capacity CLy1, CLy2, CLy3, CLy4, composes in parallel, described resistance RLz is composed in series by potentiometer RLz1 and resistance RLz2, RLz3, RLz4, RLz5, described electric capacity CLz is composed in parallel by electric capacity CLz1, CLz2, CLz3, CLz4, described resistance RLx=0.636M, described potentiometer RLx1=500K, described resistance RLx2=100K, RLx3=20K, RLx4=10K, RLx5=5.1K, described electric capacity CLx=15.72uF, described electric capacity CLx1=10uF, CLx2=4.7uF, CLx3=1uF, CLx4 are unsettled, described resistance RLy=0.3815M, described potentiometer RLy1=200K, described resistance RLy2=100K, RLy3=51K, RLy4=20K, RLy5=20K, described electric capacity CLy=0.1572uF, described electric capacity CLy1=100nF, CLy2=10nF, CLy3=47nF, CLy4 are unsettled, described resistance RLz=0.56725M, described potentiometer RLz1=500K and described resistance RLz2=51K, RLz3=10K, RLz4=5.1K, RLz5=1K, described electric capacity CLz=0.6335nF, described electric capacity CLz1=0.33nF, CLz2=0.33nF, CLz3 are unsettled, CLz4 is unsettled.

Useful fruit of the present invention is: the analog switch adopting alternative, achieve the automatic switchover of 0.1 rank mixed type fractional order integration circuit and 0.1 rank chain type fractional order integration circuit, make 0.1 rank fractional order integration circuit in secure communication time, improve the complexity of 0.1 rank fractional order integration, add the difficulty of decoding, be conducive to the fail safe communicated.

Accompanying drawing explanation

Fig. 1 is the inner actual connection layout of mixed type of the present invention and chain type fractional order integration commutation circuit.

Fig. 2 is mixed type of the present invention and the actual connection layout of chain type fractional order integration commutation circuit 0.1 rank Mixed Integro circuit.

Fig. 3 is mixed type of the present invention and the actual connection layout of chain type fractional order integration commutation circuit 0.1 rank chain type integrating circuit.

Fig. 4 is mixed type of the present invention and chain type fractional order integration commutation circuit schematic diagram.

Fig. 5 is the circuit connection structure schematic diagram of the preferred embodiment of the present invention.

Fig. 6, Fig. 7 and Fig. 8 are the actual connection layout of circuit of the present invention.

Embodiment

Below in conjunction with accompanying drawing and preferred embodiment, the present invention is further described in detail, see Fig. 1-Fig. 8.

1, a kind of 0.1 rank mixed type and chain type fractional order integration changing method, it is characterized in that being: a kind of mixed type 0.1 rank fractional order integration and a kind of 0.1 rank chain type fractional order integration carry out selection by alternative analog switch device and control to export, when the control signal of analog switch device is high level, mixed type 0.1 rank fractional order integration is selected to export, when the control signal of analog switch device is low level, chain type fractional order integration is selected to export, or, when the control signal of analog switch device is low level, mixed type 0.1 rank fractional order integration is selected to export, when the control signal of analog switch device is high level, chain type fractional order integration is selected to export.

2, a kind of 0.1 rank mixed type and chain type fractional order integration commutation circuit, it is characterized in that: described a kind of 0.1 rank mixed type and chain type fractional order integration commutation circuit are made up of 0.1 rank mixed type fractional order integration circuit and 0.1 rank chain type fractional order integration circuit and alternative analog switch U0 tri-part, described 0.1 rank mixed type fractional order integration circuit is made up of three parts, wherein resistance Rhx is in parallel with electric capacity Chx, form Part I, Part I is in parallel with electric capacity Chy again after connecting with resistance Rhy, form Part II, front two parts are in parallel with electric capacity Chz again after connecting with resistance Rhz, form Part III, output pin HA connects Part I, output pin HB connects Part III, described 0.1 rank chain type fractional order integration circuit is made up of three parts, wherein resistance Rlx is in parallel with electric capacity Clx, form Part I, resistance Rly is in parallel with electric capacity Cly, forms Part II, Part II is connected with Part I, resistance Rlz is in parallel with electric capacity Clz, and form Part III, Part III is connected with front two parts, output pin LA connects Part I, and output pin LB connects Part III, the output pin HB of described 0.1 rank mixed type fractional order integration circuit connects the SB pin of described alternative analog switch U0, the output pin LB of described 0.1 rank chain type fractional order integration circuit connects the SA pin of described alternative analog switch U0, the output pin D of described alternative analog switch U0 is as the output of 0.1 rank mixed type and chain type fractional order integration commutation circuit, the control pin IN of alternative analog switch U0 is as the control of 0.1 rank mixed type and chain type fractional order integration commutation circuit, the output pin HA of described 0.1 rank mixed type fractional order integration circuit and the output pin LA of described 0.1 rank chain type fractional order integration circuit is respectively as the input pin of 0.1 rank mixed type and chain type fractional order integration commutation circuit, described alternative analog switch U0 adopts ADG884, described resistance Rhx is composed in series by potentiometer Rhx1 and resistance Rhx2, Rhx3, Rhx4, Rhx5, and described electric capacity Chx is composed in parallel by electric capacity Chx1, Chx2, Chx3, Chx4, described resistance Rhy is composed in series by potentiometer Rhy1 and resistance Rhy2, Rhy3, Rhy4, Rhy5, and described electric capacity Chy, by electric capacity Chy1, Chy2, Chy3, Chy4, composes in parallel, described resistance Rhz is composed in series by potentiometer Rhz1 and resistance Rhz2, Rhz3, Rhz4, Rhz5, described electric capacity Chz is composed in parallel by electric capacity Chz1, Chz2, Chz3, Chz4, described resistance Rhx=0.6286M, described potentiometer Rhx1=3.5K, described resistance Rhx2=500K, Rhx3=100K, Rhx4=20K, Rhx5=5.1K, described electric capacity Chx=15.75uF, described electric capacity Chx1=10uF, Chx2=4.7uF, Chx3=1uF, Chx4=47nF, described resistance Rhy=0.3845M, described potentiometer Rhy1=3.5K, described resistance Rhy2=200K, Rhy3=100K, Rhy4=51K, Rhy5=30K, described electric capacity Chy=0.1569uF, described electric capacity Chy1=100nF, Chy2=47nF, Chy3=10nF, Chy4 are unsettled, described resistance Rhz=0.5718M, described potentiometer Rhz1=0.8K and described resistance Rhz2=500K, Rhz3=51K, Rhz4=20K, Rhz5=0K, described electric capacity Chz=0.631nF, described electric capacity Chz1=0.33nF, Chz2=0.33nF, Chz3 are unsettled, Chz4 is unsettled, described resistance RLx is composed in series by potentiometer RLx1 and resistance RLx2, RLx3, RLx4, RLx5, and described electric capacity CLx is composed in parallel by electric capacity CLx1, CLx2, CLx3, CLx4, described resistance RLy is composed in series by potentiometer RLy1 and resistance RLy2, RLy3, RLy4, RLy5, and described electric capacity CLy, by electric capacity CLy1, CLy2, CLy3, CLy4, composes in parallel, described resistance RLz is composed in series by potentiometer RLz1 and resistance RLz2, RLz3, RLz4, RLz5, described electric capacity CLz is composed in parallel by electric capacity CLz1, CLz2, CLz3, CLz4, described resistance RLx=0.636M, described potentiometer RLx1=500K, described resistance RLx2=100K, RLx3=20K, RLx4=10K, RLx5=5.1K, described electric capacity CLx=15.72uF, described electric capacity CLx1=10uF, CLx2=4.7uF, CLx3=1uF, CLx4 are unsettled, described resistance RLy=0.3815M, described potentiometer RLy1=200K, described resistance RLy2=100K, RLy3=51K, RLy4=20K, RLy5=20K, described electric capacity CLy=0.1572uF, described electric capacity CLy1=100nF, CLy2=10nF, CLy3=47nF, CLy4 are unsettled, described resistance RLz=0.56725M, described potentiometer RLz1=500K and described resistance RLz2=51K, RLz3=10K, RLz4=5.1K, RLz5=1K, described electric capacity CLz=0.6335nF, described electric capacity CLz1=0.33nF, CLz2=0.33nF, CLz3 are unsettled, CLz4 is unsettled.

3, based on the Muthuswamy-Chua chaos system circuit of 0.1 rank mixed type and chain type fractional order integration commutation circuit, it is characterized in that:

(1) the Mathematical Modeling i of Muthuswamy-Chua chaos system:

$\left\{\begin{array}{ccc}\begin{array}{c}\frac{dx}{dt}=ay\\ \frac{dy}{dt}=-b\[\mathrm{\β}\left(z^2-1\right)y+x\]\\ \frac{dz}{dt}=\left(z-1\right)y-cz\end{array}& i& a=1,b=1/3,c=0.6,\mathrm{\β}=3/2\end{array}\right.$

The Mathematical Modeling ii of (2) 0.1 rank Muthuswamy-Chua chaos systems is:

$\left\{\begin{array}{ccc}\begin{array}{c}\frac{d^{\mathrm{\α}}x}{{\mathrm{dt}}^{\mathrm{\α}}}=ay\\ \frac{d^{\mathrm{\α}}y}{{\mathrm{dt}}^{\mathrm{\α}}}=-b\[\mathrm{\β}\left(z^2-1\right)y+x\]\\ \frac{d^{\mathrm{\α}}z}{{\mathrm{dt}}^{\mathrm{\α}}}=\left(z-1\right)y-cz\end{array}& ii& a=1,b=1/3,c=0.6,\mathrm{\β}=3/2,\mathrm{\α}=0.1\end{array}\right.$

(3) according to the Mathematical Modeling ii constructing analog circuit of 0.1 rank Muthuswamy-Chua chaos system, utilize operational amplifier U1, operational amplifier U2 and resistance and 0.1 rank mixed type and chain type fractional order integration commutation circuit U5, 0.1 rank mixed type and chain type fractional order integration commutation circuit U6, 0.1 rank mixed type and chain type fractional order integration commutation circuit U7 form anti-phase adder and anti-phase 0.1 rank fractional order integrator, multiplier U3 and multiplier U4 is utilized to realize multiplying, operational amplifier U8 is utilized to realize comparator, described operational amplifier U1, operational amplifier U2 and operational amplifier U8 adopts LF347N, described multiplier U3 and multiplier U4 adopts AD633JN,

Described operational amplifier U1 concatenation operation amplifier U2, multiplier U4, operational amplifier U8 and 0.1 rank mixed type and chain type fractional order integration commutation circuit U5, 0.1 rank mixed type and chain type fractional order integration commutation circuit U6, described operational amplifier U2 connects multiplier U3, multiplier U4 and 0.1 rank mixed type and chain type fractional order integration commutation circuit U7, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U2, described operational amplifier U8 connects 0.1 rank mixed type and chain type fractional order integration commutation circuit U5, 0.1 rank mixed type and chain type fractional order integration commutation circuit U6 and 0.1 rank mixed type and chain type fractional order integration commutation circuit U7.

1st pin of described operational amplifier U1 is connected by the 6th pin of resistance R8 and U1, 2nd pin is connected with the 1st pin by resistance R4, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin connects HA pin and the LA pin of 0.1 rank mixed type and chain type fractional order integration commutation circuit U6, 7th pin connects and exports y, connect the D pin of 0.1 rank mixed type and chain type fractional order integration commutation circuit U6, connect the 1st pin of multiplier U4, connected with the 2nd pin by resistance R5, connected with the 13rd pin by resistance R1, the 9th pin of U2 is connect by resistance R11, 8th pin connects and exports x, connected with the 6th pin by resistance R6, connect the 3rd of operational amplifier U8 the, 5, 10 pins, connect the D pin of 0.1 rank mixed type and chain type fractional order integration commutation circuit U5, 9th pin connects HA pin and the LA pin of 0.1 rank mixed type and chain type fractional order integration commutation circuit U5, 13rd pin is connected with the 14th pin by resistance R2, 14th pin is connected with the 9th pin by resistance R3, ,

The 1st of described operational amplifier U2, 2, 6, 7 pins are unsettled, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 8th pin exports z, connect the D pin of 0.1 rank mixed type and chain type fractional order integration commutation circuit U7, connect the 3rd pin of multiplier U3, connect the 3rd pin of multiplier U4, connected with the 9th pin by resistance R12, 9th pin connects HA pin and the LA pin of 0.1 rank mixed type and chain type fractional order integration commutation circuit U7, 13rd pin completes is crossed resistance R10 and is connected with the 14th pin, 14th pin is connected with the 9th pin by resistance R13,

1st pin of described operational amplifier U8 connects the IN pin of 0.1 rank mixed type and chain type fractional order integration commutation circuit U5 by resistance R14, by resistance R14 and resistance R15 ground connection, 2nd, 6, 9, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 7th pin connects the IN pin of 0.1 rank mixed type and chain type fractional order integration commutation circuit U6 by resistance R16, by resistance R16 and resistance R17 ground connection, 8th pin connects the IN pin of 0.1 rank mixed type and chain type fractional order integration commutation circuit U7 by resistance R18, by resistance R18 and resistance R19 ground connection, 13rd pin and the 14th pin unsettled.

1st pin of described multiplier U3 connects the 7th pin of multiplier U4, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects the 9th pin of operational amplifier U1 by resistance R7, and the 8th pin meets VCC;

1st pin of described multiplier U4 connects the 7th pin of operational amplifier U1,3rd pin connects the 8th pin of operational amplifier U2,2nd, the equal ground connection of 4,6 pin, 5th pin meets VEE, 7th pin connects operational amplifier U2 the 13rd pin by resistance R9, connect the 1st pin of multiplier U3, the 8th pin meets VCC;

HA and the LA pin of described 0.1 rank mixed type and chain type fractional order integration commutation circuit U5 connects the 9th pin of operational amplifier U1, and D pin connects the 8th pin of operational amplifier U1;

HA and the LA pin of described 0.1 rank mixed type and chain type fractional order integration commutation circuit U6 connects the 6th pin of operational amplifier U1, and D pin connects the 7th pin of operational amplifier U1;

HA and the LA pin of described 0.1 rank mixed type and chain type fractional order integration commutation circuit U7 connects the 9th pin of operational amplifier U2, and D pin connects the 8th pin of operational amplifier U2.

Resistance R1=R3=R5=R6=R9=R10=10k Ω in circuit, R2=R11=100k Ω, R4=200k Ω, R4=5k Ω, R8=300k Ω, R12=160k Ω, R14=R16=R18=100K Ω, R15=R17=80K Ω.R19＝80KΩ。

Certainly, above-mentioned explanation is not limitation of the present invention, and the present invention is also not limited only to above-mentioned citing, and the change that those skilled in the art make in essential scope of the present invention, remodeling, interpolation or replacement, also belong to protection scope of the present invention.

Claims (2)

1. a rank mixed type and chain type fractional order integration changing method, it is characterized in that being: a kind of mixed type 0.1 rank fractional order integration and a kind of 0.1 rank chain type fractional order integration carry out selection by alternative analog switch device and control to export, when the control signal of analog switch device is high level, mixed type 0.1 rank fractional order integration is selected to export, when the control signal of analog switch device is low level, chain type fractional order integration is selected to export, or, when the control signal of analog switch device is low level, mixed type 0.1 rank fractional order integration is selected to export, when the control signal of analog switch device is high level, chain type fractional order integration is selected to export.

2. a rank mixed type and chain type fractional order integration commutation circuit, it is characterized in that: described a kind of 0.1 rank mixed type and chain type fractional order integration commutation circuit are made up of 0.1 rank mixed type fractional order integration circuit and 0.1 rank chain type fractional order integration circuit and alternative analog switch U0 tri-part, described 0.1 rank mixed type fractional order integration circuit is made up of three parts, wherein resistance Rhx is in parallel with electric capacity Chx, form Part I, Part I is in parallel with electric capacity Chy again after connecting with resistance Rhy, form Part II, front two parts are in parallel with electric capacity Chz again after connecting with resistance Rhz, form Part III, output pin HA connects Part I, output pin HB connects Part III, described 0.1 rank chain type fractional order integration circuit is made up of three parts, wherein resistance Rlx is in parallel with electric capacity Clx, form Part I, resistance Rly is in parallel with electric capacity Cly, forms Part II, Part II is connected with Part I, resistance Rlz is in parallel with electric capacity Clz, and form Part III, Part III is connected with front two parts, output pin LA connects Part I, and output pin LB connects Part III, the output pin HB of described 0.1 rank mixed type fractional order integration circuit connects the SB pin of described alternative analog switch U0, the output pin LB of described 0.1 rank chain type fractional order integration circuit connects the SA pin of described alternative analog switch U0, the output pin D of described alternative analog switch U0 is as the output of 0.1 rank mixed type and chain type fractional order integration commutation circuit, the control pin IN of alternative analog switch U0 is as the control of 0.1 rank mixed type and chain type fractional order integration commutation circuit, the output pin HA of described 0.1 rank mixed type fractional order integration circuit and the output pin LA of described 0.1 rank chain type fractional order integration circuit is respectively as the input pin of 0.1 rank mixed type and chain type fractional order integration commutation circuit, described alternative analog switch U0 adopts ADG884, described resistance Rhx is by potentiometer Rhx1 and resistance Rhx2, Rhx3, Rhx4, Rhx5 is composed in series, described electric capacity Chx is by electric capacity Chx1, Chx2, Chx3, Chx4 composes in parallel, described resistance Rhy is composed in series by potentiometer Rhy1 and resistance Rhy2, Rhy3, Rhy4, Rhy5, and described electric capacity Chy, by electric capacity Chy1, Chy2, Chy3, Chy4, composes in parallel, described resistance Rhz is composed in series by potentiometer Rhz1 and resistance Rhz2, Rhz3, Rhz4, Rhz5, described electric capacity Chz is composed in parallel by electric capacity Chz1, Chz2, Chz3, Chz4, described resistance Rhx=0.6286M, described potentiometer Rhx1=3.5K, described resistance Rhx2=500K, Rhx3=100K, Rhx4=20K, Rhx5=5.1K, described electric capacity Chx=15.75uF, described electric capacity Chx1=10uF, Chx2=4.7uF, Chx3=1uF, Chx4=47nF, described resistance Rhy=0.3845M, described potentiometer Rhy1=3.5K, described resistance Rhy2=200K, Rhy3=100K, Rhy4=51K, Rhy5=30K, described electric capacity Chy=0.1569uF, described electric capacity Chy1=100nF, Chy2=47nF, Chy3=10nF, Chy4 are unsettled, described resistance Rhz=0.5718M, described potentiometer Rhz1=0.8K and described resistance Rhz2=500K, Rhz3=51K, Rhz4=20K, Rhz5=0K, described electric capacity Chz=0.631nF, described electric capacity Chz1=0.33nF, Chz2=0.33nF, Chz3 are unsettled, Chz4 is unsettled, described resistance RLx is composed in series by potentiometer RLx1 and resistance RLx2, RLx3, RLx4, RLx5, and described electric capacity CLx is composed in parallel by electric capacity CLx1, CLx2, CLx3, CLx4, described resistance RLy is composed in series by potentiometer RLy1 and resistance RLy2, RLy3, RLy4, RLy5, and described electric capacity CLy, by electric capacity CLy1, CLy2, CLy3, CLy4, composes in parallel, described resistance RLz is composed in series by potentiometer RLz1 and resistance RLz2, RLz3, RLz4, RLz5, described electric capacity CLz is composed in parallel by electric capacity CLz1, CLz2, CLz3, CLz4, described resistance RLx=0.636M, described potentiometer RLx1=500K, described resistance RLx2=100K, RLx3=20K, RLx4=10K, RLx5=5.1K, described electric capacity CLx=15.72uF, described electric capacity CLx1=10uF, CLx2=4.7uF, CLx3=1uF, CLx4 are unsettled, described resistance RLy=0.3815M, described potentiometer RLy1=200K, described resistance RLy2=100K, RLy3=51K, RLy4=20K, RLy5=20K, described electric capacity CLy=0.1572uF, described electric capacity CLy1=100nF, CLy2=10nF, CLy3=47nF, CLy4 are unsettled, described resistance RLz=0.56725M, described potentiometer RLz1=500K and described resistance RLz2=51K, RLz3=10K, RLz4=5.1K, RLz5=1K, described electric capacity CLz=0.6335nF, described electric capacity CLz1=0.33nF, CLz2=0.33nF, CLz3 are unsettled, CLz4 is unsettled.