WO2012176839A1 - Procédé de fabrication d'une batterie solaire de type à électrode de face arrière - Google Patents

Procédé de fabrication d'une batterie solaire de type à électrode de face arrière Download PDF

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WO2012176839A1
WO2012176839A1 PCT/JP2012/065864 JP2012065864W WO2012176839A1 WO 2012176839 A1 WO2012176839 A1 WO 2012176839A1 JP 2012065864 W JP2012065864 W JP 2012065864W WO 2012176839 A1 WO2012176839 A1 WO 2012176839A1
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film
region
passivation film
silicon substrate
conductivity type
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Japanese (ja)
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直城 浅野
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シャープ株式会社
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a method for manufacturing a back electrode type solar cell, and more particularly to a method for forming a passivation film on a semiconductor region of a back electrode type solar cell.
  • the conductivity type of a silicon substrate is, for example, a surface of a single-crystal or polycrystalline silicon substrate located on a light incident side (hereinafter referred to as “light-receiving surface of a silicon substrate”).
  • a pn junction is formed by diffusing impurities having different conductivity types, and electrodes are respectively provided on the light receiving surface of the silicon substrate and a surface located on the opposite side of the light receiving surface (hereinafter referred to as “the back surface of the silicon substrate”).
  • the back surface of the silicon substrate The ones that are formed and manufactured are the mainstream.
  • FIG. 8 is a cross-sectional view schematically showing an example of the configuration of the back junction solar cell 200 disclosed in Patent Document 1.
  • An antireflection film 209 is formed on the light receiving surface of the n-type silicon substrate 201.
  • An n + layer 205 and a p + layer 206 are formed on the back surface of the silicon substrate 201.
  • a first passivation film 203 is formed on the p + layer 206, and a second passivation film 204 different from the first passivation film 203 is formed on the n + layer 205.
  • a p electrode 208 is connected to the p + layer 206, and an n electrode 207 is connected to the n + layer 205.
  • FIG. 9 is a cross-sectional view showing an example of the manufacturing method of the back junction solar cell of FIG. 8 disclosed in Patent Document 1 in the order of steps. With reference to FIG. 9, a method of manufacturing the back junction solar cell shown in FIG. 8 will be described.
  • an n-type silicon substrate 401 is prepared.
  • a texture mask 413 made of a silicon oxide film or the like is formed on the back surface of the silicon substrate 401, and a texture structure 410 is formed on the light receiving surface of the silicon substrate 401 by etching.
  • a first diffusion mask 411 made of a silicon oxide film or the like is formed on the entire light receiving surface and back surface of the silicon substrate 401.
  • a first etching paste is printed in a desired pattern on the first diffusion mask 411 formed on the back surface of the silicon substrate 401 by, for example, a screen printing method.
  • the silicon substrate 401 on which the first etching paste is printed is subjected to heat treatment.
  • the silicon substrate 401 is immersed in water, and ultrasonic cleaning is performed by applying ultrasonic waves.
  • the first etching paste is removed, and a window 414 is formed on the back surface of the silicon substrate 401.
  • vapor phase diffusion of boron which is a p-type impurity as the first conductivity type impurity, is performed on the silicon substrate 401.
  • the p + layer 406 as the first conductivity type impurity diffusion layer is formed in the window 414.
  • the first diffusion mask 411 formed on the silicon substrate 401 and the BSG (boron silicate glass) film formed on the silicon substrate 401 by diffusion of boron are all removed using a hydrogen fluoride aqueous solution or the like.
  • a second diffusion mask 412 made of a silicon oxide film or the like is formed on the entire light receiving surface and back surface of the silicon substrate 401.
  • a second etching paste is printed in a desired pattern on the second diffusion mask 412 formed on the back surface of the silicon substrate 401.
  • the second etching paste may have the same composition as the first etching paste, or may have a different composition.
  • the silicon substrate 401 on which the second etching paste is printed is subjected to heat treatment. As a result, only the portion of the second diffusion mask 412 formed on the back surface of the silicon substrate 401 on which the second etching paste is printed is removed by etching. Thereafter, the window 415 is formed on the back surface of the silicon substrate 401 by performing the process in the step shown in FIG.
  • vapor phase diffusion of phosphorus which is an n-type impurity as the second conductivity type impurity, is performed on the silicon substrate 401.
  • an n + layer 405 as a second conductivity type impurity diffusion layer is formed in the window 415.
  • the second diffusion mask 412 formed on the silicon substrate 401 and the PSG (phosphorus silicate glass) film formed on the silicon substrate 401 by diffusion of phosphorus are all removed using a hydrogen fluoride aqueous solution or the like.
  • the silicon substrate 401 is thermally oxidized.
  • a first passivation film 403 made of a silicon oxide film is formed on the entire back surface of the silicon substrate 401.
  • the silicon oxide film 403a is also formed on the entire light receiving surface of the silicon substrate 401.
  • portions of the first passivation film 403 other than the portion formed on the p + layer 406 are removed by etching.
  • the etching paste used at this time may be the first etching paste or the second etching paste. As a result, the first passivation film 403 remains only on the p + layer 406.
  • a second passivation film 404 is formed on the back surface of the silicon substrate 401 from which the first passivation film 403 has been removed.
  • a silicon nitride film as the second passivation film 404 is formed on the back surface of the silicon substrate 401 and the n + layer 405 by forming a film made of silicon nitride by plasma CVD.
  • This second passivation film 404 is also formed on the first passivation film 403.
  • the silicon oxide film 403a formed on the light receiving surface of the silicon substrate 401 is completely removed using a hydrogen fluoride aqueous solution or the like, and then a silicon nitride film is formed on the light receiving surface.
  • An antireflection film 409 made of or the like is formed.
  • a contact hole 416 and a contact hole 417 are formed.
  • a part of each of the n + layer 405 and the p + layer 406 is exposed from the second passivation film 404 and the like.
  • the contact hole 416 and the contact hole 417 are formed by the following method.
  • the silicon substrate 401 is heated. Thereby, the second passivation film 404 on which the etching paste is printed is removed.
  • the etching paste is removed by performing ultrasonic cleaning after the heat treatment.
  • a silver paste is printed in each of the contact hole 416 and the contact hole 417, and then fired.
  • an n electrode 407 is formed on the n + layer 405, and a p electrode 408 is formed on the p + layer 406. In this manner, the back junction solar cell shown in FIG. 8 is manufactured.
  • an n + layer and a p + layer are formed on the back surface of the silicon substrate. Therefore, it is necessary to perform a diffusion mask formation process, a patterning process, an impurity diffusion process, a diffusion mask removal process, and the like for the n + layer formation and the p + layer formation, respectively. Further, after the formation of the n + layer and the formation of the p + layer is completed, different passivation films are formed on the n + layer and the p + layer, respectively.
  • the present invention has been made in view of this point, and the object of the present invention is to form different passivation films on the n + region and the p + region, respectively, even if the number of steps is reduced. It is providing the manufacturing method of a back electrode type solar cell.
  • the first back electrode type solar cell manufacturing method of the present invention includes a step of forming a first back surface passivation film containing a first conductivity type dopant on a part of a back surface of a silicon substrate, and a back surface of the silicon substrate. A step of forming a film containing a second conductivity type dopant on the upper surface and the first back surface side passivation film; and a heat treatment of the silicon substrate, whereby the first conductivity type dopant is transferred from the first back surface side passivation film to silicon.
  • a semiconductor region of the first conductivity type is formed by being diffused in a part of the substrate, and the dopant of the first conductivity type is diffused from the silicon substrate from a film in which the second conductivity type dopant contains the second conductivity type dopant.
  • the second back electrode type solar cell manufacturing method of the present invention includes a step of forming a first conductivity type semiconductor region on a part of a back surface of a silicon substrate, and a first conductivity type semiconductor region,
  • the second conductive layer is formed on at least a part of the back surface of the silicon substrate different from the first conductive type semiconductor region by using a step of forming a back surface side passivation film and a solution containing a second conductive type dopant. Forming a semiconductor region of the mold, and forming a second back-side passivation film on the back surface of the silicon substrate and the first back-side passivation film.
  • the first conductivity type semiconductor region may be n-type, and the second conductivity type semiconductor region may be p-type.
  • the second back side passivation film is preferably an aluminum oxide film.
  • the first back surface passivation film may be a silicon oxide film.
  • different passivation films can be formed on the n + region and the p + region, respectively, even if the number of steps is reduced.
  • first conductivity type and the “second conductivity type” in the claims are “n-type” and “p-type”, respectively.
  • first conductivity type and second conductivity type in the claims are “p-type” and “n-type”, respectively.
  • FIG. 1 and 2 are diagrams showing a configuration of a back electrode type solar cell 1 according to a first embodiment of the present invention.
  • FIG. 1 is a plan view schematically showing the configuration of a back electrode solar cell 1 according to the present embodiment.
  • the back electrode solar cell 1 according to the present embodiment is viewed from the back side of the silicon substrate. It is a top view.
  • the strip-shaped n-type electrodes 2 and the strip-shaped p-type electrodes 3 are alternately arranged.
  • FIG. 2 is a cross-sectional view taken along line II-II ′ shown in FIG.
  • An uneven shape 5 having a texture structure is formed on the light receiving surface of the n-type silicon substrate 4.
  • a light-receiving surface side passivation film 6 is formed on the light-receiving surface of the n-type silicon substrate 4, and an antireflection film 7 is formed on the light-receiving surface side passivation film 6.
  • the light-receiving surface side passivation film 6 is preferably, for example, a silicon oxide film or a silicon nitride film.
  • the thickness of the light-receiving surface side passivation film 6 is preferably 10 nm or less, for example.
  • the antireflection film 7 preferably has a refractive index lower than that of the light receiving surface side passivation film 6, and is preferably a silicon nitride film having a nitrogen content higher than that of the light receiving surface side passivation film 6, for example.
  • the thickness of the antireflection film 7 is preferably, for example, 50 nm or less and 100 nm or less.
  • n + regions 9 that are n-type semiconductor regions and p + regions 10 that are p-type semiconductor regions are alternately formed adjacent to each other.
  • a first backside passivation film 11 is formed on the n + region 9, and a second backside passivation film 12 is formed on the p + region 10 and the first backside passivation film 11. Yes.
  • the first back side passivation film 11 is preferably, for example, a silicon oxide film.
  • the thickness of the first back side passivation film 11 is preferably not less than 50 nm and not more than 100 nm, for example.
  • the second back side passivation film 12 is preferably, for example, an aluminum oxide film.
  • the thickness of the second back surface side passivation film 12 is preferably not less than 5 nm and not more than 50 nm, for example.
  • the n-type electrode 2 is connected to the n + region 9, and the p-type electrode 3 is connected to the p + region 10.
  • the total area of the p + region 10 having a conductivity type different from that of the n-type silicon substrate 4 on the back surface of the n-type silicon substrate 4 is the same as that of the n-type silicon substrate 4. It is preferable to make it larger than the total area of the n + region 9 having a mold.
  • Adjacent n + regions 9 may be separated in a direction perpendicular to the length direction of the n + region 9. At this time, a p + region 10 is formed between the n + regions 9. Further, when the p + region 10 are separated in a direction perpendicular to the length direction of the p + region 10, n + region 9 between p + region 10 is formed.
  • the back electrode type solar cell 1 since the conductivity type of the electrode located in the most periphery is the same in the back surface side of the n-type silicon substrate 4, it is possible to make the back electrode type solar cell 1 into a rotationally symmetric structure. . Therefore, when producing a solar cell module by arranging a plurality of back electrode type solar cells 1, for example, the back electrode type solar cell 1 can be arranged upside down in FIG. 1.
  • FIG. 3 is a cross-sectional view showing the method of manufacturing the back electrode type solar cell 1 according to this embodiment in the order of steps.
  • a texture mask 21 made of, for example, a silicon nitride film is formed on the back surface of the n-type silicon substrate 4 by, for example, a CVD (Chemical Vapor Deposition) method or a sputtering method.
  • CVD Chemical Vapor Deposition
  • an uneven shape 5 having a texture structure is formed on the light receiving surface of the n-type silicon substrate 4 by etching.
  • This etching is preferably performed using, for example, a mixed solution obtained by adding isopropyl alcohol to an alkaline aqueous solution such as sodium hydroxide or potassium hydroxide to 70 ° C. or higher and 80 ° C. or lower.
  • the texture mask 21 formed on the back surface of the n-type silicon substrate 4 is removed. Thereafter, a first back surface passivation film forming film containing a first conductivity type dopant is formed on the entire back surface of the n-type silicon substrate 4 by, for example, a CVD method, and on the first back surface passivation film forming film, A film for forming a diffusion prevention film is formed by, for example, a CVD method.
  • the first conductivity type dopant is an n-type dopant such as phosphorus.
  • the first back-side passivation film forming film is preferably a silicon oxide film, for example, and the thickness of the first back-side passivation film forming film is preferably, for example, from 50 nm to 100 nm.
  • the diffusion preventing film forming film is preferably, for example, a silicon oxide film or a silicon nitride film.
  • the thickness of the diffusion preventing film forming film is preferably, for example, 200 nm or more and 500 nm or less. This prevents the second conductivity type dopant from penetrating the diffusion prevention film 34 (see FIG. 3D) in the thickness direction during the heat treatment in FIG.
  • the portion of the n-type silicon substrate 4 located under the diffusion prevention film 34 (in other words, the n-type silicon substrate 4 It is possible to prevent diffusion toward the region in which the n + region 9 is formed.
  • the first back surface passivation film forming film and the diffusion preventing film forming film are formed only on the region where the n + region 9 is formed.
  • the first backside passivation film formation film and the diffusion prevention film formation film are patterned so that the film remains. This patterning is preferably performed by applying an etching paste by a screen printing method or the like and then heating. By this patterning, the first back-side passivation film 11 and the diffusion prevention film 34 are sequentially formed on the region where the n + region 9 is formed. Thereafter, the n-type silicon substrate 4 is subjected to ultrasonic cleaning and then acid-treated to remove the etching paste used for patterning.
  • the etching paste preferably includes, for example, at least one selected from the group consisting of phosphoric acid, hydrogen fluoride, ammonium fluoride, and ammonium hydrogen fluoride as an etching component. It is preferable to further contain a sticking agent.
  • the n-type silicon substrate 4 is exposed from the first back-side passivation film 11 and the diffusion prevention film 34 on the back surface (specifically, on the back surface of the n-type silicon substrate 4).
  • a film 31 containing a second conductivity type dopant is formed by, for example, the CVD method, and a diffusion control film 32 is formed on the film 31 containing the second conductivity type dopant, for example. It is formed by the CVD method.
  • the second conductivity type dopant is a p-type dopant such as boron.
  • the n-type silicon substrate 4 is heat-treated.
  • the second conductivity type dopant diffuses from the film 31 containing the second conductivity type dopant to the portion located below the film 31 containing the second conductivity type dopant on the back side of the n-type silicon substrate 4.
  • the p + region 10 is formed.
  • the first conductivity type dopant diffuses from the first back surface side passivation film 11 to a portion of the back surface side of the n-type silicon substrate 4 located below the first back surface side passivation film 11, and thus the n + region 9. Is formed.
  • the n + region 9 and the p + region 10 can be formed simultaneously.
  • the n + region 9 and the p + region 10 are formed so as to be adjacent to each other.
  • the diffusion preventing film 34 is provided between the first back surface side passivation film 11 and the film 31 containing the second conductivity type dopant, the second conductivity type dopant remains in the second conductivity even after the heat treatment. It is possible to prevent diffusion from the film 31 containing the conductive dopant toward the portion of the n-type silicon substrate 4 located below the diffusion prevention film 34. Further, since the diffusion control film 32 is provided on the film 31 containing the second conductivity type dopant, it is possible to prevent the second conductivity type dopant from being out-diffused even if the heat treatment is performed. .
  • the diffusion control film 32, the film 31 containing the second conductivity type dopant and the diffusion prevention film 34 formed on the back surface of the n-type silicon substrate 4 are removed by etching. .
  • a film 31 containing a second conductivity type dopant and a diffusion control film 32 are formed on the p + region 10, and a film 31 containing the second conductivity type dopant and a diffusion are formed on the n + region 9.
  • the first back surface side passivation film 11 and the diffusion preventing film 34 are formed. Therefore, if etching is performed until the film 31 containing the second conductivity type dopant and the diffusion control film 32 are removed, only the first back-side passivation film 11 remains.
  • a second back surface passivation film 12 different from the first back surface passivation film 11 is formed on the back surface of the n-type silicon substrate 4 by, for example, sputtering or CVD. . Since the first back surface side passivation film 11 is formed on the n + region 9, the second back surface side passivation film 12 is formed on the p + region 10 and on the first back surface side passivation film 11. Thereafter, a light-receiving surface side passivation film 6 and an antireflection film 7 are sequentially formed on the light-receiving surface of the n-type silicon substrate 4 by, for example, a CVD method.
  • the second back side passivation film 12 is preferably, for example, an aluminum oxide film.
  • Both the light-receiving surface side passivation film 6 and the antireflection film 7 are preferably silicon nitride films, and the nitrogen content is preferably higher in the antireflection film 7 than in the light-receiving surface side passivation film 6, and the refractive index is reflected.
  • the prevention film 7 is preferably lower than the light-receiving surface side passivation film 6.
  • the light-receiving surface side passivation film 6 may be a silicon oxide film.
  • the light receiving surface side of the n-type silicon substrate 4 is shown above.
  • the first back-side passivation film 11 and the second back-side passivation film 12 are patterned.
  • the second back-side passivation film 12 is patterned. Thereby, a part of the n + region 9 is exposed from the first back surface side passivation film 11 and the second back surface side passivation film 12, and a part of the p + region 10 is exposed from the second back surface side passivation film 12.
  • This patterning is preferably performed, for example, by applying an etching paste by screen printing or the like and then heating. Thereafter, the n-type silicon substrate 4 is subjected to ultrasonic cleaning and then acid-treated to remove the etching paste used for patterning.
  • the etching paste preferably includes, for example, at least one selected from the group consisting of phosphoric acid, hydrogen fluoride, ammonium fluoride, and ammonium hydrogen fluoride as an etching component. It is preferable to further contain a sticking agent.
  • the back electrode type solar cell 1 can be manufactured without providing a step of diffusing the second conductivity type dopant separately from the step of diffusing the first conductivity type dopant.
  • the mask used to form the n + region 9 and the mask used to form the p + region 10 can be removed simultaneously. Therefore, the number of manufacturing steps of the back electrode type solar cell 1 can be reduced.
  • the method for manufacturing the back electrode type solar cell 1 according to the present embodiment the first back side passivation film 11 is formed on the n + region 9, and the second back side passivation is formed on the p + region 10. A film 12 is formed.
  • the back electrode type solar cell 1 can be manufactured without requiring many facilities, the productivity of the back electrode type solar cell 1 is improved.
  • the n + region 9 is formed using the first back surface side passivation film 11. Therefore, the first back-side passivation film 11 can be formed on the n + region 9 without causing a positional shift.
  • the second back surface side passivation film 12 is formed on the entire back surface of the n-type silicon substrate 4, it is formed not only on the first back surface side passivation film 11 but also on the p + region 10. Therefore, the second back-side passivation film 12 can be formed on the p + region 10 without causing a positional shift.
  • the aluminum oxide film has a negative fixed charge. Therefore, if the second back surface passivation film 12 is made of an aluminum oxide film, the back electrode solar cell 1 having high passivation properties on the p + region 10 can be manufactured.
  • FIG. 4 is a cross-sectional view showing the method of manufacturing the back electrode type solar cell 71 according to the second embodiment of the present invention in the order of steps.
  • the first back side passivation film does not contain the first conductivity type dopant.
  • the manufacturing method of the back surface electrode type solar cell 71 according to the present embodiment is different from the manufacturing method of the back surface electrode type solar cell 1 according to the first embodiment in the method of forming the n + region 9.
  • the manufacturing method of the back electrode type solar cell 71 according to this embodiment will be described in the order of steps.
  • a texture mask 21 made of, for example, a silicon nitride film is formed on the back surface of the n-type silicon substrate 4 as in the step shown in FIG. 3A in the first embodiment.
  • a texture mask 21 made of, for example, a silicon nitride film is formed on the back surface of the n-type silicon substrate 4 as in the step shown in FIG. 3A in the first embodiment.
  • it is formed by a CVD method or a sputtering method.
  • the uneven shape 5 which is a textured structure is etched on the light receiving surface of the n-type silicon substrate 4 by etching. Form.
  • the texture mask 21 formed on the back surface of the n-type silicon substrate 4 is removed.
  • a diffusion mask 22 made of, for example, silicon oxide is formed on the light receiving surface of the n-type silicon substrate 4.
  • a diffusion mask 23 is formed on a region different from the region where n + region 9 is formed on the back surface of n-type silicon substrate 4.
  • the diffusion mask 23 is formed, for example, by applying a masking paste containing a solvent, a thickener, and a silicon oxide precursor by inkjet or screen printing and then performing a heat treatment.
  • a gas containing a dopant of the first conductivity type is diffused in a gas phase. Accordingly, the first conductivity type dopant is diffused into the portion of the back surface of the n-type silicon substrate 4 exposed from the diffusion mask 23. Thereby, n + region 9 is formed.
  • the first conductivity type dopant is phosphorus
  • POCl 3 can be used as the gas containing the first conductivity type dopant.
  • n-type silicon is used in a gas atmosphere containing the first conductivity type dopant at a temperature of 800 ° C. to 900 ° C. for 10 minutes to 60 minutes.
  • the substrate 4 is exposed.
  • an n + region 9 having a dopant concentration of the first conductivity type of 10 20 cm ⁇ 3 or more is formed.
  • the diffusion masks 22 and 23 formed on the n-type silicon substrate 4 and the glass layer formed by diffusing phosphorus in the diffusion masks 22 and 23 are combined with hydrogen fluoride. Remove by acid treatment. Thereafter, thermal oxidation with oxygen or water vapor is performed. Thereby, a silicon oxide film 24 is formed on the light receiving surface of the n-type silicon substrate 4, and a first back-side passivation film forming film 11 ⁇ / b> A is formed on the back surface of the n-type silicon substrate 4. At this time, as shown in FIG.
  • the thickness of the first back surface passivation film forming film 11 ⁇ / b > A formed on the n + region 9 was formed on a region different from the n + region 9. It becomes thicker than the thickness of the first backside passivation film forming film 11A.
  • the growth rate of the film by thermal oxidation is determined by the type of impurity diffused in the silicon substrate and the concentration of the impurity. In particular, when the n-type impurity concentration in the silicon substrate is high, the growth rate of the film by thermal oxidation increases.
  • n-type impurity concentration it n + region 9 is higher than a region different from the n + region 9.
  • the first is more of the thickness of the back side passivation film forming film 11A, a first for the back side passivation film formed formed on the area different from the n + region 9 formed on the n + region 9 It becomes thicker than the thickness of the film 11A.
  • the first back surface passivation film forming film 11A is formed by combining silicon and oxygen during thermal oxidation.
  • the n-type silicon substrate 4 the surface of the n + region 9 is recessed n-type silicon substrate 4 side than the surface of a region different from the n + region 9.
  • the first back side passivation film 11 (see FIG. 4 (e)) as a diffusion mask for the n + region 9 during the formation of the p + region 10 is formed on the n + region 9 first
  • the difference between the thickness of the first back surface passivation film forming film 11A and the thickness of the first back surface passivation film forming film 11A formed on a region different from the n + region 9 is preferably 60 nm or more.
  • 11A is removed by etching.
  • the back surface of the n-type silicon substrate 4, the thickness of the first back side passivation film forming film 11A formed on the n + region 9, first back surface formed on a region different from the n + region 9 It is thicker than the thickness of the side passivation film forming film 11A.
  • the first backside passivation film forming film 11A is etched until the first backside passivation film forming film 11A formed on a region different from the n + region 9 is removed, the first backside passivation is performed.
  • the film forming film 11A remains only on the n + region 9. Thereby, the 1st back surface side passivation film 11 is formed.
  • a diffusion mask 25 made of silicon oxide or the like is formed on the light receiving surface of the n-type silicon substrate 4.
  • the polymer obtained by reacting the organic polymer with a compound containing a dopant of the second conductivity type is exposed to a portion of the back surface of the n-type silicon substrate 4 exposed from the first back surface passivation film 11 with an alcohol solvent.
  • the solution obtained by dissolving in is applied. When the solution is dry, heat treatment is performed. As a result, the second conductivity type dopant diffuses into the portion of the back surface of the n-type silicon substrate 4 exposed from the first back surface passivation film 11. Therefore, p + region 10 is formed.
  • the second conductivity type dopant is boron
  • a boron compound can be used as the compound containing the second conductivity type dopant.
  • heating the n-type silicon substrate 4 at 900 ° C. or more and 1000 ° C. or less for 10 minutes or more and 60 minutes or less can be mentioned.
  • the p + region 10 having the second conductivity type dopant concentration of 10 20 cm ⁇ 3 or more is formed.
  • the first back surface side passivation film 11 also functions as a film (diffusion mask) for preventing the second conductivity type dopant from diffusing into the n + region 9.
  • FIG. 4F the light receiving surface side of the n-type silicon substrate 4 is shown above.
  • the diffusion mask 25 and the glass layer formed by diffusing boron in the diffusion mask 25 are removed by hydrofluoric acid treatment.
  • a second back surface passivation film 12 different from the first back surface passivation film 11 is formed on the back surface of the n-type silicon substrate 4 by, for example, a sputtering method or a CVD method. Since the first back surface side passivation film 11 is formed on the n + region 9, the second back surface side passivation film 12 is formed on the p + region 10 and on the first back surface side passivation film 11.
  • a light-receiving surface side passivation film 6 and an antireflection film 7 are sequentially formed on the light-receiving surface of the n-type silicon substrate 4 by, for example, a CVD method.
  • the second back side passivation film 12 is preferably, for example, an aluminum oxide film.
  • Both the light-receiving surface side passivation film 6 and the antireflection film 7 are preferably silicon nitride films, and the nitrogen content is preferably higher in the antireflection film 7 than in the light-receiving surface side passivation film 6, and the refractive index is reflected.
  • the prevention film 7 is preferably lower than the light-receiving surface side passivation film 6.
  • the light-receiving surface side passivation film 6 may be a silicon oxide film.
  • the n-type electrode 2 on the n + region 9 in the same manner as the step shown in FIG. Patterning is performed on the back side passivation film 11 and the second back side passivation film 12. Further, in order to form the p-type electrode 3 on the p + region 10, the second back surface passivation film 12 is patterned.
  • the patterning method the composition of the etching paste, and the method for removing the etching paste, the same method as the step shown in FIG. 3G in the first embodiment can be used.
  • the first back-side passivation film 11 and the second back-side passivation in the n + region 9 are used.
  • a silver paste is applied onto the portion exposed from the film 12 and the portion exposed from the second back-side passivation film 12 in the p + region 10 by, for example, a screen printing method and then dried. Thereafter, it is fired.
  • the n-type electrode 2 is formed on the n + region 9 and the p-type electrode 3 is formed on the p + region 10. In this way, the back electrode type solar cell 71 is manufactured.
  • the diffusion mask for forming the p + region 10 is the first back surface passivation film 11. Therefore, the back electrode type solar cell 71 can be manufactured without providing the step of forming the first back side passivation film 11 separately from the step of forming the diffusion mask for forming the p + region 10.
  • the p + region 10 is formed by applying a solution containing a second conductivity type dopant. Therefore, back electrode type solar cell 71 can be manufactured without forming and removing a diffusion mask for forming p + region 10. Therefore, the number of manufacturing steps of the back electrode type solar cell 71 can be reduced.
  • the first back surface passivation film 11 is formed on the n + region 9, and the second back surface passivation is formed on the p + region 10.
  • a film 12 is formed.
  • the back electrode type solar cell 71 can be manufactured without requiring many facilities, the productivity of the back electrode type solar cell 71 is improved.
  • the first back side passivation film 11 is formed on the n + region 9 by thermally oxidizing the n-type silicon substrate 4, the first back side passivation film is formed on the n + region 9 without causing positional displacement. 11 can be formed.
  • the second back surface side passivation film 12 is formed on the entire back surface of the n-type silicon substrate 4, it is formed not only on the first back surface side passivation film 11 but also on the p + region 10. Therefore, the second back-side passivation film 12 can be formed on the p + region 10 without causing a positional shift.
  • the aluminum oxide film has a negative fixed charge. Therefore, if the second back surface side passivation film 12 is made of an aluminum oxide film, the back electrode type solar cell 71 having high passivation properties on the p + region 10 can be manufactured.
  • the n + region 9 may be formed after the p + region 10 is formed.
  • the p + region 10 can be formed using a gas containing boron or the like, and the n + region 9 can be formed using a solution containing phosphorus or the like.
  • FIG. 5 to 6 are diagrams showing the configuration of a back electrode type solar cell 81 according to the third embodiment of the present invention.
  • FIG. 5 is a plan view schematically showing the configuration of the back electrode type solar cell 81 according to this embodiment.
  • the back electrode type solar cell 81 according to this embodiment is seen from the back side of the silicon substrate. It is a top view.
  • the strip-shaped n-type electrodes 102 and the strip-shaped p-type electrodes 103 are alternately arranged.
  • FIG. 6 is a cross-sectional view taken along line VI-VI ′ shown in FIG.
  • An uneven shape 105 having a texture structure is formed on the light receiving surface of the n-type silicon substrate 104.
  • a light-receiving surface side passivation film 106 is formed on the light-receiving surface of the n-type silicon substrate 104, and an antireflection film 107 is formed on the light-receiving surface side passivation film 106.
  • the light-receiving surface side passivation film 106 is preferably, for example, a silicon oxide film or a silicon nitride film.
  • the thickness of the light-receiving surface side passivation film 106 is preferably 10 nm or less, for example.
  • the antireflection film 107 preferably has a lower refractive index than the light-receiving surface side passivation film 106, and is preferably a silicon nitride film having a higher nitrogen content than the light-receiving surface side passivation film 106, for example.
  • the thickness of the antireflection film 107 is preferably, for example, 50 nm or less and 100 nm or less.
  • n + regions 109 that are n-type semiconductor regions and p + regions 110 that are p-type semiconductor regions are formed alternately adjacent to each other.
  • a first back-side passivation film 111 is formed on the p + region 110, and a second back-side passivation film 112 is formed on the n + region 109 and the first back-side passivation film 111.
  • the first back side passivation film 111 is preferably, for example, a silicon oxide film.
  • the thickness of the first back-side passivation film 111 is preferably, for example, not less than 50 nm and not more than 100 nm.
  • the second back side passivation film 112 is preferably a silicon nitride film, for example.
  • the thickness of the second back surface side passivation film 112 is preferably not less than 5 nm and not more than 50 nm, for example.
  • the n-type electrode 102 is connected to the n + region 109, and the p-type electrode 103 is connected to the p + region 110.
  • the total area of the p + region 110 having a conductivity type different from that of the n-type silicon substrate 104 on the back surface of the n-type silicon substrate 104 is set to the same conductivity type as that of the n-type silicon substrate 104. It is preferable to make it larger than the total area of the n + regions 109.
  • Adjacent n + regions 109 may be separated in a direction perpendicular to the length direction of the n + region 109. At this time, a p + region 110 is formed between the n + regions 109. Further, when the p + region 110 are separated in a direction perpendicular to the length direction of the p + region 110, n + region 109 between p + region 110 is formed.
  • the back electrode type solar cell 81 can have a rotationally symmetric structure. . Therefore, when producing a solar cell module by arranging a plurality of back electrode solar cells 81, for example, the back electrode solar cells 81 can be arranged upside down in FIG.
  • FIG. 7 is a cross-sectional view showing the method of manufacturing the back electrode type solar cell 81 according to this embodiment in the order of steps.
  • a texture mask 121 made of, for example, a silicon nitride film is formed on the back surface of the n-type silicon substrate 104 by, for example, CVD or sputtering.
  • an uneven shape 105 having a texture structure is formed on the light receiving surface of the n-type silicon substrate 104 by etching.
  • This etching is preferably performed using, for example, a mixed solution obtained by adding isopropyl alcohol to an alkaline aqueous solution such as sodium hydroxide or potassium hydroxide to 70 ° C. or higher and 80 ° C. or lower.
  • the back side of the n-type silicon substrate 104 is described above.
  • the texture mask 121 formed on the back surface of the n-type silicon substrate 104 is removed.
  • a first back-side passivation film forming film containing a first conductivity type dopant is formed on the entire back surface of the n-type silicon substrate 104 by, for example, a CVD method, and the first back-side passivation film forming film is formed on the first back-side passivation film forming film.
  • a film for forming a diffusion prevention film is formed by, for example, a CVD method.
  • the first conductivity type dopant is a p-type dopant such as boron.
  • the first back-side passivation film forming film is preferably a silicon oxide film, for example, and the thickness of the first back-side passivation film forming film is preferably, for example, from 50 nm to 100 nm.
  • the diffusion preventing film forming film is preferably, for example, a silicon oxide film or a silicon nitride film.
  • the thickness of the diffusion preventing film forming film is preferably, for example, 200 nm or more and 500 nm or less. Accordingly, the second conductivity type dopant can be prevented from penetrating through the diffusion prevention film 132 (see FIG.
  • the second conductivity type dopant can be prevented. From the film 133 containing the second conductivity type dopant (see FIG. 7D), a portion of the n-type silicon substrate 104 located under the diffusion barrier film 132 (in other words, of the n-type silicon substrate 104 Diffusion toward the region where the p + region 110 is formed) can be prevented.
  • the first back side passivation film formation film and the diffusion prevention film formation film are formed only on the region where the n + region 109 is formed.
  • the first backside passivation film formation film and the diffusion prevention film formation film are patterned so that the film is removed. This patterning is preferably performed by applying an etching paste by a screen printing method or the like and then heating. By this patterning, the first back-side passivation film 111 and the diffusion preventing film 132 are formed, and the region where the n + region 109 is formed is exposed from the first back-side passivation film 111 and the diffusion preventing film 132.
  • the n-type silicon substrate 104 is subjected to ultrasonic cleaning and then acid-treated to remove the etching paste used for patterning.
  • the etching paste preferably includes, for example, at least one selected from the group consisting of phosphoric acid, hydrogen fluoride, ammonium fluoride, and ammonium hydrogen fluoride as an etching component. It is preferable to further contain a sticking agent.
  • the n-type silicon substrate 104 is exposed from the first back-side passivation film 111 and the diffusion prevention film 132 on the back surface (specifically, on the back surface of the n-type silicon substrate 104).
  • a film 133 containing a second conductivity type dopant is formed by, for example, the CVD method, and a diffusion control film 134 is formed on the film 133 containing the second conductivity type dopant, for example. It is formed by the CVD method.
  • the second conductivity type dopant is an n-type dopant such as phosphorus.
  • the film 133 containing the second conductivity type dopant is preferably, for example, a silicon oxide film, and the thickness of the film 133 containing the second conductivity type dopant is preferably, for example, not less than 50 nm and not more than 100 nm.
  • the diffusion control film 134 is preferably a silicon oxide film or a silicon nitride film, for example.
  • the thickness of the diffusion control film 134 is preferably, for example, not less than 200 nm and not more than 500 nm.
  • the n-type silicon substrate 104 is heat-treated.
  • the first conductivity type dopant diffuses from the first back surface side passivation film 111 to the portion of the back surface side of the n-type silicon substrate 104 located below the first back surface side passivation film 111, and thus the p + region. 110 is formed.
  • the second conductivity type dopant diffuses from the film 133 containing the second conductivity type dopant to a portion located below the film 133 containing the second conductivity type dopant on the back side of the n-type silicon substrate 104, Therefore, n + region 109 is formed.
  • the n + region 109 and the p + region 110 can be formed simultaneously.
  • the n + region 109 and the p + region 110 are formed adjacent to each other.
  • the dopant concentration of the second conductivity type is formed 10 20 cm -3 or more n + region 109
  • the dopant concentration of the first conductivity type is 10 20 cm -3 or more p + region 110 is formed.
  • the diffusion prevention film 132 is provided between the first back surface side passivation film 111 and the film 133 containing the second conductivity type dopant, the second conductivity type dopant remains the second even if the heat treatment is performed. It is possible to prevent diffusion from the film 133 containing the conductive dopant toward the portion of the n-type silicon substrate 104 located under the diffusion prevention film 132. Further, since the diffusion control film 134 is provided on the film 133 containing the second conductivity type dopant, it is possible to prevent the second conductivity type dopant from being out-diffused.
  • the diffusion control film 134, the film 133 containing the second conductivity type dopant, and the diffusion prevention film 132 formed on the back surface of the n-type silicon substrate 104 are removed by etching.
  • a film 133 containing a second conductivity type dopant and a diffusion control film 134 are formed on the n + region 109, and a film 133 containing a second conductivity type dopant and a diffusion layer are formed on the p + region 110.
  • a first back-side passivation film 111 and a diffusion prevention film 132 are formed. Therefore, if etching is performed until the film 133 containing the second conductivity type dopant and the diffusion control film 134 are removed, only the first back-side passivation film 111 remains.
  • a second back surface passivation film 112 different from the first back surface passivation film 111 is formed on the back surface of the n-type silicon substrate 104 by, for example, sputtering or CVD. . Since the first back surface side passivation film 111 is formed on the p + region 110, the second back surface side passivation film 112 is formed on the n + region 109 and the first back surface side passivation film 111. Thereafter, a light-receiving surface side passivation film 106 and an antireflection film 107 are formed on the light-receiving surface of the n-type silicon substrate 104 by, for example, a CVD method.
  • the second back side passivation film 112 is preferably a silicon nitride film, for example.
  • Both the light receiving surface side passivation film 106 and the antireflection film 107 are preferably silicon nitride films, and the nitrogen content is preferably higher in the antireflection film 107 than in the light receiving surface side passivation film 106, and the refractive index is reflected.
  • the prevention film 107 is preferably lower than the light-receiving surface side passivation film 106.
  • the light-receiving surface side passivation film 106 may be a silicon oxide film.
  • the light receiving surface side of the n-type silicon substrate 104 is shown above.
  • the second back surface side passivation film 112 is patterned.
  • the first back surface side passivation film 111 and the second back surface side passivation film 112 are patterned. This patterning is preferably performed, for example, by applying an etching paste by screen printing or the like and then heating. Thereafter, the n-type silicon substrate 104 is subjected to ultrasonic cleaning and acid treatment to remove the etching paste used for patterning.
  • the etching paste preferably includes, for example, at least one selected from the group consisting of phosphoric acid, hydrogen fluoride, ammonium fluoride, and ammonium hydrogen fluoride as an etching component. It is preferable to further contain a sticking agent.
  • the n + region 109 is exposed on the portion exposed from the second back surface side passivation film 112 and the first back surface side passivation film 111 and the second surface in the p + region 110.
  • a silver paste is applied onto the portion exposed from the back-side passivation film 112 by, for example, a screen printing method and then dried. Thereafter, it is fired.
  • the n-type electrode 102 is formed on the n + region 109
  • the p-type electrode 103 is formed on the p + region 110. In this way, the back electrode type solar cell 81 is manufactured.
  • the first back surface passivation film 111 is formed of a film containing the first conductivity type dopant necessary for forming the p + region 110. It is said. Therefore, the back electrode type solar cell 81 can be manufactured without providing a separate step of forming the first back side passivation film 111. Further, in the method of manufacturing the back electrode type solar cell 81 according to this embodiment, in the step shown in FIG. 7D, the p + region 110 is formed by diffusing the first conductivity type dopant and the second conductivity type. N + region 109 is formed by diffusing the dopant.
  • the back electrode type solar cell 81 can be manufactured without providing a step of diffusing the second conductivity type dopant separately from the step of diffusing the first conductivity type dopant.
  • the mask used to form the n + region 109 and the mask used to form the p + region 110 can be removed at the same time. Therefore, the number of manufacturing steps of the back electrode type solar cell 81 can be reduced.
  • the second back surface passivation film 112 is formed on the n + region 109 and the first back surface passivation is formed on the p + region 110.
  • a film 111 is formed.
  • the n + region 109 and the p + region 110 are different.
  • a passivation film can be formed.
  • the back electrode type solar cell 81 can be manufactured without requiring many facilities, the productivity of the back electrode type solar cell 81 is improved.
  • the p + region 110 is formed using the first back surface side passivation film 111. Therefore, the first back-side passivation film 111 can be formed on the p + region 110 without causing a positional shift.
  • the second back surface side passivation film 112 is formed on the entire back surface of the n-type silicon substrate 104, it is formed not only on the first back surface side passivation film 111 but also on the n + region 109. Therefore, the second back-side passivation film 112 can be formed on the n + region 109 without causing a positional shift.
  • the silicon nitride film has a positive fixed charge. Therefore, if the second back surface side passivation film 112 is formed of a silicon nitride film, the back electrode type solar cell 81 having high passivation properties on the n + region 109 can be manufactured.
  • the back electrode type solar cell provided with the n-type silicon substrate has been described, but a p-type silicon substrate may be used as the substrate.
  • a p-type silicon substrate is used as the substrate, in order to obtain a higher short-circuit current, the total area of n + regions having a conductivity type different from that of the substrate on the back surface of the substrate is the same as that of the substrate. It is preferable to make it larger than the total area of the p + region.
  • the concept of the back electrode type solar cell of the present invention includes an MWT (Metal Wrap Through) type solar cell (in this solar cell, a part of the electrode is disposed in a through hole provided in a semiconductor substrate), etc. Is also included.
  • MWT Metal Wrap Through

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Abstract

L'invention concerne un procédé de fabrication d'une batterie solaire de type à électrode de face arrière (1), qui comprend : une étape de formation d'un premier film de passivation côté face arrière (11) comprenant un dopant d'un premier type de conductivité ; une étape de formation d'un film (31) contenant un dopant d'un second type de conductivité ; une étape dans laquelle, par traitement thermique d'un substrat de silicium (4), une région semi-conductrice du premier type de conductivité (9) est formée par dispersion du dopant du premier type de conductivité à partir du premier film de passivation côté face arrière (11) dans une partie du substrat de silicium (4), et une région semi-conductrice du second type de conductivité (10) est formée par dispersion du dopant du second type de conductivité à partir du film (31) contenant le dopant du second type de conductivité, dans au moins une partie d'une région du substrat de silicium (4) qui est différente de la région dans laquelle est dispersé le dopant du premier type de conductivité ; et une étape d'élimination du film (31) contenant le dopant du second type de conductivité ; et une étape de formation d'un second film de passivation côté face arrière (12). De cette manière, la région p+ (10) peut être formée par dispersion du dopant du second type de conductivité sans qu'il ne soit nécessaire de disposer de manière séparée un premier film de passivation côté face arrière, et en même temps que la formation de la région n+ (9) par dispersion du dopant du premier type de conductivité.
PCT/JP2012/065864 2011-06-21 2012-06-21 Procédé de fabrication d'une batterie solaire de type à électrode de face arrière WO2012176839A1 (fr)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114038921A (zh) * 2021-11-05 2022-02-11 晶科能源(海宁)有限公司 太阳能电池及光伏组件
EP4322227A4 (fr) * 2022-06-30 2024-07-03 Hengdian Group Dmegc Magnetics Co Ltd Structure de cellule solaire et son procédé de fabrication

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6420706B2 (ja) * 2015-04-07 2018-11-07 信越化学工業株式会社 太陽電池用パッシベーション膜形成方法及び太陽電池用パッシベーション膜形成装置
WO2017002747A1 (fr) 2015-06-30 2017-01-05 シャープ株式会社 Élément de conversion photoélectrique
JP2017174925A (ja) * 2016-03-23 2017-09-28 シャープ株式会社 光電変換素子
JP7483245B2 (ja) 2020-04-09 2024-05-15 国立研究開発法人産業技術総合研究所 太陽電池およびその製造方法
CN112018196B (zh) * 2020-08-04 2022-11-29 隆基绿能科技股份有限公司 背接触太阳电池及生产方法、背接触电池组件

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009021494A (ja) * 2007-07-13 2009-01-29 Sharp Corp 太陽電池の製造方法
JP2009076546A (ja) * 2007-09-19 2009-04-09 Sharp Corp 太陽電池の製造方法
JP2010219527A (ja) * 2009-03-17 2010-09-30 Sharp Corp バックコンタクト単一ヘテロ接合型太陽電池の製造方法及びバックコンタクト単一ヘテロ接合型太陽電池

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009021494A (ja) * 2007-07-13 2009-01-29 Sharp Corp 太陽電池の製造方法
JP2009076546A (ja) * 2007-09-19 2009-04-09 Sharp Corp 太陽電池の製造方法
JP2010219527A (ja) * 2009-03-17 2010-09-30 Sharp Corp バックコンタクト単一ヘテロ接合型太陽電池の製造方法及びバックコンタクト単一ヘテロ接合型太陽電池

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114038921A (zh) * 2021-11-05 2022-02-11 晶科能源(海宁)有限公司 太阳能电池及光伏组件
CN114038921B (zh) * 2021-11-05 2024-03-29 晶科能源(海宁)有限公司 太阳能电池及光伏组件
US11949038B2 (en) 2021-11-05 2024-04-02 Jinko Solar (Haining) Co., Ltd. Solar cell and photovoltaic module
EP4322227A4 (fr) * 2022-06-30 2024-07-03 Hengdian Group Dmegc Magnetics Co Ltd Structure de cellule solaire et son procédé de fabrication

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