WO2012127780A1 - フレキシブル半導体装置及びその製造方法 - Google Patents
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- WO2012127780A1 WO2012127780A1 PCT/JP2012/001152 JP2012001152W WO2012127780A1 WO 2012127780 A1 WO2012127780 A1 WO 2012127780A1 JP 2012001152 W JP2012001152 W JP 2012001152W WO 2012127780 A1 WO2012127780 A1 WO 2012127780A1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
- H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/08—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/5442—Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Definitions
- the present invention relates to a flexible semiconductor device having flexibility and a method for manufacturing the same. More specifically, the present invention relates to a flexible semiconductor device that can be used as a TFT and a method for manufacturing the same. Furthermore, the present invention also relates to an image display device using such a flexible semiconductor device and a manufacturing method thereof.
- a display medium is formed using an element utilizing liquid crystal, organic EL (organic electroluminescence), electrophoresis, or the like.
- a technique using an active drive element (TFT element) as an image drive element has become mainstream in order to ensure uniformity of screen brightness, screen rewrite speed, and the like.
- TFT element active drive element
- these TFT elements are formed on a substrate, and liquid crystal, organic EL elements, etc. are sealed.
- a semiconductor such as a-Si (amorphous silicon) or p-Si (polysilicon) can be mainly used for the TFT element.
- a TFT element is manufactured by multilayering these Si semiconductors and metal materials used for electrodes / wiring and forming source, drain, and gate electrodes on a substrate.
- a TFT substrate on which a plurality of TFT elements are mounted is also required to be large, but as the substrate becomes larger, a voltage drop due to an increase in wiring resistance becomes a problem. If an attempt is made to increase the thickness of the wiring in order to avoid this, in the vacuum film formation process used for the normal TFT element substrate production, the film formation time increases, the productivity deteriorates, and the manufacturing cost increases rapidly. The problem arises.
- the inventor of the present application tried to solve the problems of the flexible semiconductor device described above, instead of dealing with the extension of the prior art, in a new direction and to solve these problems.
- the present invention has been made in view of such circumstances, and a main object thereof is to provide a method for manufacturing a flexible semiconductor device excellent in productivity, and accordingly, a high-performance flexible semiconductor device is provided. Is to provide. Furthermore, it is to provide a method for manufacturing an image display device that is laminated on such a flexible semiconductor device, and to provide a high-performance image display device accordingly.
- the present invention is a flexible semiconductor device, Gate electrode; A gate insulating film formed on the gate electrode; A semiconductor layer formed on the gate insulating film so as to face the gate electrode; A source electrode and a drain electrode provided in contact with the semiconductor layer; A flexible film layer formed to cover the semiconductor layer and the source / drain electrodes; and a first metal foil formed on the flexible film layer, A wiring is constituted by a part of the first metal foil, and in the flexible film layer, a plurality of vias extend along the thickness direction, and at least one of the plurality of vias extends.
- a flexible semiconductor device is provided in which two vias are positioning markers (alignment markers).
- the term “flexible” of “flexible semiconductor device” substantially means that the semiconductor device has flexibility to bend.
- the “flexible semiconductor device” in the present invention can be referred to as a “flexible semiconductor device” or a “flexible semiconductor element” in view of its configuration.
- the “plurality” of “plurality of vias” used in the present specification substantially refers to the number of vias normally used in a conventional flexible semiconductor device (for example, a TFT element).
- the specific number varies depending on the application of the flexible semiconductor device (TFT element).
- TFT element the number of pixels of a general image display device is, for example, about 76800 (320 ⁇ 240) to about 35 million (8192 ⁇ 4320), and thus there are two vias per pixel. Considering this, the number of vias is about 150,000 to 70 million.
- One feature of the flexible semiconductor device of the present invention is that at least one of the plurality of vias serves as a positioning marker.
- positioning in the present invention refers to alignment (positioning) of relative positions of various elements constituting the flexible semiconductor device or relative positions of various elements related to the flexible semiconductor device. ing.
- the flexible semiconductor device has a second metal foil below the semiconductor layer and an insulating layer on the second metal foil, so that the gate electrode is a second metal foil.
- the gate insulating film is composed of a part of the insulating layer.
- the flexible semiconductor device of this aspect is A second metal foil; An insulating layer formed on the second metal foil; A semiconductor layer formed on the insulating layer; A source electrode and a drain electrode provided in contact with the semiconductor layer on the insulating layer; A flexible film layer formed to cover the semiconductor layer and the source / drain electrodes; and a first metal foil formed on the flexible film layer, A wiring is formed from a part of the first metal foil, a gate insulating film is formed from a part of the insulating layer, and a gate electrode is formed from a part of the second metal foil.
- a plurality of vias extend along the thickness direction, and at least one of the plurality of vias serves as a positioning marker (positioning marker).
- the positioning marker is formed as a group of at least two vias. That is, an assembly of at least two vias is configured as a substantial positioning marker.
- At least one of the plurality of vias has a taper shape in the thickness direction. That is, the via as the positioning marker has a tapered shape in the thickness direction.
- At least one of the plurality of vias extends from one main surface side to the other main surface side of the flexible film layer.
- a via as a positioning marker extends through the film layer so as to extend from one main surface side of the flexible film layer to the other main surface side.
- At least one via is formed of a conductive member containing metal.
- a flexible semiconductor device provided with a via as such a positioning marker can be defined as follows, for example: Gate electrode; A gate insulating film formed on the gate electrode; A semiconductor layer formed on the gate insulating film so as to face the gate electrode; A source electrode and a drain electrode provided in contact with the semiconductor layer; A flexible film layer formed to cover the semiconductor layer and the source / drain electrodes; and a first metal foil formed on the flexible film layer,
- the wiring is composed of a part of the first metal foil, and in the flexible film layer, a plurality of vias extend along the thickness direction, and among the plurality of vias, The metal foil is removed at the installation location of at least one via.
- the flexible semiconductor device has the second metal foil below the semiconductor layer and the insulating layer on the second metal foil.
- the gate electrode is composed of a part of the second metal foil and the gate insulating film is composed of a part of the insulating layer.
- the flexible semiconductor device in an aspect in which the second metal foil is provided is A second metal foil; An insulating layer formed on the second metal foil; A semiconductor layer formed on the insulating layer; A source electrode and a drain electrode provided in contact with the semiconductor layer on the insulating layer; A flexible film layer formed to cover the semiconductor layer and the source / drain electrodes; and a first metal foil formed on the flexible film layer, A wiring is formed from a part of the first metal foil, a gate insulating film is formed from a part of the insulating layer, and a gate electrode is formed from a part of the second metal foil.
- a plurality of vias extend along the thickness direction, and the first metal foil is removed at an installation location of at least one of the plurality of vias.
- the metal foil forms a metal layer.
- the flexible semiconductor device of the present invention may be defined as follows: A flexible semiconductor device, Gate electrode; A gate insulating film formed on the gate electrode; A semiconductor layer formed on the gate insulating film so as to face the gate electrode; A source electrode and a drain electrode provided in contact with the semiconductor layer; A flexible film layer formed so as to cover the semiconductor layer and the source / drain electrodes; and a first metal layer formed on the flexible film layer, A wiring is constituted by a part of the first metal layer, and in the flexible film layer, a plurality of vias extend along the thickness direction, and at least one of the plurality of vias extends.
- a flexible semiconductor device Gate electrode; A gate insulating film formed on the gate electrode; A semiconductor layer formed on the gate insulating film so as to face the gate electrode; A source electrode and a drain electrode provided in contact with the semiconductor layer; A flexible film layer formed so as to cover the semiconductor layer and the source / drain electrodes; and a first metal layer formed on the flexible film layer, A wiring is constituted by a part of the first metal layer, and in the flexible film layer, a plurality of vias extend along the thickness direction, and at least one of the plurality of vias extends.
- a flexible semiconductor device wherein the first metal layer is removed at a location where two vias are provided.
- the “second metal foil” constituting the gate electrode may also be a metal layer.
- a pixel electrode is formed on the flexible semiconductor device.
- the pixel electrode is preferably composed of a metal foil or a part of the metal layer provided on the flexible film layer. That is, a pixel electrode may be formed from a part of the first metal foil or metal layer in addition to the wiring.
- a method for manufacturing the flexible semiconductor device includes: Forming a gate electrode; Forming a gate insulating film in contact with the gate electrode; Forming a semiconductor layer on the gate insulating film so as to face the gate electrode; Forming a source electrode and a drain electrode in contact with the semiconductor layer; Forming a flexible film layer so as to cover the semiconductor layer and the source / drain electrodes; Forming vias in the flexible film layer; Forming a first metal layer by laminating a metal foil on the flexible film layer, thereby obtaining a semiconductor device precursor; and processing the first metal layer to form the first metal layer Comprising a step of forming a wiring (wiring layer) from a part of When processing the first metal layer, the wiring is formed at a predetermined position by using at least one of the plurality of vias as a positioning marker (alignment marker).
- One of the features of the manufacturing method of the present invention is that the alignment of the metal layer processing is performed using at least one of the plurality of vias of the semiconductor device precursor as a positioning marker.
- the metal layer on the flexible film layer can be processed at a desired position without displacement, and as a result, wirings and pixel electrodes can be accurately formed at predetermined positions.
- wirings and pixel electrodes can be accurately formed at predetermined positions suitable for stacking such functional layers.
- “to form a wiring at a predetermined position” means to form a wiring at a desired position originally intended. More specifically, “form a wiring at a predetermined position” means that when various functional layers are laminated on the manufactured flexible semiconductor device, the wiring is formed at a position suitable for the lamination of the functional layers. is doing.
- a power supply line (wiring) for supplying power to a transistor disposed in each pixel is provided on a pixel corresponding to the transistor and is adjacent to the pixel.
- An embodiment in which it is formed at a position where it does not overlap with each other can be mentioned.
- the method further includes the step of providing a metal foil for forming a gate electrode as the second metal layer, forming an insulating layer on one main surface of the second metal layer, and providing a gate insulating film.
- the first metal layer is processed to form a wiring from a part of the first metal layer
- the second metal layer is processed to form a gate electrode from a part of the second metal layer.
- the step of forming the wiring from a part of the first metal layer Forming a photoresist film on the first metal layer; Exposing and developing the photoresist film to remove at least part of the photoresist film; and etching the first metal layer through the photoresist film from which at least part has been removed; A step of forming wiring from the metal layer is performed.
- a predetermined position of the photoresist film is exposed by using at least one of the vias of the semiconductor device precursor as a positioning marker.
- the direct exposure of the photoresist film can be suitably performed so that the wiring is formed at a desired position, and as a result, the wiring can be accurately formed at a predetermined position. More specifically, when various functional layers are stacked on a semiconductor device, wiring (and in addition, a pixel electrode) can be accurately formed at a predetermined position suitable for stacking such functional layers. . Therefore, “exposure of a predetermined position of the photoresist film” in this aspect means exposure to a desired local photoresist region originally intended. More specifically, the expression “expose a predetermined position of the photoresist film” means that a local photoresist region is exposed so that wiring is formed at a position suitable for stacking of functional layers. is doing.
- the step of forming the gate electrode from a part of the second metal layer Forming a photoresist film on the other main surface of the second metal layer; Exposing and developing the photoresist film to remove at least a part of the photoresist film; and etching the second metal layer through the photoresist film from which at least a part has been removed;
- the step of forming the gate electrode from the metal layer is performed, and the step of etching the first metal layer and the step of etching the second metal layer are performed in the same step.
- the direct exposure of the photoresist film can be suitably performed so that the gate electrode is formed at a desired position, and as a result, the gate electrode can be accurately formed at a predetermined position. That is, due to the alignment during direct exposure to the photoresist film, the gate electrode can be accurately formed at a predetermined position with respect to the channel portion of the TFT structure of the flexible semiconductor device.
- “exposing a predetermined position of the photoresist film” means that the desired local photoresist region originally intended is exposed. More specifically, the expression “expose a predetermined position of the photoresist film” means that the local photoresist region is exposed so that a gate electrode is formed at a position where the flexible semiconductor device functions as a TFT. (For example, the local photoresist region is exposed so that the gate electrode is formed at a position facing the channel without deviation so as to overlap with the channel).
- a photomask is disposed on the photoresist film.
- the step of exposing and developing the photoresist film on which the photomask is arranged, and thereby removing at least a part of the photoresist film may be performed.
- the photomask can be performed at a desired position of the photoresist film without misalignment, and as a result, wiring, pixel electrodes, gate electrodes, and the like can be accurately formed at predetermined positions.
- the wiring can be accurately formed at a predetermined position suitable for stacking the functional layers.
- an X-ray transmission image obtained by irradiating a semiconductor device precursor with X-rays is used, and such X-rays are used.
- a via corresponding point in the transmission image is used as an alignment reference.
- the positioning marker it is preferable to use the positioning marker as a group of at least two vias, and therefore it is preferable to use the via corresponding point of the X-ray transmission image for the vias forming the group as the alignment reference.
- the present invention also provides an image display device using the flexible semiconductor device.
- Such an image display device A flexible semiconductor device; and an image display unit composed of a plurality of pixels formed on the flexible semiconductor device, At least one of the plurality of vias of the flexible semiconductor device is a positioning marker (alignment marker).
- One of the features of the image display device of the present invention is that at least one of the plurality of vias of the flexible semiconductor device serves as a positioning marker.
- the image display unit is A pixel electrode formed on the flexible semiconductor device; A light emitting layer formed on the pixel electrode; and a transparent electrode layer formed on the light emitting layer.
- the light emitting layer may be formed in a region partitioned by the pixel restricting portion.
- the image display apparatus according to the present invention is Flexible semiconductor devices; A pixel electrode formed on the flexible semiconductor device; A plurality of light-emitting layers formed on the pixel electrode and partitioned by the pixel restricting portion; and a transparent electrode layer formed on the plurality of light-emitting layers, At least one of the plurality of vias of the flexible semiconductor device may be a positioning marker.
- the image display unit may have a color filter on a transparent electrode.
- the image display apparatus is Flexible semiconductor devices; A pixel electrode formed on the flexible semiconductor device; A light emitting layer formed on the pixel electrode; A transparent electrode layer formed on the light emitting layer; and a color filter formed on the transparent electrode layer, At least one of the plurality of vias of the flexible semiconductor device may be a positioning marker.
- the present invention also provides a method for manufacturing the image display device.
- a manufacturing method includes: (I) providing a flexible semiconductor device provided with a pixel electrode; and (II) forming an image display unit composed of a plurality of pixels on the flexible semiconductor device, In the step (II), at least one of the plurality of vias of the flexible semiconductor device is used as a positioning marker (alignment marker), thereby performing alignment for forming the image display unit.
- One feature of the manufacturing method of the image display device of the present invention is that alignment is performed for forming the image display portion using at least one of the vias of the flexible semiconductor device as a positioning marker. For example, when forming a plurality of pixel restricting portions in the step (II) and forming a pixel on the pixel electrode in a region partitioned by the plurality of pixel restricting portions, at least one of the plurality of vias of the flexible semiconductor device is formed. Positioning may be performed when the pixel restricting portion is formed by using it as a positioning marker. In such a case, alignment of the photomask for forming the pixel restricting portion can be performed, and as a result, the light emitting layer can be formed without misalignment.
- the light emitting layer can be accurately formed at a predetermined position with respect to the pixel (circuit including the TFT).
- the step (II) when a light emitting layer is formed on the pixel electrode so as to cover the pixel electrode and a color filter is formed on the light emitting layer, at least one of the plurality of vias of the flexible semiconductor device is positioned. You may use it as a marker and may perform alignment about formation of a color filter.
- the relative positional relationship between the components of the flexible semiconductor device or the relative positional relationship between the components of the image display device using the flexible semiconductor device is preferably aligned. be able to.
- wirings and pixel electrodes can be formed with high precision at predetermined positions of the flexible semiconductor device. Therefore, when such a flexible semiconductor device is used in an image display device, pixel electrodes and wirings can be accurately arranged with respect to the pixels.
- the gate electrode is formed from a metal layer, the gate electrode can be accurately formed at a predetermined position with respect to the channel portion of the TFT structure of the flexible semiconductor device.
- the pixel restricting portion, the light emitting layer, and the like can be accurately formed at predetermined positions, as a result, accumulation of misalignment can be effectively prevented.
- the positioning marker can be easily formed in accordance with the formation of an element that may be required in a flexible semiconductor device such as a contact via, and the flexible semiconductor device and the image display device are improved by the alignment improvement caused by such a positioning marker. Therefore, the present invention provides a manufacturing method with excellent productivity.
- the flexible semiconductor device and the image display device according to the present invention constitute a high-performance device in that various elements are formed with high accuracy without causing displacement due to the positioning marker. I can say that.
- the wiring is formed from a metal layer such as a metal foil, the wiring thickness can be arbitrarily increased. As a result, it is possible to realize a device having a low electrical resistance and a small influence of a voltage drop even when the apparatus is enlarged. Further, when the electrical resistance of the wiring is low, the RC delay is reduced, and a large display that operates at high speed can be realized.
- FIG. 1A is a cross-sectional view schematically showing the flexible semiconductor device of the present invention
- FIG. 1B is a plan view taken along line Ib-Ib in FIG. is there
- FIG. 2 is a cross-sectional view schematically showing the flexible semiconductor device of the present invention
- 3A is a cross-sectional view schematically showing the flexible semiconductor device of the present invention
- FIG. 3B is a plan view taken along Ib-Ib in FIG. 3A. is there.
- FIG. 4 is a cross-sectional view schematically showing the flexible semiconductor device of the present invention.
- FIG. 5 is a schematic cross-sectional view showing the relative positional relationship between the gate electrode and the channel.
- FIGS. 6A to 6E are process cross-sectional views schematically showing the manufacturing process of the flexible semiconductor device of the present invention.
- 7A to 7D are process cross-sectional views schematically showing the manufacturing process of the flexible semiconductor device of the present invention.
- 8A to 8C are process cross-sectional views schematically showing the manufacturing process of the flexible semiconductor device of the present invention.
- FIG. 9 is a process cross-sectional view schematically showing the manufacturing process of the flexible semiconductor device of the present invention.
- FIG. 10 is a diagram schematically illustrating an embodiment in which direct exposure is performed.
- FIGS. 11A to 11C are process cross-sectional views schematically showing the manufacturing process of the flexible semiconductor device in the embodiment in which the gate electrode is formed from the metal foil.
- FIGS. 12A and 12B are process cross-sectional views schematically showing a manufacturing process of the flexible semiconductor device in an embodiment in which a gate electrode is formed from a metal foil.
- FIGS. 13A and 13B are diagrams schematically showing a mode of alignment of a photomask using an X-ray transmission image of a positioning marker.
- FIGS. 14A to 14C are schematic diagrams for explaining the arrangement mode of the positioning markers.
- FIG. 15 is a schematic diagram for explaining an aspect of a positioning maker formed as a group.
- FIGS. 16A to 16C are diagrams schematically showing a photomask alignment mode using visible light.
- FIG. 17 is a circuit diagram for explaining a drive circuit of the image display device of the present invention.
- FIG. 18 is a plan view showing an example in which the drive circuit of FIG. 17 is configured by a flexible semiconductor device.
- FIG. 19 is a cross-sectional view schematically showing the image display device of the present invention.
- FIG. 20 is a cross-sectional view schematically showing an aspect of an image display device provided with a color filter.
- 21A to 21E are process cross-sectional views schematically showing the manufacturing process of the pixel display device of the present invention.
- 22A to 22D are process cross-sectional views schematically showing a manufacturing process of an image display device provided with a color filter.
- FIG. 23 is a schematic diagram showing a product application example (television image display unit) of a flexible semiconductor device.
- FIG. 24 is a schematic diagram showing an example of application of a flexible semiconductor device (image display unit of a mobile phone).
- FIG. 25 is a schematic diagram showing an example of product application of a flexible semiconductor device (image display portion of a mobile personal computer or a notebook personal computer).
- FIG. 26 is a schematic diagram showing a product application example of a flexible semiconductor device (image display unit of a digital still camera).
- FIG. 27 is a schematic diagram showing a product application example (camcorder image display unit) of a flexible semiconductor device.
- FIG. 28 is a schematic diagram showing a product application example (image display unit of electronic paper) of a flexible semiconductor device.
- the “direction” described in this specification is a direction based on the positional relationship between the gate electrode 10g and the semiconductor layer 30, and will be described in the vertical direction in the drawing for convenience. Specifically, it corresponds to the vertical direction of each figure, the side on which the semiconductor layer 30 is formed with reference to the gate electrode 10g is referred to as “upward”, and the side on which the semiconductor layer 30 is not formed with reference to the gate electrode 10g. Is “downward”.
- FIGS. 1 (a) and 1 (b) A flexible semiconductor device 100 according to an embodiment of the present invention will be described with reference to FIGS. 1 (a) and 1 (b).
- 1A is a cross-sectional view schematically showing a cross-sectional configuration of the flexible semiconductor device 100
- FIG. 1B is a plan view showing a cross-section along Ib-Ib in FIG. 1A. .
- the flexible semiconductor device is a device provided with a flexible film.
- the flexible semiconductor device 100 includes a semiconductor structure portion and a film layer 50 formed so as to substantially cover the semiconductor structure portion. More specifically, the flexible semiconductor device 100 of the present invention includes a gate electrode 10g, a gate insulating film 20a formed on the gate electrode 10g, a semiconductor layer 30 formed on the gate insulating film 20a, and a semiconductor. Source film 40s and drain electrode 40d provided in contact with layer 30, flexible film layer 50 formed to cover semiconductor layer 30 and source / drain electrodes (40s, 40d), flexible film The metal layer 15 is formed on the layer 50.
- the wiring 70 of the flexible semiconductor device 100 of the present invention is composed of a part of the metal layer 15.
- the film layer 50 of the flexible semiconductor device 100 of the present invention includes an opening 50a penetrating between the upper surface of the semiconductor structure and the upper surface of the semiconductor device 100 when viewed as a device cross section, and the insulating layer 20. And an opening 50b penetrating between the semiconductor device 100 and the upper surface of the semiconductor device 100 is formed. Conductive members are formed in the openings 50a and 50b. The conductive member in the opening 50a functions as a contact via 60a that electrically connects the circuit of the layer formed in the semiconductor structure and the circuit formed on the resin film.
- the conductive member in the opening 50b is similar to the case of the opening 50a in that it is formed of a conductive material, but functions as a positioning marker 60b instead of as a contact via as described later. That is, in the flexible film layer 50 of the flexible semiconductor device 100, a plurality of vias extend along the thickness direction, and at least one of the plurality of vias is a positioning marker (or “alignment”). Marker "or" alignment mark ").
- FIG. 1 shows a mode in which only “via 60b” forms a positioning marker
- FIG. 2 shows a mode in which two vias (60b, 60b ′) as such positioning markers are provided. Has been.
- the film layer 50 is preferably made of a flexible resin material. That is, the flexible film layer 50 is preferably a resin film.
- a resin film can be said to be a support substrate for supporting a semiconductor structure (or a TFT structure including the semiconductor structure), and is composed of a thermosetting resin material or a thermoplastic resin material having flexibility after curing. It is preferable.
- the resin film is a thing suitable for opening part formation.
- the resin film is at least selected from the group consisting of epoxy resin, polyimide resin, acrylic resin, polyethylene terephthalate resin, polyethylene naphthalate resin, polyphenylene sulfide resin, polyphenylene ether resin, liquid crystal polymer, and polytetrafluoroethylene. It is preferable that it comprises one or more resins (for example, the resin film may be a polyimide film). Since such a resin material is excellent in dimensional stability, it can be said that the resin material is preferable as a material for the flexible substrate according to the present invention. In order to form the opening with these resin films, laser processing using a carbon dioxide laser, a YAG laser, or the like may be used.
- a technique such as photolithography may be used for forming the opening.
- a resin specialized for photolithography for example, a film made of a photosensitive resin
- the film which consists of siloxane polymer of an inorganic polymer material also has flexibility and is suitable for opening formation, it can be used suitably as the flexible film layer 50 of this invention. it can.
- the thickness of the flexible film layer is about 2 ⁇ m to about 100 ⁇ m, and the thickness of the adhesive material layer is May be from about 3 ⁇ m to about 20 ⁇ m.
- the conductive member in the flexible semiconductor device 100 has conductivity for functioning as a contact via and visibility for functioning as a positioning marker.
- the conductive member preferably comprises a metal.
- the conductive members (that is, the vias 60a and 60b) formed in the openings 50a and 50b of the flexible film layer 50 are made of a conductive paste material.
- Conductive paste materials include simple metals such as Au, Ag, Cu, Pt, Pd, Al and / or Pb, mixtures or alloys thereof, conductive fillers such as carbon fillers and carbon nanotubes, and organic resins such as epoxy resins. And / or a paste material obtained by dispersing in a binder comprising a solvent such as butyl carbitol acetate (BCA) may be used.
- Conductive members (vias 60a and 60b) are obtained by filling the openings 50a and 50b with such a conductive paste material.
- a metal such as Au, Ag, Cu, Ni, Co, Cr, Mn, Fe, Ru, Rh, Pd, Ag, Os, Ir, and / or Pt is filled in the openings 50a and 50b by plating to form conductive members (vias). 60a, 60b).
- Cu plating is preferable because it is relatively inexpensive, has high Cu conductivity, and is also preferable in terms of visibility by X-rays because of its large atomic number.
- a semiconductor such as silicon (eg, Si) or germanium (Ge) may be used, or an oxide semiconductor may be used. May be.
- the oxide semiconductor include simple oxides such as ZnO, SnO 2 , In 2 O 3 and / or TiO 2 , and composite oxides such as InGaZnO, InSnO, InZnO and / or ZnMgO.
- a compound semiconductor for example, GaN, SiC, ZnSe, CdS, and / or GaAs
- organic semiconductors for example, pentacene, poly-3-hexylthiophene, porphyrin derivatives, copper phthalocyanine and / or C60 can also be used.
- the semiconductor structure is subjected to annealing treatment.
- the semiconductor layer 30 is preferably heat-treated by laser irradiation or the like, and thereby, the film quality of the semiconductor structure portion is preferably changed as compared with that before irradiation.
- a semiconductor layer made of amorphous silicon before irradiation is changed to a semiconductor layer made of polycrystalline silicon (for example, average particle size: about several hundred nm to 2 ⁇ m) by laser irradiation. It may be.
- the semiconductor layer 30 is polycrystalline silicon, the crystallinity can be improved by laser irradiation.
- the mobility of the semiconductor layer 30 is improved by the change in the film quality of the semiconductor structure, and the mobility may be significantly increased before and after irradiation.
- film quality in the present specification substantially means characteristics such as “crystal state”, “crystallinity” and / or “mobility” of a semiconductor layer. Therefore, “change in film quality” substantially means that “crystal state”, “crystallinity”, and / or “mobility” and the like are changed and improved as far as the semiconductor layer is concerned.
- semiconductor characteristics can be improved even when an oxide semiconductor is used instead of a silicon semiconductor.
- a crystalline oxide semiconductor such as ZnO
- many amorphous layers are included in a crystalline layer immediately after film formation by sputtering or the like. Therefore, a crystalline oxide semiconductor such as ZnO often does not exhibit characteristics as a semiconductor device.
- the annealing treatment improves the crystallinity of an oxide semiconductor such as ZnO, As a result, semiconductor characteristics can be improved.
- the mobility is about 1 cm 2 before excimer laser irradiation. Only low values below / Vs are shown.
- XeCl excimer laser is irradiated, semiconductor operation can be performed, and mobility of about 20 cm 2 / Vs can be realized.
- an amorphous oxide semiconductor such as InGaZnO can have an effect of improving semiconductor characteristics.
- oxygen vacancies can be repaired by laser irradiation in an oxygen atmosphere (for example, in the air), and as a result, mobility can be improved.
- an oxide film made of SiO 2 , Al 2 O 3, or the like is disposed as the gate insulating layer 20, oxygen vacancies in the amorphous oxide semiconductor are amorphous through the insulating layer 20 from the openings (50 a, 50 b). It can be repaired by oxygen supplied to the oxide semiconductor.
- a TFT is manufactured using InGaZnO as a semiconductor, mobility with a low value of about 1 cm 2 / Vs or less before laser irradiation can be improved to about 10 cm 2 / Vs after laser irradiation.
- the semiconductor structure may be substantially supported by the support substrate 5.
- the support substrate 5 is not particularly limited as long as it can support TFT components such as a semiconductor structure.
- a glass substrate and a resin substrate for example, a substrate made of PET or PI are used as the support substrate 5.
- a gate electrode 10 g is formed on the support substrate 5.
- the material of the gate electrode 10g include gold (Au), silver (Ag), copper (Cu), nickel (Ni), chromium (Cr), cobalt (Co), magnesium (Mg), calcium (Ca), Metal materials such as platinum (Pt), molybdenum (Mo), iron (Fe), zinc (Zn), titanium (Ti), tungsten (W), tin oxide (SnO 2 ), indium tin oxide (ITO), fluorine Examples thereof include conductive oxides such as tin oxide (FTO), ruthenium oxide (RuO 2 ), iridium oxide (IrO 2 ), and / or platinum oxide (PtO 2 ).
- the gate electrode 10g may be formed from an Ag paste. Formation of the gate electrode 10g using such a paste material can be performed by a printing method (for example, inkjet printing).
- a gate insulating film 20a is formed on the gate electrode 10g. More specifically, the “insulating layer 20 that can form the gate insulating film 20a” is formed on the support substrate 5 so as to cover the gate electrode 10g.
- the material of the insulating layer 20 may be an inorganic insulating material such as silicon oxide or silicon nitride, for example.
- the present invention is not limited to this, and various suitable materials may be employed in accordance with required characteristics of the gate insulating film.
- an organic insulating material such as polyimide can be used.
- the source electrode 40 s and the drain electrode 40 d are in contact with the semiconductor layer 30.
- a region between the source electrode 40s and the drain electrode 40d becomes a channel region.
- the material of the source electrode and the drain electrode (40s, 40d) include gold (Au), silver (Ag), copper (Cu), nickel (Ni), chromium (Cr), cobalt (Co), and magnesium (Mg).
- the source electrode and the drain electrode (40s, 40d) may be formed from Ag paste.
- the source electrode and the drain electrode (40s, 40d) using the paste material can be formed by a printing method (for example, ink jet printing).
- the flexible semiconductor device 100 of the present invention has the metal layer 15 on the flexible film layer 50, and the wiring 70 is formed from at least a part of the metal.
- the metal layer is preferably made of a metal foil.
- the metal constituting the metal foil is preferably a metal having conductivity and a relatively high melting point, such as copper (Cu, melting point: 1083 ° C.), nickel (Ni, melting point: 1453 ° C.), aluminum (Al, Al, Melting point: 660 ° C.), stainless steel (SUS), or the like can be used.
- the gate electrode 10g may be configured by a part of the metal layer 10 as shown in FIGS.
- the semiconductor layer 30 includes a metal layer 10 and an insulating layer 20 formed on the metal layer 10, and the gate electrode 10 g is formed of a part of the metal layer 10 and gate insulation.
- a mode in which the film 20a is constituted by a part of the insulating layer 20 is preferable.
- the metal layer 10 is preferably made of a metal foil, and is preferably a metal foil having conductivity and a relatively high melting point (for example, copper, nickel, aluminum and / or It may be a metal foil made of stainless steel).
- the gate electrode 10g and the channel have the same size and are arranged so as not to overlap. The reason for this will be described with reference to FIG. First, consider the case where the gate electrode 10g and the channel 30a are displaced and the case where the gate electrode 10g is smaller than the channel 30a (FIG. 5A). In either case, a portion without the gate electrode 10g exists below the channel 30a. In such a case, even when a voltage is applied to the gate electrode 10g, no charge is induced in the portion without the gate electrode. Since the channel portion 30a where no charge is induced has a low conductivity, the channel does not function sufficiently and the current taken out from the drain electrode is reduced. Therefore, the entire channel portion is preferably covered with the gate electrode.
- the gate electrode 10g and the channel 30a are displaced and when the gate electrode 10g is formed larger than the channel portion 30a (FIG. 5B), the gate electrode 10g overlaps the source electrode 40s and / or the drain electrode 40d. There is a part. In this case, parasitic capacitance is generated at the overlapping portion of the gate electrode 10g and the source electrode 40s, and the characteristics of the transistor are deteriorated. That is, problems such as the loss of the output signal of the transistor due to the parasitic capacitance and the increase in power consumption due to an increase in the required amount of current occur.
- the relationship between the gate electrode 10g and the drain electrode 40d is the same. Therefore, it is preferable that the overlap / overlap between the gate electrode 40g and the source electrode 40s is small.
- the gate electrode 10g and the channel 30a have the same size and are arranged to face each other so as not to overlap (FIG. 5). (See (c)).
- a gate electrode is formed.
- a gate electrode may be formed on the support substrate.
- a gate insulating layer is formed on the gate electrode, a semiconductor layer is formed on the gate insulating layer, and a source / drain electrode is formed so as to be in contact with the semiconductor layer.
- an insulating substrate is prepared as the support substrate 5.
- a glass substrate is prepared.
- the thickness of the support substrate 5 is, for example, in the range of about 30 ⁇ m to about 5 mm.
- a gate electrode 10 g is formed on the support substrate 5.
- the gate electrode 10g can be formed by applying an Ag paste by a printing method such as screen printing, gravure printing, or an ink jet method.
- the thickness of the gate electrode 10g to be formed may be, for example, about 50 nm to about 5 ⁇ m.
- the gate electrode 10g may be formed by processing a solid film such as Cu prepared by a vacuum film forming method such as a sputtering method by a photolithography etching method.
- an insulating layer 20 is formed on the support substrate 5 so as to cover the gate electrode 10g.
- the insulating layer 20 may be formed by a sol-gel method.
- an insulating material is applied by applying an organic-inorganic hybrid material in which organic molecules are combined with a siloxane skeleton (for example, spin coating) and baking at about 300 ° C. to about 600 ° C.
- Layer 20 can be obtained.
- the thickness of the insulating layer 20 may be, for example, about 0.1 ⁇ m to 1 ⁇ m.
- a semiconductor layer 30 is formed on the insulating layer 20.
- the thickness of the semiconductor layer may be, for example, about 5 nm to about 990 nm (by the way, the thickness of the semiconductor structure as shown in FIG. 1 may be, for example, about 10 nm to about 1 ⁇ m).
- the formation of the semiconductor layer 30 may be performed, for example, by a thin film forming method such as vacuum deposition, sputtering, or plasma CVD, or may be performed by a printing method such as relief printing, gravure printing, screen printing, or inkjet. Good.
- a cyclic silane compound-containing solution for example, a toluene solution of cyclopentasilane
- a predetermined position on the insulating layer 20 by an inkjet method or the like.
- heat treatment is performed at about 300 ° C., the semiconductor layer 30 containing amorphous silicon can be formed.
- the source electrode 40s and the drain electrode 40d are formed on the insulating layer 20 so as to be in contact with the semiconductor layer 30, as shown in FIG.
- Each thickness of the source electrode and the drain electrode may be, for example, about 50 nm to about 5 ⁇ m.
- the source electrode 40s and the drain electrode 40d can be formed by applying an Ag paste by a printing method such as screen printing, gravure printing, or ink jet method.
- the flexible film layer 50 is formed so as to cover the semiconductor layer 30 and the source / drain electrodes (40s, 40d). .
- a semi-cured resin film adheresive material may be applied to the bonding surface of the resin sheet
- the resin film is superimposed on the support substrate on which the semiconductor structure is formed. Adhere temporarily. Temporary bonding conditions can be appropriately selected depending on the type of semi-cured resin film or adhesive material.
- an epoxy resin is applied as an adhesive material to a bonding surface of a polyimide film (thickness: about 12.5 ⁇ m) (thickness: When a resin film having a thickness of about 10 ⁇ m is used, the support substrate and the resin film can be laminated, heated to about 60 ° C., and temporarily pressed under a pressure of about 3 MPa.
- the thickness of the formed resin film layer 50 is, for example, about 4 ⁇ m to about 100 ⁇ m.
- the formation of the resin film 30 protects the semiconductor structure and can stably handle and convey the next process (patterning process of the metal foil 10 and the like).
- a conductive material is supplied to the openings and vias (
- the semiconductor device precursor 100 ′ is obtained by forming 60a, 60b).
- the openings (50a, 50b) provided in the resin film layer can be formed by laser processing.
- the laser used for processing include a carbon dioxide gas laser, a YAG laser, and an excimer laser.
- the energy density can be about 50 mJ / cm 2 to about 500 mJ / cm 2 .
- the contact via opening (50a) is formed so that the resin film layer 50 is irradiated with laser to expose the surface of the electrode of the circuit connected to the semiconductor structure.
- the opening (50b) for the positioning marker is formed so that the upper surface of the insulating layer 20 is exposed.
- the size (diameter) of the openings (50a, 50b) can be set to a desired size by reducing the laser diameter.
- the size of the opening (diameter of the opening surface) formed by laser irradiation may be about 5 ⁇ m to about 80 ⁇ m.
- the opening surface may have a diameter of about 30 ⁇ m.
- a desired beam diameter can be obtained not only by narrowing the laser diameter but also by masking the laser beam.
- the shape of the openings can be tapered (a so-called mortar shape or an inverted substantially conical shape). That is, the wall surface of the opening (50a, 50b) and the upper surface of the resin film layer 50 can be obtuse (> 90 °).
- the taper angle ⁇ as shown in FIG. 7B can be about 110 ° to about 160 °.
- Steps such as filling the openings (50a, 50b) with a conductive material can be easily performed.
- the formation method (50a, 50b) of the opening is not limited to laser processing, and may be a punching method or a mechanical drill method.
- the opening can be formed using a technique such as photolithography.
- conductive members are formed in the openings (50a, 50b).
- the conductive member is made of a conductive paste
- the conductive member can be formed by filling the openings (50a, 50b) with the conductive paste by a printing method.
- a printing mask can be arranged on the surface of the resin film 50 and the conductive paste can be filled in the openings (50a, 50b) with a squeegee.
- the printing mask is for preventing the surface of the resin film from being contaminated with the conductive paste, and a printing mask opening corresponding to the opening of the resin film is formed.
- Examples of such a mask include a screen plate and the like, and a mask obtained by pasting a PET film on the surface of a resin film in advance. That is, when a PET film is laminated on the surface of the resin film in advance and an opening is formed by laser from the PET film, a mask in which the opening of the resin film and the mask opening are aligned can be formed. The PET film is peeled off after filling the conductive member.
- the metal layer 15 is formed on the flexible film layer 50 as shown in FIG. Specifically, it is preferable to superimpose the metal foil 15 on the resin film 50 and perform thermocompression bonding.
- the conditions for thermocompression bonding can be appropriately selected depending on the type of semi-cured resin film or adhesive material. For example, an epoxy resin is applied as an adhesive material to a bonding surface of a polyimide film (thickness of about 12.5 ⁇ m) (thickness of about When a resin film having a thickness of 10 ⁇ m is used, the metal foil 15 may be laminated on the resin film 50 and the adhesive material may be fully cured at about 140 ° C. and about 5 MPa for about 1 hour.
- the metal layer 15 can also be formed by plating (in this case, the step of thermocompression bonding by overlapping the metal foil can be omitted, which is preferable because production efficiency is increased).
- a Cu seed layer may be formed by electroless copper plating, and then the opening may be filled with Cu by electrolytic copper plating.
- electroless copper plating can be performed by immersing a sample in an electroless plating bath in which formaldehyde is added as a reducing agent to an aqueous copper sulfate solution.
- Electroplating can be performed by immersing a sample in an aqueous copper sulfate solution and using the sample as a cathode and phosphorous copper as an anode.
- An additive such as a polyether compound, an organic sulfur compound and / or an amine compound can be added to the copper sulfate aqueous solution, and plating can be performed by flowing a current of about 3 A / dm 2 (in addition, an opening on the upper surface of the resin film)
- a resist opening may be formed in a portion corresponding to 50b).
- the wiring 70 is formed from the metal layer 15. Specifically, first, as shown in FIG. 8A, a photoresist film 11 is formed on the metal layer 15. Next, as shown in FIGS. 8A to 8B, a photomask 12 is disposed on the upper side of the photoresist film 11. Then, as shown in FIG. 8B, the photoresist film 11 is exposed through the photomask 12 and developed to remove unnecessary portions of the photoresist film 11 (see FIG. 8C).
- the photomask 12 is arranged by overlapping a positioning marker 60b provided on the resin film and a pattern corresponding to the positioning marker provided on the photomask 12.
- confirmation of the positioning marker provided on the resin film can be performed using an X-ray transmission image obtained on the upper side of the metal layer 15 by irradiating X-rays from the lower side of the semiconductor device precursor 100 ′.
- Lighter elements (elements with smaller atomic numbers) transmit X-rays better, and heavier elements such as metals are less likely to transmit X-rays. Therefore, if X-rays with such intensity as to transmit through the metal layer are irradiated, the positioning marker portion formed from the metal conductive member in the transmission image is favorably visually recognized with a large contrast with respect to the resin film portion.
- the metal layer 15 is etched through the photoresist film 11 ′ from which a part has been removed, thereby forming a wiring 70, a pixel electrode 150 (described later), and the like from the metal layer 15. (See FIGS. 8 (c) to 9).
- the etching method can be appropriately selected according to the type of the metal layer. For example, when the metal layer is a copper foil, it can be performed by dipping in an aqueous iron chloride solution. Also, a dry etching technique such as RIE may be used.
- the “partly removed photoresist 11 ′” used in development may be formed by a mode using direct exposure instead of the mode using the photomask (see FIG. 10).
- direct exposure exposure is performed by locally irradiating a desired position (pattern) of the photoresist with a laser (for example, a wavelength of 355 nm). That is, the photoresist is directly exposed without using a photomask.
- the position to be irradiated with the laser can be determined based on the recognition of the positioning marker 60b, and the recognition of the positioning marker itself can be performed in the same manner as the mode using the photomask.
- the desired position of the photoresist film can be directly exposed without using a photomask by using at least one of the vias of the semiconductor device precursor as a positioning marker.
- the flexible semiconductor device 100 having the structure shown in FIGS. 9 and 1 can be constructed.
- the wiring 70 and the pixel electrode 150 are configured from a part of the metal layer 15.
- a plurality of vias (60a, 60b,...) Extend along the thickness direction, and at least one of the plurality of vias (in FIG. 9).
- the metal layer is removed at the location where the via 60b) is located (as shown in FIG. 9, the metal layer portion (dotted line region) in contact with the upper surface of the via 60b is removed).
- the via 60b as a positioning marker extends from one main surface side of the flexible film layer 50 to the other main surface side. It has the form which is.
- the conductive member is configured by filling the openings (50a, 50b) provided in the resin film layer 50 with a conductive material such as metal. Therefore, the contact via and the positioning marker can be formed in substantially the same process. If the positioning marker of the present invention is used, a TFT that can be visually recognized well by an X-ray transmission image and has little “positional deviation” due to the wiring 70 and the pixel electrode 150 can be obtained. In other words, in the present invention, it can be said that the manufacturing process efficiency can be improved and the TFT characteristics can be improved by the “positioning marker by the conductive member formed on the resin film”.
- the gate electrode 10g can be formed of a part of the metal layer 10.
- a metal foil 10 is used instead of the support substrate 5 of FIG.
- a copper foil may be used.
- a commercially available metal foil 10 can be used.
- the thickness of the metal foil 10 is preferably in the range of about 3 ⁇ m to about 100 ⁇ m, more preferably in the range of about 4 ⁇ m to about 20 ⁇ m, and even more preferably in the range of about 8 ⁇ m to about 16 ⁇ m.
- An insulating layer 20 is formed on the surface of the metal foil 10.
- Such an insulating layer 20 may be formed by “anodic oxidation of a valve metal” (particularly when a metal foil made of a valve metal is used), but may be formed by another method. For example, it may be formed by a sol-gel method. When the sol-gel method is performed, specifically, an insulating material is applied by applying an organic-inorganic hybrid material in which organic molecules are combined with a siloxane skeleton (for example, spin coating) and baking at about 300 ° C. to about 600 ° C. Layer 20 can be obtained. The thickness of the insulating layer 20 may be, for example, about 0.1 ⁇ m to 1 ⁇ m.
- the metal foil 10 is processed to form a gate electrode.
- a photoresist 11 is formed in a portion corresponding to the gate electrode of the metal foil.
- a photoresist film 11 is formed on substantially the entire lower surface of the metal foil 10.
- a photomask 12 is disposed below the photoresist film 11. Then, as shown in FIG.
- the photomask 12 can be arranged by overlapping the positioning marker 60b provided on the resin film and the pattern corresponding to the positioning marker provided on the photomask 12 (see FIGS. 11B and 11C). .
- the positioning marker provided on the resin film can be confirmed using an X-ray transmission image obtained on the lower side of the metal foil 10 by irradiating X-rays from the upper side of the semiconductor device precursor 100 ′. Lighter elements (elements with smaller atomic numbers) transmit X-rays better, and heavier elements such as metals are less likely to transmit X-rays. Therefore, if X-rays having such intensity as to transmit through the metal foil are irradiated, the positioning marker portion formed from the metal conductive member in the transmission image is favorably visually recognized with a large contrast with respect to the resin film portion.
- the metal foil is etched through the photoresist film 11 ′ from which a part has been removed, thereby forming the gate electrode 10g from the metal foil 10 (FIGS. 12A and 12). (See (b)).
- the etching method and the like are the same as in the case of forming the wiring 70 described above.
- the etching on the metal foil 10 may be performed substantially simultaneously with the etching on the metal foil 15. That is, the “step of etching the metal foil 15 to form the wiring 70” and the “step of etching the metal foil 10 to form the gate electrode 10g” may be performed substantially simultaneously.
- the gate electrode 10g is formed from the metal foil 10
- direct exposure may be performed, and exposure is performed by locally irradiating a desired position of the photoresist with a laser on the basis of the positioning marker 60b. (See FIG. 10).
- an X-ray transmission image 110 obtained by irradiating the semiconductor device precursor 100 ′ with X-rays is used, and a via corresponding point 120 in the X-ray transmission image 110 is used. It is preferable to use (an image point corresponding to a via position) obtained by irradiating the precursor region including the positioning markers 60b and 60b ′ with X-rays as an alignment reference.
- Positioning markers may be arranged in one set (for example, two (or group) positioning markers) for each exposure range, for example, for each photomask. That is, when a photomask is overlapped for each transistor, a positioning marker is disposed for each transistor (FIG. 14A), and when a plurality of transistors are grouped, a positioning marker is disposed for each group (FIG. 14). 14 (b)). When all the transistors in the work are exposed and developed at one time with one photomask, a set of positioning markers may be arranged on the work (FIG. 14C).
- the positioning marker may be arranged at a position that can correspond to the central portion of the short side of the rectangle. By arranging in this way, the positional deviation between the photomask and the workpiece can be minimized (that is, the overlay accuracy can be improved).
- the photomask is arranged by measuring, for example, two positioning marks using an X-ray transmission image, finding the center of gravity of the entire alignment range, correcting specified dimensions and errors, and distributing the design value from the center of gravity. You can do that.
- one via can function alone as a positioning marker.
- a plurality of vias may be grouped to function as a positioning marker. . That is, four vias may be grouped to form a square positioning marker, or five vias may be grouped to form a cross-shaped positioning marker. It is preferable to form a plurality of via groups as a positioning marker with a desired shape as a whole because it is easy to distinguish from contact vias and facilitates image recognition.
- FIG. 17 is a circuit diagram for explaining the drive circuit 90 of the image display apparatus.
- FIG. 18 is a plan view showing an example in which the drive circuit is configured by the flexible semiconductor device 100 of the present embodiment.
- a circuit 90 shown in FIG. 17 is a drive circuit mounted on an image display device (for example, an organic EL display), and represents a configuration of one pixel of the image display device here.
- Each pixel of the image display apparatus of this example is configured by a circuit of a combination of two transistors (100A, 100B) and one capacitor 85.
- This driving circuit includes a switching transistor (hereinafter also referred to as “Sw-Tr”) 100A and a driving transistor (hereinafter also referred to as “Dr-Tr”) 100B. Both transistors (100A, 100B) are composed of the flexible semiconductor device 100 according to the present invention. Note that a capacitor may be formed in part of the structure of the flexible semiconductor device 100.
- the gate electrode of the Sw-Tr 100A is connected to the selection line 94.
- One of the source electrode and the drain electrode of the Sw-Tr 100A is connected to the data line 92, and the other is connected to the gate electrode of the Dr-Tr 100B.
- one of the source electrode and the drain electrode of the Dr-Tr 100B is connected to the power supply line 93, and the other is connected to the display unit (for example, organic EL element) 80.
- the capacitor 85 is connected between the source electrode and the gate electrode of the Dr-Tr 100B.
- FIG. 18 is a plan view of a flexible semiconductor device in which an example of the circuit 90 shown in FIG. 17 is formed.
- 18A is a plan view seen from the top surface of the resin film
- FIG. 18B is a plan view with the metal layer and the resin film on the resin film removed
- FIG. 18C further shows a semiconductor. It is a top view of the state which removed the structure part, the electrically-conductive member, and the insulating layer on a support substrate.
- a drive circuit that drives the image display device requires a capacitor 85 that retains a capacitance.
- the capacitor since the capacitor is incorporated in a part of the substrate structure, it is not necessary to separately arrange the capacitor outside the substrate structure. Therefore, it is possible to realize a small image display device capable of high-density mounting.
- FIG. 19 is a cross-sectional view of an OLED (organic EL) image display device 200 in which three colors of R (red), G (green), and B (blue) are arranged in three pixels on the flexible semiconductor device of the present invention.
- OLED organic EL
- a light emitting layer 170 made of a light emitting material corresponding to each color is disposed on the pixel electrode 150 of each of the R, G, and B pixels.
- a pixel restricting portion 160 is formed between adjacent pixels to prevent light emitting materials from being mixed and at the same time to facilitate positioning when arranging the EL material.
- a transparent electrode layer (anode layer) 180 is formed on the upper surface of the light emitting layer 170 so as to cover the entire pixels.
- the material used for the pixel electrode 150 is a metal such as Cu as described above.
- the surface has a laminated structure with 0.1 ⁇ m of Al ( For example, an Al / Cu) reflective electrode may be used.
- the material used for the light-emitting layer 170 is not particularly limited.
- a polyfluorene-based light-emitting material and a substance having a tree-like multi-branched structure use heavy metals such as Ir and Pt at the center of a so-called dendrimer dendron skeleton.
- a dendrimer-based light emitting material can be used.
- the light emitting layer 170 may have a single layer structure, but in order to facilitate charge injection, MoO 3 is used as a hole injection layer and LiF is used as an electron injection layer, and a laminated structure such as an electron injection layer / light emitting layer / hole injection layer It is good.
- ITO can be used for the transparent electrode of the anode.
- the pixel restricting portion 160 may be any insulating material, but for example, a photosensitive resin mainly composed of polyimide or SiN can be used.
- the image display device may have a color filter as shown in FIG.
- a flexible semiconductor device 100 a plurality of pixel electrodes 150 formed on the flexible semiconductor device 100, a light emitting layer 170 formed so as to entirely cover the pixel electrodes 150, and A transparent electrode layer 180 formed on the light emitting layer 170 and a color filter 190 formed on the transparent electrode layer 180 are provided.
- the color filter 190 has a function of converting the light from the light emitting layer 170 into three colors of red, green, and blue, whereby R (red) G (blue) B Three (blue) pixels can be configured. That is, in the image display device 200 shown in FIG.
- each light-emitting layer divided by the pixel restricting section emits red, green, and blue separately, whereas in the image display device 200 ′ in FIG. 20,
- the light emitted from the light emitting layer itself has no distinction of color (for example, it is white light), but the light passes through the color filter 190 to generate red, green, and blue light. Yes.
- step (I) is performed. That is, as shown in FIG. 21A, the flexible semiconductor device 100 including the pixel electrode 150 is prepared. Specifically, the “flexible semiconductor device 100 including the pixel electrode 150 and the wiring 70 on the upper surface”, which can be obtained by the above-described method for manufacturing a flexible semiconductor device of the present invention, is prepared.
- step (II) is performed.
- the “image display unit including a plurality of pixels” is formed on the flexible semiconductor device.
- a plurality of pixel restricting portions 160 are formed on the flexible semiconductor device 100, and light is emitted on an area partitioned by the plurality of pixel restricting portions 160 and on the pixel electrode 150.
- Layer 170 is formed.
- the pixel regulation layer 160 is formed so as to cover the entire pixel electrode with a photosensitive resin material mainly composed of polyimide to form a precursor layer 160 ′ of the pixel regulation part, and then the precursor layer 160 ′ is formed on the precursor layer 160 ′.
- the light emitting layer 170 of a predetermined color is formed on a predetermined pixel electrode.
- a method for forming the light-emitting layer 170 for example, a polyfluorene-based light-emitting material can be dissolved in xylene to form a 1% solution, which can be disposed on the pixel electrode by an ink-jet method.
- the thickness of the light emitting layer 170 can be about 80 nm.
- the positioning markers (60b, 60b ′) of the flexible semiconductor device 100 are used. Is preferably used.
- positioning markers 60b, 60b '
- the metal layer 15 on the positioning marker is removed. This is because the positioning marker can be recognized by visible light. The removal of the metal layer on the positioning marker can be performed simultaneously in the process of forming the pattern by processing the metal layer 15, so that the number of processes does not increase.
- a transparent conductive layer 180 (for example, an ITO film) is formed so as to cover the light emitting layer 170.
- the ITO film of the transparent conductive layer can be formed by sputtering.
- the image display device 200 having the structure shown in FIG. 21 (e) and FIG. 20 can be constructed through the above processes.
- a manufacturing mode of the image display device 200 ′ having a color filter will be described.
- Such a manufacturing mode is substantially the same as the above manufacturing method, although there are some differences.
- the white light emitting layer 170 is formed in a solid film shape on the entire surface (see FIG. 22B).
- the transparent electrode layer 180 is formed in the same manner as described above (see FIG. 22C).
- the three colors R (red), G (green), and B (blue) of the color filter 190 are placed at desired pixel positions.
- FIG. 22D the image display device 200 ′ can be completed.
- the positioning markers (60b, 60b ') of the flexible semiconductor device 100 can be used.
- the positioning markers (60b, 60b ') it is possible to effectively prevent the accumulation of misalignment among the components of the pixel display device.
- it is preferable that the metal foil on the positioning marker is removed. This is because the positioning marker can be recognized by visible light. The removal of the metal foil on the positioning marker can be performed simultaneously in the process of processing the metal foil and forming a pattern, so there is no increase in the number of processes.
- the contact via and the positioning marker are not limited to being configured separately, and a part of the contact via may be used as the positioning marker.
- the positioning marker is not necessarily limited to one having a via shape, and may be a through hole shape in which a metal layer such as copper is formed on the inner wall surface of the hole forming the opening by electroless plating.
- the formation of the flexible film layer of the flexible semiconductor device is not necessarily limited to the mode of laminating the resin film.
- the flexible film layer is formed by applying a semi-cured resin material or a photosensitive resin material by spin coating or the like. The form to form may be sufficient.
- the flexible semiconductor device mounted on the organic EL display is exemplified, but it may be mounted on the inorganic EL display. Moreover, not only an EL display but also electronic paper may be used. Furthermore, not only the display but also a communication device such as an RFID or a memory can be mounted.
- a flexible semiconductor device is manufactured in a form corresponding to one device has been illustrated, the present invention is not limited thereto, and a method of manufacturing in a form corresponding to a plurality of devices may be executed. As such a production method, a roll-to-roll manufacturing method can be used.
- the method for manufacturing a flexible semiconductor device of the present invention is excellent in productivity of the flexible semiconductor device.
- the obtained flexible semiconductor device can be used for various image display units (that is, image display devices), and can also be used for electronic paper, digital paper, and the like.
- image display units that is, image display devices
- it can be used in an image display unit of a digital still camera and a camcorder, an image display unit of electronic paper as shown in FIG.
- the flexible semiconductor device obtained by the manufacturing method of the present invention is applicable to various uses (for example, RF-ID, memory, MPU, solar cell, sensor, etc.) that are currently being studied for application in printed electronics. be able to.
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Abstract
Description
ゲート電極;
ゲート電極上に形成されているゲート絶縁膜;
ゲート電極と対向するようにゲート絶縁膜上に形成されている半導体層;
半導体層と接して設けられているソース電極・ドレイン電極;
半導体層およびソース電極・ドレイン電極を覆うように形成されている可撓性フィルム層;ならびに
可撓性フィルム層上に形成されている第1の金属箔
を有して成り、
第1の金属箔の一部から配線が構成されており、また
可撓性フィルム層においては、その厚み方向に沿って複数のビアが延在しており、それら複数のビアのうちの少なくとも1つのビアが位置決めマーカー(位置合せマーカー)であることを特徴とする、フレキシブル半導体装置が提供される。
第2の金属箔;
第2の金属箔の上に形成されている絶縁層;
絶縁層の上に形成されている半導体層;
絶縁層上にて半導体層と接して設けられているソース電極・ドレイン電極;
半導体層およびソース電極・ドレイン電極を覆うように形成されている可撓性フィルム層;ならびに
可撓性フィルム層上に形成されている第1の金属箔
を有して成り、
第1の金属箔の一部から配線が構成され、絶縁層の一部からゲート絶縁膜が構成され、更に、第2の金属箔の一部からゲート電極が形成されており、また
可撓性フィルム層においては、その厚み方向に沿って複数のビアが延在しており、それら複数のビアのうちの少なくとも1つのビアが位置決めマーカー(位置合せマーカー)となっている。
ゲート電極;
ゲート電極上に形成されているゲート絶縁膜;
ゲート電極と対向するようにゲート絶縁膜上に形成されている半導体層;
半導体層と接して設けられているソース電極・ドレイン電極;
半導体層およびソース電極・ドレイン電極を覆うように形成されている可撓性フィルム層;ならびに
可撓性フィルム層上に形成されている第1の金属箔
を有して成り、
第1の金属箔の一部から配線が構成されており、また
可撓性フィルム層においては、その厚み方向に沿って複数のビアが延在しており、また、それら複数のビアのうちの少なくとも1つのビアの設置箇所では金属箔が除去されている。かかる規定の態様であっても、第2の金属箔が設けられる場合、フレキシブル半導体装置は半導体層の下方に第2の金属箔を有すると共に、その第2の金属箔の上に絶縁層を有して成り、それによって、ゲート電極が第2の金属箔の一部から構成されていると共に、ゲート絶縁膜が絶縁層の一部から構成されていることが好ましい。この第2の金属箔が設けられる態様におけるフレキシブル半導体装置は、
第2の金属箔;
第2の金属箔の上に形成されている絶縁層;
絶縁層の上に形成されている半導体層;
絶縁層上にて半導体層と接して設けられているソース電極・ドレイン電極;
半導体層およびソース電極・ドレイン電極を覆うように形成されている可撓性フィルム層;ならびに
可撓性フィルム層上に形成されている第1の金属箔
を有して成り、
第1の金属箔の一部から配線が構成され、絶縁層の一部からゲート絶縁膜が構成され、そして、第2の金属箔の一部からゲート電極が形成されており、また
可撓性フィルム層においては、その厚み方向に沿って複数のビアが延在しており、複数のビアのうちの少なくとも1つのビアの設置箇所では、第1の金属箔が除去されている。
フレキシブル半導体装置であって、
ゲート電極;
ゲート電極上に形成されているゲート絶縁膜;
ゲート電極と対向するようにゲート絶縁膜上に形成されている半導体層;
半導体層と接して設けられているソース電極・ドレイン電極;
半導体層およびソース電極・ドレイン電極を覆うように形成されている可撓性フィルム層;ならびに
可撓性フィルム層上に形成されている第1の金属層
を有して成り、
第1の金属層の一部から配線が構成されており、また
可撓性フィルム層においては、その厚み方向に沿って複数のビアが延在しており、その複数のビアのうちの少なくとも1つのビアが位置決めマーカーであることを特徴とする、フレキシブル半導体装置。
フレキシブル半導体装置であって、
ゲート電極;
ゲート電極上に形成されているゲート絶縁膜;
ゲート電極と対向するようにゲート絶縁膜上に形成されている半導体層;
半導体層と接して設けられているソース電極・ドレイン電極;
半導体層およびソース電極・ドレイン電極を覆うように形成されている可撓性フィルム層;ならびに
可撓性フィルム層上に形成されている第1の金属層
を有して成り、
第1の金属層の一部から配線が構成されており、また
可撓性フィルム層においては、その厚み方向に沿って複数のビアが延在しており、その複数のビアのうちの少なくとも1つのビアの設置箇所では、第1の金属層が除去されていることを特徴とする、フレキシブル半導体装置。
尚、付言しておくと、ゲート電極が構成される“第2の金属箔”についても、それが金属層を成しているものであってよい。
ゲート電極を形成する工程;
ゲート電極に接するようにゲート絶縁膜を形成する工程;
ゲート電極と対向するようにゲート絶縁膜上に半導体層を形成する工程;
半導体層と接するようにソース電極・ドレイン電極を形成する工程;
半導体層およびソース電極・ドレイン電極を覆うように可撓性フィルム層を形成する工程;
可撓性フィルム層にビアを形成する工程;
可撓性フィルム層上に金属箔を積層することにより第1の金属層を形成し、それによって、半導体装置前駆体を得る工程;ならびに
第1の金属層を加工して該第1の金属層の一部から配線(配線層)を形成する工程
を含んで成り、
第1の金属層の加工に際しては、複数のビアのうちの少なくとも1つのビアを位置決めマーカー(位置合せマーカー)として用いることによって、配線を所定位置に形成する。
第1の金属層上にフォトレジスト膜を形成する工程;
フォトレジスト膜に対して露光および現像を行い、フォトレジスト膜の少なくとも一部を除去する工程;ならびに
少なくとも一部を除去されたフォトレジスト膜を介して第1の金属層にエッチングを施し、第1の金属層から配線を形成する工程
を実施する。かかる場合、フォトレジスト膜への露光に際しては、半導体装置前駆体のビアの少なくとも1つを位置決めマーカーとして用いることによってフォトレジスト膜の所定位置を露光する。かかる態様では、配線が所望の位置に形成されるように、フォトレジスト膜のダイレクト露光を好適に行うことができ、その結果、配線を所定位置に精度良く形成することができる。より具体的には、半導体装置上に各種機能層を積層させる場合、かかる機能層の積層に適した所定の位置に配線(および付加的には画素電極)を精度良く形成しておくことができる。それゆえ、かかる態様でいう「フォトレジスト膜の所定位置を露光する」とは、当初意図された所望の局所的なフォトレジスト領域に露光を施すことを意味している。より具体的には、「フォトレジスト膜の所定位置を露光する」なる表現は、機能層の積層に適した位置に配線が形成されるように局所的なフォトレジスト領域に露光を施すことを意味している。
第2の金属層の他方の主面上にフォトレジスト膜を形成する工程;
フォトレジスト膜に対して露光および現像を行い、フォトレジスト膜の少なくとも一部を除去する工程;ならびに
少なくとも一部を除去されたフォトレジスト膜を介して第2の金属層にエッチングを施し、第2の金属層からゲート電極を形成する工程
を実施し、また
第1の金属層にエッチングを施す工程と第2の金属層にエッチングを施す工程とを同一の工程で実施する。かかる態様では、ゲート電極が所望の位置に形成されるようにフォトレジスト膜のダイレクト露光を好適に行うことができ、その結果、ゲート電極を所定位置に精度良く形成することができる。つまり、フォトレジスト膜へのダイレクト露光時の位置合せに起因して、フレキシブル半導体装置のTFT構造体のチャネル部分に対してゲート電極を所定の位置に精度良く形成することができる。尚、かかる態様でいう「フォトレジスト膜の所定位置を露光する」とは、当初意図された所望の局所的なフォトレジスト領域に露光を施すことを意味している。より具体的には、「フォトレジスト膜の所定位置を露光する」なる表現は、フレキシブル半導体装置がTFTとして機能することになる位置にゲート電極が形成されるように局所的なフォトレジスト領域に露光を施すことを意味している(例えば、チャネルと重なるようにずれなく対向する位置にゲート電極が形成されるように局所的なフォトレジスト領域に露光を施す)。
フレキシブル半導体装置;および
フレキシブル半導体装置上に形成されている複数の画素より構成された画像表示部
を有して成り、
フレキシブル半導体装置の複数のビアのうちの少なくとも1つのビアが位置決めマーカー(位置合せマーカー)となっていることを特徴としている。
フレキシブル半導体装置上に形成されている画素電極;
画素電極上に形成されている発光層;および
発光層上に形成されている透明電極層
を有して成る。
かかる態様では、画素規制部によって仕切られた領域に発光層が形成されていてもよい。つまり、本発明に係る画像表示装置が、
フレキシブル半導体装置;
フレキシブル半導体装置上に形成されている画素電極;
画素電極上にあって、画素規制部によって仕切られた領域に形成されている複数の発光層;および
複数の発光層上に形成されている透明電極層
を有して成り、
フレキシブル半導体装置の複数のビアのうちの少なくとも1つのビアが位置決めマーカーとなっていてよい。
また、画像表示部は透明電極上にカラーフィルターを有して成るものであってもよい。つまり、本発明に係る画像表示装置が、
フレキシブル半導体装置;
フレキシブル半導体装置上に形成されている画素電極;
画素電極上に形成されている発光層;
発光層上に形成されている透明電極層;および
透明電極層上に形成されているカラーフィルター
を有して成り、
フレキシブル半導体装置の複数のビアのうちの少なくとも1つのビアが位置決めマーカーとなっていてもよい。
(I)画素電極を備えたフレキシブル半導体装置を供する工程;および
(II)フレキシブル半導体装置上に、複数の画素より構成されている画像表示部を形成する工程
を含んで成り、
工程(II)に際しては、フレキシブル半導体装置の複数のビアの少なくとも1つのビアを位置決めマーカー(位置合せマーカー)として用いることによって、画像表示部の形成につき位置合せを行うことを特徴とする。
10g ゲート電極
12 フォトマスク
15 金属層または金属箔
20 絶縁層(絶縁膜)
20a ゲート絶縁膜(ゲート絶縁層)
30 半導体層
40s,40d ソース電極・ドレイン電極
50 可撓性フィルム層
50a,50b 可撓性フィルム層に形成された開口部
60 ビア
60a コンタクトビア(ビア)
60b 位置決めマーカー(ビア)
70 配線
80 表示部
82 配線
85 コンデンサ
90 駆動回路
92 データライン
93 電源ライン
94 選択ライン
100,100a,100b フレキシブル半導体装置
100’ 半導体装置前駆体
110 X線透過画像
120 X線のビア透過ポイント
150 画素電極
160 画素規制部
160’画素規制部の前駆体層
165 画素規制部の形成に用いるフォトマスク
170 発光層
180 透明電極層
190 カラーフィルター
200 画像表示装置
200’ 画像表示装置
図1(a)及び(b)を参照しながら、本発明の一実施形態に係るフレキシブル半導体装置100について説明する。図1(a)は、フレキシブル半導体装置100の断面構成を模式的に示す断面図であり、図1(b)は、図1(a)のIb-Ibに沿った断面を示す平面図である。
次に、図6~12を参照して、本発明に係るフレキシブル半導体装置100の製造方法について説明する。図6(a)~(e)、図7(a)~(d)、図8(a)~(c)、図9、図10、図11(a)~(c)および図12(a)および(b)は、フレキシブル半導体装置100の製造方法を説明するための工程断面図である。
ここで、本発明の特徴部分であるアライメントと位置決めマーカーについて説明する。本発明では、フォトマスクの位置合せに際して、位置決めマーカーを利用したX線透過画像を用いることが好ましい。具体的には、図13に示すように、X線を半導体装置前駆体100’に照射することで得られるX線透過画像110を利用しており、かかるX線透過画像110におけるビア対応ポイント120(位置決めマーカー60b,60b’を含んだ前駆体領域にX線が照射されることで得られる“ビア位置に対応した画像ポイント”)を位置合せ基準として用いることが好ましい。
次に以下においては、本発明に係るフレキシブル半導体装置を画像表示装置に搭載する態様について説明する。
図17は、画像表示装置の駆動回路90を説明するための回路図である。図18は、当該駆動回路が本実施形態のフレキシブル半導体装置100によって構成された一例を示す平面図である。
(画像表示装置の積層態様)
次に、前記したトランジスタあるいはトランジスタより構成された回路上に画像表示部が形成される態様(特に、フレキシブル半導体装置上に形成されている複数の画素より構成された画像表示部の態様)を説明する。
次に、画素表示装置の製造方法について説明する。具体的には、図21を参照して本態様のOLEDの製造方法について説明する。
● 位置決めマーカーは、ビア形態を有するものに必ずしも限定されず、開口部を成す孔の内壁面に無電解メッキにより銅などの金属層が形成されたスルーホール形態であってもよい。
● フレキシブル半導体装置の可撓性フィルム層の形成は樹脂フィルムを貼り合わせる態様に必ずしも限定されず、半硬化の樹脂材料や感光性樹脂材料をスピンコートなどで塗布することを通じて可撓性フィルム層を形成する態様であってもよい。
● ディスプレイの構成によっては、TFT素子は各画素に2個(第1および第2のTFT素子)だけでなく、それ以上設けられることもあるので、それに対応して本実施形態のフレキシブル半導体装置を改変することも可能である。
● 上記実施形態では、有機ELディスプレイに搭載されるフレキシブル半導体装置について例示したが、無機ELディスプレイに搭載してもよい。また、ELディスプレイに限らず電子ペーパーであってもよい。更にいえば、ディスプレイに限らず、RFIDなどの通信機器やメモリなどに搭載することも可能である。
● フレキシブル半導体装置を1デバイスに対応した形で作製するような態様を例示したが、それに限らず、複数のデバイスに対応した形で作製する手法を実行してもよい。そのような作製手法として、ロール・ツー・ロール製法を用いることができる。
Claims (26)
- フレキシブル半導体装置を製造するための方法であって、
ゲート電極を形成する工程;
前記ゲート電極に接してゲート絶縁膜を形成する工程;
前記ゲート電極と対向するように前記ゲート絶縁膜上に半導体層を形成する工程;
前記半導体層と接してソース電極・ドレイン電極を形成する工程;
前記半導体層および前記ソース電極・ドレイン電極を覆うように可撓性フィルム層を形成する工程;
前記可撓性フィルム層にビアを形成する工程;
前記可撓性フィルム層上に金属箔を積層することにより第1の金属層を形成し、それによって、半導体装置前駆体を得る工程;ならびに
前記第1の金属層を加工して該第1の金属層の一部から配線を形成する工程
を含んで成り、
前記第1の金属層の加工に際しては、前記複数のビアのうちの少なくとも1つのビアを位置決めマーカーとして用いることによって、前記配線を所定位置に形成することを特徴とする、フレキシブル半導体装置の製造方法。 - 第2の金属層として前記ゲート電極形成用の金属箔を供し、該第2の金属層の一方の主面上に絶縁層を形成してゲート絶縁膜を供する工程を更に含んで成り、
前記第1の金属層を加工して該第1の金属層の一部から前記配線を形成するのに対して、前記第2の金属層を加工して該第2の金属層の一部から前記ゲート電極を形成することを特徴とする、請求項1に記載のフレキシブル半導体装置の製造方法。 - 前記第1の金属層の一部から前記配線を形成する工程においては、
前記第1の金属層上にフォトレジスト膜を形成する工程;
前記フォトレジスト膜に対して露光および現像を行い、該フォトレジスト膜の少なくとも一部を除去する工程;ならびに
前記少なくとも一部を除去された前記フォトレジスト膜を介して前記第1の金属層にエッチングを施し、該第1の金属層から配線を形成する工程
を実施し、また
前記フォトレジスト膜への露光に際しては、前記半導体装置前駆体の前記ビアの少なくとも1つを位置決めマーカーとして用いることによって、前記フォトレジスト膜の所定位置を露光することを特徴とする、請求項1または2に記載のフレキシブル半導体装置の製造方法。 - 前記第2の金属層の一部からゲート電極を形成する工程においては、
前記第2の金属層の他方の主面上にフォトレジスト膜を形成する工程;
前記フォトレジスト膜に対して露光および現像を行い、該フォトレジスト膜の少なくとも一部を除去する工程;ならびに
前記少なくとも一部を除去された前記フォトレジスト膜を介して前記第2の金属層にエッチングを施し、該第2の金属層から前記ゲート電極を形成する工程
を実施し、また
前記第1の金属層にエッチングを施す工程と前記第2の金属層にエッチングを施す工程とが同一の工程であることを特徴とする、請求項2に従属する請求項3に記載のフレキシブル半導体装置の製造方法。 - 前記フォトレジスト膜に対して露光および現像を行って該フォトレジスト膜の少なくとも一部を除去する工程として、前記フォトレジスト膜上にフォトマスクを配置した後、該フォトマスクが配置された前記フォトレジスト膜に対して露光および現像を行い、該フォトレジスト膜の少なくとも一部を除去する工程を実施し、また、
前記フォトレジスト膜への露光に際して前記位置決めマーカーを用いることの代わりに、前記フォトマスクの配置に際して、前記半導体装置前駆体の前記ビアの少なくとも1つを位置決めマーカーとして用いて前記フォトマスクの位置合せを行うことを特徴とする、請求項3または4に記載のフレキシブル半導体装置の製造方法。 - 前記ビアを形成する工程においては、前記可撓性フィルム層に開口部を形成した後、該開口部に金属を含有する導電性材料を供給してビアを形成することを特徴とする、請求項1~5のいずれかに記載のフレキシブル半導体装置の製造方法。
- 前記金属層の加工、前記フォトレジスト膜への露光または前記フォトマスクの配置に際しては、X線を前記半導体装置前駆体に照射することで得られるX線透過画像を利用し、該X線透過画像におけるビア対応ポイントを位置合せ基準として用いることを特徴とする、請求項1~6のいずれかに記載のフレキシブル半導体装置の製造方法。
- 前記位置決めマーカーを前記ビアの少なくとも2つから成るグループとして用いており、該グループを成すビアについての前記X線透過画像の前記ビア対応ポイントを前記位置合せ基準として用いることを特徴とする、請求項7に記載のフレキシブル半導体装置の製造方法。
- フレキシブル半導体装置であって、
ゲート電極;
前記ゲート電極上に形成されているゲート絶縁膜;
前記ゲート電極と対向するように前記ゲート絶縁膜上に形成されている半導体層;
前記半導体層と接して設けられているソース電極・ドレイン電極;
前記半導体層および前記ソース電極・ドレイン電極を覆うように形成されている可撓性フィルム層;ならびに
前記可撓性フィルム層上に形成されている第1の金属箔
を有して成り、
前記第1の金属箔の一部から配線が構成されており、また
前記可撓性フィルム層においては、その厚み方向に沿って複数のビアが延在しており、該複数のビアのうちの少なくとも1つのビアが位置決めマーカーであることを特徴とする、フレキシブル半導体装置。 - 前記半導体層の下方に第2の金属箔および該第2の金属箔上に形成されている絶縁層を有して成り、前記ゲート電極が前記第2の金属箔の一部から構成されていると共に、前記ゲート絶縁膜が前記絶縁層の一部から構成されていることを特徴とする請求項9に記載のフレキシブル半導体装置。
- 前記位置決めマーカーが、前記ビアの少なくとも2つから成るグループとして形成されていることを特徴とする、請求項9または10に記載のフレキシブル半導体装置。
- フレキシブル半導体装置であって、
ゲート電極;
前記ゲート電極上に形成されているゲート絶縁膜;
前記ゲート電極と対向するように前記ゲート絶縁膜上に形成されている半導体層;
前記半導体層と接して設けられているソース電極・ドレイン電極;
前記半導体層および前記ソース電極・ドレイン電極を覆うように形成されている可撓性フィルム層;ならびに
前記可撓性フィルム層上に形成されている第1の金属箔
を有して成り、
前記第1の金属箔の一部から配線が構成されており、また
前記可撓性フィルム層においては、その厚み方向に沿って複数のビアが延在しており、該複数のビアのうちの少なくとも1つのビアの設置箇所では、前記第1の金属箔が除去されていることを特徴とする、フレキシブル半導体装置。 - 前記半導体層の下方に第2の金属箔および該第2の金属箔上に形成されている絶縁層を有して成り、前記ゲート電極が前記第2の金属箔の一部から構成されていると共に、前記ゲート絶縁膜が前記絶縁層の一部から構成されていることを特徴とする請求項12に記載のフレキシブル半導体装置。
- 前記少なくとも1つのビアが、金属を含有した導電性部材により構成されていることを特徴とする、請求項9~13のいずれかに記載のフレキシブル半導体装置。
- 前記少なくとも1つのビアが、その厚み方向にテーパ形状を有していることを特徴とする、請求項9~14のいずれかに記載のフレキシブル半導体装置。
- 前記少なくとも1つのビアが、前記可撓性フィルム層の一方の主面側から他方の主面側に至るまで延在していることを特徴とする、請求項9~15のいずれかに記載のフレキシブル半導体装置。
- 前記第1の金属箔の一部から前記配線に加えて画素電極が構成されていることを特徴とする、請求項9~16のいずれかに記載のフレキシブル半導体装置。
- フレキシブル半導体装置であって、
ゲート電極;
前記ゲート電極上に形成されているゲート絶縁膜;
前記ゲート電極と対向するように前記ゲート絶縁膜上に形成されている半導体層;
前記半導体層と接して設けられているソース電極・ドレイン電極;
前記半導体層および前記ソース電極・ドレイン電極を覆うように形成されている可撓性フィルム層;ならびに
前記可撓性フィルム層上に形成されている第1の金属層
を有して成り、
前記第1の金属層の一部から配線が構成されており、また
前記可撓性フィルム層においては、その厚み方向に沿って複数のビアが延在しており、該複数のビアのうちの少なくとも1つのビアが位置決めマーカーであることを特徴とする、フレキシブル半導体装置。 - フレキシブル半導体装置であって、
ゲート電極;
前記ゲート電極上に形成されているゲート絶縁膜;
前記ゲート電極と対向するように前記ゲート絶縁膜上に形成されている半導体層;
前記半導体層と接して設けられているソース電極・ドレイン電極;
前記半導体層および前記ソース電極・ドレイン電極を覆うように形成されている可撓性フィルム層;ならびに
前記可撓性フィルム層上に形成されている第1の金属層
を有して成り、
前記第1の金属層の一部から配線が構成されており、また
前記可撓性フィルム層においては、その厚み方向に沿って複数のビアが延在しており、該複数のビアのうちの少なくとも1つのビアの設置箇所では、前記第1の金属層が除去されていることを特徴とする、フレキシブル半導体装置。 - 請求項9~19のいずれかに記載のフレキシブル半導体装置を用いた画像表示装置であって、
前記フレキシブル半導体装置;および
前記フレキシブル半導体装置上に形成されている複数の画素より構成される画像表示部
を有して成り、
前記フレキシブル半導体装置の前記複数のビアのうちの少なくとも1つのビアが位置決めマーカーであることを特徴とする、画像表示装置。 - 前記画像表示部が、
前記フレキシブル半導体装置上に形成されている画素電極;
前記画素電極上に形成されている発光層;および
前記発光層上に形成されている透明電極層
を有して成ることを特徴とする、請求項20に記載の画像表示装置。 - 前記発光層が、画素規制部によって仕切られた領域に形成されていることを特徴とする、請求項21に記載の画像表示装置。
- 前記透明電極層上にカラーフィルターを有して成ることを特徴とする、請求項21に記載の画像表示装置。
- 請求項9~19のいずれかに記載のフレキシブル半導体装置を備えた画像表示装置の製造方法であって、
(I)画素電極を備えた前記フレキシブル半導体装置を供する工程;および
(II)前記フレキシブル半導体装置上に、複数の画素より構成されている画像表示部を形成する工程
を含んで成り、
前記工程(II)に際しては、前記フレキシブル半導体装置の前記複数のビアの少なくとも1つを位置決めマーカーとして用いることによって、前記画像表示部の形成につき位置合せを行うことを特徴とする、画像表示装置の製造方法。 - 前記工程(II)において、複数の画素規制部を形成し、該複数の画素規制部によって仕切られた領域の前記画素電極上に前記画素を形成しており、該工程(II)に際しては、前記フレキシブル半導体装置の前記複数のビアの少なくとも1つを位置決めマーカーとして用いることによって、前記画素規制部の形成につき位置合せを行うことを特徴とする、請求項24に記載の画像表示装置の製造方法。
- 前記工程(II)において、前記画素電極を覆うように前記画素電極上に発光層を形成し、該発光層上にカラーフィルターを形成しており、該工程(II)に際しては、前記フレキシブル半導体装置の前記複数のビアの少なくとも1つを位置決めマーカーとして用いることによって、前記カラーフィルターの形成につき位置合せを行うことを特徴とする、請求項24に記載の画像表示装置の製造方法。
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