WO2012122701A1 - 一种电流检测电路及其控制电路和电源转换电路 - Google Patents

一种电流检测电路及其控制电路和电源转换电路 Download PDF

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Publication number
WO2012122701A1
WO2012122701A1 PCT/CN2011/071802 CN2011071802W WO2012122701A1 WO 2012122701 A1 WO2012122701 A1 WO 2012122701A1 CN 2011071802 W CN2011071802 W CN 2011071802W WO 2012122701 A1 WO2012122701 A1 WO 2012122701A1
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Prior art keywords
circuit
resistor
current
detecting circuit
main switch
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PCT/CN2011/071802
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English (en)
French (fr)
Inventor
孙建宁
Original Assignee
上舜照明（中国）有限公司
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Application filed by 上舜照明（中国）有限公司 filed Critical 上舜照明（中国）有限公司
Priority to CN201180069340.4A priority Critical patent/CN103477233B/zh
Priority to EP20110861269 priority patent/EP2594948A4/en
Priority to JP2013558283A priority patent/JP2014508501A/ja
Priority to US13/641,863 priority patent/US8963515B2/en
Priority to PCT/CN2011/071802 priority patent/WO2012122701A1/zh
Publication of WO2012122701A1 publication Critical patent/WO2012122701A1/zh
Priority to US14/028,019 priority patent/US20140016381A1/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/22—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using conversion of ac into dc
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/0092—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring current only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0009—Devices or circuits for detecting current in a converter

Definitions

  • the invention belongs to the field of circuits, and in particular relates to a current detecting circuit, a control circuit thereof and a power conversion circuit.
  • a power conversion circuit such as an AC-DC conversion circuit, converts alternating current into direct current to power the associated equipment.
  • existing power conversion circuits generally do not have the function of output current detection.
  • An object of the embodiments of the present invention is to provide a current detecting circuit for a power conversion circuit, which can detect an output current, has high reliability, and has a simple structure and low cost.
  • Another object of embodiments of the present invention is to provide a control circuit having a current detecting circuit as described above.
  • Another object of embodiments of the present invention is to provide a power conversion circuit having the above control circuit.
  • a current detecting circuit of a power conversion circuit includes a sample and hold circuit, a rising edge detecting circuit, a falling edge detecting circuit, a timing control circuit, a synchronous detecting circuit, and a low pass filter, a sample and hold circuit.
  • the first end is connected to the third end of the driving control tube, the second end is connected to the first end of the timing control circuit, the third end is connected to the first end of the synchronous detecting circuit, and the first end of the rising edge detecting circuit Connected to the second end of the main switch S1, the second end is connected to the second end of the timing control circuit, the first end of the falling edge detecting circuit is connected to the second end of the main switch S1, the second end and the timing
  • the third end of the control circuit is connected, the fourth end of the timing control circuit is connected to the second end of the synchronous detection circuit, the third end of the synchronous detection circuit is connected to the first end of the low pass filter, and the second end of the low pass filter
  • the end is the output of the current detection circuit.
  • An embodiment of the present invention provides a power conversion circuit having the above control circuit, where the power conversion circuit includes:
  • a filter circuit 12 connected to an external alternating current, the filter circuit for filtering noise in the alternating current; a rectifier circuit 13 connected to the filter circuit, the rectifier circuit for converting alternating current into direct current;
  • Single power conversion stage circuit 14 The capacitor C1, the inductor or the switching transformer L, the diode D1, the capacitor C2, the main switch S1, the driving control tube S2, the resistor R2, the control circuit and the auxiliary power circuit, the first end of the capacitor C1 and the rectifier circuit and the DC load.
  • the cathodes are connected, the second end is grounded, the first end of the inductor or switching transformer L is connected to the cathode of the DC load, the second end is connected to the anode of the diode D1, and the cathode of the diode D1 is connected to the anode of the DC load.
  • the capacitor C2 is connected between the anode and the cathode of the DC load, the first end of the main switch S1 is connected to the cathode of the DC load through the auxiliary power circuit, and the second end is connected to the anode of the diode D1.
  • the first end of the driving control tube S2 is connected to the control circuit, the second end is connected to the third end of the main switch S1, the third end is grounded through the resistor R2, and is also connected to the control circuit, the control circuit is also The second end of the main switch S1 is connected, the single power conversion stage circuit is used for adjusting the power factor, and the main switch circuit current is detected, and the signal of the output current is obtained through operation processing.
  • the current detecting circuit of the power conversion circuit of the present invention obtains a signal of the output current through operation processing by detecting the current of the main switching circuit.
  • Figure 1 is a circuit diagram of a power conversion circuit to which a current detecting circuit of the present invention is applied.
  • FIG. 2 is a circuit diagram of the control circuit of FIG. 1 having the current detecting circuit of the present invention.
  • FIG. 3 is a circuit diagram of a first preferred embodiment of the current detecting circuit of the present invention.
  • FIG. 4 is a circuit diagram of a second preferred embodiment of the current detecting circuit of the present invention.
  • FIG. 5 is a waveform diagram of each point in FIGS. 1 and 2.
  • the embodiment of the invention provides a current detecting circuit of a power conversion circuit, which can detect an output current, has high reliability, and has a simple structure.
  • the power conversion circuit of the present invention includes a filter circuit 12, a rectifier circuit 13, and a single power conversion stage circuit 14.
  • the filter circuit 12 is connected to both the live line L and the zero line N of an external alternating current.
  • the rectifier circuit 13 is connected to the external alternating current through the filter circuit 12.
  • the single power conversion stage circuit 14 is connected between the positive output terminal of the rectifier circuit 13 and the DC load 15.
  • the node between the positive output terminal of the rectifier circuit 13 and the DC load 15 is "C".
  • the filter circuit 12 uses a well-known filter circuit, and the rectifier circuit 13 uses a bridge rectifier circuit, which will not be described herein.
  • the single power conversion stage circuit 14 includes a capacitor C1, an inductor or switching transformer L, a diode D1, a capacitor C2, a main switch S1, a drive control tube S2, a resistor R2, a control circuit 16, and an auxiliary power supply circuit 17.
  • the first end of the capacitor C1 is connected to the rectifier circuit 13 and the cathode of the DC load 15, the second end is grounded, the first end of the inductor or switching transformer L is connected to the cathode of the DC load 15, and the second end is connected to the anode of the diode D1.
  • the cathode of the diode D1 is connected to the anode of the direct current load 15, the capacitor C2 is connected between the anode and the cathode of the direct current load 15, and the first end of the main switch S1 is connected to the cathode of the direct current load 15 through the auxiliary power supply circuit 17, the second end Connected to the anode of the diode D1, the first end of the drive control tube S2 is connected to the first end H of the control circuit 16, the second end is connected to the third end of the main switch S1, the third end is grounded through the resistor R2, and is also controlled The second end U of the circuit 16 is connected, and the third end D of the control circuit 16 is connected to the second end of the main switch S1.
  • the main switch S1 and the drive control tube S2 are all N-channel FETs. It is noted that the node between the drain of the main switch S1 and the anode of the diode D1 is "D”, the node between the gate of the main switch S1 and the auxiliary power supply circuit 17 is "E”, and the drain and the main of the drive control tube S2 are driven. The node between the sources of the switch S1 is "F”.
  • the control circuit 16 includes a peak-and-valley detecting circuit 161, a current detecting circuit 162, an error amplifier Err_amp, a PWM controller U1, and a driving control circuit 163; an input terminal U of the current detecting circuit 162 and a third driving control tube S2. The terminal is connected, the input terminal D is connected to the second end of the main switch S1, the output terminal is connected to the input end of the error amplifier Err_amp, and the output end of the error amplifier is connected to the PWM controller U1.
  • the PWM controller U1 is connected to the first end of the driving control circuit 163, the second end of the driving control circuit 163 is connected to the output end of the peak-to-valley detecting circuit 161, and the third end is connected to the first end of the driving control tube S2, and the peak valley
  • the input of the detection circuit 161 is connected to the second end of the main switch S1.
  • the auxiliary power supply circuit 17 includes a diode D2, a resistor R1, a capacitor C6 and a Zener diode Z2.
  • the anode of the diode D2 is connected to the cathode of the DC load 15, and the cathode is grounded through the resistor R1 and the capacitor C6 in sequence, and the node between the resistor R1 and the capacitor C6.
  • the filter circuit 12 is for filtering out noise in the alternating current
  • the rectifier circuit 13 is for performing AC-DC conversion
  • the power conversion stage circuit 14 is for adjusting the power factor of the power conversion circuit and detecting the output current.
  • the auxiliary power supply circuit 17 in the power conversion stage circuit 14 is for providing an auxiliary power supply
  • the control circuit 16 is for detecting the output current outputted to the DC load 15 and adjusting the average value of the current output to the DC load 15 and its internal
  • the set predetermined value is the same to achieve constant current output control.
  • Main switch S1 The input control terminal E point will be clamped at a fixed level after power-on, and the switch of the main switch S1 is mainly controlled by the drive control tube S2.
  • the current of the inductor L rises; when the main switch S1 is turned off, the voltage of the upper end D of the main switch S1 gradually rises from 0 due to the influence of the parasitic capacitance of the main switch S1 and the diode D1 ("0 "Voltage off", when the potential at point D rises above the DC load 15 At the K point potential, the diode D1 is turned on.
  • the current of the inductor L is output to the DC load 15 through the diode D1, and the current of the inductor L decreases from the peak value; when the current of the inductor L drops to 0, the resonance of the parasitic capacitance of the diode D1 and the main switch S1 and the inductance L
  • the potential of the upper end D of the main switch S1 begins to decrease; after a period of time, the peak-to-valley value appears at the voltage of the upper end D of the main switch S1.
  • the peak-to-valley detecting circuit 161 mainly controls the turning-on timing of the single-power converting stage circuit 14. By detecting the voltage at the D terminal, when the voltage has a peak-to-valley value, the detected result is sent to the driving control circuit 163.
  • the drive control circuit 163 and the drive control tube S2 drive the main switch S1 to be turned on at this moment to achieve "0" The voltage is turned on and therefore has low switching losses.
  • the on-time of the main switch S1 increases, the operating current of the inductor L and the current of the output load 15 increase; the on-time of the main switch S1 decreases, and the operating current of the inductor L and the current of the output load 15 decrease.
  • control circuit 16 and the single power conversion stage circuit 14 are connected by three ports, namely D, U, and H.
  • D, U are the two inputs of the control circuit 16
  • the control circuit 16 generates a control signal at the port H based on the information of the two inputs to control the drive control tube S2, thereby controlling the operation of the entire single power conversion stage circuit 14.
  • the control circuit 16 needs to obtain current information of the output load 15 in order to control the switching circuit for better power efficiency and power factor.
  • the power conversion circuit of the present invention filters out noise in the alternating current through the filter circuit 12, the rectifier circuit 13 performs AC-DC conversion, and the power conversion stage circuit 14 detects the output current and adjusts the power factor.
  • the power conversion circuit of the present invention further includes a fuse F1.
  • the fuse F1 is connected between the live line L and the filter circuit 12. When the current flowing through the fuse F1 is excessive, the fuse F1 is blown to protect the power conversion circuit.
  • the current detecting circuit 162 includes a sample and hold circuit 1, a rising edge detecting circuit 2, a falling edge detecting circuit 3, a timing control circuit 4, a synchronous detecting circuit 5, and a low pass filter 6.
  • the first end S11 of the sample and hold circuit 1 is connected to the node U, the second end S12 is connected to the first end S41 of the timing control circuit 4, and the third end S13 is connected to the first end S51 of the synchronization detecting circuit 5.
  • the first end S21 of the rising edge detecting circuit 2 is connected to the node D, and the second end S22 is connected to the second end S42 of the timing control circuit 4.
  • the first end S31 of the falling edge detecting circuit 3 is connected to the node D, and the second end S32 is connected to the third end S43 of the timing control circuit 4.
  • the fourth terminal S44 of the timing control circuit 4 is connected to the second terminal S52 of the synchronization detecting circuit 5.
  • the third terminal S53 of the synchronization detecting circuit 5 is connected to the first terminal S61 of the low pass filter 6.
  • the second terminal S62 of the low pass filter 6 is connected to the input of the error amplifier Err_amp.
  • the control circuit 16 detects the current on the sampling resistor R2 through the current detecting circuit 162, and processes the current signal to obtain the current average value information outputted to the DC load 15, which is input to the drive control circuit 163 and compared with the preset value to determine Increasing or decreasing the on-time of the main switch S1, and finally making the output current the same as the set value. Regardless of the DC load 15 or the input voltage fluctuating, the drive control circuit 163 can dynamically adjust the switching time of the main switch S1 to obtain the desired output current of the DC load 15.
  • the sample and hold circuit 1 in the current detecting circuit 162 includes an N-channel field effect transistor N1, an inverter INV1, a capacitor C3, an amplifier A1, and resistors R3 and R4.
  • the drain of the N-channel FET N1 is connected to the node U, the gate is connected to the input of the inverter INV1, and the source is grounded through the capacitor C3.
  • the input terminal of the inverter INV1 is connected to a control terminal CTL.
  • the non-inverting input of amplifier A1 is connected to the source of N-channel FET N1, the inverting input is grounded via resistor R3, and the output is connected to the inverting input via resistor R4.
  • the current sample-and-hold circuit 1 is in a sampling state during the on-time of the main switch S1, and the current sample-and-hold circuit 1 outputs a signal proportional to the input current signal, and enters the hold state after the main switch S1 is turned off.
  • the rising edge detecting circuit 2 includes an amplifier A2, resistors R5 and R6. One end of the resistor R5 is connected to the node D, and the other end is grounded through the resistor R6.
  • the non-inverting input of amplifier A2 is connected to a node between resistors R5 and R6, and the inverting input is connected to a reference voltage terminal VREF2.
  • the falling edge detecting circuit 3 includes an amplifier A3, an inverter INV2, an N-channel field effect transistor N2, a capacitor C4, clamp Zener tubes Z1-Z4, and resistors R7 and R8.
  • One end of the resistor R7 is connected to the node D, and the other end is grounded through the resistor R8.
  • One end of the capacitor C4 is connected to the node between the resistors R7 and R8, and the other end is connected to the non-inverting input of the amplifier A3.
  • the inverting input of amplifier A3 is connected to a reference voltage terminal VREF1, and the output terminal is connected to the input terminal of inverter INV2.
  • the gate and the drain of the N-channel FET N2 are both connected to the non-inverting input of the amplifier A3, and the source is grounded.
  • the cathode of the clamp Zener Z1 is connected to the node between the resistors R7 and R8, and the anode is grounded in turn through the clamp Zener Z2-Z4.
  • the timing control circuit 4 includes D flip-flops DF1 and DF2.
  • the clock signal terminal CK of the D flip-flop DF1 is connected to the output terminal of the inverter INV2 in the falling edge detecting circuit 3, and the reset terminal R is connected to the output terminal of the inverter INV1 in the sample-and-hold circuit 1, the signal input terminal D and A power supply VDD is connected, the output terminal Q is connected to the reset terminal R of the D flip-flop DF2, and the inverted output terminal QB is suspended.
  • the clock signal terminal CK of the D flip-flop DF2 is connected to the output terminal of the amplifier A2 in the rising edge detecting circuit 2, the signal input terminal D is connected to the power source VDD, and the output terminal Q is suspended.
  • the sync detecting circuit 5 includes an inverter INV3, N-channel FETs N3 and N4.
  • the input terminal of the inverter INV3 is connected to the inverting output terminal QB of the D flip-flop DF2 in the timing control circuit 4, and the output terminal is connected to the gate of the N-channel field effect transistor N3.
  • the drain of the N-channel FET N3 is connected to the output of the amplifier A1 in the sample-and-hold circuit 1, and the source is connected to the drain of the N-channel FET N4.
  • the gate of the N-channel FET N4 is connected to the input of the inverter INV3, and the source is grounded.
  • the low pass filter 6 includes a resistor R9 and a capacitor C5. One end of the resistor R9 is connected to the drain of the N-channel field effect transistor N4 in the synchronous detecting circuit 5, the other end is grounded through the capacitor C5, and is also connected to the input terminal of the error amplifier, and the low-pass filter 6 filters the input signal. A signal proportional to the average value of the output current of the DC load 15 is output.
  • the current waveform of the inductor L is “I_L”
  • the current waveform of the diode D1 is “I_D1”
  • the voltage waveform of the node F is “V_F”
  • the voltage waveform of the node D is “V_D”
  • the sample and hold circuit 1 The waveform of the output signal is "S_H_out”
  • the waveform of the output signal of the synchronous detecting circuit 5 is "Syn_out”
  • the signal waveform of the output terminal Q of the D flip-flop DF1 is "DF1_Q”
  • the inverted output terminal QB of the D flip-flop DF2 The signal waveform is "DF2_QB”.
  • the average value I_avr of the current output to the DC load 15 is equal to the average value of I_D1, that is, equal to the peak value of I_D1 divided by 2 and multiplied by the duty ratio. From the application reality, you only need to get a signal proportional to I_avr. Next, how the current detecting circuit 162 obtains this signal will be described.
  • the signal of the node U is input to the sample and hold circuit 1.
  • the sample-and-hold circuit 1 is in a sampling state when the main switch S1 is turned on, the output signal S_H_out of the sample-and-hold circuit 1 tracks the current I_L of the inductor L, the synchronous detecting circuit 5 is in an off state, and the output signal Syn_out of the synchronous detecting circuit 5 outputs a low battery. level.
  • the main switch S1 When the main switch S1 is turned on, the voltage V_F of the node F rises, the main switch S1 is turned off, and the potential V_D of the main node D rises.
  • the potential of the node D rises to a potential close to the node C
  • the current I_L of the inductor L passes through the diode.
  • D1 discharges to the DC load 15.
  • the rising edge detecting circuit 2 operates, and outputs an action signal to the timing control circuit 4, and the timing control circuit 4 causes the sample and hold circuit 1 to enter a hold state, at which time the sample and hold circuit 1 maintains a voltage proportional to the peak current of the inductor L. .
  • the peak current of the inductor L is equal to the peak current of the diode D1, so the output S_H_out of the sample-and-hold circuit 1 is proportional to the peak value of the current I_D1 of the diode D1.
  • the sample-and-hold circuit 1 Before the current I_L of the inductor L drops to zero, since the sample-and-hold circuit 1 is in the hold state during this period, this signal remains unchanged.
  • the synchronous detecting circuit 5 is in an on state at this time, and the output S_H_out of the sample and hold circuit 1 is output to the low pass filter 6 via the synchronous detecting circuit 5. As the current I_L of the inductor L is discharged to the DC load 15 via the diode D1, the current I_L of the inductor L gradually decreases.
  • the falling edge detection circuit 3 detects the signal that the node D starts to fall, the falling edge detection circuit 3 operates, and outputs the action signal to the timing control circuit. 4.
  • the timing control circuit 4 turns off the synchronization detecting circuit 5 so that the input signal of the low pass filter 6 is "0".
  • the average value of the input signal output to the low pass filter 6 is proportional to the average of the output current during this period, that is, the low pass filter output is proportional to the output current I_avr average. The signal of the value.
  • the voltage signal outputted by the low-pass filter 6 is sent to the error amplifier Err_amp together with the internally set reference value. If the output current average signal is greater than the internally set reference value, the output of the error amplifier Err_amp is controlled by the PWM controller U1. The on-time of S1 is slowly reduced. If the output current average signal is less than the internally set reference value, the output of the error amplifier Err_amp is slowly increased by the PWM controller U1 to turn on the main switch S1. Finally, the output current average value is the same as the internally set reference value to achieve constant current output control.
  • the main switch S1 When V_F is low, the main switch S1 is turned on, and the D2_QB terminal of the D flip-flop DF2 outputs a high level.
  • the signal of the current sampling resistor R2 is input to the field effect transistor N1 of the sample and hold circuit 1.
  • the signal timing applied to the gate of the field effect transistor N1 is synchronized with the drive signal of the main switch S1.
  • the control terminal CTL When the main switch S1 is turned on, the control terminal CTL is at a high level (inverted from V_F), and the sample-and-hold circuit 1 is in a sampling state.
  • the D1_Q output of the D flip-flop DF1 of the timing control circuit 4 is at a high level
  • D The D2_QB terminal of the flip-flop DF2 outputs a high level
  • the field effect transistor N4 of the synchronous detecting circuit 5 is turned on
  • the field effect transistor N3 of the synchronous detecting circuit 5 is turned off
  • the output of the synchronous detecting circuit 5 is "0".
  • the rising edge detecting circuit 2 When the potential of the D point rises to near the potential of the C point, the rising edge detecting circuit 2 operates, and the output of the amplifier A2 goes high, triggering the timing control circuit 4
  • the D flip-flop DF2, D2_QB output goes low, the FET N3 of the synchronous detecting circuit 5 is turned on, the FET N4 of the synchronous detecting circuit 5 is turned off, and the output signal of the sample-and-hold circuit 1 is output to the low-pass filter circuit 6 Input.
  • the current I_L of the inductor L is discharged to the DC load 15, and the current gradually decreases.
  • the N-channel FET N1 in the falling edge detecting circuit 3 in the current detecting circuit 162 can be replaced with a diode D3.
  • the anode of diode D3 is connected to the non-inverting input of amplifier A1 and the cathode is grounded.
  • the power conversion circuit of the present invention filters out noise in the alternating current through the filter circuit 12, the rectifier circuit 13 performs AC-DC conversion, the power conversion stage circuit 14 adjusts the power factor, and adjusts the average value of the output current to be the same as the predetermined value set internally. To achieve constant current output control.

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  • Power Engineering (AREA)
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Description

一种电流检测电路及其控制电路和电源转换电路 技术领域
本发明属于电路领域，特别涉及一种电流检测电路及其控制电路和电源转换电路。
背景技术
电源转换电路，如AC-DC转换电路，可将交流电转化为直流电，以给相关设备供电。然而，现有的电源转换电路一般不具备输出电流检测的功能。
 技术问题
本发明实施例的目的在于提供一种电源转换电路的电流检测电路，可检测输出电流，可靠性高，且结构简单，成本低。
本发明实施例的另一目的在于提供一种应用具有如上述的电流检测电路的控制电路。
本发明实施例的另一目的在于提供一种具有上述的控制电路的电源转换电路。
 技术解决方案
本发明实施例是这样实现的，一种电源转换电路的电流检测电路，包括采样保持电路、上升沿检测电路、下降沿检测电路、时序控制电路、同步检测电路以及低通滤波器，采样保持电路的第一端与所述驱动控制管的第三端相连，第二端与时序控制电路的第一端相连，第三端与同步检测电路的第一端相连，上升沿检测电路的第一端与所述主开关S1的第二端相连，第二端与时序控制电路的第二端相连，下降沿检测电路的第一端与所述主开关S1的第二端相连，第二端与时序控制电路的第三端相连，时序控制电路的第四端与同步检测电路的第二端相连，同步检测电路的第三端与低通滤波器的第一端相连，低通滤波器的第二端是电流检测电路的输出。
本发明实施例提供一种具有上述的控制电路的电源转换电路，所述电源转换电路包括：
滤波电路12，其与一外部交流电相连，所述滤波电路用于滤除交流电中的杂讯；整流电路13，其与所述滤波电路相连，所述整流电路用于将交流电转换为直流电；以及
单功率转换级电路14， 包括电容C1、电感或开关变压器L、二极管D1、电容C2、主开关S1、驱动控制管S2、电阻R2、控制电路及辅助电源电路，所述电容C1的第一端与整流电路及一直流负载的阴极均相连，第二端接地，所述电感或开关变压器L的第一端与直流负载的阴极相连，第二端与二极管D1的阳极相连，所述二极管D1的阴极与直流负载的阳极相连，所述电容C2连接于直流负载的阳极与阴极之间，所述主开关S1的第一端通过所述辅助电源电路与所述直流负载的阴极相连，第二端与二极管D1的阳极相连，所述驱动控制管S2的第一端与控制电路相连，第二端与主开关S1的第三端相连，第三端通过电阻R2接地，还与控制电路相连，所述控制电路还与所述主开关S1的第二端相连，所述单功率转换级电路用于调整功率因素，还通过检测主开关回路电流，经过运算处理获得输出电流的信号。
 有益效果
本发明电源转换电路的电流检测电路通过检测主开关回路电流，经过运算处理获得输出电流的信号。
附图说明
图1是应用本发明电流检测电路的电源转换电路的电路图。
图2是图1中具有本发明电流检测电路的控制电路的电路示意图。
图3是本发明电流检测电路的第一较佳实施方式的电路图。
图4是本发明电流检测电路的第二较佳实施方式的电路图。
图5是图1及图2中的各点的波形示意图。
 本发明的实施方式
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
本发明实施例提供一种电源转换电路的电流检测电路，可侦测输出电流，可靠性高，且结构简单。
请参考图1，本发明电源转换电路包括滤波电路12、整流电路13及单功率转换级电路14。
滤波电路12与一外部交流电的火线L与零线N均相连。
整流电路13通过滤波电路12与外部交流电相连。
单功率转换级电路14连接于整流电路13的正输出端与直流负载15之间。记整流电路13的正输出端与直流负载15之间的节点为“C”。
其中滤波电路12采用熟知的滤波电路，整流电路13采用桥式整流电路，在此不再赘述。
单功率转换级电路14包括电容C1、电感或开关变压器L、二极管D1、电容C2、主开关S1、驱动控制管S2、电阻R2、控制电路16及辅助电源电路17。
电容C1的第一端与整流电路13及直流负载15的阴极均相连，第二端接地，电感或开关变压器L的第一端与直流负载15的阴极相连，第二端与二极管D1的阳极相连，二极管D1的阴极与直流负载15的阳极相连，电容C2连接于直流负载15的阳极与阴极之间，主开关S1的第一端通过辅助电源电路17与直流负载15的阴极相连，第二端与二极管D1的阳极相连，驱动控制管S2的第一端与控制电路16的第一端H相连，第二端与主开关S1的第三端相连，第三端通过电阻R2接地，还与控制电路16的第二端U相连，控制电路16的第三端D与主开关S1的第二端相连。
主开关S1、驱动控制管S2均为N沟道场效应管。记主开关S1的漏极与二极管D1的阳极之间的节点为“D”，主开关S1的栅极与辅助电源电路17之间的节点为“E”，驱动控制管S2的漏极与主开关S1的源极之间的节点为“F”。
请参考图2，控制电路16包括峰谷检测电路161、电流检测电路162、误差放大器Err_amp、PWM控制器U1及驱动控制电路163；电流检测电路162的输入端U与驱动控制管S2的第三端相连，输入端D与主开关管S1的第二端相连，输出端与误差放大器Err_amp的输入端相连，误差放大器的输出端与PWM控制器U1相连， PWM控制器U1与驱动控制电路163的第一端相连，驱动控制电路163的第二端与峰谷检测电路161的输出端相连，第三端与驱动控制管S2的第一端相连，峰谷检测电路161的输入端与主开关S1的第二端相连。
辅助电源电路17包括二极管D2、电阻R1、电容C6及稳压管Z2，二极管D2的阳极与直流负载15的阴极相连，阴极依次通过电阻R1及电容C6接地，电阻R1与电容C6之间的节点与主开关S1的第一端相连，稳压管Z2的阳极接地，阴极与主开关S1的第一端相连。
下面对本发明电源转换电路的工作过程进行说明。
滤波电路12用于滤除交流电中的杂讯，整流电路13用于进行AC-DC转换，功率转换级电路14用于调整电源转换电路的功率因数，并侦测输出电流。其中，功率转换级电路14中的辅助电源电路17用于提供辅助电源，控制电路16用于对输出到直流负载15的输出电流进行检测，并调整输出至直流负载15的电流的平均值与其内部设定的预定值相同，实现恒流输出控制。
主开关S1 的输入控制端E点在加电后将被钳位在固定电平，主开关S1的开关主要受驱动控制管S2的控制。在主开关S1导通期间，电感L的电流上升；当主开关S1关断时，由于主开关S1和二级管D1的寄生电容影响，主开关S1的上端D点电压从0逐渐上升（“0”电压关断），当D点电位上升到超过直流负载15的 K点电位时，二级管D1导通， 电感L的电流经过二级管D1输出到直流负载15，电感L的电流从峰值开始下降；当电感L的电流下降到0时，由于二极管D1和主开关S1的寄生电容与电感L的谐振作用，主开关S1的上端D点电位开始下降；经过一段时间，主开关S1上端D点电压会出现峰谷值。
峰谷检测电路161主要控制单功率转换级电路14的导通时机，通过检测D端电压，当电压出现峰谷值时，将检测到的结果送到驱动控制电路163， 驱动控制电路163及驱动控制管S2驱动主开关S1在这一时刻导通，实现“0” 电压导通，因此具有低开关损耗。电路工作过程中，主开关S1的导通时间增加，电感L的工作电流及输出负载15的电流增加；主开关S1的导通时间减少，电感L的工作电流及输出负载15的电流减少。
请同时参考图2，控制电路16和单功率转换级电路14有三个端口连接，分别是D、U、H。对控制电路16而言， D、U是控制电路16的两个输入端，控制电路16根据这两个输入端的信息在端口H产生一个控制信号，去控制驱动控制管S2，从而控制整个单功率转换级电路14的工作。控制电路16需要取得输出负载15的电流信息，以便控制开关电路，获得更好的电源效率和功率因子。
本发明电源转换电路通过滤波电路12滤除交流电中的杂讯，整流电路13进行AC-DC转换，功率转换级电路14侦测输出电流，并调整功率因数。
进一步地，本发明电源转换电路还包括一保险丝F1。保险丝F1连接于火线L与滤波电路12之间，当流经保险丝F1的电流过大时，保险丝F1即熔断，以保护电源转换电路。
请继续参考图2，进一步地，电流检测电路162包括采样保持电路1、上升沿检测电路2、下降沿检测电路3、时序控制电路4、同步检测电路5以及低通滤波器6。
采样保持电路1的第一端S11与节点U相连，第二端S12与时序控制电路4的第一端S41相连，第三端S13与同步检测电路5的第一端S51相连。
上升沿检测电路2的第一端S21与节点D相连，第二端S22与时序控制电路4的第二端S42相连。
下降沿检测电路3的第一端S31与节点D相连，第二端S32与时序控制电路4的第三端S43相连。
时序控制电路4的第四端S44与同步检测电路5的第二端S52相连。
同步检测电路5的第三端S53与低通滤波器6的第一端S61相连。低通滤波器6的第二端S62与误差放大器Err_amp的输入端相连。
控制电路16通过电流检测电路162检测采样电阻R2上的电流，对这个电流信号进行处理，来获得输出到直流负载15的电流平均值信息，输入到驱动控制电路163，与预设值比较以决定增加或减少主开关S1的导通时间，最终使输出电流与设定值相同。无论直流负载15或者输入电压有波动，驱动控制电路163可以动态调整主开关S1的开关时间来获得期望的直流负载15的输出电流。
请参考图3，作为本发明的一个较佳实施例，电流检测电路162中的采样保持电路1包括N沟道场效应管N1、反相器INV1、电容C3、放大器A1、电阻R3及R4。N沟道场效应管N1的漏极连接于节点U，栅极与反相器INV1的输入端相连，源极通过电容C3接地。反相器INV1的输入端与一控制端CTL相连。放大器A1的同相输入端与N沟道场效应管N1的源极相连，反相输入端通过电阻R3接地，输出端通过电阻R4与反相输入端相连。电流采样保持电路1在主开关S1导通时间内处于采样状态，电流采样保持电路1输出一个与输入电流信号成比例的信号，在主开关S1关断后进入保持状态。
上升沿检测电路2包括放大器A2、电阻R5及R6。电阻R5的一端连接于节点D，另一端通过电阻R6接地。放大器A2的同相输入端连接于电阻R5与R6之间的节点，反相输入端与一基准电压端VREF2相连。上升沿检测电路2检测到主开关S1上端电压上升到一定值后，上升沿检测电路2触发锁存电路，控制同步检测电路5工作，将来自电流采样保持电路1的信号输出到低通滤波器6。
下降沿检测电路3包括放大器A3、反相器INV2、N沟道场效应管N2、电容C4、钳位齐纳管Z1-Z4，电阻R7及R8。电阻R7的一端连接于节点D，另一端通过电阻R8接地。电容C4的一端连接于电阻R7与R8之间的节点，另一端与放大器A3的同相输入端相连。放大器A3的反相输入端与一基准电压端VREF1相连，输出端与反相器INV2的输入端相连。N沟道场效应管N2的栅极及漏极均与放大器A3的同相输入端相连，源极接地。钳位齐纳管Z1的阴极连接于电阻R7与R8之间的节点，阳极依次通过钳位齐纳管Z2-Z4接地。当下降沿检测电路3检测到主开关S1上端电压下降沿后，解锁锁存器，关断同步检测电路5，使低通滤波器6输入信号为“0”。
时序控制电路4包括D触发器DF1及DF2。D触发器DF1的时钟信号端CK与下降沿检测电路3中的反相器INV2的输出端相连，复位端R与采样保持电路1中的反相器INV1的输出端相连，信号输入端D与一电源VDD相连，输出端Q与D触发器DF2的复位端R相连，反相输出端QB悬置。D触发器DF2的时钟信号端CK与上升沿检测电路2中的放大器A2的输出端相连，信号输入端D与与电源VDD相连，输出端Q悬置。
同步检测电路5包括反相器INV3、N沟道场效应管N3及N4。反相器INV3的输入端与时序控制电路4中的D触发器DF2的反相输出端QB相连，输出端与N沟道场效应管N3的栅极相连。N沟道场效应管N3的漏极与采样保持电路1中的放大器A1的输出端相连，源极与N沟道场效应管N4的漏极相连。N沟道场效应管N4的栅极与反相器INV3的输入端相连，源极接地。
低通滤波器6包括电阻R9及电容C5。电阻R9的一端与同步检测电路5中的N沟道场效应管N4的漏极相连，另一端通过电容C5接地，还与误差放大器的输入端相连，低通滤波器6对输入信号进行滤波后，输出一个正比于直流负载15输出电流平均值的信号。
请同时参考图5，电感L的电流波形为“I_L”，二极管D1的电流波形为“I_D1”，节点F的电压波形为“V_F”，节点D的电压波形为“V_D”，采样保持电路1的输出信号的波形为“S_H_out”，同步检测电路5的输出信号的波形为“Syn_out”，D触发器DF1的输出端Q的信号波形为“DF1_Q”，D触发器DF2的反相输出端QB的信号波形为“DF2_QB”。
由图5可以得出，输出到直流负载15的电流的平均值I_avr等于I_D1的平均值，即等于I_D1的峰值除以2再乘以占空比。从应用实际出发，只需得到一个与I_avr成比例的信号。下面对电流检测电路162如何取得此信号进行说明。
当主开关S1导通时，节点U的信号输入到采样保持电路1。采样保持电路1在主开关S1导通时处于采样状态，采样保持电路1的输出信号S_H_out跟踪电感L的电流I_L，同步检测电路5处于关断状态，同步检测电路5的输出信号Syn_out输出低电平。
当主开关S1导通周期结束，节点F的电压V_F上升，主开关S1关断，主节点D的电位V_D上升，当节点D的电位上升到接近节点C的电位时，电感L的电流I_L经二极管D1向直流负载15放电。上升沿检测电路2动作，并将动作信号输出到时序控制电路4，时序控制电路4使采样保持电路1进入保持状态，此时采样保持电路1保持了一个与电感L的峰值电流成比例的电压。电感L的峰值电流等于二极管D1的峰值电流，因此采样保持电路1的输出S_H_out与二极管D1的电流I_D1的峰值成比例。
在电感L的电流I_L下降到0之前，由于采样保持电路1在此期间处于保持状态，这一信号始终保持不变。同步检测电路5此时处于导通状态，采样保持电路1的输出S_H_out经同步检测电路5输出到低通滤波器6。随着电感L的电流I_L经二极管D1向直流负载15放电，电感L的电流I_L逐渐下降。
当电感L的电流I_L下降到“0”时，节点D的电位开始下降，下降沿检测电路3检测到节点D开始下降的信号，下降沿检测电路3动作，并将动作信号输出到时序控制电路4，时序控制电路4关断同步检测电路5，使低通滤波器6的输入信号为“0”。在这一导通关断周期中，输出到低通滤波器6的输入信号的平均值，同这一周期中的输出电流平均值成正比，即低通滤波器输出一个正比于输出电流I_avr平均值的信号。
低通滤波器6输出的电压信号同内部设定的参考值一起送入误差放大器Err_amp，如输出电流平均值信号大于内部设定的参考值，误差放大器Err_amp的输出通过PWM控制器U1控制主开关S1的导通时间缓慢减小，如输出电流平均值信号小于内部设定的参考值，则误差放大器Err_amp的输出通过PWM控制器U1使主开关S1的导通时间缓慢增加。最终，使输出电流平均值同内部设定的参考值相同，实现恒流输出控制。
当主开关S1关断周期结束，主开关S1再次导通，电路进入下一个循环。
当V_F为低电平时，主开关S1导通，D触发器DF2的D2_QB端输出高电平。电流采样电阻R2的信号输入到采样保持电路1的场效应管N1。施加在场效应管N1的栅极的信号时序与主开关S1的驱动信号同步。主开关S1导通时，控制端CTL为高电平（与V_F反相），采样保持电路1处于采样状态，此时，时序控制电路4的D触发器DF1的D1_Q输出为高电平，D触发器DF2的D2_QB端输出高电平，同步检测电路5的场效应管N4对地导通，同步检测电路5的场效应管N3关断，同步检测电路5的输出为“0”。
当主开关S1导通周期结束，V_F变为高电平，主开关S1关断，控制端CTL变为低电平，采样保持电路1进入保持状态，D触发器DF1复位，D触发器DF1的D1_Q输出为低电平，D触发器DF2解除复位状态。随着主开关S1的关断，主开关S1上端D点电位V_D上升，当D点电位上升到接近C点电位时，上升沿检测电路2动作，放大器A2的输出变高，触发时序控制电路4的D触发器DF2，D2_QB输出变低，使同步检测电路5的场效应管N3导通，同步检测电路5的场效应管N4关断，采样保持电路1的输出信号输出到低通滤波电路6的输入端。此时，电感L的电流I_L向直流负载15放电，电流逐渐下降。
请继续参考图4，作为本发明的另一较佳实施例，电流检测电路162中的下降沿检测电路3中的N沟道场效应管N1可替换为二极管D3。二极管D3的阳极与放大器A1的同相输入端相连，阴极接地。
本发明电源转换电路通过滤波电路12滤除交流电中的杂讯，整流电路13进行AC-DC转换，功率转换级电路14调整功率因数，并调整输出电流的平均值与其内部设定的预定值相同，从而实现恒流输出控制。
以上所述仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。

Claims (10)

  1. 一种电源转换电路的电流检测电路，其特征在于，所述电流检测电路包括采样保持电路、上升沿检测电路、下降沿检测电路、时序控制电路、同步检测电路以及低通滤波器，采样保持电路的第一端与驱动控制管S2的第三端相连，第二端与时序控制电路的第一端相连，第三端与同步检测电路的第一端相连，上升沿检测电路的第一端与一主开关S1的第二端相连，第二端与时序控制电路的第二端相连，下降沿检测电路的第一端与所述主开关S1的第二端相连，第二端与时序控制电路的第三端相连，时序控制电路的第四端与同步检测电路的第二端相连，同步检测电路的第三端与低通滤波器的第一端相连，低通滤波器的第二端是电流检测电路的输出。
  2. 如权利要求1所述的电源转换电路的电流检测电路，其特征在于，所述采样保持电路包括场效应管N1、反相器INV1、电容C3、放大器A1、电阻R3及电阻R4，场效应管N1的漏极作为采样保持电路的第一端，栅极与反相器INV1的输入端相连，源极通过电容C3接地，反相器INV1的输入端信号与所述驱动控制管S2第一端控制信号同相，输出端作为采样保持电路的第二端，放大器A1的同相输入端与场效应管N1的源极相连，反相输入端通过电阻R3接地，输出端通过电阻R4与反相输入端相连，并作为采样保持电路的第三端，电流采样保持电路在主开关S1导通时间内处于采样状态，电流采样电路输出一个与输入电流信号成比例的信号，在主开关S1关断后进入保持状态。
  3. 如权利要求1所述的电源转换电路的电流检测电路，其特征在于，所述上升沿检测电路包括放大器A2、电阻R5及电阻R6，电阻R5的第一端作为上升沿检测电路的第一端，第二端通过电阻R6接地，放大器A2的同相输入端连接于电阻R5与电阻R6之间的节点，反相输入端与一基准电压端相连，输出端作为上升沿检测电路的第二端与时序控制电路的第二端相连，上升沿检测电路检测到主开关S1上端电压上升到一定值后，上升沿检测电路触发锁存电路，控制同步检测电路工作，将来自电流采样保持电路的信号输出到低通滤波电路。
  4. 如权利要求1所述的电源转换电路的电流检测电路，其特征在于，所述下降沿检测电路包括放大器A3、反相器INV2、场效应管N2、电容C4、钳位齐纳管Z1-Z4、电阻R7及电阻R8，电阻R7的第一端作为下降沿检测电路的第一端，第二端通过电阻R8接地，电容C4的第一端连接于电阻R7与电阻R8之间的节点，第二端与放大器A3的同相输入端相连，放大器A3的反相输入端与一基准电压端相连，输出端与反相器INV2的输入端相连，反相器INV2的输出端作为下降沿检测电路的第二端，场效应管N2的栅极及漏极均与放大器A3的同相输入端相连，源极接地，钳位齐纳管Z1的阴极连接于电阻R7与电阻R8之间的节点，阳极依次通过钳位齐纳管Z2、钳位齐纳管Z3、钳位齐纳管Z4接地，当下降沿检测电路检测到主开关S1上端电压下降沿后，解锁锁存器，关断同步检测电路，使低通滤波电路输入信号为“0”。
  5. 如权利要求1所述的电源转换电路的电流检测电路，其特征在于，所述时序控制电路包括D触发器DF1及D触发器DF2，D触发器DF1的复位端作为时序控制电路的第一端与采样保持电路的第二端相连，时钟信号端作为时序控制电路的第三端与下降沿检测电路的第二端相连，信号输入端与一电源相连，输出端与D触发器DF2的复位端相连，反相输出端悬置，D触发器DF2的时钟信号端作为时序控制电路的第二端与上升沿检测电路的第二端相连，信号输入端与电源相连，输出端悬置，反相输出端作为时序控制电路的第四端与同步检测电路的第二端相连。
  6. 如权利要求1所述的电源转换电路的电流检测电路，其特征在于，所述同步检测电路包括反相器INV3、场效应管N3及N4，场效应管N3的漏极作为同步检测电路的第一端与采样保持电路的第三端相连，源极与场效应管N4的漏极相连，栅极与反相器INV3的输出端相连，反相器INV3的输入端作为同步检测电路的第二端与时序控制电路的第四端相连，场效应管N4的栅极与反相器INV3的输入端相连，源极接地，场效应管N4的漏极还作为同步检测电路的第三端与低通滤波器的第一端相连。
  7. 如权利要求1所述的电源转换电路的电流检测电路，其特征在于，所述低通滤波器第一端与同步检测电路的第三端相连，第二端与误差放大器的输入端相连，低通滤波器对输入信号进行滤波后，输出一个正比于直流负载15输出电流平均值的信号。
  8. 一种应用具有如权利要求1至7任一项所述的电流检测电路的控制电路，其特征在于，所述控制电路还包括峰谷检测电路、误差放大器、PWM控制器及驱动控制电路；所述电流检测电路的U端与驱动控制管S2的第三端相连，D端与所述主开关管S1的第二端相连，输出端即为所述低通滤波器的第二端，其与误差放大器的输入端相连；所述误差放大器的输出端与所述PWM控制器相连，所述PWM控制器与所述驱动控制电路相连，所述驱动控制电路还与所述峰谷检测电路的输出端相连，所述峰谷检测电路的输入端与所述主开关S1的第二端相连。
  9. 一种具有如权利要求8所述的控制电路的电源转换电路，其特征在于，所述电源转换电路包括：
    滤波电路12，其与一外部交流电相连，所述滤波电路用于滤除交流电中的杂讯；整流电路13，其与所述滤波电路相连，所述整流电路用于将交流电转换为直流电；以及
    单功率转换级电路14， 包括电容C1、电感或开关变压器L、二极管D1、电容C2、主开关S1、驱动控制管S2、电阻R2、控制电路及辅助电源电路，所述电容C1的第一端与整流电路及一直流负载的阴极均相连，第二端接地，所述电感或开关变压器L的第一端与直流负载的阴极相连，第二端与二极管D1的阳极相连，所述二极管D1的阴极与直流负载的阳极相连，所述电容C2连接于直流负载的阳极与阴极之间，所述主开关S1的第一端通过所述辅助电源电路与所述直流负载的阴极相连，第二端与二极管D1的阳极相连，所述驱动控制管S2的第一端与控制电路相连，第二端与主开关S1的第三端相连，第三端通过电阻R2接地，还与控制电路相连，所述控制电路还与所述主开关S1的第二端相连，所述单功率转换级电路用于调整功率因素，还通过检测主开关回路电流，经过运算处理获得输出电流的信号。
  10. 如权利要求9所述的电源转换电路，其特征在于，所述辅助电源电路包括二极管D2、电阻R1、电容C6及稳压管Z2，所述二极管D2的阳极与所述直流负载的阴极相连，阴极依次通过所述电阻R1及电容C6接地，所述电阻R1与电容C6之间的节点与主开关S1的第一端相连，所述稳压管Z2的阳极接地，阴极与主开关S1的第一端相连。
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US20140016384A1 (en) 2014-01-16
EP2594948A1 (en) 2013-05-22
CN103477233B (zh) 2015-11-25
US20140016381A1 (en) 2014-01-16
JP2014508501A (ja) 2014-04-03

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