WO2012046841A1 - Method of manufacturing printed circuit board, and printed circuit board obtained using method of manufacturing printed circuit board - Google Patents

Method of manufacturing printed circuit board, and printed circuit board obtained using method of manufacturing printed circuit board Download PDF

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Publication number
WO2012046841A1
WO2012046841A1 PCT/JP2011/073218 JP2011073218W WO2012046841A1 WO 2012046841 A1 WO2012046841 A1 WO 2012046841A1 JP 2011073218 W JP2011073218 W JP 2011073218W WO 2012046841 A1 WO2012046841 A1 WO 2012046841A1
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Prior art keywords
wiring board
printed wiring
insulating resin
manufacturing
copper
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PCT/JP2011/073218
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French (fr)
Japanese (ja)
Inventor
吉川　和広
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三井金属鉱業株式会社
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Application filed by 三井金属鉱業株式会社 filed Critical 三井金属鉱業株式会社
Priority to CN201180048731.8A priority Critical patent/CN103155724B/en
Priority to JP2012537773A priority patent/JP5794740B2/en
Priority to KR1020137008689A priority patent/KR101553635B1/en
Publication of WO2012046841A1 publication Critical patent/WO2012046841A1/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0779—Treatments involving liquids, e.g. plating, rinsing characterised by the specific liquids involved
    • H05K2203/0786—Using an aqueous solution, e.g. for cleaning or during drilling of holes
    • H05K2203/0789—Aqueous acid solution, e.g. for cleaning or etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor

Definitions

  • the present invention relates to a printed wiring board manufacturing method and a printed wiring board obtained by using the printed wiring board manufacturing method.
  • the present invention relates to a printed wiring board having excellent adhesion between a solder resist layer and an insulating resin layer surface exposed between circuits.
  • FIG. 6 shows a cross section of the printed wiring board where delamination has occurred. In FIG. 6, it can be clearly observed that a space (delamination DL) exists between the insulating resin base material BM and the solder resist PSR up to the immediate vicinity of the copper circuit CC.
  • Patent Document 1 As techniques for improving the moisture absorption and heat-resistant adhesion between the solder resist layer and the insulating resin layer, there are techniques disclosed in Patent Document 1 and Patent Document 2 below.
  • Patent Document 1 discloses a method for producing a printed wiring board that is advantageous in terms of fine wiring formation, electrical characteristics, and manufacturing cost, and has high reliability.
  • a roughening treatment is performed on the resin surface serving as an adhesive interface with the solder resist layer.
  • Hitachi in which four resin-coated copper foils were applied by coating the resin composition to a thickness of 3.0 ⁇ m and dried at 160 ° C. for about 10 minutes so that the residual solvent was 5% by weight or less.
  • Copper-clad laminate produced by placing glass cloth insulation layer high Tg epoxy resin prepreg GEA-679F (thickness 0.1 mm) made by Kasei Kogyo Co., Ltd. and press-molding at 180 ° C. and 2.5 MPa for 1 hour.
  • the printed wiring board from which unnecessary copper foil was removed with an iron chloride-based etchant was treated with 3% sodium hydroxide + 6% potassium permanganate aqueous solution and chemically roughened on the insulating resin substrate.
  • SR-7200G soldder resist
  • SR-7200G soldder resist manufactured by Seiko Kogyo Co., Ltd. is laminated and treated for 2 hours under the conditions of 121 ° C., 100% humidity and 2 atm. There is a description that no blistering or the like occurs in the solder resist even after treatment for 196 hours under the condition of 2 atm.
  • Patent Document 2 even when a metal foil having a small surface roughness on the surface to be in close contact with the insulating layer can be used, it is possible to ensure the adhesion of the solder resist on the insulating layer after removing the metal foil.
  • the metal foil of the laminated sheet with metal foil bonded to the insulating layer is removed.
  • the circuit board having the formed conductor pattern a circuit board in which a rough surface shape is formed on the exposed insulating layer surface after removing the metal foil and a method for manufacturing the circuit board are disclosed.
  • Patent Document 2 a profile-free copper foil manufactured by Hitachi Chemical Co., Ltd. is provided on both sides of the inner layer core material subjected to blackening treatment via GEA-679FG manufactured by Hitachi Chemical Co., Ltd. as an insulating layer.
  • oxygen plasma treatment was performed on a printed wiring board on which a conductor pattern was formed by a semi-additive method using oxygen as a plasma gas at an output of 1000 W and an atmospheric pressure of 100 Pa for 5 minutes.
  • Patent Document 1 and Patent Document 2 are obtained by etching a metal foil of a metal foil-clad laminate using a metal foil having a small surface roughness and processing the surface of the exposed insulating layer.
  • etching a metal foil of a metal foil-clad laminate using a metal foil having a small surface roughness By obtaining a state having a surface roughness equivalent to the exposed surface of the insulating resin layer with unevenness when using a copper foil that has been roughened, between the insulating resin layer and the solder resist Ensures good moisture absorption and heat-resistant adhesion.
  • the copper foil layer of the copper clad laminate using the copper foil having a small surface roughness is etched to form a circuit shape, and between the circuits.
  • the present inventors have focused on the anticorrosive component of the copper foil remaining on the surface of the insulating resin layer exposed between the circuits after etching the copper foil with a copper etching solution, and the solder resist layer and We have come up with a method to stabilize moisture absorption and heat-resistant adhesion to the surface of insulating resin.
  • the manufacturing method of a printed wiring board according to the present invention is a method of manufacturing a printed wiring board using a copper-clad laminate in which a non-roughened copper foil is laminated, After forming the circuit by etching the roughened copper foil with a copper etchant, the surface of the insulating resin exposed between the circuits is subjected to a purification treatment, and the non-roughened copper foil remaining on the surface of the insulating resin subjected to the purification treatment When surface-treated metal components are semi-quantitatively analyzed with an XPS analyzer (X-ray source: Al (K ⁇ ), acceleration voltage: 15 kV, beam diameter: 50 ⁇ m), each surface-treated metal component is made to be below the detection limit. It is what.
  • Method for producing printed wiring board after formation of solder resist layer according to the present invention The method for producing a printed wiring board after formation of the solder resist layer according to the present invention has been subjected to a purification treatment referred to in the method for producing a printed wiring board described above. A solder resist layer is formed later.
  • the printed wiring board according to the present invention is a printed wiring board after formation of a solder resist layer obtained by the method for manufacturing a printed wiring board according to the present invention, and is 121 ° C. and humidity 100%. No spot delamination with a diameter of 20 ⁇ m or more occurs between the solder resist layer and the surface of the insulating resin when immersed in a solder bath at 260 ° C. for 60 seconds after treatment at 2 atm for 5 hours. It is characterized by.
  • the pressure cooker test (121 ° C., humidity 100%, 2 atm, without roughening the insulating resin surface exposed between the circuits) After the treatment for 5 hours under the above conditions), even if immersed in a solder bath at 260 ° C. for 60 seconds or more, it is possible to stably supply a printed wiring board in which spot-like delamination having a diameter of 20 ⁇ m or more does not occur.
  • the printed wiring board obtained by this manufacturing method has a flat surface between the insulating resin layers exposed between the circuits, and even after the extremely severe pressure cooker test, the insulating resin layer and the solder resist, which are practically problematic, are used. It exhibits the characteristic that spot-like delamination with a diameter of 20 ⁇ m or more does not occur between them, and is excellent in migration resistance. Therefore, it becomes a high-quality product excellent in long-term use stability.
  • a manufacturing method of a printed wiring board according to the present invention is a method of manufacturing a printed wiring board using a copper-clad laminate in which a non-roughened copper foil is laminated, After forming the circuit by etching the roughened copper foil with a copper etchant, the surface of the insulating resin exposed between the circuits is subjected to a purification treatment, and the non-roughened copper foil remaining on the surface of the insulating resin subjected to the purification treatment When surface-treated metal components are semi-quantitatively analyzed with an XPS analyzer (X-ray source: Al (K ⁇ ), acceleration voltage: 15 kV, beam diameter: 50 ⁇ m), each surface-treated metal component is made to be below the detection limit.
  • XPS analyzer X-ray source: Al (K ⁇ ), acceleration voltage: 15 kV, beam diameter: 50 ⁇ m
  • the feature of the printed wiring board according to the present invention is that the surface-treated metal component of the non-roughened copper foil remaining on the surface of the insulating resin exposed between the circuits is removed as much as possible after the circuit is formed by etching. It is in. This is because if the metal component remains on the surface of the insulating resin layer exposed between the circuits, the adhesion between the solder resist layer and the insulating resin layer is adversely affected and the migration resistance during energization is deteriorated.
  • the moisture absorption and heat resistant adhesion between the solder resist layer provided on the surface and the insulating resin layer provided on the outer layer can be kept good.
  • the moisture absorption / heat resistance adhesion in the present invention is determined by combining a predetermined pressure cooker test and a solder heat resistance test.
  • copper-clad laminate laminated with non-roughened copper foil used in the present invention.
  • the term “copper-clad laminate laminated with non-roughened copper foil” as used herein is a general term for copper-clad laminates that use non-roughened copper foil as the outermost copper foil, so-called single-sided copper It includes all the concepts of a laminated laminate, a double-sided copper-clad laminate, and a multilayer copper-clad laminate including an inner layer core substrate.
  • non-roughened copper foil an electrolytic copper foil, a rolled copper foil, and an ultrathin copper foil with a carrier can be used, and the thickness is not particularly limited.
  • the surface treatment of the copper foil is not particularly limited, and as a rust preventive component, nickel-zinc alloy, nickel-cobalt alloy, nickel-zinc-molybdenum alloy, nickel-cobalt-molybdenum alloy, zinc-tin Various alloys such as alloys and chromate treatment can also be used. Furthermore, the contact surface of the copper foil with the insulating resin layer may be provided with a silane coupling agent treatment layer such as an epoxy silane coupling agent, an amino silane coupling agent, or a mercapto silane coupling agent. It is preferable from the viewpoint of improvement.
  • the insulating resin layer used for the production of the copper-clad laminate is not particularly limited with respect to its resin component and skeletal materials such as glass cloth and glass nonwoven fabric disposed in the resin.
  • the insulating resin layer can also contain filler particles.
  • the non-roughened copper foil with primer resin layer should be used in arranging the non-roughened copper foil in the outermost layer of the copper-clad laminate. Is preferred.
  • This non-roughened copper foil with a primer resin layer is a copper foil provided with an extremely thin primer resin layer for ensuring good adhesion to a resin base material on one side of a copper foil that has not been subjected to a roughening treatment. It is.
  • a non-roughened copper foil with a primer resin layer for example, “Multi Foil G: abbreviation MFG” manufactured by Mitsui Mining & Smelting Co., Ltd., “PF-E” manufactured by Hitachi Chemical Co., Ltd., or the like can be used.
  • the primer resin layer exhibits an adhesive force to both the copper foil and the insulating resin, and it is easy to ensure good adhesion between the non-roughened copper foil and the insulating resin layer. Become.
  • a circuit can be formed using a subtractive method or a semi-additive method.
  • the subtractive method first, a non-roughened copper foil in the outermost layer of the copper-clad laminate is etched with a copper etching solution to remove unnecessary copper foil portions, thereby forming a circuit.
  • an etching resist layer is formed on the surface of the outer copper foil, the etching resist pattern is formed by exposure and development, and then a circuit pattern is formed using a copper etching solution. Then, the etching resist is removed to form a printed wiring circuit.
  • a hole will be made in the position which forms the via hole of the copper clad laminated board which bonded the non-roughened copper foil.
  • electroless copper plating is performed, a plating resist layer is formed on the surface of the formed electroless copper plating layer, and the plating resist pattern is exposed and developed.
  • copper is electroplated to form a circuit pattern, the plating resist is removed, and then the non-roughened copper foil is etched away with a copper etchant, thereby forming a printed wiring board circuit.
  • the method for producing a printed wiring board according to the present invention is originally not particularly limited with respect to the type of copper etching solution such as copper chloride etching solution, iron chloride etching solution, sulfuric acid-hydrogen peroxide etching solution, Either use is possible. However, it is most preferably applied when a sulfuric acid-hydrogen peroxide etching solution is used as the copper etching solution.
  • the “sulfuric acid-hydrogen peroxide-based etchant” among copper etchants is an etchant generally used in the semi-additive method because it is suitable for forming a fine pitch circuit.
  • the method for manufacturing a printed wiring board according to the present invention is suitable for a method for manufacturing a printed wiring board assuming that a “sulfuric acid-hydrogen peroxide etching solution” is used as a copper etching solution when forming a circuit. It can be said.
  • the surface-treated metal component of the non-roughened copper foil remaining on the surface of the insulating resin exposed between the circuits is then removed.
  • This operation is referred to as “purification treatment”.
  • the degree of achievement of this purification treatment is determined by using an XPS analyzer (X-ray source: Al (K ⁇ ), acceleration voltage: 15 kV, beam diameter: 50 ⁇ m) for the surface-treated metal component of the non-roughened copper foil remaining on the surface of the insulating resin. Semi-quantitative analysis and judgment. The reason for using such a method is as follows.
  • the exposed insulating resin layer after purification is dissolved with concentrated sulfuric acid, etc., and the amount of remaining metal elements is confirmed using a highly sensitive direct analysis method such as ICP analysis or atomic absorption spectrometry.
  • ICP analysis or atomic absorption spectrometry Is ideal.
  • chemical analysis method is not a method that can be performed in the manufacturing process because the procedure is complicated and time-consuming.
  • XPS analyzer since it can measure simply, it can also be implemented in a manufacturing process.
  • the pressure cooker test (121 ° C., humidity 100%) can be performed without roughening the surface of the insulating resin exposed between the circuits. Even after being immersed in a solder bath at 260 ° C. for 60 seconds or more after 5 hours treatment at 2 atmospheres, no spot-like delamination with a diameter of 20 ⁇ m or more occurs between the insulating resin layer and the solder resist. This is because the effect can be obtained stably.
  • the surface of the insulating resin exposed between the circuits has a value of the surface roughness (ten-point average roughness Rzjis) of the exposed insulating resin surface before the purification treatment.
  • Rz (S) where Rz (C) is the value of the surface roughness (ten-point average roughness Rzjis) of the exposed insulating resin surface after the purification treatment, [Rz (C) / Rz (S)]
  • the value is preferably 1.2 or less.
  • Rz (C) and Rz (S) are values when “ten-point average roughness (Rzjis)” defined in JIS standard (JIS B 0601 2001 ) is measured using a laser non-contact type roughness meter.
  • the lower limit of detection is about 0.02 ⁇ m.
  • the surface roughness of the surface of the insulating resin exposed between the circuits may increase, and the degree of the increase in the surface roughness is represented by [Rz ( C) / Rz (S)].
  • the surface state changes to a level where the value of [Rz (C) / Rz (S)] exceeds 1.2, for example, when plasma treatment is employed, an undercut occurs in the insulating resin layer that supports the circuit. To do. As a result, the fine circuit is not preferable because the adhesion between the circuit and the insulating resin is lowered.
  • Rz (C) is 1.8 ⁇ m or less. If Rz (C) exceeds 1.8 ⁇ m, the above-described semi-additive process is not preferable because the overetching time must be set longer. In order to form a finer circuit, Rz (C) is more preferably 1.0 ⁇ m or less.
  • the “purification treatment” here is intended to remove the metal component remaining on the surface of the insulating resin exposed between the circuits. Therefore, it can be implemented by appropriately selecting from physical processing and chemical processing. Specifically, an ion beam method, an RF beam method, plasma etching, reactive ion etching, reactive ion beam etching, or other plasma treatment, a concentrated hydrochloric acid solution etching method, a desmear method using permanganic acid, or the like is appropriately selected. It is possible. However, it is necessary to select a method capable of uniformly processing the surface of the printed wiring board on which the fine circuit is formed without damaging the circuit.
  • the metal component remaining on the surface of the insulating resin exposed between the circuits is set to be below the detection limit by semi-quantitative analysis using an XPS analyzer, and the surface roughness after the purification treatment described above is used.
  • the etching amount is small, and the metal component remaining on the surface of the insulating resin exposed between the circuits may not be sufficiently removed, which is not preferable.
  • the input energy exceeds 120 J / cm 2 , an undercut occurs in the insulating resin layer that supports the circuit. As a result, the fine circuit is not preferable because the adhesion between the circuit and the insulating resin is lowered. In such a case, the surface roughness of the insulating resin layer is likely to vary, which is not preferable.
  • the gas partial pressure ratio [(CF 4 partial pressure) / (O 2 partial pressure)] of CF 4 and O 2 is preferably 0.2 to 5.0.
  • the value of the gas partial pressure ratio [(CF 4 partial pressure) / (O 2 partial pressure)] is less than 0.2, the function of reacting with a metal cannot be exhibited, which is not preferable.
  • the value of the gas partial pressure ratio between CF 4 and O 2 [(CF 4 partial pressure) / (O 2 partial pressure)] exceeds 5.0, the function of reacting with the metal reaches saturation, and O Since the partial pressure is low, the function of imparting hydrophilicity to the resin surface cannot be exhibited.
  • the atmospheric pressure in the etching chamber in the range of 5.0 Pa to 200 Pa.
  • the atmospheric pressure in the etching chamber is less than 5.0 Pa, the reaction rate is small and the etching rate is slow, and the productivity of the printed wiring board is extremely lowered, which is not preferable.
  • the atmospheric pressure in the etching chamber exceeds 200 Pa, it is not preferable because it becomes difficult to supply plasma.
  • the insulating resin residue generated by the plasma treatment remains on the surface of the insulating resin exposed between the circuits after the plasma etching, the insulating resin residue is removed by wet cleaning. Since the wet cleaning at this time is intended to remove the insulating resin residue generated by the plasma treatment, the ability to dissolve and remove the metal component remaining on the insulating resin surface is not essential.
  • a method that can obtain the optimum effect may be selected from the physical cleaning and chemical cleaning such as chemical treatment. Among them, for the wet cleaning in the present invention, it is preferable to select cleaning using “pickling solution containing a surfactant” and / or “copper microetching solution”. .
  • any one of a nonionic surfactant, a cationic surfactant, and an amphoteric surfactant can be selectively used. It is also possible to use a mixture of these.
  • the nonionic surfactant referred to here has a hydrophilic group that does not ionize in water, and is classified into an ester type, an ether type, an ester-ether type, and others. Specific examples include higher alcohols, alkylphenols, fatty acids, amines, alkylene diamines, fatty acid amides, sulfonamides, polyhydric alcohols, and glucooxide derivatives.
  • the cationic surfactant is a surfactant having a property that a portion having a hydrophobic group in a solution is ionized to a cation. More specifically, lauryl trimethyl ammonium salt, cetyl trimethyl ammonium salt, stearyl trimethyl ammonium salt, lauryl dimethyl ethyl ammonium salt, lauryl dimethyl ammonium betaine, stearyl dimethyl ammonium betaine, dimethyl-benzyl lauryl ammonium salt, octadecyl dimethyl benzyl ammonium salt Trimethylbenzylammonium salt, triethylbenzylammonium salt, laurylbiridinium salt, laurylimidazolinium salt, stearylamine acetate, laurylamine acetate, and the like.
  • the amphoteric surfactant when dissolved in water, shows the properties of an anionic surfactant in the alkaline region and the properties of a cationic surfactant in the acidic region.
  • the alkylcarboxybetaine type the alkylaminocarboxylic acid type, the alkylimidazoline type, and the like.
  • the surfactant described above is contained in a solution capable of cleaning the surface of the printed wiring board such as sulfuric acid, hydrochloric acid, sulfuric acid-hydrogen peroxide aqueous solution, and the concentration of the surfactant is 0.1 g / L to 20 g / L.
  • An acidic solution used for washing can be obtained by adding so as to have a concentration of. If the surfactant concentration at this time is less than 0.1 g / L, the effect of improving the wettability between the surface of the printed wiring board after the plasma treatment and the solution can be obtained by using any of the above-mentioned surfactants. I can't.
  • the cleaning time of the printed wiring board after the plasma treatment using this acidic solution is preferably 15 seconds to 7 minutes. When this cleaning time is less than 15 seconds, the effect of improving the wettability between the surface of the printed wiring board after the plasma treatment and the solution cannot be obtained. On the other hand, if the cleaning time exceeds 7 minutes, erosion of the circuit portion of the printed wiring board after the plasma treatment starts, which is not preferable.
  • the copper circuit is etched and roughened by a thickness in terms of mass of 0.5 ⁇ m or more. If the copper circuit is etched by 0.5 ⁇ m or more in terms of mass, the surface of the copper circuit exhibits a sufficient adhesive force with the solder resist layer and the insulating resin layer when multilayered. On the other hand, under such etching conditions, it is possible to remove contaminants remaining on the circuit surface, etching residues, residues by cleaning treatment of the insulating resin surface exposed between circuits, and the like. As a result, the adhesion between the solder resist layer and the circuit surface and the adhesion between the insulating resin component and the circuit surface are improved at the same time.
  • Manufacturing method of printed wiring board after formation of solder resist layer is necessary using the printed wiring board manufactured by the method provided with the above-described purification treatment. It is characterized in that a solder resist layer is formed on various locations. Thus, if the printed wiring board manufactured by the method provided with the purification treatment described above is used, the metal component remaining on the surface of the insulating resin exposed between the circuits is below the detection limit of the semi-quantitative analysis using the XPS apparatus.
  • the printed wiring board after the formation of the solder resist layer that has good adhesion between the solder resist layer and the insulating resin layer, the adhesion between the solder resist layer and the circuit surface, and the adhesion between the insulating resin component and the circuit surface. Obtainable.
  • the printed wiring board was prepared using a semi-additive method. The manufacturing procedure of this printed wiring board is common to both the example and the comparative example.
  • a plating resist layer is formed on the surface of the outer layer copper foil of the copper-clad laminate, and exposed and developed using an exposure film for resist pattern for forming a grid-like wiring having a line width / space width of 500 ⁇ m / 1200 ⁇ m, Copper electroplating was performed so that the total thickness was 15 ⁇ m. Then, after removing the plating resist, the exposed non-roughened copper foil was removed by etching using a sulfuric acid-hydrogen peroxide etching solution (CPE800: manufactured by Mitsubishi Gas Chemical Co., Ltd.) to form a circuit.
  • CPE800 sulfuric acid-hydrogen peroxide etching solution
  • Example 2 the non-roughened copper foil with the primer resin layer used in Example 1 was replaced with PF-E-3 manufactured by Hitachi Chemical Co., Ltd. instead of MFG-DMT3F manufactured by Mitsui Mining & Smelting Co., Ltd.
  • a printed wiring board sample was prepared in the same manner as in Example 1.
  • the above-described printed wiring board sample is subjected to purification treatment in the same manner as in Example 1 to produce a purification treatment sample, and the amount of residual metal components on the surface of the insulating resin layer exposed between the circuits of the purification treatment sample is analyzed semi-quantitatively. Further, the surface roughness (Rzjis) was measured. The occurrence of delamination was evaluated in the same manner as in Example 1. Table 1 below shows the surface state of the insulating resin layer exposed between the circuits, and Table 2 shows the evaluation results of delamination and the purification treatment conditions.
  • Example 3 the sample of the printed wiring board produced in Example 1 was used, and only the purification treatment conditions were changed.
  • a microetching liquid (CZ8101B: manufactured by MEC Co., Ltd.) was sprayed for 30 seconds, washed with water and dried to prepare a purification treatment sample.
  • FIG. 3 shows a scanning electron microscope image of the surface of the insulating resin layer exposed between the circuits immediately after the circuit formation
  • FIG. 2 shows a scanning electron microscope image of the surface of the insulating resin layer exposed between the circuits immediately after the plasma etching
  • FIG. 1 shows a scanning electron microscope observation image of the surface of the insulating resin layer exposed between the circuits immediately after microetching.
  • Example 1 Thereafter, in the same manner as in Example 1, the amount of residual metal components on the surface of the insulating resin layer exposed between the circuits of the purification sample was semi-quantitatively analyzed, and the surface roughness (Rzjis) was further measured. The occurrence of delamination was evaluated in the same manner as in Example 1.
  • Table 1 below shows the surface state of the insulating resin layer exposed between the circuits of the purification treatment sample
  • Table 2 below shows the evaluation results of delamination and the purification treatment conditions.
  • Example 3 the sample of the printed wiring board produced in Example 1 was used, and only the purification treatment conditions were changed.
  • the above-mentioned printed wiring board sample was immersed in a potassium permanganate (KMnO 4 ) solution (Rohm and Haas Electronic Materials Co., Ltd.) having a liquid temperature of 80 ° C. for 1 minute, and then the liquid temperature was 45 ° C.
  • the sample was immersed in a neutralizing solution (made by Rohm and Haas Electronic Materials Co., Ltd.) for 5 minutes, washed with water and dried to prepare a purification sample.
  • Example 1 Thereafter, in the same manner as in Example 1, the amount of residual metal components on the surface of the insulating resin layer exposed between the circuits of the purification sample was semi-quantitatively analyzed, and the surface roughness (Rzjis) was further measured. The occurrence of delamination was evaluated in the same manner as in Example 1.
  • Table 1 below shows the surface state of the insulating resin layer exposed between the circuits of the purification treatment sample
  • Table 2 below shows the evaluation results of delamination and the purification treatment conditions.
  • Comparative Example 1 In Comparative Example 1, the purification treatment performed in Example 1 was not performed. The occurrence of delamination was evaluated in the same manner as in Example 1.
  • FIG. 4 shows a surface observation image obtained by observing the generated delamination from the solder resist side using transmitted light. Table 1 below shows the surface state of the insulating resin layer exposed between the circuits, and Table 2 shows the evaluation results of delamination and the purification treatment conditions.
  • Comparative Example 2 In Comparative Example 2, a purification sample was prepared by changing the purification treatment time of 60 minutes performed in Example 1 to 10 minutes. Thereafter, in the same manner as in Example 1, the amount of residual metal components on the surface of the insulating resin layer exposed between the circuits of the purification treatment sample was semi-quantitatively analyzed, and the surface roughness was further measured. The occurrence of delamination was evaluated in the same manner as in Example 1.
  • FIG. 5 shows a surface observation image obtained by observing the generated delamination from the solder resist layer side using transmitted light. Table 1 below shows the surface state of the insulating resin layer exposed between the circuits, and Table 2 shows the evaluation results of delamination and the purification treatment conditions.
  • Comparative Example 3 In Comparative Example 3, a purification treatment sample in which microetching was omitted from the purification treatment performed in Example 3 was produced. Thereafter, in the same manner as in Example 1, the amount of residual metal components on the surface of the insulating resin layer exposed between the circuits of the purification treatment sample was semi-quantitatively analyzed, and the surface roughness was further measured. The occurrence of delamination was evaluated in the same manner as in Example 1. Table 1 below shows the surface state of the insulating resin layer exposed between the circuits, and Table 2 shows the evaluation results of delamination and the purification treatment conditions.
  • Comparative Example 4 In Comparative Example 4, a purification treatment sample in which plasma etching was omitted from the purification treatment performed in Example 3 was produced. Thereafter, in the same manner as in Example 1, the amount of residual metal components on the surface of the insulating resin layer exposed between the circuits of the purification treatment sample was semi-quantitatively analyzed, and the surface roughness was further measured. The occurrence of delamination was evaluated in the same manner as in Example 1. The surface state of the insulating resin layer exposed between the circuits is shown in Table 1 below, and the evaluation results of delamination and the purification treatment conditions are shown in Table 2 below.
  • Comparative Example 3 in which the amount of residual metal component after purification treatment is 5.4 atom%, spot-like delamination is observed at a 300 ⁇ m diameter level, and in Comparative Example 4 in which the amount of residual metal component after purification treatment is 8.0 atom%.
  • Comparative Example 1 where the amount of residual metal component not subjected to purification treatment is 8.4 atom%, spot-like delamination exceeding 1.0 mm is observed. That is, the larger the amount of residual metal components detected on the surface of the insulating resin after the purification treatment, the larger the delamination spot diameter tends to be seen.
  • the adhesion between the “solder resist” and the “insulating resin layer surface exposed between the circuits” is influenced by the metal component remaining on the surface of the insulating resin layer exposed between the circuits. Have received a lot.
  • the microscopic shape changes within a range where the value of [Rz (C) / Rz (S)] is less than 1.2. It can be said that there is almost no influence on the adhesion of.
  • the method for producing a printed wiring board according to the present invention is to purify a printed wiring board with a metal element remaining on the exposed surface of the insulating resin, and to determine the amount of the remaining metal component to be below the limit of quantification by semi-quantitative analysis using an XPS apparatus. By doing so, it is possible to obtain good adhesion to a “solder resist layer” that is subsequently provided on the surface of the printed wiring board without roughening the surface of the insulating resin layer. Therefore, it is possible to obtain a good adhesion with the “resin layer that is laminated afterwards when multilayered” that is provided on the surface of the printed wiring board, and to provide a high-quality printed wiring board. To do.

Abstract

The objective of the present invention is to provide a method of manufacturing a printed circuit board having a good adhesion characteristic between faces of an insulation resin layer and a solder resist layer, even when the surface roughness of the insulation resin layer exposed between circuits is not so rough. In order to achieve this objective, a method of manufacturing a printed circuit board using a copper-clad laminate having non-roughened copper foils pasted together is adopted. The method of manufacturing a printed circuit board is characterized in forming circuits by etching the non-roughened copper foils with copper-etching liquid, then implementing cleanup processing on insulation resin surfaces exposed between the circuits, and characterized, upon conducting a semi-quantitative analysis of surface-treatment metal components of the non-roughened copper foils remaining on the insulation resin surfaces that had cleanup processing implemented thereupon, with an XPS analysis apparatus (X-ray source: A1(Kα), acceleration voltage: 15 kV, beam diameter: 50 μm), in making the amount of each of the surface-treatment metal components to be not more than the detection limit.

Description

プリント配線板の製造方法及びそのプリント配線板の製造方法を用いて得られたプリント配線板Printed wiring board manufacturing method and printed wiring board obtained by using the printed wiring board manufacturing method
　本件発明は、プリント配線板の製造方法及びそのプリント配線板の製造方法を用いて得られたプリント配線板に関する。特に、ソルダーレジスト層と回路間に露出した絶縁樹脂層表面との密着性に優れたプリント配線板に関する。 The present invention relates to a printed wiring board manufacturing method and a printed wiring board obtained by using the printed wiring board manufacturing method. In particular, the present invention relates to a printed wiring board having excellent adhesion between a solder resist layer and an insulating resin layer surface exposed between circuits.
　従来、銅張積層板の製造に用いる銅箔は、当該銅箔の絶縁樹脂層との張り合わせ面に粗化処理を施し、この粗化処理の凹凸形状が絶縁樹脂層の表面に食い込んだ状態となるようにして、物理的なアンカー効果を得て、絶縁樹脂層を張り合わせていた。従って、銅張積層板をエッチング法で回路形成して銅箔層を除去した部位では、粗化処理形状が転写された凹凸のある絶縁樹脂層が露出していた。このような凹凸のある絶縁樹脂層の場合には、この表面に事後的に設けられるソルダーレジスト層、多層化する際に事後的に積層される樹脂層との密着性も良好なものであった。 Conventionally, a copper foil used for the production of a copper clad laminate has been subjected to a roughening process on the bonding surface of the copper foil with the insulating resin layer, and the uneven shape of the roughening process has been intruded into the surface of the insulating resin layer. In this way, a physical anchor effect was obtained, and the insulating resin layer was laminated. Therefore, at the site where the copper clad laminate was formed by etching and the copper foil layer was removed, an uneven insulating resin layer to which the roughened shape was transferred was exposed. In the case of such an uneven insulating resin layer, the adhesiveness with the solder resist layer subsequently provided on this surface and the resin layer subsequently laminated when multilayered was also good. .
　ところが、近年、主要な携帯用電子機器である携帯電話、モバイルコンピューター、携帯型音楽プレーヤー、デジタルカメラ等は軽薄短小化と同時に多機能化が要求されるようになり、内蔵するプリント配線板には軽薄短小化と同時に、配線密度を向上させ多機能化に対応可能な回路形成が求められている。このようなプリント配線板を製造するにあたっては、銅張積層板が備える銅箔を極力薄くし、且つ、銅箔と絶縁層との接着面を平坦にすることによって良好なエッチングファクターを備える微細配線を形成することが要求され、無粗化銅箔を使用することも多くなってきている。ここで言う無粗化銅箔は、銅箔の絶縁樹脂層との張り合わせ面に、粗化処理を施していない。従って、絶縁樹脂層の表面に食い込んだ状態となる凹凸形状の粗化処理が形成されず、銅箔と絶縁樹脂層との間に物理的なアンカー効果を得ることができない。 However, in recent years, mobile phones, mobile computers, portable music players, digital cameras, etc., which are major portable electronic devices, have been required to be multi-functional as well as light and thin. At the same time as lightening, thinning, and miniaturization, it is required to form a circuit capable of improving wiring density and supporting multi-functionality. In manufacturing such a printed wiring board, a fine wiring having a good etching factor by making the copper foil provided for the copper-clad laminate as thin as possible and flattening the bonding surface between the copper foil and the insulating layer. And the use of non-roughened copper foil is increasing. The roughening-free copper foil said here does not perform the roughening process to the bonding surface with the insulating resin layer of copper foil. Therefore, the roughening process of the uneven | corrugated shape used as the state which digs into the surface of the insulating resin layer is not formed, and a physical anchor effect cannot be obtained between the copper foil and the insulating resin layer.
　その結果、無粗化銅箔を張り合わせた銅張積層板を用いてプリント配線板を製造すると、エッチング法で回路形成して銅箔層を除去した部位は、凹凸形状の無い平坦な絶縁樹脂層が露出しているため、アンカー効果が発揮されず、その外層に形成するソルダーレジスト層や絶縁樹脂層との密着性が劣るようになる。従って、吸湿した状態でフュージング等の加熱工程を施すと、ソルダーレジスト層が絶縁樹脂層から剥離する現象（デラミネーション）が発生するという不具合が生ずる場合があった。デラミネーションが発生したプリント配線板の断面を図６に示す。図６では、絶縁樹脂基材ＢＭとソルダーレジストＰＳＲの間に、銅回路ＣＣの直近まで空間（デラミネーションＤＬ）が存在していることが、明らかに観察できる。 As a result, when a printed wiring board is manufactured using a copper clad laminate laminated with non-roughened copper foil, a portion where the copper foil layer is removed by forming a circuit by an etching method is a flat insulating resin layer having no uneven shape. Is exposed, the anchor effect is not exhibited, and the adhesion to the solder resist layer or insulating resin layer formed on the outer layer becomes poor. Therefore, when a heating process such as fusing is performed in a moisture-absorbing state, there may be a problem that a phenomenon (delamination) occurs in which the solder resist layer is peeled off from the insulating resin layer. FIG. 6 shows a cross section of the printed wiring board where delamination has occurred. In FIG. 6, it can be clearly observed that a space (delamination DL) exists between the insulating resin base material BM and the solder resist PSR up to the immediate vicinity of the copper circuit CC.
　また、このデラミネーションが発生した部位では、回路への通電による表層マイグレーションが発生しやすくなり、プリント配線板としての長期信頼性の保証が困難になる。このようなソルダーレジスト層と絶縁樹脂層との吸湿・耐熱密着性を向上させる技術として、以下の特許文献１及び特許文献２に開示の技術がある。 Also, at the site where this delamination occurs, surface layer migration is likely to occur due to energization of the circuit, making it difficult to guarantee long-term reliability as a printed wiring board. As techniques for improving the moisture absorption and heat-resistant adhesion between the solder resist layer and the insulating resin layer, there are techniques disclosed in Patent Document 1 and Patent Document 2 below.
　特許文献１には、微細配線形成や電気特性、製造コストの上で有利であって、尚且つ信頼性が高いプリント配線板の製造方法を提供することを目的として、表面の十点平均粗さ（Ｒｚ）が２．０μｍ以下の金属箔を用いるプリント配線板の製造方法において、ソルダーレジストを塗布又は積層する際の前処理として、ソルダーレジスト層との接着界面となる樹脂表面に粗化処理を施す工程を有するプリント配線板の製造方法を開示している。 Patent Document 1 discloses a method for producing a printed wiring board that is advantageous in terms of fine wiring formation, electrical characteristics, and manufacturing cost, and has high reliability. In the method of manufacturing a printed wiring board using a metal foil having a (Rz) of 2.0 μm or less, as a pretreatment when applying or laminating a solder resist, a roughening treatment is performed on the resin surface serving as an adhesive interface with the solder resist layer. The manufacturing method of the printed wiring board which has the process to give is disclosed.
　そして、この特許文献１の実施例には、電解銅箔（Ｆ０－ＷＳ－１８、古河サーキットフォイル株式会社製、１８μｍ厚、Ｒｚ＝１．８μｍ）のシランカップリング剤処理された被接着面に樹脂組成物を厚みが３．０μｍになるように塗工し、残溶剤が５重量％以下になるように１６０℃で１０分程度の乾燥を行った樹脂付銅箔を、４枚重ねした日立化成工業株式会社製ガラス布絶縁層高Ｔｇエポキシ樹脂プリプレグＧＥＡ－６７９Ｆ（厚み０．１ｍｍ）の上下に配置し、１８０℃、２．５ＭＰａの条件で１時間プレス成形して製造した銅張積層板を用い、不要な部分の銅箔を塩化鉄系エッチング液等により除去したプリント配線板を、３％水酸化ナトリウム＋６％過マンガン酸カリウム水溶液で処理して化学粗化した絶縁樹脂基板上に日立化成工業株式会社製ＳＲ－７２００Ｇ（ソルダーレジスト）を積層し、１２１℃、湿度１００％、２気圧の条件で２時間処理後、２６０℃の半田浴に２０秒浸漬、又は、１２１℃、湿度１００％、２気圧の条件で１９６時間処理してもソルダーレジストに膨れ等が発生しないとの記載がある。 In the example of Patent Document 1, an adhesive copper foil (F0-WS-18, manufactured by Furukawa Circuit Foil Co., Ltd., 18 μm thick, Rz = 1.8 μm) treated surface treated with a silane coupling agent is used. Hitachi, in which four resin-coated copper foils were applied by coating the resin composition to a thickness of 3.0 μm and dried at 160 ° C. for about 10 minutes so that the residual solvent was 5% by weight or less. Copper-clad laminate produced by placing glass cloth insulation layer high Tg epoxy resin prepreg GEA-679F (thickness 0.1 mm) made by Kasei Kogyo Co., Ltd. and press-molding at 180 ° C. and 2.5 MPa for 1 hour. The printed wiring board from which unnecessary copper foil was removed with an iron chloride-based etchant was treated with 3% sodium hydroxide + 6% potassium permanganate aqueous solution and chemically roughened on the insulating resin substrate. SR-7200G (solder resist) manufactured by Seiko Kogyo Co., Ltd. is laminated and treated for 2 hours under the conditions of 121 ° C., 100% humidity and 2 atm. There is a description that no blistering or the like occurs in the solder resist even after treatment for 196 hours under the condition of 2 atm.
　また、特許文献２には、絶縁層と密着する面の表面粗さの小さい金属箔を使用した場合でも、金属箔除去後の絶縁層上のソルダーレジストの密着を確保することができ、ＰＣＴに対する信頼性に優れ、且つ微細配線を有し、高周波信号の伝送損失の少ない回路基板を提供することを目的として、絶縁層上に金属箔を張り合わせた金属箔付積層板の金属箔を除去して形成した導体パターンを有する回路基板において、金属箔を除去した後の露出した絶縁層表面に粗面形状を形成した回路基板及びその製造方法を開示している。 Further, in Patent Document 2, even when a metal foil having a small surface roughness on the surface to be in close contact with the insulating layer can be used, it is possible to ensure the adhesion of the solder resist on the insulating layer after removing the metal foil. For the purpose of providing a circuit board with excellent reliability, fine wiring, and low transmission loss of high-frequency signals, the metal foil of the laminated sheet with metal foil bonded to the insulating layer is removed. In the circuit board having the formed conductor pattern, a circuit board in which a rough surface shape is formed on the exposed insulating layer surface after removing the metal foil and a method for manufacturing the circuit board are disclosed.
　そして、この特許文献２の実施例には、黒化処理を施した内層コア材の両面に、絶縁層として日立化成工業株式会社製ＧＥＡ－６７９ＦＧを介して日立化成工業株式会社製プロファイルフリー銅箔ＰＦ－Ｅ－３をホットプレスを用いて張り合わせ、セミアディティブ法により導体パターンを形成したプリント配線板に、プラズマガスとして酸素を用い、出力１０００Ｗ、雰囲気圧力１００Ｐａで５分間酸素プラズマ処理を実施した後、化学エッチング処理（メック株式会社製、ＣＺ－８１００）で導体パターン表面の粗化処理を行い、次に、ドライフィルムタイプのソルダーレジストである太陽インキ製造株式会社製ＰＦＲ－８００ＡＵＳ４０２を真空ラミネートして作製したプリント配線板を、プレッシャークッカーテスト（ＰＣＴ：１２１℃、１００％ＲＨ、２ａｔｍで、９６時間連続して保持）後、実体顕微鏡で観察を行い、絶縁層とソルダーレジストとの間には剥離が無かったとの記載がある。 In the example of Patent Document 2, a profile-free copper foil manufactured by Hitachi Chemical Co., Ltd. is provided on both sides of the inner layer core material subjected to blackening treatment via GEA-679FG manufactured by Hitachi Chemical Co., Ltd. as an insulating layer. After PF-E-3 was bonded using a hot press, oxygen plasma treatment was performed on a printed wiring board on which a conductor pattern was formed by a semi-additive method using oxygen as a plasma gas at an output of 1000 W and an atmospheric pressure of 100 Pa for 5 minutes. Then, the surface of the conductor pattern was roughened by chemical etching (MZ Co., Ltd., CZ-8100), and then PFR-800AUS402 made by Taiyo Ink Manufacturing Co., Ltd., which is a dry film type solder resist, was vacuum laminated. The produced printed wiring board was subjected to a pressure cooker test (PCT: 1 1 ° C., 100% RH, at 2 atm, after continuously maintained 96 hours), the observation with a stereoscopic microscope, between the insulating layer and the solder resist is described with peeling was not.
　即ち、特許文献１と特許文献２とに記載された技術は、表面粗さの小さな金属箔を用いた金属箔張り積層板の金属箔をエッチングし、露出した絶縁層の表面を加工することによって、粗化処理が行われている銅箔を用いた場合の凹凸を備えた絶縁樹脂層の露出面と同等レベルの表面粗さを備える状態を得ることで、絶縁樹脂層とソルダーレジストとの間の良好な吸湿・耐熱密着性を確保している。 That is, the techniques described in Patent Document 1 and Patent Document 2 are obtained by etching a metal foil of a metal foil-clad laminate using a metal foil having a small surface roughness and processing the surface of the exposed insulating layer. By obtaining a state having a surface roughness equivalent to the exposed surface of the insulating resin layer with unevenness when using a copper foil that has been roughened, between the insulating resin layer and the solder resist Ensures good moisture absorption and heat-resistant adhesion.
　確かに、特許文献１及び特許文献２に開示の発明のように、表面粗さの小さい銅箔を用いた銅張積層板の銅箔層をエッチング加工し、回路形状を形成し、回路間に露出した絶縁樹脂層の表面を加工して、粗化処理が行われている銅箔を用いた場合の凹凸を備えた絶縁樹脂層の露出面と同等レベルの表面粗さを備える状態を得ても、特許文献１に記載されたプレッシャークッカーテスト（１２１℃、湿度１００％、２気圧の条件で２時間処理）後、２６０℃の半田バスに２０秒間浸漬しても、絶縁層とソルダーレジスト層との間に、２０μｍ径以上のスポット状のデラミネーションの発生はみられない。 Certainly, like the inventions disclosed in Patent Document 1 and Patent Document 2, the copper foil layer of the copper clad laminate using the copper foil having a small surface roughness is etched to form a circuit shape, and between the circuits. Process the surface of the exposed insulating resin layer to obtain a state with a surface roughness equivalent to the exposed surface of the insulating resin layer with unevenness when using a copper foil that has been roughened. Even after being immersed in a solder bath at 260 ° C. for 20 seconds after the pressure cooker test (treated at 121 ° C., humidity 100%, 2 atm) described in Patent Document 1, the insulating layer and the solder resist layer In the meantime, no spot-like delamination with a diameter of 20 μm or more is observed.
特開２００８－１６７９４号公報JP 2008-16794 A 特開２０１０－１０３１５３号公報JP 2010-103153 A
　しかしながら、特許文献１及び特許文献２に記載のように、露出した滑らかな絶縁層の表面を加工することによって、粗化処理が行われている銅箔を用いた場合の凹凸を備えた絶縁樹脂層の露出面と同等レベルの表面粗さまでの加工を行うことは、プリント配線板の製造コストの上昇を招き、同一面内での均一な粗化処理を行うという観点でも製造条件の管理コストが増加するため好ましくない。 However, as described in Patent Document 1 and Patent Document 2, an insulating resin provided with unevenness when using a copper foil that has been roughened by processing the surface of the exposed smooth insulating layer. Processing to the same level of surface roughness as the exposed surface of the layer leads to an increase in the manufacturing cost of the printed wiring board, and the management cost of manufacturing conditions is also reduced from the viewpoint of performing uniform roughening treatment in the same plane. Since it increases, it is not preferable.
　よって、市場では、プリント配線板の製造コスト及び管理コストを削減するため、回路間に露出した絶縁樹脂層の表面を粗化すること無く、平坦なままで、特許文献１及び特許文献２に記載した発明と同等の絶縁樹脂層とソルダーレジスト層との良好な密着性を備えるプリント配線板の安定供給が望まれていた。 Therefore, in the market, in order to reduce the manufacturing cost and the management cost of the printed wiring board, the surface of the insulating resin layer exposed between the circuits is not roughened and is described in Patent Document 1 and Patent Document 2 without being roughened. Therefore, there has been a demand for stable supply of a printed wiring board having good adhesion between an insulating resin layer and a solder resist layer equivalent to those of the invention.
　そこで、鋭意研究の結果、本件発明者等は、銅箔を銅エッチング液でエッチングした後の回路間に露出した絶縁樹脂層表面に残留する銅箔の防錆成分に着目し、ソルダーレジスト層と絶縁樹脂表面との吸湿・耐熱密着性を安定化させる方法に想到した。 Therefore, as a result of earnest research, the present inventors have focused on the anticorrosive component of the copper foil remaining on the surface of the insulating resin layer exposed between the circuits after etching the copper foil with a copper etching solution, and the solder resist layer and We have come up with a method to stabilize moisture absorption and heat-resistant adhesion to the surface of insulating resin.
本件発明に係るプリント配線板の製造方法：　本件発明に係るプリント配線板の製造方法は、無粗化銅箔を張り合わせた銅張積層板を用いてプリント配線板を製造する方法であって、無粗化銅箔を銅エッチング液でエッチングして回路形成した後に、回路間に露出した絶縁樹脂表面に浄化処理を施し、浄化処理を施した当該絶縁樹脂表面に残留する当該無粗化銅箔の表面処理金属成分を、ＸＰＳ分析装置（Ｘ線源：Ａｌ（Ｋα）、加速電圧：１５ｋＶ、ビーム径：５０μｍ）で半定量分析したときに各表面処理金属成分を検出限界以下とすることを特徴とするものである。 Manufacturing method of printed wiring board according to the present invention: The manufacturing method of a printed wiring board according to the present invention is a method of manufacturing a printed wiring board using a copper-clad laminate in which a non-roughened copper foil is laminated, After forming the circuit by etching the roughened copper foil with a copper etchant, the surface of the insulating resin exposed between the circuits is subjected to a purification treatment, and the non-roughened copper foil remaining on the surface of the insulating resin subjected to the purification treatment When surface-treated metal components are semi-quantitatively analyzed with an XPS analyzer (X-ray source: Al (Kα), acceleration voltage: 15 kV, beam diameter: 50 μm), each surface-treated metal component is made to be below the detection limit. It is what.
本件発明に係るソルダーレジスト層形成後のプリント配線板の製造方法：　本件発明に係るソルダーレジスト層形成後のプリント配線板の製造方法は、上述のプリント配線板の製造方法に言う浄化処理を行った後に、ソルダーレジスト層を形成することを特徴とするものである。 Method for producing printed wiring board after formation of solder resist layer according to the present invention: The method for producing a printed wiring board after formation of the solder resist layer according to the present invention has been subjected to a purification treatment referred to in the method for producing a printed wiring board described above. A solder resist layer is formed later.
本件発明に係るプリント配線板：　本件発明に係るプリント配線板は、本件発明に係るプリント配線板の製造方法で得られたソルダーレジスト層形成後のプリント配線板であって、１２１℃、湿度１００％、２気圧の条件で５時間処理後、２６０℃の半田浴に６０秒浸漬したときに、ソルダーレジスト層と絶縁樹脂表面との間に、直径２０μｍ以上のスポット状のデラミネーションの発生が無いことを特徴とする。 Printed wiring board according to the present invention: The printed wiring board according to the present invention is a printed wiring board after formation of a solder resist layer obtained by the method for manufacturing a printed wiring board according to the present invention, and is 121 ° C. and humidity 100%. No spot delamination with a diameter of 20 μm or more occurs between the solder resist layer and the surface of the insulating resin when immersed in a solder bath at 260 ° C. for 60 seconds after treatment at 2 atm for 5 hours. It is characterized by.
　本件発明に係るプリント配線板の製造方法を用いることで、回路エッチングを行った後に、回路間に露出した絶縁樹脂表面を粗化せずとも、プレッシャークッカーテスト（１２１℃、湿度１００％、２気圧の条件で５時間処理）の後、２６０℃の半田バスに６０秒間以上浸漬しても、２０μｍ径以上のスポット状のデラミネーションが発生しないプリント配線板の安定供給が可能となる。 By using the method for manufacturing a printed wiring board according to the present invention, after performing circuit etching, the pressure cooker test (121 ° C., humidity 100%, 2 atm, without roughening the insulating resin surface exposed between the circuits) After the treatment for 5 hours under the above conditions), even if immersed in a solder bath at 260 ° C. for 60 seconds or more, it is possible to stably supply a printed wiring board in which spot-like delamination having a diameter of 20 μm or more does not occur.
　この製造方法で得られたプリント配線板は、回路間に露出した絶縁樹脂層の表面が平坦でありながら、極めて過酷なプレッシャークッカーテスト後でも、実用上問題となる絶縁樹脂層とソルダーレジストとの間での２０μｍ径以上のスポット状のデラミネーションが発生しないと言う特性を示し、耐マイグレーション性能にも優れるため、長期の使用安定性に優れた高品質の製品となる。 The printed wiring board obtained by this manufacturing method has a flat surface between the insulating resin layers exposed between the circuits, and even after the extremely severe pressure cooker test, the insulating resin layer and the solder resist, which are practically problematic, are used. It exhibits the characteristic that spot-like delamination with a diameter of 20 μm or more does not occur between them, and is excellent in migration resistance. Therefore, it becomes a high-quality product excellent in long-term use stability.
実施例３におけるマイクロエッチング直後のプリント配線板の回路間に露出した絶縁樹脂層表面の走査型電子顕微鏡観察像である。It is a scanning electron microscope observation image of the surface of the insulating resin layer exposed between the circuits of the printed wiring board immediately after microetching in Example 3. 実施例３におけるプラズマエッチング直後のプリント配線板の回路間に露出した絶縁樹脂層表面の走査型電子顕微鏡観察像である。It is a scanning electron microscope observation image of the surface of the insulating resin layer exposed between the circuits of the printed wiring board immediately after plasma etching in Example 3. 実施例３における回路形成直後のプリント配線板の回路間に露出した絶縁樹脂層表面の走査型電子顕微鏡観察像である。It is a scanning electron microscope observation image of the insulating resin layer surface exposed between the circuits of the printed wiring board in Example 3 immediately after circuit formation. 比較例１で発生したデラミネーションを、透過光を用いてソルダーレジスト層側から観察した表面観察像である。It is the surface observation image which observed the delamination generate | occur | produced in the comparative example 1 from the soldering resist layer side using the transmitted light. 比較例２で発生したデラミネーションを、透過光を用いてソルダーレジスト層側から観察した表面観察像である。It is the surface observation image which observed the delamination generate | occur | produced in the comparative example 2 from the soldering resist layer side using the transmitted light. デラミネーションが発生したプリント配線板の断面観察像である。It is a cross-sectional observation image of the printed wiring board which delamination generate | occur | produced.
本件発明に係るプリント配線板の製造形態：　本件発明に係るプリント配線板の製造方法は、無粗化銅箔を張り合わせた銅張積層板を用いてプリント配線板を製造する方法であって、無粗化銅箔を銅エッチング液でエッチングして回路形成した後に、回路間に露出した絶縁樹脂表面に浄化処理を施し、浄化処理を施した当該絶縁樹脂表面に残留する当該無粗化銅箔の表面処理金属成分を、ＸＰＳ分析装置（Ｘ線源：Ａｌ（Ｋα）、加速電圧：１５ｋＶ、ビーム径：５０μｍ）で半定量分析したときに各表面処理金属成分を検出限界以下とすることを特徴とするものである。即ち、本件発明に係るプリント配線板の特徴は、エッチングして回路を形成した後に、回路間に露出した絶縁樹脂表面に残留する無粗化銅箔の表面処理金属成分を可能な限り除去する点にある。回路間に露出した絶縁樹脂層表面に、当該金属成分が残留すると、ソルダーレジスト層と絶縁樹脂層との間の密着性に悪影響を与え、通電時の耐マイグレーション性を劣化させるからである。更に、このように回路間に露出した絶縁樹脂層表面の残留金属成分を除去することで、従来の手法が採用する当該絶縁樹脂表面の粗化レベルにまで過剰な粗化処理をしなくても、その表面に設けるソルダーレジスト層や外層に設ける絶縁樹脂層との間の吸湿・耐熱密着性を良好に保つことができる。なお、本件発明における吸湿・耐熱密着性は、所定のプレッシャークッカーテストと半田耐熱試験とを組み合わせて判断したものである。 Manufacturing method of printed wiring board according to the present invention: A manufacturing method of a printed wiring board according to the present invention is a method of manufacturing a printed wiring board using a copper-clad laminate in which a non-roughened copper foil is laminated, After forming the circuit by etching the roughened copper foil with a copper etchant, the surface of the insulating resin exposed between the circuits is subjected to a purification treatment, and the non-roughened copper foil remaining on the surface of the insulating resin subjected to the purification treatment When surface-treated metal components are semi-quantitatively analyzed with an XPS analyzer (X-ray source: Al (Kα), acceleration voltage: 15 kV, beam diameter: 50 μm), each surface-treated metal component is made to be below the detection limit. It is what. That is, the feature of the printed wiring board according to the present invention is that the surface-treated metal component of the non-roughened copper foil remaining on the surface of the insulating resin exposed between the circuits is removed as much as possible after the circuit is formed by etching. It is in. This is because if the metal component remains on the surface of the insulating resin layer exposed between the circuits, the adhesion between the solder resist layer and the insulating resin layer is adversely affected and the migration resistance during energization is deteriorated. Furthermore, by removing the residual metal component on the surface of the insulating resin layer exposed between the circuits in this way, it is possible to eliminate the excessive roughening treatment up to the roughening level of the surface of the insulating resin employed by the conventional method. The moisture absorption and heat resistant adhesion between the solder resist layer provided on the surface and the insulating resin layer provided on the outer layer can be kept good. The moisture absorption / heat resistance adhesion in the present invention is determined by combining a predetermined pressure cooker test and a solder heat resistance test.
　最初に、本件発明において用いる「無粗化銅箔を張り合わせた銅張積層板」に関して述べる。ここで言う「無粗化銅箔を張り合わせた銅張積層板」とは、最外層の銅箔として、無粗化銅箔を使用している銅張積層板の総称であり、所謂、片面銅張積層板、両面銅張積層板、内層コア基材を内包した多層銅張積層板の全ての概念を含むものである。また、無粗化銅箔としては、電解銅箔、圧延銅箔及びキャリア付極薄銅箔の使用が可能で、厚さに関しても特段の限定は無い。 First, the “copper-clad laminate laminated with non-roughened copper foil” used in the present invention will be described. The term “copper-clad laminate laminated with non-roughened copper foil” as used herein is a general term for copper-clad laminates that use non-roughened copper foil as the outermost copper foil, so-called single-sided copper It includes all the concepts of a laminated laminate, a double-sided copper-clad laminate, and a multilayer copper-clad laminate including an inner layer core substrate. Further, as the non-roughened copper foil, an electrolytic copper foil, a rolled copper foil, and an ultrathin copper foil with a carrier can be used, and the thickness is not particularly limited.
　また、当該銅箔の表面処理に関しても特段の限定は無く、防錆成分としてみれば、ニッケル－亜鉛合金、ニッケル－コバルト合金、ニッケル-亜鉛－モリブデン合金、ニッケル-コバルト－モリブデン合金、亜鉛-スズ合金、クロメート処理等の各種合金を用いることも可能である。更に、銅箔の絶縁樹脂層との接触面には、エポキシ系シランカップリング剤、アミノ系シランカップリング剤、メルカプト系シランカップリング剤等のシランカップリング剤処理層を設けることも、密着性向上の観点から好ましい。 The surface treatment of the copper foil is not particularly limited, and as a rust preventive component, nickel-zinc alloy, nickel-cobalt alloy, nickel-zinc-molybdenum alloy, nickel-cobalt-molybdenum alloy, zinc-tin Various alloys such as alloys and chromate treatment can also be used. Furthermore, the contact surface of the copper foil with the insulating resin layer may be provided with a silane coupling agent treatment layer such as an epoxy silane coupling agent, an amino silane coupling agent, or a mercapto silane coupling agent. It is preferable from the viewpoint of improvement.
　そして、銅張積層板の製造に用いる絶縁樹脂層は、その樹脂成分、樹脂内に配置するガラスクロスやガラス不織布等の骨格材に関しても、特段の限定は無い。また、当該絶縁樹脂層は、フィラー粒子を含有することも可能である。 The insulating resin layer used for the production of the copper-clad laminate is not particularly limited with respect to its resin component and skeletal materials such as glass cloth and glass nonwoven fabric disposed in the resin. The insulating resin layer can also contain filler particles.
　しかし、無粗化銅箔と絶縁樹脂層との密着性を考慮すると、当該銅張積層板の最外層に無粗化銅箔を配するにあたり、プライマー樹脂層付無粗化銅箔を用いることが好ましい。このプライマー樹脂層付無粗化銅箔とは、粗化処理の施されていない銅箔の片面に樹脂基材との良好な密着性を確保するための極薄プライマー樹脂層を設けた銅箔である。このようなプライマー樹脂層付無粗化銅箔としては、例えば、三井金属鉱業株式会社製「Ｍｕｌｔｉ　Ｆｏｉｌ　Ｇ：略称ＭＦＧ」や、日立化成工業株式会社製「ＰＦ－Ｅ」等を用いることができる。このときのプライマー樹脂層は、銅箔と絶縁樹脂との双方に対して接着力を発揮するものであり、無粗化銅箔と絶縁樹脂層との良好な密着性を確保することが容易となる。 However, in consideration of the adhesion between the non-roughened copper foil and the insulating resin layer, the non-roughened copper foil with primer resin layer should be used in arranging the non-roughened copper foil in the outermost layer of the copper-clad laminate. Is preferred. This non-roughened copper foil with a primer resin layer is a copper foil provided with an extremely thin primer resin layer for ensuring good adhesion to a resin base material on one side of a copper foil that has not been subjected to a roughening treatment. It is. As such a non-roughened copper foil with a primer resin layer, for example, “Multi Foil G: abbreviation MFG” manufactured by Mitsui Mining & Smelting Co., Ltd., “PF-E” manufactured by Hitachi Chemical Co., Ltd., or the like can be used. . At this time, the primer resin layer exhibits an adhesive force to both the copper foil and the insulating resin, and it is easy to ensure good adhesion between the non-roughened copper foil and the insulating resin layer. Become.
　本件発明に係るプリント配線板の製造方法においては、サブトラクティブ法やセミアディティブ法を用いて回路を形成できる。サブトラクティブ法であれば、最初に当該銅張積層板の最外層にある無粗化銅箔を銅エッチング液でエッチングして、不要な銅箔部位を除去して、回路形成を行う。このときの回路形成方法としては、外層銅箔の表面にエッチングレジスト層を形成し、エッチングレジストパターンを露光、現像して形成し、その後、銅エッチング液を用いて回路パターンの形成を行い、最終的にエッチングレジストを除去して、プリント配線の回路が形成される。また、セミアディティブ法であれば、無粗化銅箔を張り合わせた銅張積層板のビアホールを形成する位置に穴をあける。その後、無電解銅めっきを施し、形成した無電解銅めっき層の表面にめっきレジスト層を形成し、めっきレジストパターンを露光、現像する。その後、銅を電気めっきして回路パターンの形成を行い、めっきレジストを除去してから銅エッチング液で無粗化銅箔をエッチング除去することで、プリント配線板の回路が形成される。 In the method for manufacturing a printed wiring board according to the present invention, a circuit can be formed using a subtractive method or a semi-additive method. In the case of the subtractive method, first, a non-roughened copper foil in the outermost layer of the copper-clad laminate is etched with a copper etching solution to remove unnecessary copper foil portions, thereby forming a circuit. As a circuit formation method at this time, an etching resist layer is formed on the surface of the outer copper foil, the etching resist pattern is formed by exposure and development, and then a circuit pattern is formed using a copper etching solution. Then, the etching resist is removed to form a printed wiring circuit. Moreover, if it is a semi-additive method, a hole will be made in the position which forms the via hole of the copper clad laminated board which bonded the non-roughened copper foil. Thereafter, electroless copper plating is performed, a plating resist layer is formed on the surface of the formed electroless copper plating layer, and the plating resist pattern is exposed and developed. Thereafter, copper is electroplated to form a circuit pattern, the plating resist is removed, and then the non-roughened copper foil is etched away with a copper etchant, thereby forming a printed wiring board circuit.
　本件発明に係るプリント配線板の製造方法は、本来であれば、塩化銅エッチング液、塩化鉄エッチング液、硫酸－過酸化水素系エッチング液等の銅エッチング液の種類に関して、特段の限定は無く、いずれの使用も可能である。しかし、銅エッチング液に硫酸－過酸化水素系エッチング液を用いた場合に適用することがもっとも好ましい。現在のところ、銅エッチング液の中でも「硫酸－過酸化水素系エッチング液」は、ファインピッチ回路の形成に好適であることから、セミアディティブ法で一般的に用いられるエッチング液である。しかし、「硫酸－過酸化水素系エッチング液」を用いると、銅をエッチングして回路を形成した後に、回路間に露出した絶縁樹脂表面に、無粗化銅箔の表面処理金属成分として、比較的エッチング除去が困難と言われるニッケル、モリブデン、コバルト、スズ等の成分が残留しやすい傾向にあると言われるからである。従って、本件発明に係るプリント配線板の製造方法は、回路を形成する際に銅エッチング液として「硫酸－過酸化水素系エッチング液」を用いる場合を想定したプリント配線板の製造方法に好適であるといえる。 The method for producing a printed wiring board according to the present invention is originally not particularly limited with respect to the type of copper etching solution such as copper chloride etching solution, iron chloride etching solution, sulfuric acid-hydrogen peroxide etching solution, Either use is possible. However, it is most preferably applied when a sulfuric acid-hydrogen peroxide etching solution is used as the copper etching solution. At present, the “sulfuric acid-hydrogen peroxide-based etchant” among copper etchants is an etchant generally used in the semi-additive method because it is suitable for forming a fine pitch circuit. However, when using a "sulfuric acid-hydrogen peroxide etching solution", copper is etched to form a circuit, and then the surface of the insulating resin exposed between the circuits is compared as a surface-treated metal component of the non-roughened copper foil. This is because it is said that components such as nickel, molybdenum, cobalt, and tin, which are said to be difficult to remove by selective etching, tend to remain. Therefore, the method for manufacturing a printed wiring board according to the present invention is suitable for a method for manufacturing a printed wiring board assuming that a “sulfuric acid-hydrogen peroxide etching solution” is used as a copper etching solution when forming a circuit. It can be said.
　以上のようにして回路形成が終了すると、その後、回路間に露出した絶縁樹脂表面に残留した無粗化銅箔の表面処理金属成分の除去を行う。この操作を、「浄化処理」と称している。この浄化処理の達成度は、絶縁樹脂表面に残留する無粗化銅箔の表面処理金属成分を、ＸＰＳ分析装置（Ｘ線源：Ａｌ（Ｋα）、加速電圧：１５ｋＶ、ビーム径：５０μｍ）で半定量分析して判断する。このような手法を用いた理由は、以下のとおりである。例えば、浄化した後の露出した絶縁樹脂層を濃硫酸等で溶解し、ＩＣＰ分析法や原子吸光分析法等の高感度の直接分析手法を用いて、残留している金属元素量を確認することが理想的である。しかし、このような化学的分析手法は、手順が煩雑で時間がかかるため、製造工程で実施できる手法ではない。これに対し、ＸＰＳ分析装置を用いる手法であれば、簡易的に測定が可能であるため、製造工程で実施することも可能である。 When the circuit formation is completed as described above, the surface-treated metal component of the non-roughened copper foil remaining on the surface of the insulating resin exposed between the circuits is then removed. This operation is referred to as “purification treatment”. The degree of achievement of this purification treatment is determined by using an XPS analyzer (X-ray source: Al (Kα), acceleration voltage: 15 kV, beam diameter: 50 μm) for the surface-treated metal component of the non-roughened copper foil remaining on the surface of the insulating resin. Semi-quantitative analysis and judgment. The reason for using such a method is as follows. For example, the exposed insulating resin layer after purification is dissolved with concentrated sulfuric acid, etc., and the amount of remaining metal elements is confirmed using a highly sensitive direct analysis method such as ICP analysis or atomic absorption spectrometry. Is ideal. However, such a chemical analysis method is not a method that can be performed in the manufacturing process because the procedure is complicated and time-consuming. On the other hand, if it is the method using an XPS analyzer, since it can measure simply, it can also be implemented in a manufacturing process.
　このＸＰＳ分析装置を用いた半定量分析において、絶縁樹脂表面に検出される銅箔の表面処理金属成分が、検出限界以下となるまでの清浄化が必要である。即ち、この方法によって、検出可能なレベルで銅箔の表面処理金属成分が残留していなければ、回路間に露出した絶縁樹脂表面を粗化せずとも、プレッシャークッカーテスト（１２１℃、湿度１００％、２気圧の条件で５時間処理）の後、２６０℃の半田バスに６０秒間以上浸漬しても、絶縁樹脂層とソルダーレジストとの間での２０μｍ径以上のスポット状のデラミネーションが発生しないという効果を安定的に得ることができるからである。 In the semi-quantitative analysis using this XPS analyzer, it is necessary to clean the copper foil surface-treated metal component detected on the surface of the insulating resin until it is below the detection limit. That is, by this method, if the surface-treated metal component of the copper foil does not remain at a detectable level, the pressure cooker test (121 ° C., humidity 100%) can be performed without roughening the surface of the insulating resin exposed between the circuits. Even after being immersed in a solder bath at 260 ° C. for 60 seconds or more after 5 hours treatment at 2 atmospheres, no spot-like delamination with a diameter of 20 μm or more occurs between the insulating resin layer and the solder resist. This is because the effect can be obtained stably.
　更に、本件発明に係るプリント配線板の製造方法においては、回路間に露出した絶縁樹脂表面は、前記浄化処理前の露出した絶縁樹脂表面の表面粗さ（十点平均粗さＲｚｊｉｓ）の値をＲｚ（Ｓ）、当該浄化処理後の露出した絶縁樹脂表面の表面粗さ（十点平均粗さＲｚｊｉｓ）の値をＲｚ（Ｃ）としたとき、［Ｒｚ（Ｃ）／Ｒｚ（Ｓ）］の値が１．２以下とすることが好ましい。なお、Ｒｚ（Ｃ）及びＲｚ（Ｓ）は、ＪＩＳ規格（ＪＩＳ　Ｂ　０６０１２００１）に定める「十点平均粗さ（Ｒｚｊｉｓ）」を、レーザー非接触式粗さ計を用いて測定した場合の値であり、検出下限は０．０２μｍ程度である。 Furthermore, in the method for manufacturing a printed wiring board according to the present invention, the surface of the insulating resin exposed between the circuits has a value of the surface roughness (ten-point average roughness Rzjis) of the exposed insulating resin surface before the purification treatment. Rz (S), where Rz (C) is the value of the surface roughness (ten-point average roughness Rzjis) of the exposed insulating resin surface after the purification treatment, [Rz (C) / Rz (S)] The value is preferably 1.2 or less. In addition, Rz (C) and Rz (S) are values when “ten-point average roughness (Rzjis)” defined in JIS standard (JIS B 0601 2001 ) is measured using a laser non-contact type roughness meter. The lower limit of detection is about 0.02 μm.
　本件出願に係る発明では、浄化処理で用いる手法によっては、回路間に露出した絶縁樹脂表面の表面粗さが増加する場合があり、この表面粗さの増加の程度を表すのが、［Ｒｚ（Ｃ）／Ｒｚ（Ｓ）］の値である。この［Ｒｚ（Ｃ）／Ｒｚ（Ｓ）］の値が１．２を超えるレベルに表面状態が変化すると、例えば、プラズマ処理を採用した場合には、回路を支える絶縁樹脂層にアンダーカットが発生する。その結果、微細回路では、回路と絶縁樹脂との密着性が低下するため好ましくない。 In the invention according to the present application, depending on the method used in the purification treatment, the surface roughness of the surface of the insulating resin exposed between the circuits may increase, and the degree of the increase in the surface roughness is represented by [Rz ( C) / Rz (S)]. When the surface state changes to a level where the value of [Rz (C) / Rz (S)] exceeds 1.2, for example, when plasma treatment is employed, an undercut occurs in the insulating resin layer that supports the circuit. To do. As a result, the fine circuit is not preferable because the adhesion between the circuit and the insulating resin is lowered.
　更に、このとき、Ｒｚ（Ｃ）が、１．８μｍ以下となるように浄化処理することが好ましい。このＲｚ（Ｃ）が１．８μｍを超えると、上述のセミアディティブプロセスではオーバーエッチング時間を長く設定せざるを得なくなるため好ましくない。まお、より微細な回路を形成するためには、Ｒｚ（Ｃ）は、１．０μｍ以下であることがより好ましい。 Furthermore, at this time, it is preferable to perform purification treatment so that Rz (C) is 1.8 μm or less. If Rz (C) exceeds 1.8 μm, the above-described semi-additive process is not preferable because the overetching time must be set longer. In order to form a finer circuit, Rz (C) is more preferably 1.0 μm or less.
　ここで、本件発明に係るプリント配線板の製造方法における浄化処理における浄化方法に関して述べる。ここで言う「浄化処理」とは、回路間に露出した絶縁樹脂表面に残留した金属成分の除去を目的としたものである。よって、本来であれば、物理的な処理や化学的な処理から適宜選択して実施することができる。具体的には、イオンビーム法、ＲＦビーム法、プラズマエッチング、反応性イオンエッチング、反応性イオンビームエッチング等のプラズマ処理、濃塩酸溶液エッチング法や過マンガン酸を用いたデスミア法等から適宜選択することが可能である。しかし、微細回路が形成されたプリント配線板の表面を、回路にダメージを与えること無く、均一に処理することが可能な方法を選択することが必要である。係る観点から、回路間に露出した絶縁樹脂表面の残留した金属成分を、ＸＰＳ分析装置を用いた半定量分析で各表面処理金属成分を検出限界以下とし、且つ、上述の浄化処理後の表面粗さを得るためには、「プラズマ処理」又は「可能な限り銅を溶解しない溶液処理」を用いることが好ましい。 Here, the purification method in the purification process in the method for manufacturing a printed wiring board according to the present invention will be described. The “purification treatment” here is intended to remove the metal component remaining on the surface of the insulating resin exposed between the circuits. Therefore, it can be implemented by appropriately selecting from physical processing and chemical processing. Specifically, an ion beam method, an RF beam method, plasma etching, reactive ion etching, reactive ion beam etching, or other plasma treatment, a concentrated hydrochloric acid solution etching method, a desmear method using permanganic acid, or the like is appropriately selected. It is possible. However, it is necessary to select a method capable of uniformly processing the surface of the printed wiring board on which the fine circuit is formed without damaging the circuit. From such a viewpoint, the metal component remaining on the surface of the insulating resin exposed between the circuits is set to be below the detection limit by semi-quantitative analysis using an XPS analyzer, and the surface roughness after the purification treatment described above is used. In order to achieve this, it is preferable to use “plasma treatment” or “solution treatment that does not dissolve copper as much as possible”.
　上述したプラズマ処理の場合には、チャンバー内の雰囲気ガスの選択自由度や浄化処理能力を優先すれば、反応性イオンエッチング法を採用することが好ましい。しかし、反応性イオンエッチングを採用すると、浄化対象とするプリント配線板を片面ずつ処理する必要がある。その結果、浄化処理工程全体としては生産効率が低下すると同時に、雰囲気ガスの消費量も多くなる。そのため、投入エネルギーを１０Ｊ／ｃｍ２～１２０Ｊ／ｃｍ２とした条件でプラズマエッチングを行い、プリント配線板の両面を同時に浄化処理することが好ましい。しかし、投入エネルギーを１０Ｊ／ｃｍ２未満とすると、エッチング量が少なく、回路間に露出した絶縁樹脂表面に残留した金属成分を十分に除去できない場合があるため好ましくない。一方、投入エネルギーを１２０Ｊ／ｃｍ２を超えるものとすると、回路を支える絶縁樹脂層にアンダーカットが発生する。その結果、微細回路では、回路と絶縁樹脂との密着性が低下するため好ましくない。また、係る場合、絶縁樹脂層表面に表面粗さのバラツキも発生しやすくなるため好ましくない。 In the case of the above-described plasma treatment, it is preferable to employ a reactive ion etching method if priority is given to the degree of freedom in selecting atmospheric gas in the chamber and the purification treatment capability. However, when reactive ion etching is employed, it is necessary to process the printed wiring board to be cleaned one side at a time. As a result, the production efficiency of the entire purification process decreases, and the consumption of atmospheric gas increases. Therefore, plasma etching is performed under the condition that the input energy was 10J / cm 2 ~ 120J / cm 2, it is preferable to simultaneously purify treats both sides of the printed wiring board. However, if the input energy is less than 10 J / cm 2 , the etching amount is small, and the metal component remaining on the surface of the insulating resin exposed between the circuits may not be sufficiently removed, which is not preferable. On the other hand, if the input energy exceeds 120 J / cm 2 , an undercut occurs in the insulating resin layer that supports the circuit. As a result, the fine circuit is not preferable because the adhesion between the circuit and the insulating resin is lowered. In such a case, the surface roughness of the insulating resin layer is likely to vary, which is not preferable.
　本件発明に係るプリント配線板の製造方法において、プラズマエッチングを行うにあたり、エッチングチャンバー内の雰囲気ガスとして「Ｏ２とＣＦ４との混合ガス」を用いることが好ましい。上述したように、反応性イオンエッチング法であれば、チャンバー内の雰囲気ガスの種類を特定しなくても表面処理金属成分を除去できる。しかしながら、プラズマエッチングでは、雰囲気ガスの種類によってエッチング性が大きく変動する。ところが、「Ｏ２とＣＦ４との混合ガス」を採用すれば、混合ガスの内、ＣＦ４は金属と反応する機能を発揮し、Ｏ２は樹脂表面に親水性を付与する機能を発揮するため、良好なエッチング状態を達成することができる。 In the method for manufacturing a printed wiring board according to the present invention, it is preferable to use “mixed gas of O 2 and CF 4 ” as an atmospheric gas in the etching chamber when performing plasma etching. As described above, if the reactive ion etching method is used, the surface-treated metal component can be removed without specifying the type of atmospheric gas in the chamber. However, in plasma etching, the etching property varies greatly depending on the type of atmospheric gas. However, by employing the "mixed gas of O 2 and CF 4", of the gas mixture, CF 4 exerts the function of reacting with the metal, O 2 exerts a function of imparting hydrophilicity to the resin surface Therefore, a good etching state can be achieved.
　確かに、最初にＣＦ４ガスを用いてプラズマエッチングを実施し、その後、エッチングチャンバー内の雰囲気ガスとしてＯ２ガスを用いてプラズマエッチングする方法を採用することも可能である。しかし、「Ｏ２とＣＦ４との混合ガス」をエッチングチャンバー内の雰囲気ガスとして用いれば、１回のプラズマエッチングで上述した機能が発揮されることになるため、工程及び設備の単純化の観点から好ましい。 Certainly, it is also possible to adopt a method in which plasma etching is first performed using CF 4 gas and then plasma etching is performed using O 2 gas as the atmospheric gas in the etching chamber. However, if the “mixed gas of O 2 and CF 4 ” is used as the atmospheric gas in the etching chamber, the above-described functions can be exhibited by one plasma etching, so that the process and equipment can be simplified. To preferred.
　そして、ＣＦ４とＯ２とのガス分圧の比［（ＣＦ４分圧）／（Ｏ２分圧）］の値が０．２～５．０であることが好ましい。このガス分圧の比［（ＣＦ４分圧）／（Ｏ２分圧）］の値が０．２未満の場合には、金属と反応する機能を発揮できないため好ましくない。一方、ＣＦ４とＯ２とのガス分圧の比［（ＣＦ４分圧）／（Ｏ２分圧）］の値が５．０を超えると、金属と反応する機能は飽和に達し、Ｏ２分圧が低いために樹脂表面に親水性を付与する機能を発揮できないため好ましくない。 The gas partial pressure ratio [(CF 4 partial pressure) / (O 2 partial pressure)] of CF 4 and O 2 is preferably 0.2 to 5.0. When the value of the gas partial pressure ratio [(CF 4 partial pressure) / (O 2 partial pressure)] is less than 0.2, the function of reacting with a metal cannot be exhibited, which is not preferable. On the other hand, when the value of the gas partial pressure ratio between CF 4 and O 2 [(CF 4 partial pressure) / (O 2 partial pressure)] exceeds 5.0, the function of reacting with the metal reaches saturation, and O Since the partial pressure is low, the function of imparting hydrophilicity to the resin surface cannot be exhibited.
　そして、エッチングチャンバー内の気圧は、５．０Ｐａ～２００Ｐａの範囲としてプラズマエッチングを行うことが好ましい。エッチングチャンバー内の気圧が５．０Ｐａ未満の場合には、反応ガスが少ないためエッチング速度が遅く、プリント配線板の生産性が極端に低下するため好ましくない。一方、エッチングチャンバー内の気圧が２００Ｐａを超えると、プラズマの供給が困難になるため好ましくない。 Further, it is preferable to perform plasma etching with the atmospheric pressure in the etching chamber in the range of 5.0 Pa to 200 Pa. When the atmospheric pressure in the etching chamber is less than 5.0 Pa, the reaction rate is small and the etching rate is slow, and the productivity of the printed wiring board is extremely lowered, which is not preferable. On the other hand, when the atmospheric pressure in the etching chamber exceeds 200 Pa, it is not preferable because it becomes difficult to supply plasma.
　本件発明に係るプリント配線板の製造方法において、浄化処理としてプラズマ処理を採用した場合には、プラズマ処理後に、湿式洗浄を行うことが好ましい。ここで言うプラズマエッチングの後には、回路間に露出した絶縁樹脂表面に、プラズマ処理により生じた絶縁樹脂残渣が残留するため、湿式洗浄で当該絶縁樹脂残渣を除去するのである。このときの湿式洗浄は、プラズマ処理により生じた絶縁樹脂残渣の除去を目的とするため、絶縁樹脂表面に残留した金属成分を溶解して除去する能力を必須とするものではなく、高圧ジェット水洗等の物理洗浄や、薬品処理等の化学洗浄から、最適な効果が得られる方法を選択して実施すればよい。その中でも、本件発明における湿式洗浄には、「界面活性剤を含有した酸洗溶液」及び／又は「銅のマイクロエッチング液」を用いた洗浄を選択することが好ましい。。 In the method for manufacturing a printed wiring board according to the present invention, when plasma treatment is employed as the purification treatment, it is preferable to perform wet cleaning after the plasma treatment. Since the insulating resin residue generated by the plasma treatment remains on the surface of the insulating resin exposed between the circuits after the plasma etching, the insulating resin residue is removed by wet cleaning. Since the wet cleaning at this time is intended to remove the insulating resin residue generated by the plasma treatment, the ability to dissolve and remove the metal component remaining on the insulating resin surface is not essential. A method that can obtain the optimum effect may be selected from the physical cleaning and chemical cleaning such as chemical treatment. Among them, for the wet cleaning in the present invention, it is preferable to select cleaning using “pickling solution containing a surfactant” and / or “copper microetching solution”. .
　この湿式洗浄では「界面活性剤を含有した酸洗溶液」での洗浄に続いて、「銅のマイクロエッチング液」での洗浄の順で行うことが好ましい。このように「界面活性剤を含有した酸洗溶液」で予め洗浄することで、プラズマ処理後のプリント配線板表面に有る残渣を取り除くと同時に、プリント配線板表面と溶液との濡れ性を改善し、後に使用する「銅のマイクロエッチング液」がプリント配線板の回路間ギャップの隅々にまで行き渡り、残渣の確実な除去が出来るからである。 In this wet cleaning, it is preferable to perform cleaning with “a pickling solution containing a surfactant” followed by cleaning with a “copper microetching solution”. In this way, by pre-washing with a “pickling solution containing a surfactant”, residues on the surface of the printed wiring board after plasma treatment are removed, and at the same time, the wettability between the surface of the printed wiring board and the solution is improved. This is because the “copper microetching solution” used later spreads to every corner of the circuit gap of the printed wiring board, and the residue can be removed reliably.
　以上に言う「界面活性剤を含有した酸洗溶液」に使用できる「界面活性剤」としては、ノニオン界面活性剤、カチオン界面活性剤、両性界面活性剤のいずれかを選択的に使用することが可能で、これらを混合して用いることも可能である。 As the “surfactant” that can be used in the above-described “pickling solution containing a surfactant”, any one of a nonionic surfactant, a cationic surfactant, and an amphoteric surfactant can be selectively used. It is also possible to use a mixture of these.
　ここで言うノニオン界面活性剤とは、水中でイオン化しない親水基を持っているものであり、エステル型、エーテル型、エステル・エーテル型及びその他に分類されるものである。具体的には、高級アルコール、アルキルフェノール、脂肪酸、アミン類、アルキレンジアミン、脂肪酸アミド、スルホンアミド、多価アルコール、グルコキシド誘導体等である。 The nonionic surfactant referred to here has a hydrophilic group that does not ionize in water, and is classified into an ester type, an ether type, an ester-ether type, and others. Specific examples include higher alcohols, alkylphenols, fatty acids, amines, alkylene diamines, fatty acid amides, sulfonamides, polyhydric alcohols, and glucooxide derivatives.
　そして、カチオン界面活性剤とは、溶液中で疎水基のついている部分が陽イオンに電離する性質の界面活性剤である。より具体的に言えば、ラウリルトリメチルアンモニウム塩、セチルトリメチルアンモニウム塩、ステアリルトリメチルアンモニウム塩、ラウリルジメチルエチルアンモニウム塩、ラウリルジメチルアンモニウムベタイン、ステアリルジメチルアンモニウムベタイン、ジメチル－ベンジルラウリルアンモニウム塩、オクタデシルジメチルベンジルアンモニウム塩、トリメチルベンジルアンモニウム塩、トリエチルベンジルアンモニウム塩、ラウリルビリジニウム塩、ラウリルイミダゾリニウム塩、ステアリルアミンアセテート、ラウリルアミンアセテート等である。 The cationic surfactant is a surfactant having a property that a portion having a hydrophobic group in a solution is ionized to a cation. More specifically, lauryl trimethyl ammonium salt, cetyl trimethyl ammonium salt, stearyl trimethyl ammonium salt, lauryl dimethyl ethyl ammonium salt, lauryl dimethyl ammonium betaine, stearyl dimethyl ammonium betaine, dimethyl-benzyl lauryl ammonium salt, octadecyl dimethyl benzyl ammonium salt Trimethylbenzylammonium salt, triethylbenzylammonium salt, laurylbiridinium salt, laurylimidazolinium salt, stearylamine acetate, laurylamine acetate, and the like.
　次に、両性界面活性剤とは、水に溶けたとき、アルカリ性領域では陰イオン界面活性剤の性質を、酸性領域では陽イオン界面活性剤の性質を示すものである。具体的に言えば、アルキルカルボキシベタイン型、アルキルアミノカルボン酸型、アルキルイミダゾリン型等である。 Next, the amphoteric surfactant, when dissolved in water, shows the properties of an anionic surfactant in the alkaline region and the properties of a cationic surfactant in the acidic region. Specifically, the alkylcarboxybetaine type, the alkylaminocarboxylic acid type, the alkylimidazoline type, and the like.
　以上述べた界面活性剤を、硫酸、塩酸、硫酸－過酸化水素水溶液等のプリント配線板表面の清浄化の可能な溶液中に含有させ、界面活性剤濃度が０．１ｇ／Ｌ～２０ｇ／Ｌの濃度となるように添加して、洗浄に用いる酸性溶液が得られる。このときの界面活性剤濃度が０．１ｇ／Ｌ未満の場合には、上述の如何なる界面活性剤を用いても、プラズマ処理後のプリント配線板表面と溶液との濡れ性を改善する効果は得られない。一方、界面活性剤濃度が２０ｇ／Ｌを超えるものとしても、プラズマ処理後のプリント配線板表面と溶液との濡れ性を向上させる効果は飽和して、資源の無駄遣いに過ぎなくなる。この酸性溶液を用いてのプラズマ処理後のプリント配線板の洗浄時間は、１５秒～７分であることが好ましい。この洗浄時間が１５秒未満の場合には、プラズマ処理後のプリント配線板表面と溶液との濡れ性を改善する効果は得られない。一方、この洗浄時間が７分を超えるものとすると、プラズマ処理後のプリント配線板の回路部の浸食が始まるため好ましくない。 The surfactant described above is contained in a solution capable of cleaning the surface of the printed wiring board such as sulfuric acid, hydrochloric acid, sulfuric acid-hydrogen peroxide aqueous solution, and the concentration of the surfactant is 0.1 g / L to 20 g / L. An acidic solution used for washing can be obtained by adding so as to have a concentration of. If the surfactant concentration at this time is less than 0.1 g / L, the effect of improving the wettability between the surface of the printed wiring board after the plasma treatment and the solution can be obtained by using any of the above-mentioned surfactants. I can't. On the other hand, even if the surfactant concentration exceeds 20 g / L, the effect of improving the wettability between the surface of the printed wiring board after the plasma treatment and the solution is saturated, and only the waste of resources is achieved. The cleaning time of the printed wiring board after the plasma treatment using this acidic solution is preferably 15 seconds to 7 minutes. When this cleaning time is less than 15 seconds, the effect of improving the wettability between the surface of the printed wiring board after the plasma treatment and the solution cannot be obtained. On the other hand, if the cleaning time exceeds 7 minutes, erosion of the circuit portion of the printed wiring board after the plasma treatment starts, which is not preferable.
　上述した銅のマイクロエッチング液を用いる湿式洗浄では、銅回路を質量換算厚さで０．５μｍ以上エッチングして粗化する。銅回路を質量換算厚さで０．５μｍ以上エッチングすれば、銅回路の表面は、ソルダーレジスト層や多層化する際の絶縁樹脂層との十分な接着力を発揮する。一方で、係るエッチング条件であれば、回路表面に残留した汚染物質、エッチング残渣、回路間に露出した絶縁樹脂表面の清浄化処理による残渣等の除去も可能となる。この結果、ソルダーレジスト層と回路表面との密着性及び絶縁樹脂成分と回路表面との密着性が同時に向上する。 In the wet cleaning using the copper micro-etching solution described above, the copper circuit is etched and roughened by a thickness in terms of mass of 0.5 μm or more. If the copper circuit is etched by 0.5 μm or more in terms of mass, the surface of the copper circuit exhibits a sufficient adhesive force with the solder resist layer and the insulating resin layer when multilayered. On the other hand, under such etching conditions, it is possible to remove contaminants remaining on the circuit surface, etching residues, residues by cleaning treatment of the insulating resin surface exposed between circuits, and the like. As a result, the adhesion between the solder resist layer and the circuit surface and the adhesion between the insulating resin component and the circuit surface are improved at the same time.
ソルダーレジスト層形成後のプリント配線板の製造形態：　本件発明に係るソルダーレジスト層形成後のプリント配線板の製造方法は、上述の浄化処理を設けた方法で製造したプリント配線板を用いて、必要な箇所へのソルダーレジスト層を形成することを特徴とする。このように、上述の浄化処理を設けた方法で製造したプリント配線板を用いれば、回路間に露出した絶縁樹脂表面に残留した金属成分がＸＰＳ装置を用いた半定量分析の検出限界以下であるため、ソルダーレジスト層と絶縁樹脂層との密着性、ソルダーレジスト層と回路表面との密着性、絶縁樹脂成分と回路表面との密着性の全てが良好なソルダーレジスト層形成後のプリント配線板を得ることができる。 Manufacturing method of printed wiring board after formation of solder resist layer: The manufacturing method of the printed wiring board after forming the solder resist layer according to the present invention is necessary using the printed wiring board manufactured by the method provided with the above-described purification treatment. It is characterized in that a solder resist layer is formed on various locations. Thus, if the printed wiring board manufactured by the method provided with the purification treatment described above is used, the metal component remaining on the surface of the insulating resin exposed between the circuits is below the detection limit of the semi-quantitative analysis using the XPS apparatus. Therefore, the printed wiring board after the formation of the solder resist layer that has good adhesion between the solder resist layer and the insulating resin layer, the adhesion between the solder resist layer and the circuit surface, and the adhesion between the insulating resin component and the circuit surface. Obtainable.
ソルダーレジスト層形成後のプリント配線板の形態：　このソルダーレジスト層形成後のプリント配線板は、２気圧のプレッシャークッカー内で５時間保持した後、２６０℃の半田バスに６０秒間浸漬したときに、ソルダーレジスト層と絶縁樹脂表面との間に、直径２０μｍ以上のスポット状のデラミネーションの発生が無いことが特徴である。従って、１２１℃、湿度１００％、２気圧の条件で１９６時間処理した場合でも、ソルダーレジスト層と絶縁樹脂表面との間に、直径２０μｍ以上のスポット状のデラミネーションの発生することが無い。以下、実施例と比較例とを用いて、本件発明の内容に関して、より具体的に説明する。 Form of printed wiring board after solder resist layer formation: When this printed wiring board after solder resist layer formation is held in a pressure cooker at 2 atm for 5 hours and then immersed in a solder bath at 260 ° C. for 60 seconds, It is characterized in that no spot-like delamination having a diameter of 20 μm or more is generated between the solder resist layer and the insulating resin surface. Therefore, even when the treatment is performed for 196 hours under the conditions of 121 ° C., humidity 100%, and 2 atmospheres, spot-like delamination having a diameter of 20 μm or more does not occur between the solder resist layer and the insulating resin surface. Hereinafter, the content of the present invention will be described more specifically using examples and comparative examples.
［銅張積層板の作製］
　厚さ０．１ｍｍのプリプレグ（ＧＨＰＬ８３０－ＮＳ：三菱瓦斯化学株式会社製）を３枚重ねた両面に、表面粗さ（十点平均粗さＲｚｊｉｓ）が０．３７μｍである無粗化銅箔にプライマー樹脂を塗布したプライマー樹脂層付無粗化銅箔（ＭＦＧ－ＤＭＴ３Ｆ：三井金属鉱業株式会社製）を重ね、温度２２０℃、圧力４．０ＭＰとした真空プレス装置で９０分間成形し、厚さ０．３ｍｍの銅張積層板を作製した。 [Preparation of copper-clad laminate]
On a non-roughened copper foil having a surface roughness (10-point average roughness Rzjis) of 0.37 μm on both sides of three prepregs (GHPL830-NS: manufactured by Mitsubishi Gas Chemical Co., Ltd.) having a thickness of 0.1 mm. A non-roughened copper foil with a primer resin layer coated with a primer resin (MFG-DMT3F: made by Mitsui Mining & Smelting Co., Ltd.) is stacked and molded for 90 minutes with a vacuum press apparatus at a temperature of 220 ° C. and a pressure of 4.0 MP. A 0.3 mm copper clad laminate was prepared.
［プリント配線板の作製］
　プリント配線板は、セミアディティブ法を用いて作製することとした。このプリント配線板の作製手順に関しては、実施例と比較例共に共通である。上記銅張積層板の外層銅箔の表面にめっきレジスト層を形成し、ライン幅／スペース幅が５００μｍ／１２００μｍの格子状配線を形成するためのレジストパターン用露光フィルムを用いて露光、現像し、トータル厚さが１５μｍになるように電気銅めっきした。そして、めっきレジストを剥離後、硫酸－過酸化水素系エッチング液（ＣＰＥ８００：三菱瓦斯化学株式会社製）を用い、露出した無粗化銅箔をエッチング除去し、回路形成を行った。このようにして作製したプリント配線板を分割し、実施例１で用いるプリント配線板試料とした。 [Preparation of printed wiring board]
The printed wiring board was prepared using a semi-additive method. The manufacturing procedure of this printed wiring board is common to both the example and the comparative example. A plating resist layer is formed on the surface of the outer layer copper foil of the copper-clad laminate, and exposed and developed using an exposure film for resist pattern for forming a grid-like wiring having a line width / space width of 500 μm / 1200 μm, Copper electroplating was performed so that the total thickness was 15 μm. Then, after removing the plating resist, the exposed non-roughened copper foil was removed by etching using a sulfuric acid-hydrogen peroxide etching solution (CPE800: manufactured by Mitsubishi Gas Chemical Co., Ltd.) to form a circuit. The printed wiring board produced in this way was divided into a printed wiring board sample used in Example 1.
［浄化処理］
　実施例１の浄化処理では、上述のプリント配線板試料を６０℃の４ｍｏｌ／Ｌ塩酸に６０分間浸漬し、水洗後乾燥し、浄化処理試料を作製した。 [Purification treatment]
In the purification treatment of Example 1, the above-mentioned printed wiring board sample was immersed in 4 mol / L hydrochloric acid at 60 ° C. for 60 minutes, washed with water and dried to prepare a purification treatment sample.
［回路間に露出した絶縁樹脂層表面の評価］
　浄化処理試料の回路間に露出した絶縁樹脂層の、浄化処理前と浄化処理後の表面を、ＸＰＳ分析装置（Ｘ線源：Ａｌ（Ｋα）、加速電圧：１５ｋＶ、ビーム径：５０μｍ）で残留金属成分量を半定量分析し、更に、表面粗さ（Ｒｚｊｉｓ）を測定した。絶縁樹脂層の表面状態を、後の表１に示す。 [Evaluation of insulating resin layer surface exposed between circuits]
The surface of the insulating resin layer exposed between the circuits of the purification sample remains before and after the purification treatment with an XPS analyzer (X-ray source: Al (Kα), acceleration voltage: 15 kV, beam diameter: 50 μm). The amount of metal component was semi-quantitatively analyzed, and the surface roughness (Rzjis) was further measured. Table 1 below shows the surface state of the insulating resin layer.
［ソルダーレジスト層の形成とデラミネーションの評価］
　上述した浄化処理試料は、銅配線とソルダーレジストとの密着性を付与するために、マイクロエッチング液（ＣＺ８１０１Ｂ：メック株式会社製）を３０秒間スプレーし、水洗して乾燥した。この浄化処理試料に、ソルダーレジスト（ＡＵＳ３０８：太陽インキ株式会社製）を形成し、１２１℃×５時間のＰＣＴ処理後に、２６０℃の半田バスに６０秒間浸漬した（以下、この操作を「ＰＣＴ半田試験」と称する。）。このＰＣＴ半田試験後の浄化処理試料に対して、デラミネーションの発生を、光学顕微鏡で観察して評価した。デラミネーションの評価結果と浄化処理条件を後の表２に示す。 [Formation of solder resist layer and evaluation of delamination]
The above-described purification treatment sample was sprayed with a micro-etching solution (CZ8101B: manufactured by MEC Co., Ltd.) for 30 seconds, washed with water and dried in order to provide adhesion between the copper wiring and the solder resist. A solder resist (AUS308: manufactured by Taiyo Ink Co., Ltd.) was formed on the sample subjected to the purification treatment, and immersed in a solder bath at 260 ° C. for 60 seconds after PCT treatment at 121 ° C. for 5 hours (hereinafter, this operation is referred to as “PCT solder”). Referred to as "test"). The generation of delamination was observed and evaluated with respect to the purified sample after the PCT solder test using an optical microscope. Delamination evaluation results and purification treatment conditions are shown in Table 2 below.
　実施例２では、実施例１で用いたプライマー樹脂層付無粗化銅箔を、三井金属鉱業株式会社製ＭＦＧ－ＤＭＴ３Ｆに代えて日立化成工業株式会社製のＰＦ－Ｅ－３を用いた以外は実施例１と同様にしてプリント配線板試料を作製した。 In Example 2, the non-roughened copper foil with the primer resin layer used in Example 1 was replaced with PF-E-3 manufactured by Hitachi Chemical Co., Ltd. instead of MFG-DMT3F manufactured by Mitsui Mining & Smelting Co., Ltd. A printed wiring board sample was prepared in the same manner as in Example 1.
　上述したプリント配線板試料に、実施例１と同様にして浄化処理を施して浄化処理試料を作製し、浄化処理試料の回路間に露出した絶縁樹脂層表面の残留金属成分量を半定量分析し、更に、表面粗さ（Ｒｚｊｉｓ）を測定した。また、デラミネーションの発生を実施例１と同様にして評価した。回路間に露出した絶縁樹脂層の表面状態を後の表１に、デラミネーションの評価結果と浄化処理条件を後の表２に示す。 The above-described printed wiring board sample is subjected to purification treatment in the same manner as in Example 1 to produce a purification treatment sample, and the amount of residual metal components on the surface of the insulating resin layer exposed between the circuits of the purification treatment sample is analyzed semi-quantitatively. Further, the surface roughness (Rzjis) was measured. The occurrence of delamination was evaluated in the same manner as in Example 1. Table 1 below shows the surface state of the insulating resin layer exposed between the circuits, and Table 2 shows the evaluation results of delamination and the purification treatment conditions.
　実施例３では、実施例１で作製したプリント配線板の試料を用い、浄化処理条件のみを変更した。 In Example 3, the sample of the printed wiring board produced in Example 1 was used, and only the purification treatment conditions were changed.
　浄化処理では、上述したプリント配線板の試料を、［（ＣＦ４分圧）／（Ｏ２分圧）］＝０．３３、気圧１５Ｐａとしたチャンバー内で、投入エネルギーを４０Ｊ／ｃｍ２とした条件のプラズマエッチングを行い、次に、酸成分としての硫酸と界面活性剤としてのエチレングリコールを含有したメルプレートＰＣ－３１６（メルテックス株式会社製）の１０質量％溶液に５分間浸漬して洗浄を行った後、マイクロエッチング液（ＣＺ８１０１Ｂ：メック株式会社製）を３０秒間スプレーし、水洗して乾燥し、浄化処理試料を作製した。図３に回路形成直後の回路間に露出した絶縁樹脂層表面の走査型電子顕微鏡観察像を、図２にプラズマエッチング直後の回路間に露出した絶縁樹脂層表面の走査型電子顕微鏡観察像を、図１にマイクロエッチング直後の回路間に露出した絶縁樹脂層表面の走査型電子顕微鏡観察像を示す。 In the purification treatment, the sample of the printed wiring board described above was [(CF 4 partial pressure) / (O 2 partial pressure)] = 0.33, and the input energy was 40 J / cm 2 in a chamber at an atmospheric pressure of 15 Pa. Perform plasma etching under the conditions, and then wash by dipping in a 10% by mass solution of Melplate PC-316 (manufactured by Meltex Co., Ltd.) containing sulfuric acid as an acid component and ethylene glycol as a surfactant. Then, a microetching liquid (CZ8101B: manufactured by MEC Co., Ltd.) was sprayed for 30 seconds, washed with water and dried to prepare a purification treatment sample. FIG. 3 shows a scanning electron microscope image of the surface of the insulating resin layer exposed between the circuits immediately after the circuit formation, and FIG. 2 shows a scanning electron microscope image of the surface of the insulating resin layer exposed between the circuits immediately after the plasma etching. FIG. 1 shows a scanning electron microscope observation image of the surface of the insulating resin layer exposed between the circuits immediately after microetching.
　その後、実施例１と同様にして、浄化処理試料の回路間に露出した絶縁樹脂層表面の残留金属成分量を半定量分析し、更に、表面粗さ（Ｒｚｊｉｓ）を測定した。また、デラミネーションの発生を実施例１と同様にして評価した。浄化処理試料の回路間に露出した絶縁樹脂層の表面状態を後の表１に、デラミネーションの評価結果と浄化処理条件を後の表２に示す。 Thereafter, in the same manner as in Example 1, the amount of residual metal components on the surface of the insulating resin layer exposed between the circuits of the purification sample was semi-quantitatively analyzed, and the surface roughness (Rzjis) was further measured. The occurrence of delamination was evaluated in the same manner as in Example 1. Table 1 below shows the surface state of the insulating resin layer exposed between the circuits of the purification treatment sample, and Table 2 below shows the evaluation results of delamination and the purification treatment conditions.
　実施例３では、実施例１で作製したプリント配線板の試料を用い、浄化処理条件のみを変更した。 In Example 3, the sample of the printed wiring board produced in Example 1 was used, and only the purification treatment conditions were changed.
　浄化処理では、上述したプリント配線板の試料を、液温８０℃の過マンガン酸カリウム（ＫＭｎＯ４）溶液（ローム・アンド・ハース電子材料株式会社製）に１分間浸漬した後、液温４５℃の中和液（ローム・アンド・ハース電子材料株式会社製）に５分間浸漬し、水洗し、乾燥して、浄化処理試料を作製した。 In the purification treatment, the above-mentioned printed wiring board sample was immersed in a potassium permanganate (KMnO 4 ) solution (Rohm and Haas Electronic Materials Co., Ltd.) having a liquid temperature of 80 ° C. for 1 minute, and then the liquid temperature was 45 ° C. The sample was immersed in a neutralizing solution (made by Rohm and Haas Electronic Materials Co., Ltd.) for 5 minutes, washed with water and dried to prepare a purification sample.
　その後、実施例１と同様にして、浄化処理試料の回路間に露出した絶縁樹脂層表面の残留金属成分量を半定量分析し、更に、表面粗さ（Ｒｚｊｉｓ）を測定した。また、デラミネーションの発生を実施例１と同様にして評価した。浄化処理試料の回路間に露出した絶縁樹脂層の表面状態を後の表１に、デラミネーションの評価結果と浄化処理条件を後の表２に示す。 Thereafter, in the same manner as in Example 1, the amount of residual metal components on the surface of the insulating resin layer exposed between the circuits of the purification sample was semi-quantitatively analyzed, and the surface roughness (Rzjis) was further measured. The occurrence of delamination was evaluated in the same manner as in Example 1. Table 1 below shows the surface state of the insulating resin layer exposed between the circuits of the purification treatment sample, and Table 2 below shows the evaluation results of delamination and the purification treatment conditions.
比較例Comparative example
［比較例１］
　比較例１では、実施例１で実施した浄化処理を行わなかった。そして、デラミネーションの発生を実施例１と同様にして評価した。発生したデラミネーションを、透過光を用いてソルダーレジスト側から観察した表面観察像を図４に示す。回路間に露出した絶縁樹脂層の表面状態を後の表１に、デラミネーションの評価結果と浄化処理条件を後の表２に示す。 [Comparative Example 1]
In Comparative Example 1, the purification treatment performed in Example 1 was not performed. The occurrence of delamination was evaluated in the same manner as in Example 1. FIG. 4 shows a surface observation image obtained by observing the generated delamination from the solder resist side using transmitted light. Table 1 below shows the surface state of the insulating resin layer exposed between the circuits, and Table 2 shows the evaluation results of delamination and the purification treatment conditions.
［比較例２］
　比較例２では、実施例１で実施した浄化処理時間６０分間を１０分間に変更した浄化処理試料を作製した。その後、実施例１と同様にして浄化処理試料の回路間に露出した絶縁樹脂層表面の残留金属成分量を半定量分析し、更に、表面粗さを測定した。また、デラミネーションの発生を実施例１と同様にして評価した。発生したデラミネーションを、透過光を用いてソルダーレジスト層側から観察した表面観察像を図５に示す。回路間に露出した絶縁樹脂層の表面状態を後の表１に、デラミネーションの評価結果と浄化処理条件を後の表２に示す。 [Comparative Example 2]
In Comparative Example 2, a purification sample was prepared by changing the purification treatment time of 60 minutes performed in Example 1 to 10 minutes. Thereafter, in the same manner as in Example 1, the amount of residual metal components on the surface of the insulating resin layer exposed between the circuits of the purification treatment sample was semi-quantitatively analyzed, and the surface roughness was further measured. The occurrence of delamination was evaluated in the same manner as in Example 1. FIG. 5 shows a surface observation image obtained by observing the generated delamination from the solder resist layer side using transmitted light. Table 1 below shows the surface state of the insulating resin layer exposed between the circuits, and Table 2 shows the evaluation results of delamination and the purification treatment conditions.
［比較例３］
　比較例３では、実施例３で実施した浄化処理からマイクロエッチングを省略した浄化処理試料を作製した。その後、実施例１と同様にして浄化処理試料の回路間に露出した絶縁樹脂層表面の残留金属成分量を半定量分析し、更に、表面粗さを測定した。また、デラミネーションの発生を実施例１と同様にして評価した。回路間に露出した絶縁樹脂層の表面状態を後の表１に、デラミネーションの評価結果と浄化処理条件を後の表２に示す。 [Comparative Example 3]
In Comparative Example 3, a purification treatment sample in which microetching was omitted from the purification treatment performed in Example 3 was produced. Thereafter, in the same manner as in Example 1, the amount of residual metal components on the surface of the insulating resin layer exposed between the circuits of the purification treatment sample was semi-quantitatively analyzed, and the surface roughness was further measured. The occurrence of delamination was evaluated in the same manner as in Example 1. Table 1 below shows the surface state of the insulating resin layer exposed between the circuits, and Table 2 shows the evaluation results of delamination and the purification treatment conditions.
［比較例４］
　比較例４では、実施例３で実施した浄化処理からプラズマエッチングを省略した浄化処理試料を作製した。その後、実施例１と同様にして浄化処理試料の回路間に露出した絶縁樹脂層表面の残留金属成分量を半定量分析し、更に、表面粗さを測定した。また、デラミネーションの発生を実施例１と同様にして評価した。回路間に露出した絶縁樹脂層の表面状態を以下の表１に、デラミネーションの評価結果と浄化処理条件を以下の表２に示す。 [Comparative Example 4]
In Comparative Example 4, a purification treatment sample in which plasma etching was omitted from the purification treatment performed in Example 3 was produced. Thereafter, in the same manner as in Example 1, the amount of residual metal components on the surface of the insulating resin layer exposed between the circuits of the purification treatment sample was semi-quantitatively analyzed, and the surface roughness was further measured. The occurrence of delamination was evaluated in the same manner as in Example 1. The surface state of the insulating resin layer exposed between the circuits is shown in Table 1 below, and the evaluation results of delamination and the purification treatment conditions are shown in Table 2 below.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000002
Figure JPOXMLDOC01-appb-T000002
［実施例と比較例との対比］
　表１に示す回路間に露出した絶縁樹脂層の表面状態と、表２に示すデラミネーションの評価結果と浄化処理条件から、実施例と比較例とを対比する。 [Contrast between Example and Comparative Example]
From the surface state of the insulating resin layer exposed between the circuits shown in Table 1, the evaluation results of delamination shown in Table 2, and the purification treatment conditions, Examples and Comparative Examples are compared.
　デラミネーションの発生の有無と浄化処理条件とを対比する。この実施例の浄化処理後の絶縁樹脂層表面からは、残留金属成分が検出されていないことが分かる。そして、実施例に関しては、実用上問題となるレベルのデラミネーションの発生が観察されていない。一方、比較例の場合には、浄化処理後の残留金属成分量が０．１ａｔｏｍ％と、最も低いの比較例２の場合でも、５０μｍ径以上のスポット状のデラミネーションが観察されている。そして、浄化処理後の残留金属成分量が５．４ａｔｏｍ％の比較例３では３００μｍ径レベルでスポット状のデラミネーションが観察され、浄化処理後の残留金属成分量が８．０ａｔｏｍ％の比較例４と浄化処理を行っていない残留金属成分量が８．４ａｔｏｍ％の比較例１では１．０ｍｍを超えるスポット状のデラミネーションが観察されている。即ち、浄化処理後の絶縁樹脂表面で検出される残留金属成分量が多いほど、デラミネーションのスポット径が大きくなる傾向がみられる。 Compare the occurrence of delamination and the purification process conditions. It can be seen that no residual metal component is detected from the surface of the insulating resin layer after the purification treatment in this example. And about the Example, generation | occurrence | production of the delamination of the level which becomes a practical problem is not observed. On the other hand, in the case of Comparative Example, spot-like delamination having a diameter of 50 μm or more is observed even in Comparative Example 2 where the amount of residual metal component after purification treatment is 0.1 atom%, which is the lowest. In Comparative Example 3 in which the amount of residual metal component after purification treatment is 5.4 atom%, spot-like delamination is observed at a 300 μm diameter level, and in Comparative Example 4 in which the amount of residual metal component after purification treatment is 8.0 atom%. In Comparative Example 1 where the amount of residual metal component not subjected to purification treatment is 8.4 atom%, spot-like delamination exceeding 1.0 mm is observed. That is, the larger the amount of residual metal components detected on the surface of the insulating resin after the purification treatment, the larger the delamination spot diameter tends to be seen.
　一方で、Ｒｚ（Ｃ）とＲｚ（Ｓ）との比である［Ｒｚ（Ｃ）／Ｒｚ（Ｓ）］の値を考察すると、実施例で１．００～１．１１の範囲、比較例では１．００～１．０５の範囲である。そこで、［Ｒｚ（Ｃ）／Ｒｚ（Ｓ）］の値が１．００の試料と、１．００を超える試料について浄化処理条件を対比すると、プラズマエッチングを実施した試料が１．００を超えている。 On the other hand, considering the value of [Rz (C) / Rz (S)], which is the ratio of Rz (C) to Rz (S), the range of 1.00 to 1.11. It is in the range of 1.00 to 1.05. Therefore, when the purification treatment conditions are compared for a sample having a value of [Rz (C) / Rz (S)] of 1.00 and a sample exceeding 1.00, the number of samples subjected to plasma etching exceeds 1.00. Yes.
　上述した実施例と比較例との対比から、「ソルダーレジスト」と「回路間に露出した絶縁樹脂層表面」との密着性は、回路間に露出した絶縁樹脂層表面に残留する金属成分の影響を大きく受けている。一方、絶縁樹脂表面に、プラズマエッチングを施しても［Ｒｚ（Ｃ）／Ｒｚ（Ｓ）］の値が１．２を下まわる範囲では、ミクロ的な形状が変化しているが、ソルダーレジストとの密着性にはほとんど影響を与えないと言える。従って、回路間に露出した絶縁樹脂層表面に残留する金属成分が、ＸＰＳの半定量分析で検出される場合には、「ソルダーレジスト」と「回路間に露出した絶縁樹脂層表面」との密着性が悪くなることが確認できた。 From the comparison between the above-described Examples and Comparative Examples, the adhesion between the “solder resist” and the “insulating resin layer surface exposed between the circuits” is influenced by the metal component remaining on the surface of the insulating resin layer exposed between the circuits. Have received a lot. On the other hand, even if plasma etching is performed on the surface of the insulating resin, the microscopic shape changes within a range where the value of [Rz (C) / Rz (S)] is less than 1.2. It can be said that there is almost no influence on the adhesion of. Therefore, when the metal component remaining on the surface of the insulating resin layer exposed between the circuits is detected by the semi-quantitative analysis of XPS, the “solder resist” and the “insulating resin layer surface exposed between the circuits” are in close contact with each other. It has been confirmed that the nature is worse.
　本件発明に係るプリント配線板の製造方法は、絶縁樹脂露出面に金属元素が残留したプリント配線板に浄化処理を施し、残留した金属成分量をＸＰＳ装置を用いた半定量分析で定量限界以下とすることで、絶縁樹脂層表面を粗化すること無く、プリント配線板の表面に事後的に設けられる「ソルダーレジスト層」との良好な密着性を得ることができる。従って、プリント配線板の表面に事後的に設けられる「多層化する際に事後的に積層される樹脂層」とも良好な密着性を得ることができ、高品質のプリント配線板の提供を可能とする。 The method for producing a printed wiring board according to the present invention is to purify a printed wiring board with a metal element remaining on the exposed surface of the insulating resin, and to determine the amount of the remaining metal component to be below the limit of quantification by semi-quantitative analysis using an XPS apparatus. By doing so, it is possible to obtain good adhesion to a “solder resist layer” that is subsequently provided on the surface of the printed wiring board without roughening the surface of the insulating resin layer. Therefore, it is possible to obtain a good adhesion with the “resin layer that is laminated afterwards when multilayered” that is provided on the surface of the printed wiring board, and to provide a high-quality printed wiring board. To do.
ＢＭ　絶縁樹脂基材
ＣＣ　銅回路
ＰＳＲ　ソルダーレジスト
ＤＬ　デラミネーション BM Insulation resin base material CC Copper circuit PSR Solder resist DL Delamination

Claims (14)

  1. 無粗化銅箔を張り合わせた銅張積層板を用いてプリント配線板を製造する方法であって、
    　当該無粗化銅箔を銅エッチング液でエッチングして回路形成した後に、回路間に露出した絶縁樹脂表面に浄化処理を施し、
    　浄化処理を施した当該絶縁樹脂表面に残留する当該無粗化銅箔の表面処理金属成分を、ＸＰＳ分析装置（Ｘ線源：Ａｌ（Ｋα）、加速電圧：１５ｋＶ、ビーム径：５０μｍ）で半定量分析したときに各表面処理金属成分を検出限界以下とすることを特徴とするプリント配線板の製造方法。     A method for producing a printed wiring board using a copper clad laminate laminated with a non-roughened copper foil,
    After etching the non-roughened copper foil with a copper etchant to form a circuit, the insulating resin surface exposed between the circuits is subjected to a purification treatment,
    The surface-treated metal component of the non-roughened copper foil remaining on the surface of the insulating resin that has been subjected to the purification treatment is half-treated with an XPS analyzer (X-ray source: Al (Kα), acceleration voltage: 15 kV, beam diameter: 50 μm). A method for producing a printed wiring board, wherein each surface-treated metal component is made to be below a detection limit when quantitatively analyzed.
  2. 前記銅エッチング液には硫酸－過酸化水素系エッチング液を用いる請求項１に記載のプリント配線板の製造方法。 The method for manufacturing a printed wiring board according to claim 1, wherein a sulfuric acid-hydrogen peroxide etching solution is used as the copper etching solution.
  3. 前記回路間に露出した絶縁樹脂表面は、前記浄化処理前の露出した絶縁樹脂表面の表面粗さ（十点平均粗さＲｚｊｉｓ）の値をＲｚ（Ｓ）、当該浄化処理後の露出した絶縁樹脂表面の表面粗さ（十点平均粗さＲｚｊｉｓ）の値をＲｚ（Ｃ）としたとき、Ｒｚ（Ｃ）とＲｚ（Ｓ）との比である［Ｒｚ（Ｃ）／Ｒｚ（Ｓ）］の値を１．２以下とする請求項１又は請求項２に記載のプリント配線板の製造方法。 The surface of the insulating resin exposed between the circuits has a surface roughness (ten-point average roughness Rzjis) value Rz (S) of the exposed insulating resin surface before the purification treatment, and the exposed insulating resin after the purification treatment. When the surface roughness (ten-point average roughness Rzjis) is Rz (C), the ratio of [Rz (C) / Rz (S)], which is the ratio of Rz (C) to Rz (S) The printed wiring board manufacturing method according to claim 1 or 2, wherein the value is 1.2 or less.
  4. 前記Ｒｚ（Ｃ）が１．８μｍ以下となるように浄化処理する請求項３に記載のプリント配線板の製造方法。 The method for producing a printed wiring board according to claim 3, wherein the purification treatment is performed so that the Rz (C) is 1.8 μm or less.
  5. 前記浄化処理は、プラズマ処理である請求項１～請求項４のいずれかに記載のプリント配線板の製造方法。 The method for manufacturing a printed wiring board according to any one of claims 1 to 4, wherein the purification treatment is a plasma treatment.
  6. 前記プラズマ処理は、投入エネルギーを１０～１２０Ｊ／ｃｍ２とした条件でプラズマエッチングを行うものである請求項５に記載のプリント配線板の製造方法。 6. The method of manufacturing a printed wiring board according to claim 5, wherein the plasma treatment is performed by plasma etching under a condition where the input energy is 10 to 120 J / cm 2 .
  7. 前記プラズマ処理は、ＣＦ４とＯ２とのガス分圧の比［（ＣＦ４分圧）／（Ｏ２分圧）］の値が０．２～５．０、気圧が５．０Ｐａ～２００ＰａのＣＦ４／Ｏ２ガス雰囲気中で行うプラズマエッチングである請求項５又は請求項６に記載のプリント配線板の製造方法。 In the plasma treatment, the value of the gas partial pressure ratio of CF 4 and O 2 [(CF 4 partial pressure) / (O 2 partial pressure)] is 0.2 to 5.0, and the atmospheric pressure is 5.0 Pa to 200 Pa. The method for producing a printed wiring board according to claim 5, wherein the plasma etching is performed in a CF 4 / O 2 gas atmosphere.
  8. 前記浄化処理は、プラズマ処理後に、湿式洗浄を行うものである請求項５～請求項７のいずれかに記載のプリント配線板の製造方法。 The method for manufacturing a printed wiring board according to any one of claims 5 to 7, wherein the purification treatment is a wet cleaning after the plasma treatment.
  9. 前記湿式洗浄は、界面活性剤を含有した酸性溶液を用いた洗浄である請求項８に記載のプリント配線板の製造方法。 The method of manufacturing a printed wiring board according to claim 8, wherein the wet cleaning is cleaning using an acidic solution containing a surfactant.
  10. 前記湿式洗浄は、前記界面活性剤を含有した酸性溶液を用いた洗浄と、銅のマイクロエッチング液とを用いた洗浄とを組み合わせたものである請求項８に記載のプリント配線板の製造方法。 The method of manufacturing a printed wiring board according to claim 8, wherein the wet cleaning is a combination of cleaning using an acidic solution containing the surfactant and cleaning using a copper microetching solution.
  11. 前記湿式洗浄は、銅回路を質量換算厚さで０．５μｍ以上エッチングして粗化する請求項１０に記載のプリント配線板の製造方法。 The method of manufacturing a printed wiring board according to claim 10, wherein the wet cleaning is performed by etching a copper circuit by 0.5 μm or more in terms of mass.
  12. 前記銅張積層板は、プライマー樹脂層付無粗化銅箔を用いて得られたものを用いる請求項１～請求項１１のいずれかに記載のプリント配線板の製造方法。 12. The method for producing a printed wiring board according to claim 1, wherein the copper-clad laminate is obtained by using a non-roughened copper foil with a primer resin layer.
  13. 請求項１～請求項１２のいずれかに記載のプリント配線板の製造方法において、
    　前記浄化処理を行った後に、ソルダーレジスト層を形成することを特徴とするソルダーレジスト層形成後のプリント配線板の製造方法。     In the method for manufacturing a printed wiring board according to any one of claims 1 to 12,
    A method for producing a printed wiring board after forming a solder resist layer, wherein a solder resist layer is formed after the purification treatment.
  14. 請求項１３に記載のプリント配線板の製造方法で得られたソルダーレジスト層形成後のプリント配線板であって、
    　２気圧のプレッシャークッカー内で５時間保持した後、２６０℃の半田バスに６０秒間浸漬したときに、ソルダーレジスト層と絶縁樹脂表面との間に、直径２０μｍ以上のスポット状のデラミネーションの発生が無いことを特徴とするプリント配線板。     A printed wiring board after the formation of a solder resist layer obtained by the method for producing a printed wiring board according to claim 13,
    After being held in a pressure cooker at 2 atm for 5 hours and then immersed in a solder bath at 260 ° C. for 60 seconds, spot-like delamination with a diameter of 20 μm or more occurs between the solder resist layer and the insulating resin surface. A printed wiring board characterized by the absence of it.
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