201223365 六、發明說明： 【發明所屬之技術領域】 本發明係關於印刷配線板之製造方法及使用該印刷配線板之製造方法 所得之印刷配線板。特別係關於抗焊劑層與露出於電路之間之絕緣樹脂層 表面之密著性優異之印刷配線板。 【先前技術】 以往’製造貼銅層壓板所使用之銅箔，係在該銅箔之與絕緣樹脂層貼 合之面施予粗化處理’使該粗化處理之凹凸形狀嵌入絕緣樹脂層之表面狀 態，而獲得物理上的錨定效果’藉此貼合絕緣樹脂層。因此於使用蝕刻法 於貼銅層壓板上形成電路而去除銅箔層之部位，使轉印有粗化處理形狀之 具有凹凸之絕緣樹脂層露出。於此種具有凹凸之絕緣樹脂層之情形，成為 與該表面上事後設置抗焊劑層、於多層化時與事後層積之樹脂層之密著性 良好者。 然而，最近在行動電話、攜帶式電腦、攜帶式音樂播放器、數位相機 等之主要攜帶式電子機器，隨著輕薄短小化，同時也要求多功能化，内置 之印刷配線板也隨之輕薄短小化之同時，要求提升配線密度而形成可對應 多功化之電路。製造此種印刷配線板之際，極力使貼銅層壓板所具有之銅 箔變薄，且大多使用藉由使銅箔及絕緣層之接著面平坦化形成具備良好蝕 刻因子之微細配線所要求之無粗化銅箔。此處所謂無粗化銅箔意指於銅箔 之與絕緣樹脂層貼合之面未施予粗化處理。因此，未形成嵌入絕緣樹脂層 表面之狀態之凹凸形狀的粗化處理，則無法在銅箔與絕緣樹脂層之間獲得 物理上的錨定效果。 其結果，使用貼合無粗化銅箔之貼銅層壓板製造印刷配線板時，在以 蝕刻法形成電路而去除銅箔層之部位，露出無凹凸形狀之平坦絕緣樹脂 201223365 層，故無法發揮錨定效果，因而與形成於其外層之抗焊劑層或絕緣樹脂層 之密著性變差。因此在吸濕狀態下施予熔融等加熱步驟時，有發生抗焊劑 層自絕緣樹知層剝離之現象(脫層)之不良情形。發生脫層之印刷配線板之剖 面圖示於第6圖。第6圖中，絕緣樹脂層材料bm和抗焊劑層psr之間， 可明顯地觀察到銅電路CC附近處存在有空間(脫層DL)。 又，於發生該脫層之部位，藉由朝電路通電容易發生表層遷移，難以 保證作為印刷配線板之長期可靠性。至於提高該等抗焊劑層與絕緣樹脂層 之吸濕、耐熱密著性之技術，有揭示於例如如下專利文獻丨（日本專利申請 案.申请公開號：專利公開第2008-16794號)以及專利文獻2 (曰本專利申 請案：申請公開號：專利公開第2010-103153號)之技術。 該專利文獻1之目的在提供有利於形成微細配線或電學特性及製造成 本，且可靠性尚之印刷配線板之製造方法，係揭示一種印刷配線板之製造 方法，係在使用表面之十點平均粗糙度(Rz)為2.〇 μιη以下之金屬箔而製造 印刷配線板之方法中，具有在成為與抗焊劑層之接著界面之樹脂表面施予 粗化處理之步驟’作為塗佈或積層抗焊劑層時之前處理。 而且’該專利文獻1之實施例中記載將在電解銅箔(FO-WS-18，[Technical Field] The present invention relates to a method of manufacturing a printed wiring board and a printed wiring board obtained by using the method of manufacturing the printed wiring board. In particular, a printed wiring board excellent in adhesion between the solder resist layer and the surface of the insulating resin layer exposed between the circuits. [Prior Art] Conventionally, the copper foil used for the production of a copper-clad laminate is subjected to a roughening treatment on the surface of the copper foil to which the insulating resin layer is bonded, and the uneven shape of the roughening treatment is embedded in the insulating resin layer. The surface state is obtained, and a physical anchoring effect is obtained 'by thereby bonding the insulating resin layer. Therefore, a portion of the copper foil layer is removed by forming an electric circuit on the copper-clad laminate using an etching method, and the insulating resin layer having the uneven shape to which the roughened shape is transferred is exposed. In the case of such an insulating resin layer having irregularities, the adhesion of the resin layer to the surface after the deposition of the solder resist layer is high. However, recently, the main portable electronic devices such as mobile phones, portable computers, portable music players, and digital cameras have become lighter and shorter, and also require multi-functionality. The built-in printed wiring boards are also light and short. At the same time, it is required to increase the wiring density to form a circuit that can cope with multi-function. In the production of such a printed wiring board, the copper foil of the copper-clad laminate is required to be thinned as much as possible, and it is often required to form a fine wiring having a good etching factor by flattening the copper foil and the insulating layer. No roughened copper foil. Here, the non-roughened copper foil means that the surface of the copper foil to which the insulating resin layer is bonded is not subjected to roughening treatment. Therefore, the roughening treatment of the uneven shape in the state in which the surface of the insulating resin layer is not formed does not provide a physical anchoring effect between the copper foil and the insulating resin layer. As a result, when a printed wiring board is produced by using a copper-clad laminate bonded with a non-roughened copper foil, the portion of the copper foil layer is removed by an etching method, and the flat insulating resin 201223365 layer having no uneven shape is exposed, so that the printed wiring board cannot be used. The anchoring effect is deteriorated, and thus the adhesion to the solder resist layer or the insulating resin layer formed on the outer layer thereof is deteriorated. Therefore, when a heating step such as melting is applied in a moisture absorption state, there is a problem that the solder resist layer is peeled off from the insulating tree layer (delamination). A cross-sectional view of the printed wiring board in which delamination occurs is shown in Fig. 6. In Fig. 6, between the insulating resin layer material bm and the solder resist layer psr, a space (delamination DL) is observed in the vicinity of the copper circuit CC. Further, in the portion where the delamination occurs, surface layer migration is likely to occur by energization of the circuit, and it is difficult to ensure long-term reliability as a printed wiring board. A technique for improving the moisture absorption and heat-resistance of the solder resist layer and the insulating resin layer is disclosed in, for example, the following patent documents (Japanese Patent Application No. Hei. No. 2008-16794) and a patent. The technique of the document 2 (the present patent application: Application Publication No.: Patent Publication No. 2010-103153). The purpose of Patent Document 1 is to provide a method for manufacturing a printed wiring board which is advantageous in forming fine wiring or electrical characteristics and manufacturing cost, and which is reliable in manufacturing a printed wiring board by using a ten-point average roughness of a surface. A method of producing a printed wiring board having a metal foil having a degree of (Rz) of 2 〇μηη or less, and a step of applying a roughening treatment to a surface of a resin which is an interface with the solder resist layer as a coating or laminated solder resist The layer is processed before. Further, the embodiment of Patent Document 1 describes that it will be in an electrolytic copper foil (FO-WS-18,
FurukawaCircuitFoilCo_，Ltd 製’厚度：18 μηι，Rz=1.8 μηι)之經石夕烧偶合 劑處理之被接著面上，塗布以厚度為3.0 μιη之樹脂組成物，然後在16(rc 下乾燥10分鐘左右而使溶劑殘留量為5%重量以下之黏附有樹脂之銅箔， 配置於重疊四片之曰立化成工業公司製品之玻璃布絕緣層丁 g環氧樹脂預浸 材料GEA-679F(厚度：〇.1 μιη)之下上，在18〇°c、2.5 MPa之條件下，壓製 成型1小時而製造貼銅層壓板，使用該貼銅層壓板，以氯化鐵系蝕刻液等 除去不需要部分之銅箔而得印刷配線板’於將該印刷配線板以3 %氫氧化 納+6%過症酸鉀水溶液處理予以化學粗化之絕緣樹脂基板上，積層日立化 4 201223365 成工業公司製之SR.72(X)G(抗焊劑），在121t、渔度·%、2大氣壓之條 件處理2小時後’在26(rc之焊浴中浸潰2〇秒鐘，或在i2rc、澄度騰。、 2大氣壓之條件處理196小時’抗㈣亦不會發生膨脹等問題。 又，專利文獻2之目的係提供一種即使使用與絕緣層密著之面的表面 粗链小之金射g ’亦可確鎌去金屬之絕緣層上之抗焊劑層之密著， 對於PCT之信雛優異’且具有微細電路且純健傳送損耗少之電路基 板’而揭示-齡絕緣層上貼合金射構狀貼金屬層壓板將其金屬羯 除去而形成之具斜體圖案之電路^^板中，在除S金屬·露出之絕緣層 表面上形成有粗面形狀之電路基板及其製造方法。 而且，該專利文獻2實施例中，記載有在施予黑化處理之内層芯材之 兩面上，介隔日立化成工業公司製之GEA_679FG作為絕緣層，使用熱壓貼 合曰立化成工業公司製之無高低差(pr〇flle)之銅箔pF_E_3，藉由半附加法形 成導體圖案之印刷配線板上，使用氧氣作為電漿氣體，以輸出1〇〇〇w，環 境壓力100 Pa下，實施5分鐘之氧氣電漿處理後，以化學蝕刻處理(MEC 股份有限公司製，CZ-8100)進行導體圖案表面之粗化處理，繼之，將乾膜 型抗焊劑之太陽油墨股份有限公司製之PER-800 AUS 402加以真空積層而 製成印刷配線板，將該印刷配線板經壓力蒸煮試驗法(PCT: 121它， 100%RH ’ 2大氣壓下連續保持96小時)之後，以實體顯微鏡進行觀察，於 絕緣層與抗焊劑層之間並無剝離。 亦即，專利文獻1及專利文獻2中所記載之技術，係藉由對使用表面 粗糙;度小的金屬之貼金屬f|層壓板姓刻其金屬猪，對其露出之絕緣層表 面進行加工，藉此可獲得與使用經粗化處理之銅箔時之具有凹凸之絕緣樹 脂層之露出面相同程度之表面粗糙度之狀態，而確保絕緣樹脂層與抗焊劑 層之間之良好吸濕、耐熱密著性。 201223365 破實’如同專利文獻丨及專利文獻2所揭示之發明，對使用表面粗糙 小之鋼4之貼銅層壓板之鋼$層蚀刻加卫’形成電路形狀，對露出於電路 間之絕緣樹麟表面進行力σ:η，亦可麟與使肖崎粗化處理之銅羯時之 具有凹凸之絕緣樹脂層之露出面相雜度之表面粗概態，於專利文獻i 記載之經壓力誠試驗法(mi、1GG%RH、2缝壓下之條件下處理2小 時)後’即使次潰於260 C之焊浴中20秒鐘，在絕緣層與抗焊劑層之間，亦 未見到孔徑20 μηι以上之斑點狀脫層之發生。 然而，如專利文獻1及專利文獻2中所記載，藉由對露出且平滑之絕 緣層表面進行加工，加工成與使用進行粗化處理之銅箔時之具有凹凸的絕 緣樹脂層之露出面相同程度之表面粗健，會導致印刷配線板之製造成本 增加’且就在銅-面内進行均一粗化處s之觀點而言，也會增加製造條件 之管理成本故而不佳。 因此，在市面上為削減印刷配線板之製造成本及管理成本，而期望可 對於露出於電路間之絕緣樹脂層之表面不施予粗化，而直接以平坦狀，穩 疋地供給與專利文獻丨及專利文獻2所記載之發侧樣地在絕緣樹脂層與 抗知劑層之間具有優異地密著性之印刷配線板。 【發明内容】 本發月人專經積極研究之結果，就着眼在以銅勉刻液姓刻銅羯之後露 出於電路n雜麟⑼±所触之鋪之防誠分U使抗焊劑 層和絕緣體樹脂層表面之吸濕·耐熱密著性穩定化之方法。 本發明之印刷配線板之製造方法：FurukawaCircuitFoilCo_, Ltd. 'Thickness: 18 μηι, Rz=1.8 μηι) was applied to the surface to be coated with a thickness of 3.0 μηη, and then dried at 16 (r) for about 10 minutes. The resin-attached copper foil having a solvent residual amount of 5% by weight or less is placed on a glass cloth insulating layer of a laminate of four products of the product of the Chemical Industry Co., Ltd., which is an epoxy resin prepreg GEA-679F (thickness: 〇 .1 μιη), under the conditions of 18 ° C, 2.5 MPa, press-molding for 1 hour to produce a copper-clad laminate, using the copper-clad laminate, removing the unnecessary portion with a ferric chloride-based etching solution or the like The printed wiring board of the copper foil was subjected to a chemically roughened insulating resin substrate treated with a 3% sodium hydroxide + 6% potassium perotate aqueous solution, and a laminate was formed by Hitachi Chemical Co., Ltd. SR.72(X)G (solder resist), after 2 hours of treatment at 121t, degree of fish·%, 2 atm, 'immersed in 26 (rc solder bath for 2 sec seconds, or at i2rc, Teng., 2 atmospheres of conditions for 196 hours 'anti-(four) will not swell Further, the object of Patent Document 2 is to provide a solder resist layer on the insulating layer of the metal even if the surface of the insulating layer is used to have a small thick chain. For the PCT letter, which is excellent in 'the circuit board with fine circuit and low transmission loss,' reveals an italic pattern formed by attaching an alloy-like metal-clad laminate to an insulating layer on the insulating layer. In the circuit board, a circuit board having a rough surface shape and a method of manufacturing the same are formed on the surface of the insulating layer excluding the S metal. Further, in the embodiment of Patent Document 2, the blackening treatment is described. On both sides of the inner core material, GEA_679FG manufactured by Hitachi Chemical Co., Ltd. is used as an insulating layer, and the copper foil pF_E_3 made of pr〇flle is produced by thermocompression bonding, using a semi-additive method. On the printed wiring board on which the conductor pattern is formed, oxygen gas is used as the plasma gas, and the output is 1 〇〇〇w, the ambient pressure is 100 Pa, and the oxygen plasma treatment is performed for 5 minutes, followed by chemical etching (manufactured by MEC Corporation). , CZ-8100) roughening treatment of the surface of the conductor pattern, followed by vacuum lamination of PER-800 AUS 402 manufactured by Sun Ink Co., Ltd. of dry film type solder resist to form a printed wiring board, and the printed wiring board is formed. After the pressure cooking test (PCT: 121, 100% RH 'continuously maintained for 96 hours at 2 atm), observation was carried out with a stereoscopic microscope, and there was no peeling between the insulating layer and the solder resist layer. That is, Patent Document 1 And the technique described in the patent document 2 is obtained by processing the surface of the exposed insulating layer by using a metal-foiled metal foil with a rough surface and a metal-clad metal foil. When the roughened copper foil is used, the exposed surface of the insulating resin layer having irregularities is in the same state of surface roughness, and good moisture absorption and heat-resistant adhesion between the insulating resin layer and the solder resist layer are ensured. 201223365 Breaking the 'Inventions as disclosed in the patent document 专利 and the patent document 2, the steel layer of the copper-clad laminate of the steel 4 having a rough surface is etched to form a circuit shape, and the insulating tree exposed between the circuits is formed. The surface of the lining is subjected to the force σ: η, and the rough surface of the surface of the exposed surface of the insulating resin layer having the unevenness when the ruthenium is roughened, and the pressure test is described in Patent Document i. After the method (mi, 1GG% RH, 2 conditions under 2 sewing conditions), even if it was broken in the 260 C solder bath for 20 seconds, no aperture was observed between the insulating layer and the solder resist layer. The occurrence of spotted delamination above 20 μηι. However, as described in Patent Document 1 and Patent Document 2, the exposed and smooth surface of the insulating layer is processed to be the same as the exposed surface of the insulating resin layer having irregularities when the copper foil subjected to the roughening treatment is used. The fact that the surface is coarse and strong will result in an increase in the manufacturing cost of the printed wiring board, and the management cost of the manufacturing conditions is also poor as far as the uniform roughening of the copper-plane is performed. Therefore, in order to reduce the manufacturing cost and the management cost of the printed wiring board, it is desirable to supply the surface of the insulating resin layer exposed between the circuits without being roughened, and to directly supply the patent document in a flat shape. In addition, the printed wiring board which has the excellent adhesiveness between the insulating resin layer and the anti-known agent layer in the hair-form of the patent document 2 is mentioned. [Summary of the Invention] The results of the active research of this month's people are focused on the appearance of the copper enamel in the copper enamel engraved after the copper enamel, exposed to the circuit n (the) A method of stabilizing the moisture absorption and heat resistance of the surface of the insulator resin layer. The manufacturing method of the printed wiring board of the invention:
I 本發明之印刷配線板之製造方法係使用貼合無粗化銅箔而成之貼銅層 、板而裝ie印細&線板之方法，其特徵為以銅#刻液#刻無粗化銅領而形 成電路之後，將路出於電路間之絕緣樹脂層表面施予淨化處理，該施予淨 6 201223365 化處理後於該絕緣樹脂表面所殘留之該無粗化銅箔之表面處理金屬成分， 於藉由XPS分析裝置(X、線源：AKka)，加速電壓：15kv，射束徑：5〇㈣ 進行進行半定量分析時，其各表面處理金屬成分係在檢測界限以下。 本發明之形成抗焊劑層後之印刷配線板之製造方法： 本發明之形成抗焊劑層後之印刷配線板之製造方法，其特徵為在上述 印刷配線板之製造方法中所述之進行淨化處理之後，形成抗焊劑層。 本發明之印刷配線板： 本發明之印刷配線板係以本發明之印刷配線板之製造方法所得之形成 抗焊劑層後之印刷配線板，其特徵為將該印刷配線板在121艽、濕度： 100%、2大氣壓下之條件下處理5小時後，在26〇〇c之焊浴中浸潰6〇秒時， 抗:tp劑層與絕緣樹脂表面之間’不發生直徑2〇叫以上之斑點狀脫層。 [發明之效果] 藉由採用本發明之印刷配線板之製造方法，在進行電路钮刻後，不對 露出於電路之間絕緣樹脂表面進行粗化，也能穩定地供應在壓力蒸煮試驗 (121 C、濕度：1〇〇%、2大氣壓下之條件處理5小時)之後，於260°C之焊 浴中浸潰60秒以上，亦未發生直徑2〇 pm以上之斑點狀脫層之印刷配線板。 以該製造方法所得之印刷配線板，露出於電路間之絕緣樹脂之表面為 平坦，同時在極端嚴苛之壓力蒸煮試驗之後，顯示出並未發生實用上成為 問題之絕緣樹脂層與抗焊劑層之間之直徑2〇啤以上之斑點狀脫層之特 性，耐遷性能亦優異，故而成為長期使用安定性優異之高品質製品。 【實施方式】 本發明之印刷配線板之製造形態： 本發明之印刷配線板之製造方法係使用貼合無粗化銅箔之貼銅層壓板 製造印刷配線板之方法，其特徵為將無粗化鋼箔以銅蝕刻液蝕刻形成電路 201223365 之後，對露出於電路間之絕緣樹脂表面施予淨化處理，該施予淨化處理後 之該絕_樹脂表面所殘留之該無粗化銅箔之表面處理金屬成分，於藉由 聊分析裝置(X線源：Al(ko〇，加速電壓：15 kV，射束徑：50 μηι)進行進 行半定量分析時’該各表面處理金屬成分為檢測界限以下。亦即，本發明 之印刷配線板之特徵，係經蝕刻形成電路之後，儘可能除去露出於電路間 之絕緣樹脂表面所_之無粗化鋪之表面處理金屬成分。其原因係，當 露出於電路間之絕緣樹脂表面殘留有該金屬成分時，會對抗焊劑層與絕緣 樹脂層間H時來不1影響，使通電時之啦雜劣化之故。再者， 藉由除去於該等電路間所露出之絕緣樹脂層表面之殘留金屬成分，即使不 進行以往方法所採用之過度粗化至絕緣樹脂表面之粗化程度之粗化處理， 也月b使在該表面所設之抗焊劑層及在外層所設之絕緣樹脂之間保持良好之 吸濕·耐熱密著性。又’本發明之吸濕.耐減著性係組合特定壓力蒸煮 試驗與焊接耐熱試驗而判斷者。 首先，就本發明所使用「貼合無粗化銅箔而成之貼銅層壓板」加以說 明。本文所述之「貼合無粗化銅箔而成之貼銅層壓板」意指使用無粗化銅 消作為最外層之銅箔而構成之貼銅層壓板之總稱，係包含所謂單面貼銅層 壓板、雙面貼銅層壓板、内含内層芯基材之多層貼銅層壓板之所有概念之 貼銅層壓板。又，無粗化銅箔可使用電解銅箔、壓延銅箔以及附有載體之 極薄銅箔，其厚度並無特別限制。 又，有關該銅箔之表面處理亦無特別限制，若就防銹成分而言，例如 亦可使用鎳-鋅合金、鎳-鈷合金、鎳_鋅_组合金、鎳_鈷_鉬合金、鋅錫合金、 鉻酸鹽處理等之各種合金。再者，於賴與絕緣樹麟之接觸面，就提高 枪著性之觀點而言，亦較好設有環氧系矽烷偶合劑、胺基系矽烷偶合劑、 巯基系矽烷偶合劑等之矽烷偶合劑處理層。 201223365 其次，製造貼銅層壓板所用之絕緣樹脂層，其樹脂成分、樹脂内所配 置之玻璃布或玻璃不織布等之骨架材料，亦均無特別限制。又，該絕緣樹 脂層亦可含有填充粒子。 然而’考慮無粗化銅箔與絕緣樹脂層之密著性時，於該貼銅層壓板之 最外層配置無粗化銅箔時，以使用附有底塗樹脂層之無粗化銅箔較佳。該 附有底塗樹脂層之無粗化銅箔，係在未施予粗化處理之銅箔之單面，設有 為了確保與樹脂基材之良好密著性之極薄底塗樹脂層之銅箔。這種附有底 塗樹脂層之無粗化銅箔，可使用例如三井金屬礦業股份有限公司製之「MuW Foil G :簡稱為MFG」，或曰立化成工業股份有限公司製之「pF_E」等。 此時之底塗樹脂層係發揮對於銅箔及絕緣樹脂兩者之接著力者，而容易地 確保無粗化銅箔與絕緣樹脂層之良好密著性。 本發明之印刷配線板之製造方法中，可使用相減法或半相加法形成電 路。依據相減法，係先以銅蝕刻液蝕刻該貼銅層壓板之處於最外層之無粗 化銅箔，除去不需要之銅羯部位，進行電路之形成。至於該時之電路形成 方法，係在外層銅羯之表面形成触刻光阻劑層，經曝光、顯像形成該餘刻 光阻劑圖形’隨後，使用銅姻液進行祕_之形成，最後除去侧光 阻劑，形成_配線之電路。又依據半相加法，係在貼合無粗化銅羯之貼 銅層壓板之形成通孔之位置上穿洞H施以無電解_，在形成之無 電解鍍銅層之表面形成光阻層，使鑛敷之光阻劑加以曝光、顯象。然後， 電鑛鋼進行電路圖案之形成，除去鑛敷之光阻層後，使用銅侧液触刻去 除無粗化銅箔，藉此形成印刷配線板之電路。 本發明之印祕線板之製造方法，關於氣化舰刻液、氣化職刻液、 硫酸·過氧化氫系侧液等之銅侧液種類，本來就未特別限制，而可任意 使用然而，應用於使用硫酸-過氧化氫系蝕刻液作為銅蝕刻液時最佳。不 201223365 過目前’在微間距電路之形成中，銅蝕刻液中以採用「硫酸_過氧化氫系蝕 刻液」為最適，故而亦為半相加法中一般採用之蝕刻液。然而，使用「硫 酸-過氧化氩系蝕刻液」時，將銅蝕刻而形成電路之後，在露出於電路間之 絕緣樹脂表面上’作為無粗化銅箔之表面處理金屬成分，有容易殘留一般 認為以蝕刻較難以去除之鎳、鉬、鈷、錫等成分之傾向。所以本發明之印 刷配線板之製造方法，可說是較適於以假定形成電路之際之銅蝕刻液係使 用「硫酸-過氧化氫系蝕刻液」之情形之印刷配線板之製造方法。 如上述方法完成電路之形成後’進行露出於電路間之絕緣樹脂表面所 殘留無粗化銅箔之表面處理金屬成分之去除。該操作稱為「淨化處理」。該 淨化處理之達成度’係以XPS分析裝置(X線源：Α1 (Κα)、加速電壓：15kv、 射束徑：50 μηι)對殘留於絕緣樹脂表面之無粗化銅箔之表面處理金屬成分 進行半定量分析而判斷。採用上述方法之理由如下述。例如淨化後之露出 之絕緣樹脂層以濃硫酸等溶解，使用ICp分析法或原子吸光分析法等之高 感度之直接分析方法，確認所殘留金屬元素量乃係理想方法。然而，此種 化學分析方法手續煩雜而費時，故非製造步驟中可實施之方法。相對於此， 依據採用XPS分析裝置之方法’由於可以㈣地完成败，故亦可於製造 步驟中實施。 有必要淨化至使用該XPS分析裝置之半定量分析中，該絕緣樹脂所能 檢測之銅箔之表面處理金屬成分成為檢測限界以下。亦即，使用此方法若 未殘留可被檢測程度之銅箔之表面處理金屬成分，則露出於電路間之絕緣 樹脂表面不粗化，在壓力蒸煮試驗(121t、濕度1〇〇%、2大氣壓之條件下 處理5小時)之後’浸潰於26〇°c之焊浴中6〇秒以上，亦可穩定地得到在絕 緣樹脂層與抗焊接層之間不發生餘2G卩祕上之職狀脫層之效果之故。 再者’本發明之印刷配線板之製造方法中，冑出於電路間之絕緣樹脂 201223365 表面，在上述淨化處理前之露出之絕緣樹脂表面之表面粗糙度(1〇點之平均 粗缝度Rzjis)之值设為R2(s) ’該淨化處理後之露出之絕緣樹脂表面之表面 粗輪度(10點之平均粗糖度喻)之值設為& (c)時，該[Rz (c)/ &⑻]之值 較好為1.2以下。又，心⑹及以⑻乃依照日本工業標準規格(jis b 〇6〇ι施) 所訂定「1G點之平均粗紐(Rzjis)」以雷射非_式粗糙測定儀測定時之 值’其檢測下限為〇·〇2 μιη左右。 本發明中請之發明中’隨淨化處理所採財法，而有露出於電路間之 絕緣樹脂表面之表©_度會增加之航，表示該表面姆度增加程度乃 係[Κζ(〇/Κζ(8)]之值。當表面狀態變化至該[Rz(c)/Rz⑻]之值超過！ 2之 程度時，於例如_絲處_，支持電路找輯騎會發生底切(油 cut)。其結果，微細電路中電路與絕緣樹脂之密著性降低故而不佳。 再者，此時較好淨化處理至处(C)為L8帅以下。該匕(c)超過a哗 時’由於在上述之半相加過程中，必須延長設定過綱時間故而不佳。又， 為形成更微細之電路，更好以((：)為1〇μηι以下。 此處’就本發明之印刷配線板之製造方法中之淨化處理之淨化方法加 以說明。«觸之「淨域理」伽嫌去露出於電路間之崎樹脂表面 所殘留金屬成分為目的者。因此，可自原本之物理處理或化學處理方法中 適當選擇而實施。具體而言，可自離子束法、郎射束法、電咖法、反 應性離子侧法、反紐軒束侧轉之電轉理、濃鹽轉液侧法 或使臟陳崎_刪。_，_鞠軸有微細電路 之印刷配線板之表面，不對其電路造成損害，而可均—處理之方法。基於 上述觀點’為了使露出於電關之絕緣樹脂表面所殘留之金 ㈣ 辦分浦置之半定量分_，各表面纽金觀分絲檢嫩界以下， 且獲得上述淨化處理後之表面粗，較好使用「電漿處理」或「儘可能 11 201223365 不溶解銅之溶液處理」。 t於上述電漿處理時，若職㈣之環賴體之選擇自由性或淨化處理 能力為優先反應性離子個法為佳ϋ採収應性離子银 刻法時’淨化縣之印刷配線板必須__面_面地處理。其結果，降低整個 2化處理步驟之生產鱗，同時也增加環魏體之雜量。為此，以輸入 能量設為1GW〜12G;W讀件，進行賴_，同畴化處理印刷配 線板之兩面難。_，輸人能量未達職m2時，働j量少，而有無法充 分除去露出於電關之麟脑表賴殘留金屬於之情況㈣不佳。另 一方面’當輸人能量顧12G W時’支魏路之輯猶層會發生底切。 其結果’在微細電路巾，電路與絕緣樹脂之密紐降低故而不佳。又，該 情況下，絕緣姻旨層表面之表面祕度絲紐生不均故而不佳。 本發明之印舰線板之製造方法中，進行電漿侧之際，侧腔室内 環境氣駄制「〇2與CF4之齡缝」難。如以，依觀應性離子 侧法，即使腔㈣之環魏_絲狀，亦鎌去表面處理金屬成分。 然而，«侧法中，隨環境氣體種_異，其侧性有很大變動。但是 採用「〇2與cf4之混合氣體」時，混合氣體中之CF4發揮與金屬之反應之 功能^而〇2發躺讀脂表硫水性之舰，故可達献好之侧狀態。 當然’亦可採用先使用CF4氣體實施電衆侧，然後，使用&作為链 刻腔室内之環境氣體之電雜刻方法。然而，若使用％與印之混合氣 體」作為_轉内之環體，啊藉—次鎌_贈揮上述功 所以就步驟及設備之單純化之觀點而言為佳。 而且’ CF4與〇2之氣體分壓比[(α?4分壓)/(〇2分壓)]之值為〇.2〜5.〇較 佳。當該氣體鍾比啊分賴&分壓)]之值未滿〇2時，無法發揮與金 屬反應之功能故而不佳4 -方面’ CF4與&之氣體分壓比[(⑶分麼斯2 12 201223365 分壓)]之值超過5·〇時，與金屬反應之功朗達飽和，由於分壓低，而無 法發揮賦予樹脂表面之親水性功能故而不佳。 而且’較好在侧腔室内之氣壓為0.5 Pa〜200 Pa之範圍進行電驗 刻。當_腔室内之氣壓未達5.0 Pa時，反應氣體少故而_速度變慢， 印刷配線板之生紐極猶躺不佳。另—方面，侧齡内之氣壓超過 200 Pa時’電漿之供應困難而不佳。 本發明之印刷配線板之製造方法中，採用處理作為淨化處理時， 較好在賴處理後進行料洗淨。此處所述在電漿_之後，由於露出於 電路間之絕_脂表面，殘留有因賴處理雌生之絕緣細旨魅，所以 使用濕式洗淨除去該絕緣翻旨雌。鱗之濕式洗淨由於細除去因電裝 處理所產生絕緣樹__目的，所以並非必須具财溶解去除殘留於絕 緣樹脂表面之金屬成分之能力’可從縫翁料_洗淨或藥品處理等 化學洗淨等巾選擇最適絲之方法而實鱗可。其巾，本發明之澄式洗淨， 較好選擇賴「含有界祕性#!级洗紐」及/或「罐侧液」之洗淨。 該濕式洗淨，槪以「含有界面活性狀酸洗驗」洗淨後，繼以「銅 之微敍刻液」洗淨之順序進行。其原目係，藉如此預先以「含有界面活性 劑之酸洗雜」洗淨，可麵電祕理後在印概線板表輯具有之殘渣， 同時能改善印_通板表面與溶液之賴性，可使隨後使狀「銅之微姓 刻液」分布到印繼線板之電關_之錢祕，能確實去除殘渣。 上述「含有界面活性劑之酸洗溶液」中可使用之「界面活性劑」，可 選擇使用_子界面活_、陽離子界面活關、兩性界面活性劑之任一 者’亦可以其等之混合物使用。 此處所述之非離子界面活性劑乃指在水中具有不離子化之親水基之界 面活性劑’可分類域型、咽、g旨._和其他類。具體而言，為高級 13 201223365 醇、院基_、脂肪酸、胺類、伸絲：胺、脂肪_胺、續醯胺、多元 醇類、糖苷衍生物等。 …陽離子界㈣卿乃指在溶液巾具有疏水基之部分電離為 陽離子之性質之界面活性劑。更具_，為雜_基 二甲基錄鹽、硬脂基三f基鋪、月桂基二甲基乙基紐、月桂基二甲基 録甜菜驗、硬麟#級甜菜m料職基健、十八絲二 甲基节基姆、三甲基枝纏、三乙基料趣、雅基料鹽、月桂 基咪唾鏘鹽、硬絲胺乙酸鹽、月桂基胺乙酸鹽等。 、所》月兩欧界面活性劑乃指溶解於水時，在驗性領域具有陰離子 界面活性劑之性質，而在酸性領域具有_子界面活性劑之性質之界面活 性齊卜若具_言’則為絲絲甜菜_、絲胺基_型、絲味嗤 啉型等。 於硫酸、Μ、雜飛化氫水溶料之可洗__板表面之溶 液中含有上關，崎界面_㈣度絲(Π g/L〜離之濃 度添加’獲得洗淨用之酸性溶液。鱗之界面活化纖度未達G1叭時， 即使使用上雜何界岐_，也無法獲得魏處理狀印刷配線板表面 /、合液之顧改善效果ϋ面，即使界面活性鑛度超過2Gg/L，電聚 處理之印刷配線板表面與溶液n祕提高之絲已飽和 ，所以不過 是浪費資源而已。使用該酸性溶液洗淨電漿處理後之印刷配線板表面之印 間’以I5秒至7分鐘為佳。該洗淨時間未達15秒時，無法獲得改善奶 處理後之印概線板表面與溶液之滿難之絲。另—方面，該洗淨咐 超過7为鐘時’電浆處理後之印刷配線板之電路部分開始受到浸触而不佳。 _使用上述銅之微侧液之濕式洗淨，係將銅電路侧以質量換算厚度 表示為0.5哗以上加以粗化。將銅電路_以質量換算厚度表示為〇 一I The method for producing a printed wiring board according to the present invention is a method in which a copper-clad layer and a plate are bonded to a copper-clad layer and a plate without a roughened copper foil, and is characterized in that it is engraved with copper #刻液#. After roughening the copper collar to form a circuit, the surface of the insulating resin layer between the circuits is subjected to a purification treatment, and the surface treatment of the roughened copper foil remaining on the surface of the insulating resin after the treatment is applied Metal component, by XPS analyzer (X, line source: AKka), accelerating voltage: 15 kv, beam diameter: 5 〇 (4) When semi-quantitative analysis is performed, the surface-treated metal components are below the detection limit. A method of producing a printed wiring board after forming a solder resist layer according to the present invention: a method of manufacturing a printed wiring board after forming a solder resist layer according to the present invention, characterized in that it is subjected to purification treatment as described in the method for producing a printed wiring board Thereafter, a solder resist layer is formed. Printed wiring board of the present invention: The printed wiring board of the present invention is a printed wiring board obtained by forming a solder resist layer obtained by the method for producing a printed wiring board of the present invention, characterized in that the printed wiring board is at 121 Torr and humidity: After being treated for 5 hours at 100% and 2 atm., after being immersed in a 26 〇〇c solder bath for 6 sec seconds, there is no diameter 2 squeaking between the anti-tp agent layer and the surface of the insulating resin. Spotted delamination. [Effect of the Invention] By using the manufacturing method of the printed wiring board of the present invention, after the circuit button is engraved, the surface of the insulating resin exposed between the circuits is not roughened, and the pressure cooking test can be stably supplied (121 C). , humidity: 1〇〇%, conditional treatment at 2 atmospheres for 5 hours), then immersed in a solder bath at 260 ° C for 60 seconds or more, and there is no spotted delamination printed wiring board with a diameter of 2 pm or more. . In the printed wiring board obtained by the manufacturing method, the surface of the insulating resin exposed between the circuits is flat, and after the extremely severe pressure cooking test, the insulating resin layer and the solder resist layer which are not practically problematic are displayed. The characteristics of the spot-like delamination of the diameter of 2 〇 beer are excellent, and the resistance to migration is also excellent, so that it is a high-quality product excellent in long-term stability. [Embodiment] The manufacturing method of the printed wiring board of this invention is the manufacturing method of the printed wiring board of this invention, and the method of manufacturing the printed wiring board by the laminated copper laminated board which does not roughen copper foil, and it is characterized by the After the chemical steel foil is etched by the copper etching solution to form the circuit 201223365, the surface of the insulating resin exposed between the circuits is subjected to a purification treatment, and the surface treatment of the roughened copper foil remaining on the surface of the resin after the purification treatment is applied The metal component was subjected to semi-quantitative analysis by X-ray source (X-ray source: Al (ko〇, acceleration voltage: 15 kV, beam diameter: 50 μηι)). The surface-treated metal components were below the detection limit. That is, the printed wiring board of the present invention is characterized in that, after etching to form a circuit, the surface of the insulating resin exposed between the circuits is removed as much as possible without any roughening of the surface-treated metal component. When the metal component remains on the surface of the insulating resin between the circuits, it will not affect the H between the flux layer and the insulating resin layer, and the impurities during the energization will deteriorate. By removing the residual metal component on the surface of the insulating resin layer exposed between the circuits, the roughening process to the extent of roughening of the surface of the insulating resin is not performed by the conventional method, and The solder resist layer provided on the surface and the insulating resin provided on the outer layer maintain good moisture absorption and heat-resistance tightness. Further, the moisture absorption and shrinkage resistance combination of the present invention is combined with a specific pressure cooking test and a solder heat resistance test. First, the "copper-clad laminate made of a non-roughened copper foil" used in the present invention will be described. "The copper-clad laminate obtained by laminating no roughened copper foil" is described herein. It is a general term for a copper-clad laminate which is formed by using a copper foil which is not the roughened copper as the outermost layer, and includes a so-called single-sided copper-clad laminate, a double-sided copper-clad laminate, and a multilayer sticker containing an inner core substrate. A copper-clad laminate of all the concepts of the copper laminate. Further, the roughened copper foil may be an electrolytic copper foil, a rolled copper foil, or an extremely thin copper foil with a carrier, and the thickness thereof is not particularly limited. The surface treatment of foil is also not special In the case of the rust preventive component, for example, various alloys such as a nickel-zinc alloy, a nickel-cobalt alloy, a nickel-zinc_combined gold, a nickel-cobalt-molybdenum alloy, a zinc-tin alloy, and a chromate treatment may be used. Furthermore, from the viewpoint of improving the guniness of the contact surface between the lyon and the insulating tree, it is preferable to provide an epoxy decane coupling agent, an amine decane coupling agent, a fluorenyl decane coupling agent, and the like.矽 偶 偶 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2013 The layer may also contain filler particles. However, when considering the adhesion between the roughened copper foil and the insulating resin layer, when the outermost layer of the copper-clad laminate is provided with no roughened copper foil, the primer resin layer is used. Preferably, the roughened copper foil is provided. The roughened copper foil with the primer resin layer is provided on one side of the copper foil which is not subjected to the roughening treatment, and is provided to ensure good adhesion to the resin substrate. Copper foil with a very thin undercoat resin layer. For the non-roughened copper foil with a primer resin layer, for example, "MuW Foil G: MFG" manufactured by Mitsui Mining Co., Ltd., or "pF_E" manufactured by Toray Chemical Industry Co., Ltd., etc. . In this case, the undercoat resin layer exhibits adhesion to both the copper foil and the insulating resin, and it is easy to ensure good adhesion of the roughened copper foil and the insulating resin layer. In the method of producing a printed wiring board of the present invention, a circuit can be formed by a subtractive method or a semi-additive method. According to the subtractive method, the roughened copper foil at the outermost layer of the copper-clad laminate is first etched with a copper etching solution, and the unnecessary copper bead portion is removed to form a circuit. As for the circuit forming method at this time, a photoresist layer is formed on the surface of the outer layer of the copper beryllium, and the photoresist pattern is formed by exposure and development. Subsequently, the formation of the secret crystal is performed using the copper aramid liquid, and finally The side photoresist is removed to form a circuit of the wiring. According to the semi-phase addition method, the hole H is applied to the through hole of the copper-clad laminate without the roughened copper enamel, and the electroless _ is formed on the surface of the formed electroless copper plating layer. The layer is used to expose and develop the photoresist of the mineral deposit. Then, the electric ore steel is formed into a circuit pattern, and after removing the deposited photoresist layer, the copper side liquid is used to remove the roughened copper foil, thereby forming a circuit for the printed wiring board. In the method for producing the stencil sheet of the present invention, the type of the copper side liquid such as the gasification ship engraving liquid, the gasification service liquid, and the sulfuric acid/hydrogen peroxide side liquid is not particularly limited, and can be used arbitrarily. It is preferably used when a sulfuric acid-hydrogen peroxide-based etching solution is used as the copper etching solution. No. 201223365 In the past, in the formation of a micro-pitch circuit, the use of "sulfuric acid-hydrogen peroxide-based etching solution" in the copper etching solution is optimal, and therefore, it is also an etching liquid generally used in the semi-phase addition method. However, when the "sulfuric acid-argon peroxide-based etching solution" is used, after the copper is etched to form a circuit, the surface of the insulating resin exposed between the circuits is treated as a surface-treated metal component without roughening copper foil, which tends to remain. It is considered that there is a tendency to etch a component such as nickel, molybdenum, cobalt, or tin which is difficult to remove. Therefore, the method for producing a printed wiring board of the present invention can be said to be a method for producing a printed wiring board in which a "sulfuric acid-hydrogen peroxide-based etching liquid" is used in a copper etching liquid which is assumed to form a circuit. After the formation of the circuit is completed as described above, the removal of the surface-treated metal component without the roughened copper foil remaining on the surface of the insulating resin exposed between the circuits is performed. This operation is called "purification processing". The degree of achievement of the purification treatment is based on an XPS analysis apparatus (X-ray source: Α1 (Κα), acceleration voltage: 15 kV, beam diameter: 50 μηι) on the surface-treated metal of the roughened copper foil remaining on the surface of the insulating resin. The components were judged by semi-quantitative analysis. The reasons for using the above method are as follows. For example, the insulating resin layer exposed after the purification is dissolved in concentrated sulfuric acid or the like, and it is an ideal method to confirm the amount of residual metal elements by direct analysis of high sensitivity such as ICp analysis or atomic absorption spectrometry. However, such a chemical analysis method is cumbersome and time consuming, and thus may be carried out in a non-manufacturing step. On the other hand, the method according to the use of the XPS analysis apparatus can be carried out in the manufacturing step because the failure can be accomplished four (4). It is necessary to purify the semi-quantitative analysis using the XPS analyzer, and the surface-treated metal component of the copper foil detectable by the insulating resin becomes below the detection limit. That is, if the metal component of the surface of the copper foil which can be detected is not left by this method, the surface of the insulating resin exposed between the circuits is not roughened, and the pressure cooking test (121t, humidity: 1%, 2 atmospheres) After the treatment under the conditions of 5 hours), it is immersed in a solder bath of 26 ° C for more than 6 sec seconds, and it is also possible to stably obtain a condition that does not occur between the insulating resin layer and the anti-welding layer. The effect of delamination. In the method of manufacturing a printed wiring board according to the present invention, the surface roughness of the surface of the insulating resin exposed before the above-mentioned purification treatment in the surface of the insulating resin 201223365 between the circuits (the average roughness of 1 point Rzjis) The value of R2(s) is set to the value of the rough roundness of the surface of the insulating resin exposed after the purification treatment (the average coarse sugar degree of 10 points) is set to & (c), the [Rz (c) The value of / / & (8)] is preferably 1.2 or less. In addition, the heart (6) and (8) are the values of "Rzjis of 1G points" as determined by the Japanese Industrial Standards (jis b 〇6〇ι), measured by a laser non-roughness tester' The detection limit is about 〇·〇2 μιη. In the invention of the present invention, the method of "purchasing with the purification process" and the surface of the insulating resin exposed between the circuits will increase, indicating that the degree of increase in the surface is [Κζ(〇/ The value of Κζ(8)]. When the surface state changes to the extent that the value of [Rz(c)/Rz(8)] exceeds ! 2, for example, at the _ wire _, the support circuit finds the ride to occur undercut (oil cut) As a result, the adhesion between the circuit and the insulating resin in the fine circuit is lowered, which is not preferable. Further, at this time, it is preferable that the purification treatment is everywhere (C) is less than L8. When the 匕(c) exceeds a哗' In the above-described half-addition process, it is not preferable to extend the set-up time. Also, in order to form a finer circuit, it is better to ((:) be 1 〇μηι or less. Here, the printing of the present invention The purification method of the purification treatment in the method of manufacturing the wiring board is explained. The "cleaning" of the touch panel is intended to be exposed to the metal component remaining on the resin surface of the circuit. Therefore, the physical treatment can be performed from the original. Or suitably selected in a chemical treatment method. Specifically, the ion beam method, Beam method, electric coffee method, reactive ion side method, electro-transfer of anti-Newton beam side turn, concentrated salt transfer side method or dirty saki _ deleted. _, _ 鞠 axis has fine circuit printed wiring board The surface is not damaged by its circuit, but can be treated uniformly. Based on the above point of view, in order to make the gold (4) remaining on the surface of the insulating resin exposed to the electric switch, the semi-quantitative fraction of the surface is set. Observe the wire below the tender zone, and obtain the surface roughness after the above purification treatment, preferably using "plasma treatment" or "as far as possible 11 201223365 solution of insoluble copper solution". (4) The freedom of choice or the ability to purify the lyophilized body is the preferred reactive ion method. When the ionic ion silver engraving method is adopted, the printed wiring board of the purification county must be processed __ surface _ surface. The production scale of the entire two-step processing step is reduced, and the amount of impurities in the ring-shaped body is also increased. For this reason, the input energy is set to 1 GW to 12 G; the W reading is performed, and the two sides of the printed wiring board are difficult to process. _, when the input energy is not up to m2, the amount of 働j However, there is a situation in which it is impossible to fully remove the residual metal exposed to the electric brain. (4) Poor. On the other hand, when the input energy is 12G W, the undercut of the Wei Wei Road will occur. In the micro-circuit towel, the density of the circuit and the insulating resin is lowered, and in this case, the surface of the surface of the insulating layer is not uniform, and the manufacturing of the printed ship board is not good. In the method, when the plasma side is performed, it is difficult to make the "〇2 and CF4 age seams" in the side chamber atmosphere. If, according to the observation, the ion side method, even if the cavity (four) is in the shape of Wei-filament, The surface treatment of the metal component is carried out. However, in the side method, the laterality varies greatly depending on the type of the ambient gas. However, when the "mixed gas of 〇2 and cf4" is used, the CF4 in the mixed gas acts as a metal. The function of the reaction ^ and 〇 2 hair lying on the sulphur water-based ship, so it can reach the state of the side. Of course, it is also possible to use the CF4 gas to implement the electric side, and then use & as an electric engraving method for the ambient gas in the chain chamber. However, if the mixture of % and India is used as the ring body within the _ turn, it is better to use the above-mentioned work for the simplification of the steps and equipment. Further, the gas partial pressure ratio [(α?4 partial pressure) / (〇2 partial pressure)] of CF4 and 〇2 is preferably 2.2 to 5. 〇. When the value of the gas clock is less than 〇2, the function of reacting with the metal cannot be performed, so it is not good. 4 - Aspects of the gas partial pressure ratio of CF4 & [((3) points? When the value of s 2 12 201223365 partial pressure)] exceeds 5·〇, the reaction with the metal is saturated, and the partial pressure is low, so that the hydrophilic function imparted to the surface of the resin cannot be exhibited, which is not preferable. Further, it is preferable to carry out electric inspection in a range of from 0.5 Pa to 200 Pa in the side chamber. When the pressure in the chamber is less than 5.0 Pa, the reaction gas is small and the speed is slow, and the printed wiring board is still poorly placed. On the other hand, when the gas pressure in the side age exceeds 200 Pa, the supply of plasma is not good. In the method for producing a printed wiring board of the present invention, when the treatment is used as the purification treatment, it is preferred to carry out the material washing after the treatment. Here, after the plasma_before, since it is exposed on the surface of the grease between the circuits, the insulation of the female is left to be treated, so that the insulation is removed by wet cleaning. The wet cleaning of the scales is not necessary to dissolve the metal components remaining on the surface of the insulating resin due to the fine removal of the insulating tree generated by the electrical equipment treatment, which can be processed from the sewing material _ washing or drug treatment. Such as chemical cleaning and other towels to choose the most suitable method of silk. The towel is cleaned by the clear type of the present invention, and it is better to wash it by "containing the secret line #!级洗洗" and/or "can side liquid". This wet type washing is carried out by "washing with an interface-like acid pickling test" and then washing in the order of "copper micro-synthesis liquid". The original purpose is to wash the residue in the "acid-containing acid containing the surfactant" in advance, and the residue can be found on the printed circuit board after the surface is secreted, and the surface of the printing plate and the solution can be improved. The dependence can be used to distribute the "copper micro-inscription" to the seal of the printing board, which can remove the residue. The "surfactant" which can be used in the above "acid-washing solution containing a surfactant" can be selected from the use of a _sub-interface _, a cation interface, or an amphoteric surfactant, or a mixture thereof. use. The nonionic surfactant described herein refers to an interfacial surfactant having a non-ionizing hydrophilic group in water, a phage type, a pharynx, a g-type, and the like. Specifically, it is a high-grade 13 201223365 alcohol, a hospital base, a fatty acid, an amine, an extrusion: an amine, a fatty amine, a hydrazine, a polyhydric alcohol, a glycoside derivative, and the like. The cation boundary (4) refers to a surfactant which is ionized to a cationic state in a portion of the solution towel having a hydrophobic group. More _, is a hetero- dimethyl dimethyl salt, stearyl stribasine, lauryl dimethyl ethyl nucleus, lauryl dimethyl ketone beet test, hard lin # grade beet m material job , 18-dimethyl dimethyl ketone, trimethyl entanglement, triethyl hydride, yaki salt, lauryl sulphate salt, hard silk amine acetate, laurylamine acetate and the like. The "two-European interface active agent" refers to the property of an anionic surfactant in the field of detection when dissolved in water, and the interfacial activity of the nature of the surfactant in the acidic field is _言' Then it is silk beet _, silk amine _ type, silk porphyrin type and the like. In the solution of the surface of the washable __ plate of sulfuric acid, hydrazine, and hydrogenated hydrogenated water, the upper layer is used, and the surface of the plate is _(four) filament (Πg/L~ concentration is added to obtain the acidic solution for washing). When the activation fineness of the interface of the scale is less than G1, even if the surface is used, the surface of the printed wiring board and the effect of improving the liquid can not be obtained, even if the interface activity is more than 2Gg/L. The surface of the printed wiring board and the solution of the solution are saturated, so it is a waste of resources. The printing solution on the surface of the printed wiring board after the plasma treatment is washed with I5 seconds to 7 minutes. Good. When the cleaning time is less than 15 seconds, it is impossible to obtain the silk which improves the surface of the printed circuit board and the solution after the milk treatment. On the other hand, when the cleaning 咐 exceeds 7 minutes, 'after the plasma treatment The circuit portion of the printed wiring board is initially poorly immersed. _ The wet cleaning using the copper micro side liquid is performed by roughening the copper circuit side with a thickness of 0.5 哗 or more. _ expressed in mass conversion thickness
S 14 201223365 以上時’銅電路之表面可發揮與抗焊劑層或多層化時之絕緣樹脂層之充分 接著力。另一方面，若在該蝕刻條件下，殘留於電路表面之污染物質、蝕 刻殘渣、露出於電路間之絕緣樹脂表面之淨化處理所產生之殘渣等亦可被 去除。其結果，可同時提高抗焊劑層與電路表面之密著性以及絕緣樹脂成 分與電路表面之密著性。 形成抗焊劑層後之印刷配線板之製造形態： 本發明之形成抗焊劑層後之印刷配線板之製造方法，其特徵係使用以 設有上述淨化處理之方法所製造之印刷配線板，在必要處形成抗焊劑層。 如此，使用以設有上述淨化處理之方法所製造之印刷配線板，則露出於電 路間之絕緣樹脂表面所殘留之金屬成分成為使用XPS裝置進行半定量分析 之檢測界限以下，故可獲得抗焊劑層和絕緣樹脂層之密著性、抗焊劑層與 電路表面之密著性、絕緣樹脂成分與電路表面之密著性皆良好之形成抗焊 劑層後之印刷配線板。 形成抗焊劑層後之印刷配線板之形態： 該形成抗焊劑層後之印刷配線板之特徵為在2大氣壓之壓力蒸煮器中 保持5小時之後，在260 C之焊浴中浸潰60秒時，抗焊劑層與絕緣樹脂表 面之間’不會產生直徑20 μηι以上之斑點狀脫層。因此，即使在12Γ(：、濕 度：100%、2大氣壓下之條件下處理196小時時，抗焊劑層與絕緣樹脂表 面之間，也不會產生直徑20师以上之斑點狀脫層。以下使用實施例和比 較例就本發明之内容更具體加以說明。 實施例1 [貼銅層壓板之製造] 於使厚度0.1 mm之預浸材料(GHPL830-NS :三菱瓦斯化學股分有限公 司製）三片重疊後之兩面上，重疊在表面粗糙度(1〇點平均粗糙度阳⑷為 15 201223365 0.37㈣之無粗化銅箱上塗佈底塗樹脂而成之附有底塗樹脂層之無粗化銅 ri(MFG-DMT3F ： 220〇C ^ 4.0 MP之真空壓製裝置内進行％分鐘之成型，製得厚⑽腳之貼銅層驗。 [印刷配線板之製造] 使用半加法法製；^印細&線板。此印刷配線板之製造順序在實施例與 比較例均相同。在上述貼鋼層壓板之外層_之表面形成雌光阻層，使 用用以形成線寬/間隔寬為5〇〇㈣簡μπι之格子狀配線之光阻圖案用曝 光薄膜予轉光、顯影，而電_至總厚度為15吨。然後，娜鑛敷光阻 劑之後’使用硫酸-過氧化氫系姓刻液(cpE_ :三菱瓦斯化學公司製），以 飯刻除去露出之無粗化輔’進行電路之形成。將如此所製造之印刷配線 板進行分割，作為實施例1所用之印刷配線板試料。 [淨化處理] 實施例1之淨化處理’係將上述印刷配線板試料浸潰在6〇c；c之化‘ 之鹽酸中60分鐘，水洗後乾燥而製得淨化處理試料。 [露出於電路間之絕緣樹脂層表面之評估] 將淨化處理試料之露出於電路間之絕賴脂層之淨化處理前與淨化處 理後之表面’藉XPS分析裝置(X線源：A1(ka)，加速電壓：15 kv，線束 徑.50 μηι)就其殘留金屬成分量進行半定量分析，進而測定其表面粗縫度 (Rzjis)。絕緣樹脂之表面狀態示於後述表1中。 [抗焊劑層之形成及脫層之評估]When S 14 201223365 or more, the surface of the copper circuit can exhibit sufficient adhesion force with the solder resist layer or the insulating resin layer at the time of multilayering. On the other hand, under the etching conditions, the contaminants remaining on the surface of the circuit, the etch residue, and the residue generated by the purification treatment of the surface of the insulating resin exposed between the circuits can be removed. As a result, the adhesion between the solder resist layer and the circuit surface and the adhesion between the insulating resin component and the circuit surface can be improved at the same time. Manufacturing method of a printed wiring board after forming a solder resist layer: A method of manufacturing a printed wiring board after forming a solder resist layer according to the present invention is characterized in that a printed wiring board manufactured by the method of performing the above-described purification processing is used. A solder resist layer is formed. When the printed wiring board manufactured by the method of the above-described purification treatment is used, the metal component remaining on the surface of the insulating resin exposed between the circuits is below the detection limit of the semi-quantitative analysis using the XPS device, so that the solder resist can be obtained. A printed wiring board in which the adhesion between the layer and the insulating resin layer, the adhesion between the solder resist layer and the circuit surface, and the adhesion between the insulating resin component and the circuit surface are good, and the solder resist layer is formed. The form of the printed wiring board after forming the solder resist layer: The printed wiring board after forming the solder resist layer is characterized by being held in a pressure cooker of 2 atm for 5 hours and then immersed in a 260 C solder bath for 60 seconds. Between the solder resist layer and the surface of the insulating resin, a speckle-like delamination of 20 μηη or more in diameter does not occur. Therefore, even if it is treated under conditions of 12 Γ (:, humidity: 100%, 2 atm. for 196 hours, no speckle delamination of 20 or more diameters is produced between the solder resist layer and the surface of the insulating resin. The examples and comparative examples are more specifically described in the context of the present invention. Example 1 [Manufacture of copper-clad laminate] For prepreg (GHPL830-NS: manufactured by Mitsubishi Gas Chemical Co., Ltd.) having a thickness of 0.1 mm On both sides after the overlap of the sheets, the surface roughness (1〇 point average roughness yang (4) is 15 201223365 0.37 (4), the rough resin copper box is coated with the primer resin and the undercoat resin layer is not thick. Copper ri (MFG-DMT3F: 220〇C ^ 4.0 MP vacuum pressing device is molded in % minutes to produce a thick (10) foot copper layer inspection. [Manufacturing of printed wiring board] Using semi-additive method; Thin & wire board. The manufacturing order of the printed wiring board is the same in both the embodiment and the comparative example. A female photoresist layer is formed on the surface of the outer layer of the above-mentioned steel laminated board, and is used to form a line width/space width of 5 〇〇(4) Light-resistance diagram of grid-like wiring of simple μπι The exposed film was used for pre-rotation and development, and the total thickness was 15 tons. Then, after the application of the photoresist, the sulphuric acid-hydrogen peroxide-based engraving solution (cpE_: manufactured by Mitsubishi Gas Chemical Co., Ltd.) was used. The printed wiring board manufactured in this manner was divided into the printed wiring board samples used in the first embodiment. The purification treatment of the first embodiment was carried out. The printed wiring board sample was immersed in hydrochloric acid of 6 〇c; c for 60 minutes, and washed with water to obtain a purification treatment sample. [Evaluation of the surface of the insulating resin layer exposed between the circuits] Exposed to the surface of the grease layer before the purification process and the surface after the purification process. By XPS analyzer (X-ray source: A1 (ka), accelerating voltage: 15 kv, wire diameter: 50 μηι), the residual metal The amount of the component was subjected to semi-quantitative analysis, and the surface roughness (Rzjis) was measured. The surface state of the insulating resin is shown in Table 1 below. [Evaluation of formation and delamination of the solder resist layer]
上述淨化處理試料，為賦與銅配線與抗焊劑層之密著性，以微蝕刻液 (CZ8101B : MEC股份有限公司製)噴霧30秒，水洗後乾燥。於該淨化處理 試料上形成抗焊劑層(AUS308 :太陽油墨股分有限公司製），在12ι<)〇χ5小 時之PCT處理後，浸潰於260°C之焊浴中60秒（下文中稱該操作為「PCT 201223365 焊接試驗」）。針對該PCT焊接試驗後之淨化試料，以光學顯微鏡觀察脫層 之發生並評估。該脫層之評估結果與淨化處理條件示於後述表2中。 實施例2 實施例2中，將實施例丨中所使用之附有底塗樹脂層之無粗化銅箔， 替代三井金屬礦業股份有限公司製之MFG-DMT3F而改用日立化成工業股 份有限公司製之ΡΡ·Ε_3之外，與實施例1同樣製造印刷配線板。 對上述印刷配線板試料，以與實施例1同樣施予淨化處理而製成淨化 處理試料，該淨化處理試料之露出於電路間之絕緣樹脂層表面之殘留金屬 成分進行半定量分析，進而測定其表面粗糙度供zjis)。又，以與實施例i同 樣評估脫層之發生。露出於電路間之絕緣樹脂層表面狀態示於後述表1中， 脫層之評估結果與淨化處理條件示於後述之表2中。 實施例3 實施例3中，使用實施例丨所製造之印刷配線板之試料，僅變更淨化 處理條件而進行。 淨化處理鑛上述印綱雜之試料在[(α?4分壓)/(〇2分刻=〇33、氣 壓15 Pa之腔至内’進行輸端量設為4〇勤2之條件之電衆钱刻，繼之， 於3有作為之硫酸與作為界面活性冑彳之乙二醇之紙[plate pc-mmeltex股份有限公_之1G f魏溶财浸漬5分鐘進行洗淨 後，喷霧微侧液(CZ81_ : MEC股份有限公司製品）3〇秒，水洗後乾燥， 而製得淨化處理試料。剛形成電路後之露出於電關之絕緣樹脂層表面之 掃描型電子織鏡之觀_像示於第3圖巾，_電漿侧後之露出於電 路間之職細旨練面讀描魏伟概之觀⑽像祕帛2圖，而剛 微勉刻後之露出於電路間之絕緣樹脂層表面之掃描型電子顯微鏡之觀察影 像示於第1圖中。The above-mentioned purification treatment sample was sprayed with a microetching liquid (CZ8101B: manufactured by MEC Co., Ltd.) for 30 seconds to impart adhesion to the copper wiring and the solder resist layer, and washed with water and dried. A solder resist layer (AUS308: manufactured by Sun Ink Co., Ltd.) was formed on the purification treatment sample, and after PCT treatment for 12 hours <) 〇χ 5 hours, it was immersed in a solder bath of 260 ° C for 60 seconds (hereinafter referred to as This operation is "PCT 201223365 Welding Test"). For the cleaned sample after the PCT welding test, the occurrence of delamination was observed by an optical microscope and evaluated. The evaluation results of the delamination and the purification treatment conditions are shown in Table 2 below. [Example 2] In Example 2, the non-roughened copper foil with the primer resin layer used in the Example , was replaced by MFG-DMT3F manufactured by Mitsui Mining Co., Ltd. and changed to Hitachi Chemical Industry Co., Ltd. A printed wiring board was produced in the same manner as in Example 1 except that Ε·Ε_3 was used. The printed wiring board sample was subjected to a purification treatment in the same manner as in Example 1 to prepare a purification treatment sample, and the residual metal component of the surface of the insulating resin layer exposed between the circuits of the purification treatment sample was subjected to semi-quantitative analysis, and further measured. Surface roughness for zjis). Further, the occurrence of delamination was evaluated in the same manner as in Example i. The surface state of the insulating resin layer exposed between the circuits is shown in Table 1 below, and the evaluation results of the delamination and the purification treatment conditions are shown in Table 2 to be described later. [Example 3] In Example 3, the sample of the printed wiring board manufactured in Example , was used, and only the purification treatment conditions were changed. Purification and treatment of the above-mentioned printed materials of the printed matter in the [(α?4 partial pressure) / (〇2 minutes = 〇 33, the pressure of 15 Pa cavity to the inside] to carry out the condition that the output amount is set to 4 〇勤2 The money is engraved, followed by the sulphuric acid and the ethylene glycol as the interface 胄彳 [plate pc-mmeltex shares limited _ 1G f Wei Rongcai immersed for 5 minutes after washing, spray Microside liquid (CZ81_: MEC Co., Ltd. product) 3 sec seconds, dried after washing, and purified sample was prepared. The scanning electron ray mirror exposed on the surface of the insulating resin layer immediately after the circuit was formed _ As shown in Figure 3, the _ plasma side of the exposed between the circuit of the fine-grained training to read the Wei Wei summary of the view (10) like the secret 2 picture, and just after the micro-etched exposed between the circuit insulation resin The observed image of the scanning electron microscope of the layer surface is shown in Fig. 1.
17 201223365 然後，與實_ 1雜地就淨化處理簡之露出於魏間之絕緣樹脂 層表面之朗金屬成分加以半定量分析，進而測定其表面_度㈣is)。曰 又’以與實施例1 _断估脫狀發生。淨化處理簡之露出於電路間 之絕緣樹脂層之表驗態雜後絲i巾，脫層之評估結额淨化處理條 件示於後述表2中。 ' 實施例4 實施例4中，使用實施例丨所製造之印刷配線板之試料，僅變更淨化 處理條件而進行。 淨化處理係將上述印刷配線板之試料，在液溫為8〇<t之過猛酸卸 (KMn〇4)溶液(羅門哈斯電子材料股份有限公司製)中浸潰丄分鐘後，再於液 ’里為45 C之中和液(羅門哈斯電子材料股份有限公司製)中浸潰5分鐘，水 洗後乾燥，而製得淨化處理試料。 然後’與實施例1同樣，就淨化處理試料之露出於電路間之絕緣樹脂 層表面之朗金屬成分量進行半定量分析，進而測定其表面粗财卿s)。 又’與實施例1同樣評估脫層之發生。、淨化處理試料之露出於電路間之絕 緣樹脂層之表域態示於後絲i巾，脫狀評储果及淨域理條件示 於後述之表2中。 比較例1 比較例1中’未進行實施例1中實施之淨化處理。然後，與實施例1 同樣評估脫層之發生。所發生脫層制透射級抗焊綱峨察之表面觀 '、影像示於第4 II巾。於電路間露出之絕緣細旨層之表面狀態示於後述表i 中’脫層之sf估結果及淨化處理條件*於後述之表2中。 比較例2 比較例2中，將實施例1中所實施之淨化處理時間60分鐘變更為1〇 201223365 分鐘’而製成淨化處理試料。錄’與實施例i同樣就淨化處理試料之露 出於電路間之絕緣樹騎表面之殘留麵成分量進行找量分析，進而測 定其表面練度。X ’娜_丨同撕倾層之發^。膽生之脫層， 以透射光從抗焊劑層側觀察之表面觀察影像示於第5圖中。露出於電路間 之絕緣樹麟之表面狀態示於後述表丨巾，脫層之評储果及淨化處理條 件示於後述之表2中。 ' 比較例3 比較例3 +，將實施例3中所實施之淨化處理中，省略微钱刻處理， 製成淨化處理試料。然後，與實施例1同樣就淨化處理簡之露出於電路 間之絕緣樹脂層表面之殘留金屬成分量進行半定量分析，進而測定其表面 粗糙度。又，與實施例1同樣評估脫層之發生。露出於電路間之絕緣樹脂 層之表面狀態示於後述表1中’脫層之評估結果及淨化處理條件示於後述 之表2中。 比較例4 比較例4中，將實施例3中所實施之淨化處理中，省略電漿處理，製 成淨化處理試料。然後，與實施例1同樣就淨化處理試料之露出於電路間 之絕緣樹脂層表面之殘留金屬成分量進行半定量分析，進而測定其表面粗 糙度。又，與實施例1同樣評估脫層之發生。露出於電路間之絕緣樹脂層 之表面狀態示於後述表1中，脫層之5平估結果及淨化處理條件示於後述之 表2中。 19 201223365 【1啭】 淨化處理後 Rz(C)/Rz(S) 1.00 1.00 1.03 1.00 1.00 1.05 1.00 表面粗糙度：Rz(C) (Rzjis:^) 0.37 1.05 0.41 0.38 0.37 0.37 0.39 0.37 殘留金屬成分量 (原子％) 〇 〇 寸 00 〇 in 〇 00 表面粗糙度：Rz(S) (Rzjis^m) 0.37 1.05 0.37 0.37 0.37 ㈣ 殘留金屬成分量 (原子％) 寸 00 寸 00 〇 ON 寸 00 實施例1 實施例2 實施例3 實施例4 比較例1 比較例2 比較例3 比較例4 201223365 評價結果 脫層 (斑點徑：μιη) <20 >1000 >50 >300 >1000 淨化處理條件 ΚΜη〇4溶液處理 _m_ 1 1 微蝕刻 (秒) 1 1 1 電漿蝕刻 (分鐘） 1 (N 1 1 CN 1 HCl(4mol/l)處理 (分鐘） 1 1 〇 1 實施例1 實施例2 實施例3 實施例4 比較例1 比較例2 比較例3 比較例4 201223365 [實施例與比較例之比較] 從表1所;r之露ϋ{於電關之聰樹歸之表面狀態絲2所示之脫層 評估結果及淨化處理條件，對於實施例舰較舰行比較。 比較有無發魏>|及淨倾雜件。該實關之淨域理狀絕緣樹脂 層表面，可知未檢測出殘留金屬成分。而且，關於實施例，亦未觀察到實 用上成為問·度之騎之發生。減地，帽耕，即餘淨化處理後 之殘留金屬成分量為0.1原子％之最低程度之比較例2中，亦觀察到5〇哗 徑以上之賴賴層。而且，淨赠爾之前金觀分量為5 4原子％之 比較例3中，觀察到300職徑程度之斑點狀脫層，淨化處理後之殘留金屬 成分量為8.0原子％之比較例4與未進行淨化處理而殘留金屬成分量為8.4 原子/。之比較例1中’均觀察到超過1〇_之斑點狀脫層。換言之，見到 淨化處理後之絕緣樹脂表面所檢測之殘留金屬成分越多，脫層之斑點徑愈 大之傾向。 ^ 另-方面，探討Rz (C)與Rz⑻之比[Rz (c)/&⑻]之值時，實施例中 在i.oo〜U1範圍内’比較例在.h05範圍内。因此，將㈣c)/Rz⑻] 之值為1.00之試料與超過之試料，就其淨化處理條件進行比較時，實 施電漿银刻之試料超過1.00。 從上述實施例和比較例間之比較，可知「抗焊劑層」與「露出於電路 間之絕賴脂層表面」之密著性，大為受到露出於電路間之絕緣樹脂層表 面所殘留金>1成分之影響。另-方面，即使於絕緣體樹脂表面施予職钱 刻’使[Κ2(〇/Κζ(δ)]之值為1.2以下之範圍時，微形狀產生變化，但對於與 抗焊劑層間之㈣性可謂幾乎沒有影響。因此，可確認露出於電路間之絕 緣樹脂層表面所殘留之金屬成分’以XPS之半定量分析能被檢出時，「抗焊 劑層」與「露出於電路間之絕緣樹脂層表面」之密著性變差。 201223365 [產業上之可能利用性] 本發明之印刷配線板之製造方法，藉由對絕緣樹脂露出面上殘留金屬 元素之印刷配線板施予淨化處理，使所殘留之金屬成分量以XPS裝置進行 半定量分析時成為定量界限以下，可不使絕緣體樹脂層表面粗化，亦可獲 得與在印刷配線板表面上事後設置之「抗焊劑層」之良好密著性。因此， 可獲得與在印刷配線板表面上事後設置之「多層化之際之事後積層之樹脂 層」亦良好的密著性，可提供高品質之印刷配線板。 【圖式簡單說明】 第1圖係實施例3中剛經微触刻後之於印刷配線板之電路間露出之絕 緣樹脂表面之掃描型電子顯微鏡觀察影像。 第2圖係實施例3中剛經電漿蝕刻直後之於印刷配線板之電路間露出 之絕緣樹脂表面之掃描型電子顯微鏡觀察影像。 第3圖係實施例3中剛形成電路後之於印刷配線板之電路間露出之絕 緣樹脂表面之掃描型電子顯微鏡觀察影像。 第4圖係對比較例丨中所發生之脫層，使用透射光從抗焊劑層側所觀 察之表面觀察影像。 第5圖係對比較例2中所發生之脫層，使用透射光從抗焊劑層側所觀 察之表面觀察影像。 第ό圖係發生脫層之印刷配線板之剖面觀察影像。該第6圖中bm表 不絕緣樹脂基材，CC表示銅電路，PSR表示抗焊劑層，DL表示脫層。 【主要元件符號說明】 BM 絕緣樹脂基材 CC 銅電路 PSR 抗焊劑層 23 20122336517 201223365 Then, with the real _ 1 hybrid, the surface of the insulating resin layer exposed on the surface of the insulating resin layer was semi-quantitatively analyzed, and the surface _ degree (4) is).曰 and _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The purification treatment is exposed to the surface of the insulating resin layer between the circuits, and the evaluation of the delamination is shown in Table 2 below. [Example 4] In Example 4, the sample of the printed wiring board manufactured in Example , was used, and only the purification treatment conditions were changed. In the purification treatment, the sample of the above-mentioned printed wiring board was immersed in a solution of a liquid temperature of 8 〇<t in a pulverized acid (KMn〇4) solution (manufactured by Rohm and Haas Electronic Materials Co., Ltd.), and then It was immersed in a liquid of 45 C in a liquid solution (manufactured by Rohm and Haas Electronic Materials Co., Ltd.) for 5 minutes, washed with water, and dried to obtain a purification treatment sample. Then, in the same manner as in the first embodiment, the amount of the rare metal component on the surface of the insulating resin layer exposed between the circuits of the purification treatment sample was subjected to semi-quantitative analysis, and the surface roughness s) was measured. Further, the occurrence of delamination was evaluated in the same manner as in Example 1. The surface state of the insulating resin layer exposed between the circuits of the purification treatment sample is shown in the back wire, and the de-saturated fruit storage and the net domain conditions are shown in Table 2, which will be described later. Comparative Example 1 In Comparative Example 1, the purification treatment carried out in Example 1 was not carried out. Then, the occurrence of delamination was evaluated in the same manner as in Example 1. The surface view of the delaminated transmissive grade anti-weld is observed, and the image is shown in the 4th II scarf. The surface state of the insulating layer exposed between the circuits is shown in Table i below, and the results of the delamination and the purification treatment conditions are shown in Table 2, which will be described later. Comparative Example 2 In Comparative Example 2, the purification treatment time was changed to 1 〇 201223365 minutes by the purification treatment time of Example 1 for 60 minutes to prepare a purification treatment sample. In the same manner as in the example i, the exposure of the sample to be cleaned is analyzed by the amount of the residual surface component of the insulating tree riding surface between the circuits, and the surface degree of the surface is measured. X ‘娜_丨 with the tearing layer of the hair ^. The bile delamination, the surface observation image viewed from the side of the solder resist layer by transmitted light is shown in Fig. 5. The surface state of the insulating mulberry exposed between the circuits is shown in the following table, and the delamination evaluation and purification treatment conditions are shown in Table 2 to be described later. Comparative Example 3 In Comparative Example 3 +, in the purification treatment carried out in Example 3, the micro-etching treatment was omitted, and a purification treatment sample was prepared. Then, in the same manner as in the first embodiment, the amount of residual metal component which was exposed on the surface of the insulating resin layer between the circuits was subjected to semi-quantitative analysis, and the surface roughness was measured. Further, the occurrence of delamination was evaluated in the same manner as in Example 1. The surface state of the insulating resin layer exposed between the circuits is shown in Table 1 below, and the evaluation results of the delamination and the purification treatment conditions are shown in Table 2 to be described later. Comparative Example 4 In Comparative Example 4, in the purification treatment carried out in Example 3, the plasma treatment was omitted, and a purification treatment sample was produced. Then, in the same manner as in the first embodiment, the amount of residual metal component of the surface of the insulating resin layer exposed between the electrodes of the purification treatment sample was subjected to semi-quantitative analysis, and the surface roughness was measured. Further, the occurrence of delamination was evaluated in the same manner as in Example 1. The surface state of the insulating resin layer exposed between the circuits is shown in Table 1 below, and the delamination 5 evaluation results and the purification treatment conditions are shown in Table 2 to be described later. 19 201223365 【1啭】 Rz(C)/Rz(S) 1.00 1.00 1.03 1.00 1.00 1.05 1.00 Surface roughness: Rz(C) (Rzjis:^) 0.37 1.05 0.41 0.38 0.37 0.37 0.39 0.37 Residual metal content (Atomic %) 〇〇 inch 00 〇in 〇00 Surface roughness: Rz(S) (Rzjis^m) 0.37 1.05 0.37 0.37 0.37 (4) Residual metal component amount (atomic %) Inch 00 inch 00 〇ON inch 00 Example 1 Example 2 Example 3 Example 4 Comparative Example 1 Comparative Example 2 Comparative Example 3 Comparative Example 4 201223365 Evaluation result delamination (spot diameter: μιη) <20 > 1000 > 50 > 300 > 1000 Purification treatment conditions ΚΜη〇4 solution treatment_m_ 1 1 micro-etching (seconds) 1 1 1 plasma etching (minutes) 1 (N 1 1 CN 1 HCl (4 mol/l) treatment (minutes) 1 1 〇 1 Example 1 Example 2 Example 3 Example 4 Comparative Example 1 Comparative Example 2 Comparative Example 3 Comparative Example 4 201223365 [Comparison of Examples and Comparative Examples] From Table 1; r of ϋ ϋ 于 于 于 于 于 于 于 于 于 于 于 于 于The results of the delamination evaluation and the purification treatment conditions are compared with the ship of the example ship. In the case of the surface of the solid-state insulating resin layer, it was found that the residual metal component was not detected. Moreover, in the examples, the occurrence of riding in practical use was not observed. In Comparative Example 2 in which the amount of residual metal component after the purification treatment was 0.1 atom%, the layer of 5 〇哗 or more was also observed. In Comparative Example 3 of 5 4 atom%, a speckle-like delamination of 300 gauges was observed, and the amount of residual metal component after the purification treatment was 8.0 at%, and the amount of residual metal component was 8.4. In Comparative Example 1, a speckle-like delamination of more than 1 〇 was observed. In other words, the more the residual metal component detected on the surface of the insulating resin after the purification treatment, the larger the spot diameter of the delamination. Tendency. ^ In another aspect, when the ratio of Rz (C) to Rz (8) [Rz (c) / & (8)] is discussed, in the embodiment, in the range of i.oo~U1, the comparative example is in the range of .h05. Therefore, the sample of (4)c)/Rz(8)] with a value of 1.00 and the sample exceeding it are When the purification treatment conditions were compared, the sample in which the plasma silver etching was performed exceeded 1.00. From the comparison between the above examples and the comparative examples, it is understood that the adhesion between the "solder resist layer" and the "surface of the grease layer exposed between the circuits" is greatly retained by the surface of the insulating resin layer exposed between the circuits. > The influence of the 1 component. On the other hand, even if the value of [Κ2(〇/Κζ(δ)] is 1.2 or less on the surface of the insulator resin, the micro shape changes, but the (four) property with the solder resist layer is There is almost no influence. Therefore, it can be confirmed that the metal component remaining on the surface of the insulating resin layer exposed between the circuits can be detected by semi-quantitative analysis of XPS, and the "solder resist layer" and the "insulating resin layer exposed between the circuits" 201223365 [Industrial Applicability] The method for producing a printed wiring board according to the present invention is characterized in that a printed wiring board having a metal element remaining on the exposed surface of the insulating resin is subjected to a purification treatment. When the amount of the remaining metal component is semi-quantitatively analyzed by the XPS apparatus, it is equal to or less than the quantitative limit, and the surface of the insulating resin layer can be roughened, and good adhesion to the "solder resist layer" provided after the surface of the printed wiring board can be obtained. Therefore, it is possible to obtain a high-quality printing by providing a good adhesion to the resin layer which is laminated after the "multilayer formation" on the surface of the printed wiring board. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a scanning electron microscope observation image of the surface of an insulating resin exposed between circuits of a printed wiring board immediately after micro-touching in Example 3. Fig. 2 is an embodiment 3 is a scanning electron microscope observation image of the surface of the insulating resin exposed between the circuits of the printed wiring board by plasma etching. Fig. 3 is a view showing the circuit between the circuits of the printed wiring board immediately after the circuit is formed in Embodiment 3. The scanning electron microscope was used to observe the image on the surface of the insulating resin. Fig. 4 is a view showing the delamination occurring in the comparative example, and the image was observed from the surface observed on the side of the solder resist layer using transmitted light. Fig. 5 is a comparison example 2 In the delamination which occurs in the middle, the image is observed from the surface observed on the side of the solder resist layer using transmitted light. The figure is a cross-sectional observation image of the printed wiring board on which the delamination is formed. In the sixth figure, the bm sheet is not insulated with the resin substrate. CC denotes a copper circuit, PSR denotes a solder resist layer, and DL denotes a delamination. [Main component symbol description] BM insulating resin substrate CC copper circuit PSR solder resist layer 23 201223365