TW201731355A - Manufacturing method for printed wiring board provided with buried circuit, and printed wiring board obtained by the manufacturing method - Google Patents

Abstract

The purpose of the present invention is to provide a manufacturing method for a printed wiring board provided with a fine circuit having a wire width of 30 [mu]m or less and high dimensional accuracy and linearity as a buried circuit. In order to achieve this purpose, adopted is, for example, a manufacturing method for a printed wiring board using a support substrate composed of ultrathin copper foil with a carrier and an insulating layer constituent material for constituting the support substrate, wherein using the ultrathin copper foil with the carrier in which the carrier can be peeled off in a peeling layer, and the outer surface of the ultrathin copper foil has 0.2 [mu]m ≤ Wmax ≤ 1.3 [mu]m and 0.08 [mu]m ≤ Ia ≤ 0.43 [mu]m, the insulating layer constituent material is stacked on the surface of the carrier, and using the support substrate composed of the ultrathin copper foil with the carrier and the insulating layer constituent material, a printed wiring board in which an outer layer circuit at least one surface is buried in an insulating layer constituent material is obtained after the formation of a plating resist pattern, copper plating, removal of a plating resist, stacking of a printed wiring board constituent member, separation of the support substrate, and etching of an ultrathin copper foil layer.

Description

Coreless assembly support substrate

The present invention relates to a coreless assembled support substrate for use in the manufacture of printed wiring boards.

In the past, attempts have been made to increase the wiring density of printed wiring boards to reduce the thickness and thickness of printed wiring boards. Further, in recent years, the terminal width of a semiconductor product or the like mounted on a printed wiring board has been gradually narrowed, and the circuit width and wiring pitch of a printed wiring board suitable for the terminal width thereof are also required.

As a technique capable of forming such a fine circuit, Patent Document 1 (International Publication No. WO2012/133638) proposes a technique using a coreless assembly method. Patent Document 1 uses a copper foil with a carrier foil having a heat resistant metal layer, and an object of the invention is to provide a multilayer printed wiring board which does not require removal of the heat resistant metal layer even when a multilayer printed wiring board is manufactured by a coreless assembly method. In the manufacturing method, the method for producing a multilayer printed wiring board includes the following steps: using a copper foil having a carrier foil having four layers of at least a copper foil layer/release layer/heat resistant metal layer/carrier foil, thereby obtaining The surface of the carrier foil of the copper foil with a carrier foil is bonded to the support substrate of the insulating layer constituent material, and an assembly wiring layer is formed on the surface of the copper foil layer of the copper foil with the carrier foil of the support substrate as the assembled wiring layer. Supporting the substrate, separating it from the peeling layer to obtain a multilayer laminated board, and performing necessary processing on the multilayer laminated board to obtain a multilayer printed wiring board. Wait.

In the coreless assembled support substrate, when a fine circuit having a wiring width of 30 μm or less is formed by a pattern plating method on a copper foil layer on the surface of the support substrate on which the outer layer circuit layer is assembled, the circuit line formed is damaged. Wide uniformity and low linearity of the circuit.

In the above case, a method of manufacturing a printed wiring board is required, and even if a thin circuit having a wiring width of 30 μm or less is required to be assembled without a core assembly, the circuit having high dimensional accuracy and linearity can be formed. .

The coreless assembled support substrate of the present application is a manufacturer for a printed wiring board, and is characterized in that it comprises an extremely thin copper foil with a carrier and a layer structure of an extremely thin copper foil layer/release layer/carrier, which can And peeling off the peeling layer; and an insulating layer forming material for supporting the substrate, laminated on the surface of the carrier of the ultra-thin copper foil with the carrier; wherein the ultra-thin copper foil of the carrier has a very thin copper foil The outer surface was 0.2 μm ≦Wmax ≦ 1.3 μm and 0.08 μm ≦Ia ≦ 0.43 μm.

In the coreless assembled support substrate of the present application, it is preferable that the ultra-thin copper foil is thinner than the carrier.

In the coreless assembly supporting substrate of the present application, it is preferable that the ultra-thin copper foil has an unroughened surface.

In the coreless assembly supporting substrate of the present application, it is preferable that the ultra-thin copper foil has a thickness of 0.5 μm to 5 μm and uses any one of an electrolytic method, an electroless method, a chemical vapor phase reaction method, a sputtering method, and an evaporation method. Come form.

In the coreless assembled support substrate of the present application, preferably: The body has a thickness of 12 μm to 70 μm and is a resin film, an electrolytic copper foil or a rolled copper foil.

In the coreless assembly supporting substrate of the present application, it is preferable that the release layer is an organic release layer or an inorganic release layer.

In the coreless assembly supporting substrate of the present application, it is preferable that the release layer is an organic release layer formed on the surface of the carrier and having a thickness of 5 nm to 60 nm.

In the coreless assembled support substrate of the present application, it is preferable that the release layer is an inorganic release layer containing a material selected from the group consisting of Ni, Mo, Co, Cr, Fe, Ti, W, P, and carbon as a main component. At least one or more inorganic components of the alloy and the group of the compounds having the main component.

In the coreless assembly supporting substrate of the present application, it is preferable that a heat-resistant metal layer is provided between the ultra-thin copper foil and the peeling layer.

In the coreless assembled support substrate of the present application, it is preferable that the heat resistant metal layer is made of a metal or an alloy selected from the group consisting of molybdenum, tantalum, tungsten, cobalt, nickel, and the like as a main component.

The coreless assembled support substrate of the present application is preferably used for the production of a printed wiring board having an insulating layer constituent material as a member of the printed wiring board and an outer layer circuit in which the insulating layer constituent material is embedded.

Then, the coreless assembled support substrate of the present application is used for the manufacture of a printed wiring board as shown below.

A. Method of manufacturing printed wiring board

The method for producing a printed wiring board according to the present invention is a method for producing a printed wiring board using a support substrate comprising an ultra-thin copper foil having a carrier and an insulating layer constituent material for supporting a substrate, and is characterized by comprising the following Step by step The printed wiring board in which the insulating layer is embedded in the outer layer circuit of at least one surface: preparation of an ultra-thin copper foil having a carrier: the carrier can be peeled off at the peeling layer and the outer surface of the ultra-thin copper foil is 0.2 Μm ≦ Wmax ≦ 1.3 μm, and 0.08 μm ≦Ia ≦ 0.43 μm of an extremely thin copper foil with a carrier.

a step of preparing a supporting substrate: using the ultra-thin copper foil with a carrier, and laminating an insulating layer forming material for supporting the substrate on the surface of the carrier, and preparing the ultra-thin copper foil having the carrier and the supporting substrate A support substrate composed of an insulating layer constituent material.

The plating resist pattern forming step: forming a plated photoresist pattern having an opening on a surface of the ultra-thin copper foil layer of the ultra-thin copper foil having the carrier on the support substrate.

Copper plating step: a copper plating layer is formed on the plating resist opening portion of the support substrate with the resist pattern to form a circuit pattern.

Plating photoresist removal step: removing the plating photoresist from the support substrate having the plated photoresist pattern and the circuit pattern.

A step of laminating the printed wiring board constituent members: a printed wiring board constituent member is laminated on the circuit pattern forming surface of the support substrate having the circuit pattern.

Separation step of the support substrate: the peeling layer of the ultra-thin copper foil having the carrier of the laminated body of the printed wiring board constituent member is peeled off and separated, and becomes the laminated body side of the member having the printed wiring board A laminate of an extremely thin copper foil layer of an ultra-thin copper foil layer of an ultra-thin copper foil with a carrier remaining thereon.

An etching step of the ultra-thin copper foil layer: the ultra-thin copper foil layer on the outer layer of the laminated body having the ultra-thin copper foil layer is removed by short-time etching to obtain A printed wiring board in which an outer layer circuit of the insulating layer constituent material is embedded is embedded.

B. Printed wiring board

The printed wiring board of the present application is obtained by using the method for producing a printed wiring board according to any of the above.

The support substrate of the present application is used for the manufacture of a printed wiring board. In the method for manufacturing a printed wiring board of the present application, since the circuit forming layer of the support substrate is assembled without a core, an ultra-thin copper foil having a carrier having excellent photoresist adhesion and pattern plating is used. Since the copper circuit has a very thin copper foil layer, even a fine circuit having a wiring width of 30 μm or less can form a fine circuit having excellent dimensional accuracy and linearity on the surface of the coreless assembled support substrate. Further, by embedding the fine circuit in a circuit formed of an insulating layer structural material, it is possible to obtain a coreless assembled wiring board which has excellent adhesion to an insulating layer structural material and excellent impedance control (Impedance Control) ) The outer layer circuit.

1‧‧‧very thin copper foil

2‧‧‧ Carrier

3‧‧‧ peeling layer

4‧‧‧very thin copper foil layer

5,6‧‧‧Insulation layer

10‧‧‧ Plated photoresist

20‧‧‧ copper plating

25‧‧‧ outer surface of very thin copper foil

30‧‧‧Copying surface

S1‧‧‧Support substrate

S2‧‧‧Support substrate with plated photoresist pattern

S3‧‧‧Supported substrate with plated photoresist pattern and circuit pattern

S4‧‧‧Supported substrate with circuit pattern

S5‧‧‧Laminated body with printed wiring board constituent members

S6‧‧‧Laminated body with very thin copper foil layer

P‧‧‧Printed wiring substrate

Fig. 1 is a schematic view for explaining the process of the printed wiring board of the present application.

Fig. 2 is a schematic view for explaining the process of the printed wiring board of the present application.

Fig. 3 is a schematic view for explaining the process of the printed wiring board of the present application.

Fig. 4 is a schematic view for explaining the process of the printed wiring board of the present application.

In the following, the embodiment of the invention of the present application is divided into "manufacturing form of printed wiring board" and "printing" as necessary. The shape of the brushed wiring board is described.

A. Manufacturing form of printed wiring board

The method for producing a printed wiring board according to the present invention is a method for producing a printed wiring board using a support substrate comprising an ultra-thin copper foil having a carrier and an insulating layer constituent material for supporting a substrate, and is characterized by comprising the following step. Further, in the printed wiring board obtained by the above-described manufacturing method, at least one of the outer layer circuits is embedded in the insulating layer constituent material. Hereinafter, each step will be explained.

Preparation of a very thin copper foil with a carrier: initially, a carrier can be peeled off at a peeling layer and the outer surface of the ultra-thin copper foil is 0.2 μm ≦Wmax ≦ 1.3 μm, and a carrier of 0.08 μm ≦Ia ≦ 0.43 μm Extremely thin copper foil. In the first (A) diagram, a schematic cross-sectional view is shown, and the ultra-thin copper foil 1 of the carrier is attached. Here, the outer surface 25 of the ultra-thin copper foil refers to a surface exposed on the surface. The linearity of the circuit formed on the surface of the ultra-thin copper foil layer by the plating method is preferably 1.3 μm or less. Further, in order to improve the adhesion of the plating resist, Wmax is preferably 0.2 μm or more. In addition, the term "Wmax" refers to the maximum height difference of the corrugation, and is information on the surface roughness of the ultra-thin copper foil of the ultra-thin copper foil having the carrier obtained by using the three-dimensional surface structure analysis microscope, and the waveform of the corrugation extracted by the filter is used. The maximum value of the data difference (the sum of the maximum peak height of the waveform and the maximum recess depth).

Next, from the viewpoint of the adhesion of the plating resist and the linearity of the photoresist circuit, the Ia of the outer surface of the ultra-thin copper foil is preferably 0.08 μm ≦Ia ≦ 0.43 μm. Here, Ia is the average surface height.

In the above-mentioned Wmax and Ia, ZygoNewView 5032 (manufactured by Zygo Co., Ltd.) was used as the measuring device, and the analytical soft system was used in Metro. Pro Ver. 8.0.2 was used as the analysis software and the low-frequency filter was set to 11 μm, and was measured according to the procedures of a) to c) below.

a) The outer surface of the ultra-thin copper foil having the carrier's ultra-thin copper foil is used as a measurement surface and is fixed to the sample stage.

b) The measurement was carried out by selecting 6 points of a field of view of 108 μm × 144 μm in a range of 1 cm square from the outer surface of the ultra-thin copper foil of the ultra-thin copper foil having a carrier.

c) The average value of the values obtained from the six measurement points is taken as the Wmax value and the Ia value of the outer surface of the ultra-thin copper foil.

Step of preparing a supporting substrate: In this step, an insulating layer forming material 5 composed of the ultra-thin copper foil 1 having the carrier and the supporting substrate is displayed as shown in a schematic cross-sectional view in Fig. 1(A). The support substrate S1 is constructed. Here, the ultra-thin copper foil with a carrier to be used is formed by using a layer having the "carrier 2 / peeling layer 3 / ultra-thin copper foil layer 4", or "carrier 2 / peeling layer 3 / heat resistant metal" The layer constitution of the layer/very thin copper foil layer 4" is preferred. Since it is possible to peel off the carrier afterwards by having such a layer constitution.

Here, as the ultra-thin copper foil layer 4, it is preferable to be thinner than the carrier 2. Specifically, from the viewpoint of reducing the occurrence of pinholes and variations in etching amount at the time of etching removal, the thickness of the ultra-thin copper foil layer 4 is preferably a copper foil layer having a thickness of 0.5 μm to 5 μm. Further, the ultra-thin copper foil layer 4 can be formed by any one of a liquid phase method such as an electrolysis method, an electroless method, a chemical vapor phase reaction method such as CVD, or a physical method such as sputtering or vapor deposition. .

Further, the carrier is preferably a resin film, an electrolytic copper foil, or a rolled copper foil. Further, in order to secure the rigidity during the operation and to ensure the parallelism at the time of pressurization lamination, the thickness of the carrier is preferably 12 μm to 70 μm. Good is 12μm~35μm.

Next, the peeling layer is described. The release layer includes an organic release layer and an inorganic release layer. When the inorganic release layer is used, it is preferred to use at least one compound containing a compound selected from the group consisting of a nitrogen-containing compound, a sulfur-containing compound, and a carboxylic acid. The nitrogen-containing organic compound referred to herein is a nitrogen-containing organic compound having a substituent. Specifically, as the nitrogen-containing organic compound, 1,2,3-benzotriazole, carboxybenzotriazole, N'-N'-bis (benzotriazole) using a triazole compound having a substituent is used. Preferably, azolylmethyl)urea, 1H-1,2,4-triazole and 3-amino-1H-1,2,4-triazole are preferred. Further, as the sulfur-containing organic compound, hydrothiobenzothiazole, thiocyanuric acid, 2-benzimidazolethiol or the like is preferably used. Further, as the carboxylic acid, a monocarboxylic acid is particularly preferable, and particularly, oleic acid, linoleic acid, and linolenic acid are preferably used. These organic components have excellent high-temperature heat resistance and are easy to form a joint interface layer having a thickness of 5 nm to 60 nm on the surface of the carrier.

Further, when the release layer is used as an inorganic release layer, it is selected from the group consisting of Ni, Mo, Co, Cr, Fe, Ti, W, P, carbon, or an alloy or a compound containing the above as a main component. At least one or more of them are preferred as the inorganic component. In the case of such an inorganic bonding interface layer, any thickness can be formed by a conventional method such as an electrodeposition method, an electroless method, or a physical vapor deposition method.

Further, the heat-resistant metal layer (not shown) having a layer of "the carrier 2 / peeling layer 3 / heat-resistant metal layer / ultra-thin copper foil layer 4" can suppress "carrier 2 and extremely thin" which are generated during hot stamping. The interdiffusion between the copper foil layers 4 prevents the carrier 2 from being sintered with the ultra-thin copper foil layer 4, and can then be easily carried out by peeling off the carrier 2. The heat resistant metal layer is made of molybdenum, niobium, tungsten, cobalt, It is preferred to use a group of nickel and various alloys containing the metal components. However, it is preferred to form a heat resistant metal layer using nickel or a nickel alloy. The film of nickel or nickel alloy has excellent film thickness formation accuracy and also excellent heat resistance. Further, as the formation of the heat resistant metal layer, a physical vapor deposition method such as an electroless method, an electrolysis method, a sputtering vapor deposition method, or a chemical vapor phase reaction method can be used.

From the above description, an insulating layer material for forming a support substrate can be bonded to the surface of the carrier by using an ultra-thin copper foil having a carrier that can be grasped. In other words, the insulating layer constituent material 5 / carrier 2 / peeling layer 3 / ultra-thin copper foil layer 4 for supporting the substrate structure or the insulating layer constituent material 5 / carrier 2 / peeling layer 3 for supporting the substrate structure are prepared. A support substrate composed of any one of the heat resistant metal layer/very thin copper foil layer 4". In this case, the insulating layer constituent material 5 for the configuration of the support substrate to be used is not particularly limited, and a prepreg ‧ a resin film, an adhesive resin film, or the like can be used. Further, as for the bonding method, a hot stamping method, a bonding method using an adhesive, or the like can be arbitrarily selected.

a plating resist pattern forming step: in this step, a plating resist pattern 10 having an opening portion is formed on a surface of an ultra-thin copper foil layer of a carrier-attached ultra-thin copper foil of the support substrate, and 1 (B) is a schematic cross-sectional view "support substrate S2 with a resist pattern." As the plating resist used at this time, a dry film or a liquid photoresist is preferably used. Because of its excellent exposure resolution and the purpose of forming a fine circuit. The surface of the ultra-thin copper foil layer of the ultra-thin copper foil having the carrier of the support substrate is covered with these. Then, the required plating resist pattern is exposed and developed to obtain the "support substrate S2 with a resist pattern" as shown in FIG. 1(B). Further, before the surface of the ultra-thin copper foil layer of the ultra-thin copper foil having the carrier of the support substrate is covered with a plating resist, In order to improve the adhesion of the photoresist, in order to remove the excess oxide film on the surface of the ultra-thin copper foil layer and clean the surface, a dilute sulfuric acid solution, a dilute hydrochloric acid solution, a sulfuric acid-hydrogen peroxide aqueous solution or the like is used for cleaning. Also good.

Copper plating step: In this step, copper plating 20 is applied to the plating resist opening portion of the above-mentioned "supporting substrate S2 with a resist pattern". That is, a copper plating layer which is a circuit pattern is formed in a portion where no plating resist is present, and a circuit pattern in which a copper plating layer is not formed in a portion where no plating resist is present is formed. The step obtained in this step is "the support substrate S3 having a plated photoresist pattern and a circuit pattern" as shown in Fig. 2(C). The surface on the extremely thin copper foil layer side of the circuit pattern at this time is a replica of the surface shape of the ultra-thin copper foil layer.

Plating photoresist removal step: In this step, the plating resist 10 is removed from the "support substrate S3 having a plating resist pattern and a circuit pattern", and the image shown in FIG. 2(D) is obtained. A support substrate S4" having a circuit pattern. At this time, the removal of the plating resist 10 is usually carried out using an alkali solution.

a lamination step of the printed wiring board constituent member: in this step, the above-mentioned "supporting substrate S4 having a circuit pattern" is used, and as shown in FIG. 3(E), the circuit pattern forming surface is bonded to obtain The printed wiring board constituting member necessary for the target printed wiring board is obtained as "the laminated body S5 having the printed wiring board constituting member" as shown in Fig. 3(F). The "printed wiring board constituent member necessary for obtaining the target printed wiring board" as used herein is not particularly limited as long as the final printed wiring board can be obtained. However, it is preferable to adopt the method as follows.

In the method of manufacturing a printed wiring board of the present application, it is preferable to use the insulating layer constituent material 6 as the printed wiring board constituent member. That is, as in the first 3 (E), the insulating layer constituent material 6 is bonded to the circuit pattern forming surface of the "circuit pattern supporting substrate S4", and the printed wiring board shown in Fig. 3 (F) can be obtained. The laminated body S5" constituting the member.

Moreover, it is also preferable to use a printed wiring layer as a printed wiring board constituent member to obtain a multilayer printed wiring board. Here, the method of multilayering the assembled wiring layer is not particularly limited. For example, a method of sequentially bonding a pattern of a normal printed wiring board to a circuit pattern forming surface of the "supporting substrate S4 having a circuit pattern" by the insulating layer forming material 6 can be employed. A method of forming a laminated body S5" of a member by a printed wiring board.

Further, it is also preferable to use a coreless assembly method in which a new copper foil layer is formed and a via hole is processed by a circuit pattern forming surface of the "circuit pattern supporting substrate S4" through the insulating layer constituent material. In the plating process, the etching process, and the like, the same operation is repeated to form a multilayered body S5 having a printed wiring board constituent member.

In the step of separating the support substrate, the release layer 3 of the ultra-thin copper foil 1 having the carrier of the above-mentioned "layered body S5 having the printed wiring board constituent member" is used as the insulating layer material for the support substrate. 5 and carrier 2 are peeled off and separated. This result is the form shown in Fig. 4 (G). Here, the "layered body S6 having an extremely thin copper foil layer" of the ultra-thin copper foil layer 4 in which only the ultra-thin copper foil 1 having the carrier is left on the laminated body side of the printed wiring board constituent member.

Etching step of the ultra-thin copper foil layer: in this step, the ultra-thin copper foil layer 4 on the outer layer of the laminated body S6 having the ultra-thin copper foil layer is used for a short time The printed wiring board having the circuit pattern in which the circuit disposed outside the insulating layer constituent material 6 is embedded is obtained by etching and removing. That is, the printed wiring board P as shown in Fig. 4 (H) is obtained. In this case, the surface of the circuit pattern of the outer layer circuit can be formed by forming a replica surface 30 in which the surface shape of the ultra-thin copper foil layer 4 is reversed without performing a special etching treatment, a roughening treatment, or the like. 0.2 μm ≦Wmax ≦ 1.3 μm, and 0.08 μm ≦Ia ≦ 0.43 μm surface characteristics. Since the surface of the circuit having such surface characteristics is excellent in wettability with solder, it can be suitably used as a terminal for a component. Further, even if the surface of the circuit pattern of the outer layer circuit is subjected to a chemical treatment, an etching treatment, a roughening treatment or the like, the same surface characteristics can be maintained as long as the surface characteristics are not changed greatly. Further, by etching the ultra-thin copper foil layer 4, a replica surface in which the surface shape of the ultra-thin copper foil layer 4 is reversed can be formed on the surface of the insulating layer constituent material 6. In other words, the surface of the insulating layer constituent material 6 can also have a value of 0.2 μm ≦Wmax ≦ 1.3 μm and 0.08 μm ≦Ia ≦ 0.43 μm. The adhesion of the surface of the insulating layer constituent material 6 to the resin material such as the solder resist or the sealing resin formed on the surface layer is good.

Further, in the bonding of Fig. 3(E), the circuit pattern of the "supporting substrate S4 having a circuit pattern" shown in Fig. 2(D) is transmitted through the insulating layer constituent material 6 in the outer layer of the printed wiring board constituent member. The side is bonded to the insulating layer constituent material side, and the carrier is peeled off and separated in the peeling layer of the ultra-thin copper foil having the carrier, and is formed on both sides, as described in FIG. 4(G). A laminate having an extremely thin copper foil layer formed by exposing an extremely thin copper foil layer, and a printed wiring board in which the outer layer circuits on both sides are embedded in the insulating layer constituent material can be obtained.

The manufacturer of the printed wiring board of the present application described above In order to make the steps easy to understand, the surface is provided on the surface of the insulating layer constituent material 5 for forming the support substrate of Fig. 1(A). However, the same operation can be performed on both surfaces of the insulating layer constituent material 5 for supporting the substrate of Fig. 1(A).

B. Form of printed wiring board

The printed wiring board of the present application is obtained by using the method for producing a printed wiring board according to any one of the above. Moreover, the printed wiring board of the present application may be a printed wiring board, a double-sided printed wiring board, or a multilayer printed wiring board of three or more layers.

[Example 1]

Preparation of ultra-thin copper foil with carrier: initially prepared carrier can be peeled off in the peeling layer and the outer surface of the ultra-thin copper foil is Wmax=0.7 μm, and Ia=0.19 μm is provided with “carrier 2/peeling layer 3/very thin An ultra-thin copper foil 1 having a carrier formed of a layer of a copper foil layer 4" (see Fig. 1(A)). Further, the carrier-attached ultra-thin copper foil 1 is composed of a carrier having a thickness of 18 μm, an ultra-thin copper foil layer 4 having a thickness of 3.0 μm, and a release layer 3 composed of carboxybenzotriazole.

Step of preparing a support substrate: In this step, the ultra-thin copper foil 1 having the above-described carrier is used, and the insulating layer constituent material 5 for supporting the substrate is bonded to the surface of the carrier 2 to obtain a "support substrate structure". The support substrate S1 shown in Fig. 1 (A) of the layer structure of the insulating layer constituent material 5 / carrier 2 / peeling layer 3 / ultra-thin copper foil layer 4". The insulating layer constituent material 5 for the support substrate is made of an FR-4 prepreg.

Plating photoresist pattern forming step: in this step, by setting the surface of the ultra-thin copper foil layer of the ultra-thin copper foil with the carrier on the support substrate S1 The photoresist (dry film) was plated and subjected to exposure ‧ development to form a plated photoresist pattern 10 having an opening portion having a line width of 20 μm, and a plate having a schematic cross-sectional view as shown in FIG. 1(B) was obtained. The support substrate S2" of the photoresist pattern.

Copper plating step: In this step, a copper plating layer 20 which is a circuit pattern is formed in the plating resist opening portion of the above-mentioned "support substrate S2 with a resist pattern", and is obtained as shown in FIG. 2(C). The "supported substrate S3 having a plated photoresist pattern and a circuit pattern" is shown.

Plating photoresist removal step: In this step, the plating resist 10 is removed from the "support substrate S3 having a plating resist pattern and a circuit pattern" using an alkali solution, and as shown in FIG. 2 (D) The "supported substrate S4 with circuit pattern" is displayed.

The lamination step of the printed wiring board constituent member is performed by using the above-mentioned "supporting substrate S4 having a circuit pattern" on the circuit pattern forming surface and as shown in FIG. 3(E) for obtaining the target printing. The insulating layer of the wiring board constitutes the material 6, and the "layered body S5 having the printed wiring board constituent member" as shown in Fig. 3 (F) is obtained.

In the step of separating the support substrate, the release layer 3 of the ultra-thin copper foil 1 having the carrier of the above-mentioned "layered body S5 having the printed wiring board constituent member" is used as the insulating layer constituent material for the support substrate. The carrier 2 is peeled off and separated. As a result, the ultra-thin copper foil layer 4 of the ultra-thin copper foil 1 in which the carrier-attached ultra-thin copper foil 1 remains on the laminated body side of the printed wiring board constituent member shown in Fig. 4 (G) has an extremely thin copper foil layer. The layered body S6".

Etching step of the ultra-thin copper foil layer: in this step, the ultra-thin copper foil layer 4 of the outer layer of the laminated body S6 having the ultra-thin copper foil layer is dissolved by etching The printed wiring board P as shown in Fig. 4(H) having a circuit pattern in which the circuit of the outer layer of the insulating layer is embedded is obtained. At this time, the surface of the circuit pattern of the outer layer circuit has a surface property of Wmax = 0.7 μm and Ia = 0.19 μm, which is a replica surface 30 of the ultra-thin copper foil with a carrier used in the front.

[Embodiment 2]

In the second embodiment, an ultra-thin copper foil having a carrier is prepared, and only the outer surface of the ultra-thin copper foil is Wmax=1.3 μm, and Ia=0.29 μm is provided with the “carrier 2/peeling layer 3/very thin copper foil layer 4”. The layer of the ultra-thin copper foil 1 having a carrier is different from the one of the ultra-thin copper foil having the carrier used in the first embodiment, and the other steps are the same as those in the first embodiment. Therefore, the surface of the circuit pattern of the outer layer circuit of the printed wiring board P finally obtained is the copy surface 30 of the ultra-thin copper foil with a carrier used here, and has Wmax = 1.3 μm, and Ia = 0.29 μm. Surface characteristics.

[Example 3]

In the third embodiment, an ultra-thin copper foil having a carrier is prepared, and only the outer surface of the ultra-thin copper foil is Wmax=1.2 μm, and Ia=0.43 μm is provided with the “carrier 2/peeling layer 3/very thin copper foil layer 4”. The layer of the ultra-thin copper foil 1 having a carrier is different from the one of the ultra-thin copper foil having the carrier used in the first embodiment, and the other steps are the same as those in the first embodiment. Therefore, the surface of the circuit pattern of the outer layer circuit of the printed wiring board P finally obtained is the copy surface 30 of the ultra-thin copper foil with a carrier used here, and has Wmax = 1.2 μm, and Ia = 0.43 μm. Surface characteristics.

[Example 4]

Example 4 is to prepare an ultra-thin copper foil with a carrier, and only the ultra-thin copper is used. The outer surface of the foil is an ultra-thin copper foil 1 having a carrier of Wax=0.2 μm and Ia=0.08 μm and having a layer of “carrier 2/peeling layer 3/very thin copper foil layer 4” instead of the first embodiment. The points of the ultra-thin copper foil with the carrier used were different, and the other steps were the same as in the first embodiment. Therefore, the surface of the circuit pattern of the outer layer circuit of the printed wiring board P finally obtained is the copy surface 30 of the ultra-thin copper foil with a carrier used here, and has Wmax = 0.2 μm, and Ia = 0.08 μm. Surface characteristics.

[Comparative Example 1]

In Comparative Example 1, an ultra-thin copper foil having a carrier was prepared, and only the outer surface of the ultra-thin copper foil was Wmax = 1.4 μm, and Ia = 0.50 μm was provided with "carrier 2 / peeling layer 3 / ultra-thin copper foil layer 4 The layer of the ultra-thin copper foil 1 having a carrier is different from the one of the ultra-thin copper foil having the carrier used in the first embodiment, and the other steps are the same as those in the first embodiment. Therefore, the surface of the circuit pattern of the outer layer circuit of the printed wiring board P finally obtained is the copy surface 30 of the ultra-thin copper foil with a carrier used here, and has Wmax = 1.4 μm, and Ia = 0.50 μm. Surface characteristics.

[Comparative Example 2]

In Comparative Example 2, an ultra-thin copper foil having a carrier was prepared, and only the outer surface of the ultra-thin copper foil was Wmax = 0.1 μm, and Ia = 0.07 μm was provided with "carrier 2 / peeling layer 3 / ultra-thin copper foil layer 4 The layer of the ultra-thin copper foil 1 having a carrier is different from the one of the ultra-thin copper foil having the carrier used in the first embodiment, and the other steps are the same as those in the first embodiment. Therefore, the surface of the circuit pattern of the outer layer circuit of the printed wiring board P finally obtained is the copy surface 30 of the ultra-thin copper foil with a carrier used here, and has Wmax = 0.1 μm, and Ia = 0.07 μm. Surface Sex.

[experiment method]

Here, before the comparison between the examples and the comparative examples, a method of the plating resistivity test and the circuit linearity test will be described.

Method of plating resistivity test: The evaluation sample of the plated photoresist was set as the following sample. In the above-described plating resist pattern forming step, a plating resist (dry film) is provided on the surface of the ultra-thin copper foil layer of the ultra-thin copper foil having the carrier supported on the substrate S1, and the entire exposure is performed. Subsequently, after the plating resist on the support substrate S1 is attached to the phenol resin plate having a thickness of 0.8 mm by using an adhesive, the carrier is separated from the release layer to obtain an ultra-thin copper foil which exposes the ultra-thin copper foil layer/ The laminate of the layer of the agent layer/phenolic resin sheet is then formed. Further, after the copper plating layer having a thickness of 18 μm was obtained by plating copper sulfate with the ultra-thin copper foil of the laminate, the peel strength (angle of 90°, speed: 50 mm/min) of the electroplated copper layer cut to a width of 1 cm was measured. To evaluate the adhesion of the plated photoresist. The criterion for determining the adhesion strength is as follows.

(Criteria for judging the adhesion of plating resist)

○: 0.01 kgf/cm or more

×: less than 0.01 kgf/cm

In the above-mentioned outer layer circuit pattern, the wiring width of the printed wiring board P having a buried circuit having a wiring width of 20 μm is measured at a pitch of 4 μm and the standard deviation σw of the line width is determined as The indicator of the linearity of the circuit. Moreover, the criterion for determining the standard deviation value is set as follows.

(Criteria for judging the linearity of the circuit)

○: σw=2.2 μm

×: σw>2.2 μm

Comprehensive evaluation: The above-mentioned plating resistivity and circuit linearity evaluation were comprehensively evaluated in accordance with the following criteria.

(Criteria for judging comprehensive evaluation)

○: Each evaluation is good (○)

×: Any evaluation is unqualified (×)

[Comparative Example vs. Comparative Example]

In Table 1 below, the evaluation results are summarized and displayed in a manner that is easy to compare with the examples and the comparative examples.

In the method for producing a printed wiring board of the present application, the outer surface of the ultra-thin copper foil having the carrier is 0.2 μm ≦Wmax ≦ 1.3 μm, and 0.08 μm ≦Ia ≦ 0.43 μm. As a necessary condition. Here, it can be easily understood from Table 1 that the ultra-thin copper foil with a carrier used in each embodiment satisfies the requirements required for the ultra-thin copper foil having the carrier of the present application, and the plated photoresist is dense. Both the sex test and the circuit linearity test can give good results.

On the other hand, in the case of the ultra-thin copper foil having a carrier used in Comparative Example 1 and Comparative Example 2, the values of Wmax and Ia were deviated from the appropriate range in the present application. As a result, good results were not obtained in the photoresist adhesion test or the circuit linearity test.

Industrial availability

By the method of manufacturing a printed wiring board of the present application, it is possible to obtain a coreless assembly wiring board in which an embedded circuit having excellent linearity even if the wiring width is 30 μm or less is provided as an outer layer. This advantage can be considered as a thin coreless assembled substrate having excellent impedance control in various applications. For example, it can be used as an application processor and a memory that is mounted on a smart phone, a tablet, a personal computer, a server, a router, a workstation, etc., 1 to 10 Giga Hertz (billions) A semiconductor component and a module substrate for a high frequency digital signal circuit in a Hertz; GHz) region. In these applications, since it is possible to provide a package having excellent impedance matching, it is possible to reduce the number of mounted electronic components such as resistors and inductors. In addition, it is possible to use the antenna element substrate, the CSP, and the like for the signal transmission/reception signal circuit used for analog communication such as multi-band, etc., in addition to the above-described digital signal processing application.

1‧‧‧very thin copper foil

2‧‧‧ Carrier

3‧‧‧ peeling layer

4‧‧‧very thin copper foil layer

5‧‧‧Insulation layer

10‧‧‧ Plated photoresist

25‧‧‧ outer surface of very thin copper foil

30‧‧‧Copying surface

S1‧‧‧Support substrate

S2‧‧‧Support substrate with plated photoresist pattern

Claims (11)

A coreless assembled support substrate, which is a coreless assembled support substrate for manufacturing a printed wiring board, characterized by comprising: an ultra-thin copper foil with a carrier, and a layer structure of an extremely thin copper foil layer/release layer/carrier; The carrier can be peeled off at the peeling layer; and an insulating layer constituent material for supporting the substrate is laminated on the surface of the carrier of the ultra-thin copper foil with the carrier; wherein the extremely thin copper foil with the carrier is extremely thin The outer surface of the copper foil was 0.2 μm ≦Wmax ≦ 1.3 μm and 0.08 μm ≦Ia ≦ 0.43 μm. The coreless assembled support substrate according to claim 1, wherein the ultra-thin copper foil is thinner than the carrier. The coreless assembled support substrate according to claim 1, wherein the ultra-thin copper foil has an unroughened surface. The coreless assembled support substrate according to claim 1, wherein the ultra-thin copper foil has a thickness of 0.5 μm to 5 μm, and uses an electrolysis method, an electroless method, a chemical vapor phase reaction method, a sputtering method, and an evaporation method. Any method to form the person. The coreless assembled support substrate according to claim 1, wherein the carrier has a thickness of 12 μm to 70 μm and is a resin film, an electrolytic copper foil or a rolled copper foil. The coreless assembled support substrate according to claim 1, wherein the release layer is an organic release layer or an inorganic release layer. The coreless assembled support substrate according to claim 6, wherein the release layer is an organic release layer having a thickness of 5 nm to 60 nm formed on a surface of the carrier. The coreless assembled support substrate according to claim 6, wherein the release layer is an inorganic release layer containing a material selected from the group consisting of Ni, Mo, Co, Cr, Fe, Ti, W, P, carbon, and the like. At least one or more inorganic components of the alloy of the main component and the group of the compounds having the main component. The coreless assembled support substrate according to claim 1, wherein the ultra-thin copper foil and the peeling layer have a heat resistant metal layer. The coreless assembled support substrate according to claim 9, wherein the heat resistant metal layer is a metal or alloy selected from the group consisting of molybdenum, tantalum, tungsten, cobalt, nickel, and alloys thereof as a main component. Composition. The coreless assembled support substrate according to the first aspect of the invention, which is provided with an insulating layer constituent material as a printed wiring board constituent member and a printed wiring board in which an outer layer circuit disposed on the insulating layer constituent material is embedded. Manufacturing.