TWI524823B - Method of manufacturing printed wiring board and printed wiring board obtained by the manufacturing method - Google Patents

Method of manufacturing printed wiring board and printed wiring board obtained by the manufacturing method Download PDF

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TWI524823B
TWI524823B TW100136444A TW100136444A TWI524823B TW I524823 B TWI524823 B TW I524823B TW 100136444 A TW100136444 A TW 100136444A TW 100136444 A TW100136444 A TW 100136444A TW I524823 B TWI524823 B TW I524823B
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wiring board
printed wiring
insulating resin
copper
etching
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TW100136444A
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Chinese (zh)
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TW201223365A (en
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吉川和廣
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三井金屬礦業股份有限公司
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0779Treatments involving liquids, e.g. plating, rinsing characterised by the specific liquids involved
    • H05K2203/0786Using an aqueous solution, e.g. for cleaning or during drilling of holes
    • H05K2203/0789Aqueous acid solution, e.g. for cleaning or etching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor

Description

印刷配線板之製造方法及以該印刷配線板製造方法所製得之印刷配線板Printed wiring board manufacturing method and printed wiring board produced by the printed wiring board manufacturing method

本發明係關於印刷配線板之製造方法及使用該印刷配線板之製造方法所得之印刷配線板。特別係關於抗焊劑層與露出於電路之間之絕緣樹脂層表面之密著性優異之印刷配線板。The present invention relates to a method of producing a printed wiring board and a printed wiring board obtained by using the method of manufacturing the printed wiring board. In particular, a printed wiring board excellent in adhesion between the solder resist layer and the surface of the insulating resin layer exposed between the circuits.

以往,製造貼銅層壓板所使用之銅箔,係在該銅箔之與絕緣樹脂層貼合之面施予粗化處理,使該粗化處理之凹凸形狀嵌入絕緣樹脂層之表面狀態,而獲得物理上的錨定效果,藉此貼合絕緣樹脂層。因此於使用蝕刻法於貼銅層壓板上形成電路而去除銅箔層之部位,使轉印有粗化處理形狀之具有凹凸之絕緣樹脂層露出。於此種具有凹凸之絕緣樹脂層之情形,成為與該表面上事後設置抗焊劑層、於多層化時與事後層積之樹脂層之密著性良好者。Conventionally, a copper foil used for producing a copper-clad laminate is subjected to a roughening treatment on a surface of the copper foil bonded to the insulating resin layer, and the uneven shape of the roughening treatment is embedded in the surface state of the insulating resin layer. A physical anchoring effect is obtained, thereby bonding the insulating resin layer. Therefore, a portion of the copper foil layer is removed by forming an electric circuit on the copper-clad laminate using an etching method, and the insulating resin layer having the uneven shape to which the roughened shape is transferred is exposed. In the case of such an insulating resin layer having irregularities, the adhesion of the resin layer to the surface after the formation of the solder resist layer and the multilayering of the resin layer after the multilayering is good.

然而,最近在行動電話、攜帶式電腦、攜帶式音樂播放器、數位相機等之主要攜帶式電子機器,隨著輕薄短小化,同時也要求多功能化,內置之印刷配線板也隨之輕薄短小化之同時,要求提升配線密度而形成可對應多功化之電路。製造此種印刷配線板之際,極力使貼銅層壓板所具有之銅箔變薄,且大多使用藉由使銅箔及絕緣層之接著面平坦化形成具備良好蝕刻因子之微細配線所要求之無粗化銅箔。此處所謂無粗化銅箔意指於銅箔之與絕緣樹脂層貼合之面未施予粗化處理。因此,未形成嵌入絕緣樹脂層表面之狀態之凹凸形狀的粗化處理,則無法在銅箔與絕緣樹脂層之間獲得物理上的錨定效果。However, recently, the main portable electronic devices such as mobile phones, portable computers, portable music players, and digital cameras have become lighter and shorter, and also require multi-functionality. The built-in printed wiring boards are also light and short. At the same time, it is required to increase the wiring density to form a circuit that can cope with multi-function. In the production of such a printed wiring board, the copper foil of the copper-clad laminate is required to be thinned as much as possible, and it is often required to form a fine wiring having a good etching factor by flattening the copper foil and the insulating layer. No roughened copper foil. Here, the non-roughened copper foil means that the surface of the copper foil to which the insulating resin layer is bonded is not subjected to the roughening treatment. Therefore, the roughening treatment of the uneven shape in a state in which the surface of the insulating resin layer is not formed does not provide a physical anchoring effect between the copper foil and the insulating resin layer.

其結果,使用貼合無粗化銅箔之貼銅層壓板製造印刷配線板時,在以蝕刻法形成電路而去除銅箔層之部位,露出無凹凸形狀之平坦絕緣樹脂層,故無法發揮錨定效果,因而與形成於其外層之抗焊劑層或絕緣樹脂層之密著性變差。因此在吸濕狀態下施予熔融等加熱步驟時,有發生抗焊劑層自絕緣樹脂層剝離之現象(脫層)之不良情形。發生脫層之印刷配線板之剖面圖示於第6圖。第6圖中,絕緣樹脂層材料BM和抗焊劑層PSR之間,可明顯地觀察到銅電路CC附近處存在有空間(脫層DL)。As a result, when a printed wiring board is produced by using a copper-clad laminate to which a roughened copper foil is bonded, a portion of the copper foil layer is removed by an etching method, and a flat insulating resin layer having no uneven shape is exposed, so that the anchor cannot be used. The effect is such that the adhesion to the solder resist layer or the insulating resin layer formed on the outer layer thereof is deteriorated. Therefore, when a heating step such as melting is applied in a moisture absorption state, there is a problem that the solder resist layer is peeled off from the insulating resin layer (delamination). A cross-sectional view of the printed wiring board in which delamination occurs is shown in Fig. 6. In Fig. 6, between the insulating resin layer material BM and the solder resist layer PSR, a space (delamination DL) is observed in the vicinity of the copper circuit CC.

又,於發生該脫層之部位,藉由朝電路通電容易發生表層遷移,難以保證作為印刷配線板之長期可靠性。至於提高該等抗焊劑層與絕緣樹脂層之吸濕、耐熱密著性之技術,有揭示於例如如下專利文獻1(日本專利申請案:申請公開號:專利公開第2008-16794號)以及專利文獻2(日本專利申請案:申請公開號:專利公開第2010-103153號)之技術。Further, in the portion where the delamination occurs, surface layer migration easily occurs by energization of the circuit, and it is difficult to ensure long-term reliability as a printed wiring board. A technique for improving the moisture absorption and heat-resistance of the solder resist layer and the insulating resin layer is disclosed in, for example, the following Patent Document 1 (Japanese Patent Application Laid-Open Publication No. Hei No. No. 2008-16794) The technique of Document 2 (Japanese Patent Application: Application Publication No.: Patent Publication No. 2010-103153).

該專利文獻1之目的在提供有利於形成微細配線或電學特性及製造成本,且可靠性高之印刷配線板之製造方法,係揭示一種印刷配線板之製造方法,係在使用表面之十點平均粗糙度(Rz)為2.0 μm以下之金屬箔而製造印刷配線板之方法中,具有在成為與抗焊劑層之接著界面之樹脂表面施予粗化處理之步驟,作為塗佈或積層抗焊劑層時之前處理。The purpose of Patent Document 1 is to provide a method for manufacturing a printed wiring board which is advantageous in forming fine wiring, electrical characteristics, and manufacturing cost, and which is highly reliable, and discloses a method for manufacturing a printed wiring board, which is based on a ten point average of the surface. A method of producing a printed wiring board having a metal foil having a roughness (Rz) of 2.0 μm or less has a step of applying a roughening treatment to a surface of a resin which is an interface with the solder resist layer, and is used as a coating or laminated solder resist layer. Handle before.

而且,該專利文獻1之實施例中記載將在電解銅箔(FO-WS-18,Furukawa Circuit Foil Co.,Ltd製,厚度:18 μm,Rz=1.8 μm)之經矽烷偶合劑處理之被接著面上,塗布以厚度為3.0 μm之樹脂組成物,然後在160℃下乾燥10分鐘左右而使溶劑殘留量為5%重量以下之黏附有樹脂之銅箔,配置於重疊四片之日立化成工業公司製品之玻璃布絕緣層Tg環氧樹脂預浸材料GEA-679F(厚度:0.1 μm)之下上,在180℃、2.5 MPa之條件下,壓製成型1小時而製造貼銅層壓板,使用該貼銅層壓板,以氯化鐵系蝕刻液等除去不需要部分之銅箔而得印刷配線板,於將該印刷配線板以3%氫氧化鈉+6%過錳酸鉀水溶液處理予以化學粗化之絕緣樹脂基板上,積層日立化成工業公司製之SR-7200G(抗焊劑),在121℃、溼度100%、2大氣壓之條件處理2小時後,在260℃之焊浴中浸漬20秒鐘,或在121℃、溼度100%、2大氣壓之條件處理196小時,抗焊劑亦不會發生膨脹等問題。Further, in the example of Patent Document 1, a ruthenium coupling agent which is treated with an electrolytic copper foil (FO-WS-18, manufactured by Furukawa Circuit Foil Co., Ltd., thickness: 18 μm, Rz = 1.8 μm) is treated. On the next surface, a resin composition having a thickness of 3.0 μm was applied, and then dried at 160 ° C for about 10 minutes to leave a solvent-retained amount of 5% by weight or less of a copper foil adhered to the resin, and placed in a four-piece overlapping manner. Industrial company products glass cloth insulation Tg epoxy resin prepreg GEA-679F (thickness: 0.1 μm) under the conditions of 180 ° C, 2.5 MPa, press molding for 1 hour to manufacture copper-clad laminate, use The copper-clad laminate is obtained by removing an unnecessary portion of the copper foil with a ferric chloride-based etching solution or the like to obtain a printed wiring board, and treating the printed wiring board with 3% sodium hydroxide + 6% potassium permanganate aqueous solution for chemical treatment. On the roughened insulating resin substrate, SR-7200G (solder resist) manufactured by Hitachi Chemical Co., Ltd. was laminated, and treated at 121 ° C, humidity of 100%, and 2 atm for 2 hours, and then immersed in a solder bath of 260 ° C for 20 seconds. Clock, or treated at 121 ° C, humidity 100%, 2 atmospheres When the solder resist expansion and other issues also will not occur.

又,專利文獻2之目的係提供一種即使使用與絕緣層密著之面的表面粗糙小之金屬箔,亦可確保除去金屬箔後之絕緣層上之抗焊劑層之密著,對於PCT之信賴性優異,且具有微細電路且高頻信號傳送損耗少之電路基板,而揭示一種在絕緣層上貼合金屬箔而構成之貼金屬層壓板將其金屬箔除去而形成之具有導體圖案之電路基板中,在除去金屬箔後露出之絕緣層表面上形成有粗面形狀之電路基板及其製造方法。Further, the object of Patent Document 2 is to provide a metal foil having a small surface roughness which is adhered to the surface of the insulating layer, and it is possible to secure the adhesion of the solder resist layer on the insulating layer after removing the metal foil, and to trust the PCT. A circuit board having a fine circuit and having a low-frequency signal transmission loss is small, and a circuit board having a conductor pattern formed by laminating a metal foil formed by laminating a metal foil on an insulating layer to remove a metal foil is disclosed. A circuit board having a rough surface formed on a surface of an insulating layer exposed after removing a metal foil, and a method of manufacturing the same.

而且,該專利文獻2實施例中,記載有在施予黑化處理之內層芯材之兩面上,介隔日立化成工業公司製之GEA-679FG作為絕緣層,使用熱壓貼合日立化成工業公司製之無高低差(profile)之銅箔PF-E-3,藉由半附加法形成導體圖案之印刷配線板上,使用氧氣作為電漿氣體,以輸出1000W,環境壓力100 Pa下,實施5分鐘之氧氣電漿處理後,以化學蝕刻處理(MEC股份有限公司製,CZ-8100)進行導體圖案表面之粗化處理,繼之,將乾膜型抗焊劑之太陽油墨股份有限公司製之PER-800 AUS 402加以真空積層而製成印刷配線板,將該印刷配線板經壓力蒸煮試驗法(PCT: 121℃,100%RH,2大氣壓下連續保持96小時)之後,以實體顯微鏡進行觀察,於絕緣層與抗焊劑層之間並無剝離。Further, in the examples of Patent Document 2, GEA-679FG manufactured by Hitachi Chemical Co., Ltd. is used as an insulating layer on both sides of the inner core material to which the blackening treatment is applied, and the Hitachi Chemical Industry is bonded by hot pressing. The company's copper foil PF-E-3 with no profile is formed by a semi-additive method to form a conductor pattern on a printed wiring board, using oxygen as a plasma gas to output 1000 W at an ambient pressure of 100 Pa. After 5 minutes of oxygen plasma treatment, the surface of the conductor pattern was roughened by a chemical etching treatment (manufactured by MEC Co., Ltd., CZ-8100), and then, a dry film type solder resist was manufactured by Sun Ink Co., Ltd. The PER-800 AUS 402 was vacuum-laminated to form a printed wiring board, and the printed wiring board was observed by a solid microscope after being subjected to a pressure cooking test (PCT: 121 ° C, 100% RH, continuous holding at 96 atmospheres for 96 hours). There is no peeling between the insulating layer and the solder resist layer.

亦即,專利文獻1及專利文獻2中所記載之技術,係藉由對使用表面粗糙度小的金屬箔之貼金屬箔層壓板蝕刻其金屬箔,對其露出之絕緣層表面進行加工,藉此可獲得與使用經粗化處理之銅箔時之具有凹凸之絕緣樹脂層之露出面相同程度之表面粗糙度之狀態,而確保絕緣樹脂層與抗焊劑層之間之良好吸濕、耐熱密著性。In other words, in the techniques described in Patent Document 1 and Patent Document 2, the metal foil is etched by using a metal foil laminate having a metal foil having a small surface roughness, and the surface of the exposed insulating layer is processed. This makes it possible to obtain the same degree of surface roughness as the exposed surface of the insulating resin layer having irregularities when the roughened copper foil is used, and to ensure good moisture absorption and heat resistance between the insulating resin layer and the solder resist layer. Sexuality.

確實,如同專利文獻1及專利文獻2所揭示之發明,對使用表面粗糙小之銅箔之貼銅層壓板之銅箔層蝕刻加工,形成電路形狀,對露出於電路間之絕緣樹脂層表面進行加工,亦可獲得與使用進行粗化處理之銅箔時之具有凹凸之絕緣樹脂層之露出面相同程度之表面粗糙狀態,於專利文獻1記載之經壓力蒸煮試驗法(121℃、100%RH、2大氣壓下之條件下處理2小時)後,即使浸漬於260℃之焊浴中20秒鐘,在絕緣層與抗焊劑層之間,亦未見到孔徑20 μm以上之斑點狀脫層之發生。In the invention disclosed in Patent Document 1 and Patent Document 2, a copper foil layer of a copper-clad laminate having a copper foil having a small surface roughness is etched to form a circuit shape, and the surface of the insulating resin layer exposed between the circuits is formed. In the processing, it is possible to obtain a surface roughness state which is the same as the exposed surface of the insulating resin layer having the unevenness when the copper foil subjected to the roughening treatment is used, and the pressure cooking test method (121 ° C, 100% RH) described in Patent Document 1 is used. After treatment at 2 atmospheres for 2 hours, even if immersed in a solder bath at 260 ° C for 20 seconds, no speckled delamination of pores of 20 μm or more was observed between the insulating layer and the solder resist layer. occur.

然而,如專利文獻1及專利文獻2中所記載,藉由對露出且平滑之絕緣層表面進行加工,加工成與使用進行粗化處理之銅箔時之具有凹凸的絕緣樹脂層之露出面相同程度之表面粗糙度,會導致印刷配線板之製造成本增加,且就在銅一面內進行均一粗化處理之觀點而言,也會增加製造條件之管理成本故而不佳。However, as described in Patent Document 1 and Patent Document 2, the exposed and smooth surface of the insulating layer is processed to be the same as the exposed surface of the insulating resin layer having irregularities when the copper foil subjected to the roughening treatment is used. The degree of surface roughness causes an increase in the manufacturing cost of the printed wiring board, and also increases the management cost of the manufacturing conditions from the viewpoint of uniform roughening in the copper side.

因此,在市面上為削減印刷配線板之製造成本及管理成本,而期望可對於露出於電路間之絕緣樹脂層之表面不施予粗化,而直接以平坦狀,穩定地供給與專利文獻1及專利文獻2所記載之發明同樣地在絕緣樹脂層與抗焊劑層之間具有優異地密著性之印刷配線板。Therefore, in order to reduce the manufacturing cost and the management cost of the printed wiring board, it is desirable to stably supply the surface of the insulating resin layer exposed between the circuits without being roughened. In the same manner as the invention described in Patent Document 2, a printed wiring board having excellent adhesion between the insulating resin layer and the solder resist layer is used.

本發明人等經積極研究之結果,就着眼在以銅蝕刻液蝕刻銅箔之後露出於電路間之絕緣樹脂層表面上所殘留之銅箔之防銹成分,思及使抗焊劑層和絕緣體樹脂層表面之吸濕‧耐熱密著性穩定化之方法。As a result of active research, the present inventors focused on the anti-rust component of the copper foil remaining on the surface of the insulating resin layer exposed between the circuits after etching the copper foil with a copper etching solution, and considered the solder resist layer and the insulator resin. A method of stabilizing the moisture absorption and heat resistance of the surface of the layer.

本發明之印刷配線板之製造方法:本發明之印刷配線板之製造方法係使用貼合無粗化銅箔而成之貼銅層壓板而製造印刷配線板之方法,其特徵為以銅蝕刻液蝕刻無粗化銅箔而形成電路之後,將露出於電路間之絕緣樹脂層表面施予淨化處理,該施予淨化處理後於該絕緣樹脂表面所殘留之該無粗化銅箔之表面處理金屬成分,於藉由XPS分析裝置(X線源:Al(kα),加速電壓:15kV,射束徑:50 μm)進行進行半定量分析時,其各表面處理金屬成分係在檢測界限以下。The method for producing a printed wiring board according to the present invention is a method for producing a printed wiring board by bonding a copper-clad laminate obtained by laminating a non-roughened copper foil, which is characterized in that a copper etching solution is used. After etching the non-roughened copper foil to form a circuit, the surface of the insulating resin layer exposed between the circuits is subjected to a purification treatment, and the surface of the non-roughened copper foil remaining on the surface of the insulating resin is treated with a metal component. When the semi-quantitative analysis was carried out by an XPS analyzer (X-ray source: Al (kα), acceleration voltage: 15 kV, beam diameter: 50 μm), the surface-treated metal components were below the detection limit.

本發明之形成抗焊劑層後之印刷配線板之製造方法:本發明之形成抗焊劑層後之印刷配線板之製造方法,其特徵為在上述印刷配線板之製造方法中所述之進行淨化處理之後,形成抗焊劑層。A method of producing a printed wiring board after forming a solder resist layer according to the present invention is the method for producing a printed wiring board after forming a solder resist layer according to the present invention, characterized in that it is subjected to purification treatment as described in the method for producing a printed wiring board Thereafter, a solder resist layer is formed.

本發明之印刷配線板:本發明之印刷配線板係以本發明之印刷配線板之製造方法所得之形成抗焊劑層後之印刷配線板,其特徵為將該印刷配線板在121℃、濕度:100%、2大氣壓下之條件下處理5小時後,在260℃之焊浴中浸漬60秒時,抗焊劑層與絕緣樹脂表面之間,不發生直徑20 μm以上之斑點狀脫層。The printed wiring board of the present invention is a printed wiring board obtained by forming a solder resist layer obtained by the method for producing a printed wiring board of the present invention, characterized in that the printed wiring board is at 121 ° C and humidity: After 5 hours of treatment under conditions of 100% and 2 atm., and immersing in a solder bath of 260 ° C for 60 seconds, no speckle delamination of 20 μm or more in diameter was observed between the solder resist layer and the surface of the insulating resin.

[發明之效果][Effects of the Invention]

藉由採用本發明之印刷配線板之製造方法,在進行電路蝕刻後,不對露出於電路之間絕緣樹脂表面進行粗化,也能穩定地供應在壓力蒸煮試驗(121℃、濕度:100%、2大氣壓下之條件處理5小時)之後,於260℃之焊浴中浸漬60秒以上,亦未發生直徑20 μm以上之斑點狀脫層之印刷配線板。By using the manufacturing method of the printed wiring board of the present invention, after the circuit etching is performed, the surface of the insulating resin exposed between the circuits is not roughened, and the pressure cooking test can be stably supplied (121 ° C, humidity: 100%, After the treatment under the conditions of 2 atm. for 5 hours), it was immersed in a solder bath of 260 ° C for 60 seconds or more, and a printed wiring board having a spot-like delamination of 20 μm or more in diameter did not occur.

以該製造方法所得之印刷配線板,露出於電路間之絕緣樹脂之表面為平坦,同時在極端嚴苛之壓力蒸煮試驗之後,顯示出並未發生實用上成為問題之絕緣樹脂層與抗焊劑層之間之直徑20 μm以上之斑點狀脫層之特性,耐遷性能亦優異,故而成為長期使用安定性優異之高品質製品。In the printed wiring board obtained by the manufacturing method, the surface of the insulating resin exposed between the circuits is flat, and after the extremely severe pressure cooking test, the insulating resin layer and the solder resist layer which are not practically problematic are displayed. The characteristics of the spot-like delamination of 20 μm or more in diameter and excellent migration resistance are high-quality products excellent in long-term stability.

本發明之印刷配線板之製造形態:本發明之印刷配線板之製造方法係使用貼合無粗化銅箔之貼銅層壓板製造印刷配線板之方法,其特徵為將無粗化銅箔以銅蝕刻液蝕刻形成電路之後,對露出於電路間之絕緣樹脂表面施予淨化處理,該施予淨化處理後之該絕緣樹脂表面所殘留之該無粗化銅箔之表面處理金屬成分,於藉由XPS分析裝置(X線源:Al(kα),加速電壓:15 kV,射束徑:50 μm)進行進行半定量分析時,該各表面處理金屬成分為檢測界限以下。亦即,本發明之印刷配線板之特徵,係經蝕刻形成電路之後,儘可能除去露出於電路間之絕緣樹脂表面所殘留之無粗化銅箔之表面處理金屬成分。其原因係,當露出於電路間之絕緣樹脂表面殘留有該金屬成分時,會對抗焊劑層與絕緣樹脂層間之密著性帶來不良影響,使通電時之耐遷移性劣化之故。再者,藉由除去於該等電路間所露出之絕緣樹脂層表面之殘留金屬成分,即使不進行以往方法所採用之過度粗化至絕緣樹脂表面之粗化程度之粗化處理,也能使在該表面所設之抗焊劑層及在外層所設之絕緣樹脂之間保持良好之吸濕‧耐熱密著性。又,本發明之吸濕‧耐熱密著性係組合特定壓力蒸煮試驗與焊接耐熱試驗而判斷者。A manufacturing method of a printed wiring board according to the present invention is a method for producing a printed wiring board by bonding a copper-clad laminate having no roughened copper foil, and is characterized in that the roughened copper foil is not used After the copper etching solution is etched to form the circuit, the surface of the insulating resin exposed between the circuits is subjected to a purification treatment, and the surface-treated metal component of the roughened copper foil remaining on the surface of the insulating resin after the purification treatment is applied by When the semi-quantitative analysis is performed on the XPS analyzer (X-ray source: Al (kα), acceleration voltage: 15 kV, beam diameter: 50 μm), the surface-treated metal components are below the detection limit. That is, the printed wiring board of the present invention is characterized in that the surface-treated metal component of the roughened copper foil remaining on the surface of the insulating resin exposed between the circuits is removed as much as possible after the circuit is formed by etching. The reason for this is that when the metal component remains on the surface of the insulating resin exposed between the circuits, the adhesion between the solder layer and the insulating resin layer is adversely affected, and the migration resistance at the time of energization is deteriorated. Further, by removing the residual metal component on the surface of the insulating resin layer exposed between the circuits, it is possible to carry out the roughening treatment to the extent of roughening of the surface of the insulating resin without using the conventional method. Good moisture absorption and heat-resistance are maintained between the solder resist layer provided on the surface and the insulating resin provided on the outer layer. Further, the moisture absorbing and heat-resistant adhesive system of the present invention is combined with a specific pressure cooking test and a welding heat resistance test.

首先,就本發明所使用「貼合無粗化銅箔而成之貼銅層壓板」加以說明。本文所述之「貼合無粗化銅箔而成之貼銅層壓板」意指使用無粗化銅箔作為最外層之銅箔而構成之貼銅層壓板之總稱,係包含所謂單面貼銅層壓板、雙面貼銅層壓板、內含內層芯基材之多層貼銅層壓板之所有概念之貼銅層壓板。又,無粗化銅箔可使用電解銅箔、壓延銅箔以及附有載體之極薄銅箔,其厚度並無特別限制。First, the "copper-clad laminate obtained by laminating a non-roughened copper foil" used in the present invention will be described. The "copper-clad laminate made of a non-roughened copper foil" as used herein means a copper-clad laminate which is formed by using a copper foil having no roughened copper foil as the outermost layer, and includes a so-called single-sided sticker. A copper clad laminate of copper laminate, double-sided copper clad laminate, and multi-layer copper clad laminate with inner core substrate. Further, as the roughened copper foil, an electrolytic copper foil, a rolled copper foil, and an extremely thin copper foil with a carrier may be used, and the thickness thereof is not particularly limited.

又,有關該銅箔之表面處理亦無特別限制,若就防銹成分而言,例如亦可使用鎳-鋅合金、鎳-鈷合金、鎳-鋅-鉏合金、鎳-鈷-鉬合金、鋅-錫合金、鉻酸鹽處理等之各種合金。再者,於銅箔與絕緣樹脂層之接觸面,就提高密著性之觀點而言,亦較好設有環氧系矽烷偶合劑、胺基系矽烷偶合劑、巰基系矽烷偶合劑等之矽烷偶合劑處理層。Further, the surface treatment of the copper foil is not particularly limited, and as the rust preventive component, for example, a nickel-zinc alloy, a nickel-cobalt alloy, a nickel-zinc-bismuth alloy, a nickel-cobalt-molybdenum alloy, or the like may be used. Various alloys such as zinc-tin alloy and chromate treatment. Further, from the viewpoint of improving the adhesion between the copper foil and the insulating resin layer, an epoxy decane coupling agent, an amine decane coupling agent, a mercapto decane coupling agent or the like is preferably provided. The decane coupling agent treatment layer.

其次,製造貼銅層壓板所用之絕緣樹脂層,其樹脂成分、樹脂內所配置之玻璃布或玻璃不織布等之骨架材料,亦均無特別限制。又,該絕緣樹脂層亦可含有填充粒子。Next, the insulating resin layer used for the copper-clad laminate is not particularly limited as long as it is a resin component or a skeleton material such as a glass cloth or a glass nonwoven fabric disposed in the resin. Further, the insulating resin layer may contain filler particles.

然而,考慮無粗化銅箔與絕緣樹脂層之密著性時,於該貼銅層壓板之最外層配置無粗化銅箔時,以使用附有底塗樹脂層之無粗化銅箔較佳。該附有底塗樹脂層之無粗化銅箔,係在未施予粗化處理之銅箔之單面,設有為了確保與樹脂基材之良好密著性之極薄底塗樹脂層之銅箔。這種附有底塗樹脂層之無粗化銅箔,可使用例如三井金屬礦業股份有限公司製之「Multi Foil G:簡稱為MFG」,或日立化成工業股份有限公司製之「PF-E」等。此時之底塗樹脂層係發揮對於銅箔及絕緣樹脂兩者之接著力者,而容易地確保無粗化銅箔與絕緣樹脂層之良好密著性。However, when the adhesion between the roughened copper foil and the insulating resin layer is considered, when the roughened copper foil is disposed on the outermost layer of the copper-clad laminate, the roughened copper foil with the primer resin layer is used. good. The non-roughened copper foil with the undercoat resin layer is provided on one side of the copper foil which is not subjected to the roughening treatment, and is provided with an extremely thin undercoat resin layer for ensuring good adhesion to the resin substrate. Copper foil. For the non-roughened copper foil with a primer resin layer, for example, "Multi Foil G: MFG" manufactured by Mitsui Mining Co., Ltd., or "PF-E" manufactured by Hitachi Chemical Co., Ltd. Wait. In this case, the undercoat resin layer exhibits adhesion to both the copper foil and the insulating resin, and it is easy to ensure good adhesion of the roughened copper foil and the insulating resin layer.

本發明之印刷配線板之製造方法中,可使用相減法或半相加法形成電路。依據相減法,係先以銅蝕刻液蝕刻該貼銅層壓板之處於最外層之無粗化銅箔,除去不需要之銅箔部位,進行電路之形成。至於該時之電路形成方法,係在外層銅箔之表面形成蝕刻光阻劑層,經曝光、顯像形成該蝕刻光阻劑圖形,隨後,使用銅蝕刻液進行電路圖案之形成,最後除去蝕刻光阻劑,形成印刷配線之電路。又依據半相加法,係在貼合無粗化銅箔之貼銅層壓板之形成通孔之位置上穿洞。然後,施以無電解鍍銅,在形成之無電解鍍銅層之表面形成光阻層,使鍍敷之光阻劑加以曝光、顯象。然後,電鍍銅進行電路圖案之形成,除去鍍敷之光阻層後,使用銅蝕刻液蝕刻去除無粗化銅箔,藉此形成印刷配線板之電路。In the method of manufacturing a printed wiring board of the present invention, a circuit can be formed using a subtractive method or a semi-additive method. According to the subtractive method, the roughened copper foil at the outermost layer of the copper-clad laminate is first etched with a copper etching solution, and the unnecessary copper foil portion is removed to form a circuit. As for the circuit forming method at this time, an etching photoresist layer is formed on the surface of the outer layer copper foil, and the etching photoresist pattern is formed by exposure and development, and then the circuit pattern is formed by using a copper etching solution, and finally the etching is removed. A photoresist that forms a circuit for printed wiring. Further, according to the semi-phase addition method, a hole is formed in a position where a through-hole is formed in a copper-clad laminate to which a roughened copper foil is attached. Then, electroless copper plating is applied to form a photoresist layer on the surface of the formed electroless copper plating layer, and the plated photoresist is exposed and developed. Then, the electroplated copper is formed into a circuit pattern, and after the plated photoresist layer is removed, the roughened copper foil is removed by etching using a copper etching solution, thereby forming a circuit for the printed wiring board.

本發明之印刷配線板之製造方法,關於氯化銅蝕刻液、氯化鐵蝕刻液、硫酸-過氧化氫系蝕刻液等之銅蝕刻液種類,本來就未特別限制,而可任意使用。然而,應用於使用硫酸-過氧化氫系蝕刻液作為銅蝕刻液時最佳。不過目前,在微間距電路之形成中,銅蝕刻液中以採用「硫酸-過氧化氫系蝕刻液」為最適,故而亦為半相加法中一般採用之蝕刻液。然而,使用「硫酸-過氧化氫系蝕刻液」時,將銅蝕刻而形成電路之後,在露出於電路間之絕緣樹脂表面上,作為無粗化銅箔之表面處理金屬成分,有容易殘留一般認為以蝕刻較難以去除之鎳、鉬、鈷、錫等成分之傾向。所以本發明之印刷配線板之製造方法,可說是較適於以假定形成電路之際之銅蝕刻液係使用「硫酸-過氧化氫系蝕刻液」之情形之印刷配線板之製造方法。In the method for producing a printed wiring board of the present invention, the type of the copper etching liquid such as the copper chloride etching solution, the ferric chloride etching solution, or the sulfuric acid-hydrogen peroxide-based etching liquid is not particularly limited, and can be used arbitrarily. However, it is preferable to use it as a copper etching liquid using a sulfuric acid-hydrogen peroxide type etching liquid. However, in the formation of a micro-pitch circuit, a "sulfuric acid-hydrogen peroxide-based etching liquid" is preferably used in the copper etching liquid, and therefore, an etching liquid generally used in the semi-phase addition method is also used. However, when a "sulfuric acid-hydrogen peroxide-based etching liquid" is used, copper is etched to form a circuit, and then the surface of the insulating resin exposed between the circuits is easily treated as a surface-treated metal component without roughening copper foil. It is considered that there is a tendency to etch a component such as nickel, molybdenum, cobalt, or tin which is difficult to remove. Therefore, the method for producing a printed wiring board according to the present invention can be said to be a method for producing a printed wiring board in which a "sulfuric acid-hydrogen peroxide-based etching liquid" is used in a copper etching liquid which is assumed to form a circuit.

如上述方法完成電路之形成後,進行露出於電路間之絕緣樹脂表面所殘留無粗化銅箔之表面處理金屬成分之去除。該操作稱為「淨化處理」。該淨化處理之達成度,係以XPS分析裝置(X線源:Al(Kα)、加速電壓:15kV、射束徑:50 μm)對殘留於絕緣樹脂表面之無粗化銅箔之表面處理金屬成分進行半定量分析而判斷。採用上述方法之理由如下述。例如淨化後之露出之絕緣樹脂層以濃硫酸等溶解,使用ICP分析法或原子吸光分析法等之高感度之直接分析方法,確認所殘留金屬元素量乃係理想方法。然而,此種化學分析方法手續煩雜而費時,故非製造步驟中可實施之方法。相對於此,依據採用XPS分析裝置之方法,由於可以簡易地完成測定,故亦可於製造步驟中實施。After the formation of the circuit is completed as described above, the surface-treated metal component remaining without the roughened copper foil remaining on the surface of the insulating resin exposed between the circuits is removed. This operation is called "purification processing". The degree of achievement of the purification treatment is based on an XPS analysis apparatus (X-ray source: Al (Kα), acceleration voltage: 15 kV, beam diameter: 50 μm) on the surface-treated metal of the roughened copper foil remaining on the surface of the insulating resin. The components were judged by semi-quantitative analysis. The reasons for using the above method are as follows. For example, the insulating resin layer exposed after purification is dissolved in concentrated sulfuric acid or the like, and it is an ideal method to confirm the amount of residual metal element by a direct analysis method of high sensitivity such as ICP analysis or atomic absorption spectrometry. However, such a chemical analysis method is cumbersome and time consuming, and thus may be carried out in a non-manufacturing step. On the other hand, depending on the method using the XPS analyzer, since the measurement can be easily performed, it can be carried out in the manufacturing step.

有必要淨化至使用該XPS分析裝置之半定量分析中,該絕緣樹脂所能檢測之銅箔之表面處理金屬成分成為檢測限界以下。亦即,使用此方法若未殘留可被檢測程度之銅箔之表面處理金屬成分,則露出於電路間之絕緣樹脂表面不粗化,在壓力蒸煮試驗(121℃、濕度100%、2大氣壓之條件下處理5小時)之後,浸漬於260℃之焊浴中60秒以上,亦可穩定地得到在絕緣樹脂層與抗焊接層之間不發生直徑20 μm以上之斑點狀脫層之效果之故。It is necessary to purify into the semi-quantitative analysis using the XPS analyzer, and the surface-treated metal component of the copper foil detectable by the insulating resin becomes below the detection limit. That is, if the metal component of the surface of the copper foil which can be detected is not left by this method, the surface of the insulating resin exposed between the circuits is not roughened, and the pressure cooking test (121 ° C, humidity 100%, 2 atmospheres) After the treatment under the conditions of 5 hours), the immersion in a solder bath at 260 ° C for 60 seconds or more can stably obtain the effect of not having a spot-like delamination of 20 μm or more in diameter between the insulating resin layer and the solder resist layer. .

再者,本發明之印刷配線板之製造方法中,露出於電路間之絕緣樹脂表面,在上述淨化處理前之露出之絕緣樹脂表面之表面粗糙度(10點之平均粗糙度Rzjis)之值設為Rz(S),該淨化處理後之露出之絕緣樹脂表面之表面粗糙度(10點之平均粗糙度Rzjis)之值設為Rz(C)時,該[Rz(C)/Rz(S)]之值較好為1.2以下。又,Rz(C)及Rz(S)乃依照日本工業標準規格(JIS B 06012001)所訂定「10點之平均粗糙度(Rzjis)」以雷射非接觸式粗糙測定儀測定時之值,其檢測下限為0.02 μm左右。Further, in the method for producing a printed wiring board of the present invention, the surface roughness (10-point average roughness Rzjis) of the surface of the insulating resin exposed before the purification treatment is exposed on the surface of the insulating resin between the circuits. In the case of Rz(S), when the value of the surface roughness (average roughness Rzjis of 10 points) of the exposed insulating resin surface after the purification treatment is Rz(C), the [Rz(C)/Rz(S) The value of ] is preferably 1.2 or less. In addition, Rz(C) and Rz(S) are values measured by a laser non-contact roughness tester in accordance with the Japanese Industrial Standard Specification (JIS B 0601 2001 ) "Average Roughness of 10 Points (Rzjis)". The detection limit is about 0.02 μm.

本發明申請之發明中,隨淨化處理所採用方法,而有露出於電路間之絕緣樹脂表面之表面粗糙度會增加之情況,表示該表面粗糙度增加程度乃係[Rz(C)/Rz(S)]之值。當表面狀態變化至該[Rz(C)/Rz(S)]之值超過1.2之程度時,於例如採用電漿處理時,支持電路之絕緣樹脂層會發生底切(under cut)。其結果,微細電路中電路與絕緣樹脂之密著性降低故而不佳。In the invention of the present invention, the surface roughness of the surface of the insulating resin exposed between the circuits may increase as the method of the purification treatment is employed, indicating that the degree of increase in the surface roughness is [Rz(C)/Rz( S)] value. When the surface state changes to such an extent that the value of [Rz(C)/Rz(S)] exceeds 1.2, the undercut of the insulating resin layer of the supporting circuit may occur when, for example, plasma treatment is employed. As a result, the adhesion between the circuit and the insulating resin in the fine circuit is lowered, which is not preferable.

再者,此時較好淨化處理至Rz(C)為1.8 μm以下。該Rz(C)超過1.8 μm時,由於在上述之半相加過程中,必須延長設定過蝕刻時間故而不佳。又,為形成更微細之電路,更好Rz(C)為1.0 μm以下。Further, at this time, the purification treatment is preferably carried out until Rz (C) is 1.8 μm or less. When the Rz (C) exceeds 1.8 μm, it is not preferable to set the over-etching time in the above-described half-addition process. Further, in order to form a finer circuit, Rz(C) is preferably 1.0 μm or less.

此處,就本發明之印刷配線板之製造方法中之淨化處理之淨化方法加以說明。此處所稱之「淨化處理」係以除去露出於電路間之絕緣樹脂表面所殘留金屬成分為目的者。因此,可自原本之物理處理或化學處理方法中適當選擇而實施。具體而言,可自離子束法、RF射束法、電漿蝕刻法、反應性離子蝕刻法、反應性離子束蝕刻法等之電漿處理、濃鹽酸溶液蝕刻法或使用過錳酸等之除汙法等適當選擇。然而,必須選擇對形成有微細電路之印刷配線板之表面,不對其電路造成損害,而可均一處理之方法。基於上述觀點,為了使露出於電路間之絕緣樹脂表面所殘留之金屬成分,使用XPS分析裝置之半定量分析時,各表面處理金屬成分成為檢測限界以下,且獲得上述淨化處理後之表面粗糙度,較好使用「電漿處理」或「儘可能不溶解銅之溶液處理」。Here, a purification method of the purification treatment in the method for producing a printed wiring board of the present invention will be described. The "purification treatment" referred to herein is intended to remove metal components remaining on the surface of the insulating resin exposed between the circuits. Therefore, it can be suitably selected from the original physical treatment or chemical treatment method. Specifically, it can be subjected to plasma treatment such as ion beam method, RF beam method, plasma etching method, reactive ion etching method, reactive ion beam etching method, concentrated hydrochloric acid solution etching method or permanganic acid. Decontamination method and other appropriate choices. However, it is necessary to select a method for uniformly treating the surface of the printed wiring board on which the fine circuit is formed without causing damage to the circuit. In order to make the metal component remaining on the surface of the insulating resin exposed between the circuits, semi-quantitative analysis using an XPS analyzer, each surface-treated metal component is below the detection limit, and the surface roughness after the above-described purification treatment is obtained. It is better to use "plasma treatment" or "dissolve copper solution as much as possible".

於上述電漿處理時,若以腔室內之環境氣體之選擇自由性或淨化處理能力為優先,則以採用反應性離子蝕刻法為佳。然而,採用反應性離子蝕刻法時,淨化對象之印刷配線板必須一面一面地處理。其結果,降低整個淨化處理步驟之生產效率,同時也增加環境氣體之消耗量。為此,以輸入能量設為10 J/cm2~120 J/cm2之條件,進行電漿蝕刻,同時淨化處理印刷配線板之兩面較佳。然而,輸入能量未達10 J/cm2時,蝕刻量少,而有無法充分除去露出於電路間之絕緣樹脂表面所殘留金屬成分之情況故而不佳。另一方面,當輸入能量超過120 J/cm2時,支持電路之絕緣樹脂層會發生底切。其結果,在微細電路中,電路與絕緣樹脂之密著性降低故而不佳。又,該情況下,絕緣樹脂層表面之表面粗糙度亦容易發生不均故而不佳。In the above plasma treatment, if the selection freedom or the purification treatment ability of the ambient gas in the chamber is prioritized, it is preferable to use a reactive ion etching method. However, when the reactive ion etching method is employed, the printed wiring board to be cleaned must be processed on one side. As a result, the production efficiency of the entire purification treatment step is reduced, and the consumption of ambient gas is also increased. For this reason, plasma etching is performed under the condition that the input energy is set to 10 J/cm 2 to 120 J/cm 2 , and both sides of the printed wiring board are preferably treated. However, when the input energy is less than 10 J/cm 2 , the amount of etching is small, and the metal component remaining on the surface of the insulating resin exposed between the circuits cannot be sufficiently removed, which is not preferable. On the other hand, when the input energy exceeds 120 J/cm 2 , undercutting occurs in the insulating resin layer of the supporting circuit. As a result, in the fine circuit, the adhesion between the circuit and the insulating resin is lowered, which is not preferable. Moreover, in this case, the surface roughness of the surface of the insulating resin layer is also liable to be uneven.

本發明之印刷配線板之製造方法中,進行電漿蝕刻之際,蝕刻腔室內環境氣體以使用「O2與CF4之混合氣體」較佳。如上述,依據反應性離子蝕刻法,即使腔室內之環境氣體種類未特定,亦能除去表面處理金屬成分。然而,電漿蝕刻法中,隨環境氣體種類而異,其蝕刻性有很大變動。但是採用「O2與CF4之混合氣體」時,混合氣體中之CF4發揮與金屬之反應之功能,而O2發揮賦予樹脂表面親水性之功能,故可達成良好之蝕刻狀態。In the method for producing a printed wiring board of the present invention, it is preferable to use a "mixed gas of O 2 and CF 4 " in the etching of the ambient gas in the chamber during plasma etching. As described above, according to the reactive ion etching method, the surface-treated metal component can be removed even if the type of the ambient gas in the chamber is not specified. However, in the plasma etching method, the etching property varies greatly depending on the type of the environmental gas. But using "a mixed gas of O 2 and CF 4 of", the function of the reaction with the metal 4 to play the mixed gas of CF, O 2 and play functionality imparting hydrophilicity of the resin surface, it can achieve good etch state.

當然,亦可採用先使用CF4氣體實施電漿蝕刻,然後,使用O2作為蝕刻腔室內之環境氣體之電漿蝕刻方法。然而,若使用「O2與CF4之混合氣體」作為蝕刻腔室內之環境氣體,則可藉一次電漿蝕刻而發揮上述功能,所以就步驟及設備之單純化之觀點而言為佳。Of course, it is also possible to perform plasma etching using CF 4 gas first, and then use O 2 as a plasma etching method for etching the ambient gas in the chamber. However, the use of "mixed gas of O 2 and CF 4 of the" atmosphere as the etch chamber, may, by a plasma etch play the above functions, it is better to simplification of procedures and equipment in terms of point of view.

而且,CF4與O2之氣體分壓比[(CF4分壓)/(O2分壓)]之值為0.2~5.0較佳。當該氣體分壓比[(CF4分壓)/(O2分壓)]之值未滿0.2時,無法發揮與金屬反應之功能故而不佳。另一方面,CF4與O2之氣體分壓比[(CF4分壓)/(O2分壓)]之值超過5.0時,與金屬反應之功能到達飽和,由於O2分壓低,而無法發揮賦予樹脂表面之親水性功能故而不佳。Further, the gas partial pressure ratio [(CF 4 partial pressure) / (O 2 partial pressure)] of CF 4 and O 2 is preferably 0.2 to 5.0. When the value of the gas partial pressure ratio [(CF 4 partial pressure) / (O 2 partial pressure)] is less than 0.2, the function of reacting with the metal is not exhibited, which is not preferable. On the other hand, CF 4 and O 2 gas partial pressure ratio of [(CF 4 partial pressure) / (partial pressure of O 2)] The value exceeds 5.0, the reaction of the metal with the function reaches saturation, since the O 2 partial pressure, and It is not preferable to exhibit the hydrophilic function imparted to the surface of the resin.

而且,較好在蝕刻腔室內之氣壓為0.5 Pa~200 Pa之範圍進行電漿蝕刻。當蝕刻腔室內之氣壓未達5.0 Pa時,反應氣體少故而蝕刻速度變慢,印刷配線板之生產性極端降低而不佳。另一方面,蝕刻腔室內之氣壓超過200 Pa時,電漿之供應困難而不佳。Further, it is preferred that the plasma is etched in a range of from 0.5 Pa to 200 Pa in the etching chamber. When the gas pressure in the etching chamber is less than 5.0 Pa, the reaction gas is small and the etching rate is slow, and the productivity of the printed wiring board is extremely lowered. On the other hand, when the gas pressure in the etching chamber exceeds 200 Pa, the supply of plasma is difficult.

本發明之印刷配線板之製造方法中,採用電漿處理作為淨化處理時,較好在電漿處理後進行溼式洗淨。此處所述在電漿蝕刻之後,由於露出於電路間之絕緣樹脂表面,殘留有因電漿處理所產生之絕緣樹脂殘渣,所以使用濕式洗淨除去該絕緣樹脂殘渣。此時之濕式洗淨由於係以除去因電漿處理所產生絕緣樹脂殘渣為目的,所以並非必須具備有溶解去除殘留於絕緣樹脂表面之金屬成分之能力,可從高壓噴射水等物理洗淨或藥品處理等化學洗淨等中選擇最適效果之方法而實施即可。其中,本發明之溼式洗淨,較好選擇使用「含有界面活性劑之酸洗溶液」及/或「銅微蝕刻液」之洗淨。In the method for producing a printed wiring board of the present invention, when the plasma treatment is used as the purification treatment, it is preferred to perform wet cleaning after the plasma treatment. Here, after the plasma etching, since the insulating resin residue due to the plasma treatment remains on the surface of the insulating resin exposed between the circuits, the insulating resin residue is removed by wet cleaning. In this case, since the wet cleaning is performed for the purpose of removing the residue of the insulating resin due to the plasma treatment, it is not necessary to have the ability to dissolve and remove the metal component remaining on the surface of the insulating resin, and can be physically washed from high-pressure water spray or the like. It may be carried out by selecting a method suitable for the optimum effect in chemical washing such as drug treatment. Among them, in the wet cleaning of the present invention, it is preferred to use "cleaning solution containing a surfactant" and/or "copper microetching solution".

該濕式洗淨,較好以「含有界面活性劑之酸洗溶液」洗淨後,繼以「銅之微蝕刻液」洗淨之順序進行。其原因係,藉如此預先以「含有界面活性劑之酸洗溶液」洗淨,可去除電漿處理後在印刷配線板表面所具有之殘渣,同時能改善印刷配線板表面與溶液之濡濕性,可使隨後使用之「銅之微蝕刻液」分布到印刷配線板之電路間間隙之各個角落,能確實去除殘渣。This wet cleaning is preferably carried out by "washing solution containing a surfactant" and then washed in the order of "copper micro-etching liquid". The reason for this is that by washing in advance with the "acid wash solution containing a surfactant", the residue on the surface of the printed wiring board after the plasma treatment can be removed, and the wettability of the surface of the printed wiring board and the solution can be improved. The "copper microetching liquid" to be used later can be distributed to all corners of the inter-circuit gap of the printed wiring board, and the residue can be surely removed.

上述「含有界面活性劑之酸洗溶液」中可使用之「界面活性劑」,可選擇使用非離子界面活性劑、陽離子界面活性劑、兩性界面活性劑之任一者,亦可以其等之混合物使用。The "surfactant" which can be used in the above-mentioned "acid wash solution containing a surfactant" may be any one of a nonionic surfactant, a cationic surfactant, and an amphoteric surfactant, or a mixture thereof. use.

此處所述之非離子界面活性劑乃指在水中具有不離子化之親水基之界面活性劑,可分類為酯型、醚型、酯‧醚型和其他類。具體而言,為高級醇、烷基酚類、脂肪酸、胺類、伸烷基二胺、脂肪酸醯胺、磺醯胺、多元醇類、糖苷衍生物等。The nonionic surfactant described herein refers to a surfactant having a hydrophilic group which is not ionized in water, and can be classified into an ester type, an ether type, an ester type, an ether type, and the like. Specifically, it is a higher alcohol, an alkylphenol, a fatty acid, an amine, an alkylenediamine, a fatty acid decylamine, a sulfonamide, a polyhydric alcohol, a glycoside derivative, or the like.

而且,所為陽離子界面活性劑乃指在溶液中具有疏水基之部分電離為陽離子之性質之界面活性劑。更具體而言,為月桂基三甲基銨鹽、鯨蠟基三甲基銨鹽、硬脂基三甲基銨鹽、月桂基二甲基乙基銨鹽、月桂基二甲基銨甜菜鹼、硬脂基二甲基銨甜菜鹼、二甲基-苄基月桂基銨鹽、十八烷基二甲基苄基銨鹽、三甲基苄基銨鹽、三乙基苄基銨鹽、月桂基啶嗡鹽、月桂基咪唑鎓鹽、硬脂基胺乙酸鹽、月桂基胺乙酸鹽等。Further, the cationic surfactant refers to a surfactant having a property in which a portion having a hydrophobic group is ionized to a cation in a solution. More specifically, it is lauryl trimethyl ammonium salt, cetyl trimethyl ammonium salt, stearyl trimethyl ammonium salt, lauryl dimethyl ethyl ammonium salt, lauryl dimethyl ammonium betaine , stearyl dimethyl ammonium betaine, dimethyl-benzyl lauryl ammonium salt, octadecyl dimethyl benzyl ammonium salt, trimethyl benzyl ammonium salt, triethyl benzyl ammonium salt, Lauryl pyridinium salt, lauryl imidazolium salt, stearylamine acetate, laurylamine acetate, and the like.

其次,所謂兩性界面活性劑乃指溶解於水時,在鹼性領域具有陰離子界面活性劑之性質,而在酸性領域具有陽離子界面活性劑之性質之界面活性劑。若具體而言,則為烷基羧基甜菜鹼型、烷基胺基羧酸型、烷基咪唑啉型等。Next, the amphoteric surfactant refers to a surfactant having the property of an anionic surfactant in the alkaline field and having a cationic surfactant in the acidic field when dissolved in water. Specifically, it is an alkylcarboxybetaine type, an alkylaminocarboxylic acid type, an alkyl imidazoline type, etc.

於硫酸、鹽酸、硫酸-過氧化氫水溶液等之可洗淨印刷配線板表面之溶液中含有上述界面活性劑,以使界面活性劑之濃度成為0.1 g/L~20g/L之濃度添加,獲得洗淨用之酸性溶液。此時之界面活化劑濃度未達0.1 g/L時,即使使用上述任何界面活性劑,也無法獲得電漿處理後之印刷配線板表面與溶液之濡濕改善效果。另一方面,即使界面活性劑濃度超過20 g/L,電漿處理之印刷配線板表面與溶液之間之濡濕性提高之效果已飽和,所以不過是浪費資源而已。使用該酸性溶液洗淨電漿處理後之印刷配線板表面之時間,以15秒至7分鐘為佳。該洗淨時間未達15秒時,無法獲得改善電漿處理後之印刷配線板表面與溶液之濡濕性之效果。另一方面,該洗淨時間超過7分鐘時,電漿處理後之印刷配線板之電路部分開始受到浸蝕而不佳。The surfactant is contained in a solution of the surface of the washable printed wiring board such as sulfuric acid, hydrochloric acid, sulfuric acid-hydrogen peroxide solution or the like, so that the concentration of the surfactant is 0.1 g/L to 20 g/L. Wash the acidic solution. When the interface activator concentration at this time is less than 0.1 g/L, even if any of the above surfactants is used, the effect of improving the wetness of the surface of the printed wiring board after the plasma treatment and the solution cannot be obtained. On the other hand, even if the surfactant concentration exceeds 20 g/L, the effect of improving the wettability between the surface of the printed wiring board treated with the plasma and the solution is saturated, so that it is a waste of resources. The time for washing the surface of the printed wiring board after the plasma treatment with the acidic solution is preferably 15 seconds to 7 minutes. When the washing time was less than 15 seconds, the effect of improving the wettability of the surface of the printed wiring board after the plasma treatment and the solution could not be obtained. On the other hand, when the washing time exceeds 7 minutes, the circuit portion of the printed wiring board after the plasma treatment starts to be poorly etched.

使用上述銅之微蝕刻液之濕式洗淨,係將銅電路蝕刻以質量換算厚度表示為0.5 μm以上加以粗化。將銅電路蝕刻以質量換算厚度表示為0.5 μm以上時,銅電路之表面可發揮與抗焊劑層或多層化時之絕緣樹脂層之充分接著力。另一方面,若在該蝕刻條件下,殘留於電路表面之污染物質、蝕刻殘渣、露出於電路間之絕緣樹脂表面之淨化處理所產生之殘渣等亦可被去除。其結果,可同時提高抗焊劑層與電路表面之密著性以及絕緣樹脂成分與電路表面之密著性。The wet cleaning using the copper microetching liquid described above is performed by roughening the copper circuit by a thickness of 0.5 μm or more. When the copper circuit is etched to a thickness of 0.5 μm or more, the surface of the copper circuit can exhibit sufficient adhesion to the solder resist layer or the insulating resin layer at the time of multilayering. On the other hand, under the etching conditions, the contaminants remaining on the surface of the circuit, the etching residue, and the residue generated by the purification treatment of the surface of the insulating resin exposed between the circuits can be removed. As a result, the adhesion between the solder resist layer and the circuit surface and the adhesion between the insulating resin component and the circuit surface can be improved at the same time.

形成抗焊劑層後之印刷配線板之製造形態:本發明之形成抗焊劑層後之印刷配線板之製造方法,其特徵係使用以設有上述淨化處理之方法所製造之印刷配線板,在必要處形成抗焊劑層。如此,使用以設有上述淨化處理之方法所製造之印刷配線板,則露出於電路間之絕緣樹脂表面所殘留之金屬成分成為使用XPS裝置進行半定量分析之檢測界限以下,故可獲得抗焊劑層和絕緣樹脂層之密著性、抗焊劑層與電路表面之密著性、絕緣樹脂成分與電路表面之密著性皆良好之形成抗焊劑層後之印刷配線板。A manufacturing method of a printed wiring board after forming a solder resist layer: a method of manufacturing a printed wiring board after forming a solder resist layer of the present invention, characterized in that a printed wiring board manufactured by the method of performing the above-described purification processing is used A solder resist layer is formed. When the printed wiring board manufactured by the method of the above-described purification treatment is used, the metal component remaining on the surface of the insulating resin exposed between the circuits is below the detection limit of the semi-quantitative analysis using the XPS device, so that the solder resist can be obtained. A printed wiring board in which the adhesion between the layer and the insulating resin layer, the adhesion between the solder resist layer and the circuit surface, and the adhesion between the insulating resin component and the circuit surface are good, and the solder resist layer is formed.

形成抗焊劑層後之印刷配線板之形態:該形成抗焊劑層後之印刷配線板之特徵為在2大氣壓之壓力蒸煮器中保持5小時之後,在260℃之焊浴中浸漬60秒時,抗焊劑層與絕緣樹脂表面之間,不會產生直徑20 μm以上之斑點狀脫層。因此,即使在121℃、濕度:100%、2大氣壓下之條件下處理196小時時,抗焊劑層與絕緣樹脂表面之間,也不會產生直徑20 μm以上之斑點狀脫層。以下使用實施例和比較例就本發明之內容更具體加以說明。The form of the printed wiring board after forming the solder resist layer: the printed wiring board after forming the solder resist layer is characterized by being held in a pressure cooker of 2 atm for 5 hours and then immersed in a solder bath of 260 ° C for 60 seconds. A spot-like delamination of 20 μm or more in diameter does not occur between the solder resist layer and the surface of the insulating resin. Therefore, even when treated at 121 ° C, humidity: 100%, and 2 atm. for 196 hours, no speckle-like delamination of 20 μm or more in diameter was caused between the solder resist layer and the surface of the insulating resin. The contents of the present invention will be more specifically described below using examples and comparative examples.

實施例1Example 1

[貼銅層壓板之製造][Manufacture of copper-clad laminate]

於使厚度0.1 mm之預浸材料(GHPL830-NS:三菱瓦斯化學股分有限公司製)三片重疊後之兩面上,重疊在表面粗糙度(10點平均粗糙度Rzjis)為0.37 μm之無粗化銅箔上塗佈底塗樹脂而成之附有底塗樹脂層之無粗化銅箔(MFG-DMT3F:三井金屬礦業股份有限公司製),在溫度220℃、壓力4.0 MP之真空壓製裝置內進行90分鐘之成型,製得厚度0.3 mm之貼銅層壓板。For the two surfaces of the prepreg (GHPL830-NS: manufactured by Mitsubishi Gas Chemical Co., Ltd.) having a thickness of 0.1 mm, the surface roughness (10-point average roughness Rzjis) is 0.37 μm. A non-roughened copper foil (MFG-DMT3F: manufactured by Mitsui Mining & Mining Co., Ltd.) with a primer resin layer coated with a primer resin on a copper foil, and a vacuum pressing device at a temperature of 220 ° C and a pressure of 4.0 MP The inside was molded for 90 minutes to obtain a copper-clad laminate having a thickness of 0.3 mm.

[印刷配線板之製造][Manufacture of printed wiring board]

使用半加法法製造印刷配線板。此印刷配線板之製造順序在實施例與比較例均相同。在上述貼銅層壓板之外層銅箔之表面形成鍍敷光阻層,使用用以形成線寬/間隔寬為500 μm/1200 μm之格子狀配線之光阻圖案用曝光薄膜予以曝光、顯影,而電鍍銅至總厚度為15 μm。然後,剝離鍍敷光阻劑之後,使用硫酸-過氧化氫系蝕刻液(CPE800:三菱瓦斯化學公司製),以蝕刻除去露出之無粗化銅箔,進行電路之形成。將如此所製造之印刷配線板進行分割,作為實施例1所用之印刷配線板試料。A printed wiring board is manufactured using a semi-additive method. The manufacturing procedure of this printed wiring board is the same in both the embodiment and the comparative example. Forming a plating resist layer on the surface of the copper foil outside the copper-clad laminate, and exposing and developing the photoresist film using a photoresist pattern for forming a grid-like wiring having a line width/space width of 500 μm/1200 μm. The copper is plated to a total thickness of 15 μm. Then, after the plating resist was peeled off, a sulfuric acid-hydrogen peroxide-based etching liquid (CPE800: manufactured by Mitsubishi Gas Chemical Co., Ltd.) was used, and the exposed roughened copper foil was removed by etching to form a circuit. The printed wiring board thus manufactured was divided into the printed wiring board samples used in Example 1.

[淨化處理][purification treatment]

實施例1之淨化處理,係將上述印刷配線板試料浸漬在60℃之4 mol/L之鹽酸中60分鐘,水洗後乾燥而製得淨化處理試料。In the purification treatment of Example 1, the printed wiring board sample was immersed in 4 mol/L hydrochloric acid at 60 ° C for 60 minutes, washed with water, and dried to obtain a purification treatment sample.

[露出於電路間之絕緣樹脂層表面之評估][Evaluation of the surface of the insulating resin layer exposed between the circuits]

將淨化處理試料之露出於電路間之絕緣樹脂層之淨化處理前與淨化處理後之表面,藉XPS分析裝置(X線源:Al(kα),加速電壓:15 kV,線束徑:50 μm)就其殘留金屬成分量進行半定量分析,進而測定其表面粗糙度(Rzjis)。絕緣樹脂之表面狀態示於後述表1中。The surface of the purification treatment sample exposed before the purification treatment of the insulating resin layer between the circuits and the surface after the purification treatment is carried out by an XPS analyzer (X-ray source: Al(kα), acceleration voltage: 15 kV, wire diameter: 50 μm) The semi-quantitative analysis was carried out on the amount of residual metal components, and the surface roughness (Rzjis) thereof was measured. The surface state of the insulating resin is shown in Table 1 below.

[抗焊劑層之形成及脫層之評估][Evaluation of formation and delamination of solder resist layer]

上述淨化處理試料,為賦與銅配線與抗焊劑層之密著性,以微蝕刻液(CZ8101B:MEC股份有限公司製)噴霧30秒,水洗後乾燥。於該淨化處理試料上形成抗焊劑層(AUS308:太陽油墨股分有限公司製),在121℃×5小時之PCT處理後,浸漬於260℃之焊浴中60秒(下文中稱該操作為「PCT焊接試驗」)。針對該PCT焊接試驗後之淨化試料,以光學顯微鏡觀察脫層之發生並評估。該脫層之評估結果與淨化處理條件示於後述表2中。In the above-mentioned purification treatment sample, the adhesion between the copper wiring and the solder resist layer was imparted, and the microetching liquid (CZ8101B: manufactured by MEC Co., Ltd.) was sprayed for 30 seconds, washed with water, and dried. A solder resist layer (AUS308: manufactured by Sun Ink Co., Ltd.) was formed on the purification treatment sample, and after PCT treatment at 121 ° C for 5 hours, it was immersed in a solder bath of 260 ° C for 60 seconds (hereinafter referred to as the operation). "PCT Welding Test"). For the cleaned sample after the PCT welding test, the occurrence of delamination was observed and evaluated by an optical microscope. The evaluation results of the delamination and the purification treatment conditions are shown in Table 2 below.

實施例2Example 2

實施例2中,將實施例1中所使用之附有底塗樹脂層之無粗化銅箔,替代三井金屬礦業股份有限公司製之MFG-DMT3F而改用日立化成工業股份有限公司製之PF-E-3之外,與實施例1同樣製造印刷配線板。In Example 2, the non-roughened copper foil with the primer resin layer used in Example 1 was replaced with MFG-DMT3F manufactured by Mitsui Mining Co., Ltd. and changed to PF manufactured by Hitachi Chemical Co., Ltd. A printed wiring board was produced in the same manner as in Example 1 except for -E-3.

對上述印刷配線板試料,以與實施例1同樣施予淨化處理而製成淨化處理試料,該淨化處理試料之露出於電路間之絕緣樹脂層表面之殘留金屬成分進行半定量分析,進而測定其表面粗糙度(Rzjis)。又,以與實施例1同樣評估脫層之發生。露出於電路間之絕緣樹脂層表面狀態示於後述表1中,脫層之評估結果與淨化處理條件示於後述之表2中。The printed wiring board sample was subjected to a purification treatment in the same manner as in Example 1 to prepare a purification treatment sample, and the residual metal component of the surface of the insulating resin layer exposed between the circuits of the purification treatment sample was subjected to semi-quantitative analysis, and further measured. Surface roughness (Rzjis). Further, the occurrence of delamination was evaluated in the same manner as in Example 1. The surface state of the insulating resin layer exposed between the circuits is shown in Table 1 below, and the evaluation results of the delamination and the purification treatment conditions are shown in Table 2 to be described later.

實施例3Example 3

實施例3中,使用實施例1所製造之印刷配線板之試料,僅變更淨化處理條件而進行。In the third embodiment, the sample of the printed wiring board manufactured in the first embodiment was used, and only the purification treatment conditions were changed.

淨化處理係將上述印刷配線板之試料在[(CF4分壓)/(O2分壓)]=0.33、氣壓15 Pa之腔室內,進行輸入能量設為40 J/cm2之條件之電漿蝕刻,繼之,於含有作為酸成分之硫酸與作為界面活性劑之乙二醇之MELPLATE PC-316(MELTEX股份有限公司製)之10質量%溶液中浸漬5分鐘進行洗淨後,噴霧微蝕刻液(CZ8101B:MEC股份有限公司製品)30秒,水洗後乾燥,而製得淨化處理試料。剛形成電路後之露出於電路間之絕緣樹脂層表面之掃描型電子顯微鏡之觀察影像示於第3圖中,剛以電漿蝕刻後之露出於電路間之絕緣樹脂層表面之掃描型電子顯微鏡之觀察影像示於第2圖,而剛微蝕刻後之露出於電路間之絕緣樹脂層表面之掃描型電子顯微鏡之觀察影像示於第1圖中。In the purification treatment, the sample of the printed wiring board is placed in a chamber of [(CF 4 partial pressure) / (O 2 partial pressure)] = 0.33 and a gas pressure of 15 Pa, and the input energy is set to 40 J/cm 2 . Slurry etching, followed by immersion in a 10% by mass solution containing MECLATE PC-316 (manufactured by MELTEX Co., Ltd.) as an acid component and ethylene glycol as a surfactant, followed by immersion for 5 minutes, followed by spraying The etching solution (CZ8101B: product of MEC Co., Ltd.) was dried for 30 seconds, and dried to obtain a purification treatment sample. The observation image of the scanning electron microscope exposed on the surface of the insulating resin layer between the circuits immediately after the formation of the circuit is shown in Fig. 3, and the scanning electron microscope which is exposed to the surface of the insulating resin layer between the circuits immediately after the plasma etching The observed image is shown in Fig. 2, and the observation image of the scanning electron microscope exposed on the surface of the insulating resin layer between the circuits immediately after micro-etching is shown in Fig. 1.

然後,與實施例1同樣地就淨化處理試料之露出於電路間之絕緣樹脂層表面之殘留金屬成分加以半定量分析,進而測定其表面粗糙度(Rzjis)。又,以與實施例1同樣地評估脫層之發生。淨化處理試料之露出於電路間之絕緣樹脂層之表面狀態示於後述表1中,脫層之評估結果與淨化處理條件示於後述表2中。Then, in the same manner as in the first embodiment, the residual metal component of the surface of the insulating resin layer exposed between the circuits of the purification treatment sample was subjected to semi-quantitative analysis, and the surface roughness (Rzjis) thereof was measured. Further, the occurrence of delamination was evaluated in the same manner as in Example 1. The surface state of the insulating resin layer exposed between the circuits of the purification treatment sample is shown in Table 1 below, and the evaluation results of the delamination and the purification treatment conditions are shown in Table 2 to be described later.

實施例4Example 4

實施例4中,使用實施例1所製造之印刷配線板之試料,僅變更淨化處理條件而進行。In the fourth embodiment, the sample of the printed wiring board manufactured in the first embodiment was used, and only the purification treatment conditions were changed.

淨化處理係將上述印刷配線板之試料,在液溫為80℃之過錳酸鉀(KMnO4)溶液(羅門哈斯電子材料股份有限公司製)中浸漬1分鐘後,再於液溫為45℃之中和液(羅門哈斯電子材料股份有限公司製)中浸漬5分鐘,水洗後乾燥,而製得淨化處理試料。In the purification treatment, the sample of the printed wiring board was immersed in a potassium permanganate (KMnO 4 ) solution (manufactured by Rohm and Haas Electronic Materials Co., Ltd.) at a liquid temperature of 80 ° C for 1 minute, and then at a liquid temperature of 45. The mixture was immersed for 5 minutes in a liquid phase (manufactured by Rohm and Haas Electronic Materials Co., Ltd.), washed with water, and dried to obtain a purification treatment sample.

然後,與實施例1同樣,就淨化處理試料之露出於電路間之絕緣樹脂層表面之殘留金屬成分量進行半定量分析,進而測定其表面粗糙度(Rzjis)。又,與實施例1同樣評估脫層之發生。淨化處理試料之露出於電路間之絕緣樹脂層之表面狀態示於後述表1中,脫層之評估結果及淨化處理條件示於後述之表2中。Then, in the same manner as in the first embodiment, the amount of residual metal components on the surface of the insulating resin layer exposed between the circuits of the purification treatment sample was subjected to semi-quantitative analysis, and the surface roughness (Rzjis) thereof was measured. Further, the occurrence of delamination was evaluated in the same manner as in Example 1. The surface state of the insulating resin layer exposed between the circuits of the purification treatment sample is shown in Table 1 below, and the evaluation results of the delamination and the purification treatment conditions are shown in Table 2 to be described later.

比較例1Comparative example 1

比較例1中,未進行實施例1中實施之淨化處理。然後,與實施例1同樣評估脫層之發生。所發生脫層使用透射光從抗焊劑層側觀察之表面觀察影像示於第4圖中。於電路間露出之絕緣樹脂層之表面狀態示於後述表1中,脫層之評估結果及淨化處理條件示於後述之表2中。In Comparative Example 1, the purification treatment carried out in Example 1 was not carried out. Then, the occurrence of delamination was evaluated in the same manner as in Example 1. The delamination occurred as seen from the surface of the solder resist layer using transmitted light is shown in Fig. 4. The surface state of the insulating resin layer exposed between the circuits is shown in Table 1 below, and the evaluation results of the delamination and the purification treatment conditions are shown in Table 2 to be described later.

比較例2Comparative example 2

比較例2中,將實施例1中所實施之淨化處理時間60分鐘變更為10分鐘,而製成淨化處理試料。然後,與實施例1同樣就淨化處理試料之露出於電路間之絕緣樹脂層表面之殘留金屬成分量進行半定量分析,進而測定其表面粗糙度。又,與實施例1同樣評估脫層之發生。所發生之脫層,以透射光從抗焊劑層側觀察之表面觀察影像示於第5圖中。露出於電路間之絕緣樹脂層之表面狀態示於後述表1中,脫層之評估結果及淨化處理條件示於後述之表2中。In Comparative Example 2, the purification treatment time carried out in Example 1 was changed to 60 minutes to prepare a purification treatment sample. Then, in the same manner as in the first embodiment, the amount of residual metal components on the surface of the insulating resin layer exposed between the electrodes of the purification treatment sample was subjected to semi-quantitative analysis, and the surface roughness thereof was measured. Further, the occurrence of delamination was evaluated in the same manner as in Example 1. The delamination that occurred was shown in Fig. 5 as a surface observation image of the transmitted light viewed from the side of the solder resist layer. The surface state of the insulating resin layer exposed between the circuits is shown in Table 1 below, and the evaluation results of the delamination and the purification treatment conditions are shown in Table 2 to be described later.

比較例3Comparative example 3

比較例3中,將實施例3中所實施之淨化處理中,省略微蝕刻處理,製成淨化處理試料。然後,與實施例1同樣就淨化處理試料之露出於電路間之絕緣樹脂層表面之殘留金屬成分量進行半定量分析,進而測定其表面粗糙度。又,與實施例1同樣評估脫層之發生。露出於電路間之絕緣樹脂層之表面狀態示於後述表1中,脫層之評估結果及淨化處理條件示於後述之表2中。In Comparative Example 3, in the purification treatment carried out in Example 3, the microetching treatment was omitted to prepare a purification treatment sample. Then, in the same manner as in the first embodiment, the amount of residual metal components on the surface of the insulating resin layer exposed between the electrodes of the purification treatment sample was subjected to semi-quantitative analysis, and the surface roughness thereof was measured. Further, the occurrence of delamination was evaluated in the same manner as in Example 1. The surface state of the insulating resin layer exposed between the circuits is shown in Table 1 below, and the evaluation results of the delamination and the purification treatment conditions are shown in Table 2 to be described later.

比較例4Comparative example 4

比較例4中,將實施例3中所實施之淨化處理中,省略電漿處理,製成淨化處理試料。然後,與實施例1同樣就淨化處理試料之露出於電路間之絕緣樹脂層表面之殘留金屬成分量進行半定量分析,進而測定其表面粗糙度。又,與實施例1同樣評估脫層之發生。露出於電路間之絕緣樹脂層之表面狀態示於後述表1中,脫層之評估結果及淨化處理條件示於後述之表2中。In Comparative Example 4, in the purification treatment carried out in Example 3, the plasma treatment was omitted, and a purification treatment sample was prepared. Then, in the same manner as in the first embodiment, the amount of residual metal components on the surface of the insulating resin layer exposed between the electrodes of the purification treatment sample was subjected to semi-quantitative analysis, and the surface roughness thereof was measured. Further, the occurrence of delamination was evaluated in the same manner as in Example 1. The surface state of the insulating resin layer exposed between the circuits is shown in Table 1 below, and the evaluation results of the delamination and the purification treatment conditions are shown in Table 2 to be described later.

[實施例與比較例之比較][Comparison of Examples and Comparative Examples]

從表1所示之露出於電路間之絕緣樹脂層之表面狀態與表2所示之脫層評估結果及淨化處理條件,對於實施例及比較例進行比較。The surface state of the insulating resin layer exposed between the circuits shown in Table 1 and the results of the delamination evaluation and the purification treatment conditions shown in Table 2 were compared with the examples and the comparative examples.

比較有無發生脫層及淨化處理條件。該實施例之淨化處理後之絕緣樹脂層表面,可知未檢測出殘留金屬成分。而且,關於實施例,亦未觀察到實用上成為問題程度之脫層之發生。相反地,比較例時,即使於淨化處理後之殘留金屬成分量為0.1原子%之最低程度之比較例2中,亦觀察到50 μm徑以上之斑點狀脫層。而且,淨化處理後之殘留金屬成分量為5.4原子%之比較例3中,觀察到300 mm徑程度之斑點狀脫層,淨化處理後之殘留金屬成分量為8.0原子%之比較例4與未進行淨化處理而殘留金屬成分量為8.4原子%之比較例1中,均觀察到超過1.0 mm之斑點狀脫層。換言之,見到淨化處理後之絕緣樹脂表面所檢測之殘留金屬成分越多,脫層之斑點徑愈大之傾向。Compare the presence or absence of delamination and purification treatment conditions. In the surface of the insulating resin layer after the purification treatment of this example, it was found that no residual metal component was detected. Moreover, with regard to the examples, the occurrence of delamination which is practically problematic has not been observed. On the other hand, in Comparative Example 2, even in Comparative Example 2 in which the amount of residual metal component after the purification treatment was 0.1 atom%, a speckle delamination of 50 μm or more was observed. Further, in Comparative Example 3 in which the amount of the residual metal component after the purification treatment was 5.4 at%, the spot-like delamination of 300 mm diameter was observed, and the residual metal component amount after the purification treatment was 8.0 atom%, Comparative Example 4 and In Comparative Example 1 in which the amount of residual metal component was 8.4 atom%, the speckle delamination exceeding 1.0 mm was observed. In other words, the more the residual metal component detected on the surface of the insulating resin after the purification treatment, the larger the spot diameter of the delamination.

另一方面,探討Rz(C)與Rz(S)之比[Rz(C)/Rz(S)]之值時,實施例中在1.00~1.11範圍內,比較例在1.00~1.05範圍內。因此,將[Rz(C)/Rz(S)]之值為1.00之試料與超過1.00之試料,就其淨化處理條件進行比較時,實施電漿蝕刻之試料超過1.00。On the other hand, when the ratio of Rz(C) to Rz(S) [Rz(C)/Rz(S)] is considered, the examples are in the range of 1.00 to 1.11, and the comparative examples are in the range of 1.00 to 1.05. Therefore, when the sample having a value of [Rz(C)/Rz(S)] of 1.00 and a sample exceeding 1.00 are compared with the purification treatment conditions, the sample subjected to plasma etching exceeds 1.00.

從上述實施例和比較例間之比較,可知「抗焊劑層」與「露出於電路間之絕緣樹脂層表面」之密著性,大為受到露出於電路間之絕緣樹脂層表面所殘留金屬成分之影響。另一方面,即使於絕緣體樹脂表面施予電漿蝕刻,使[Rz(C)/Rz(S)]之值為1.2以下之範圍時,微形狀產生變化,但對於與抗焊劑層間之密著性可謂幾乎沒有影響。因此,可確認露出於電路間之絕緣樹脂層表面所殘留之金屬成分,以XPS之半定量分析能被檢出時,「抗焊劑層」與「露出於電路間之絕緣樹脂層表面」之密著性變差。From the comparison between the above-mentioned examples and the comparative examples, it is understood that the adhesion between the "solder resist layer" and the "surface of the insulating resin layer exposed between the circuits" is largely affected by the metal components remaining on the surface of the insulating resin layer exposed between the circuits. The impact. On the other hand, even if plasma etching is applied to the surface of the insulator resin, when the value of [Rz(C)/Rz(S)] is 1.2 or less, the micro shape changes, but the adhesion to the solder resist layer Sex has little effect. Therefore, it is possible to confirm the metal component remaining on the surface of the insulating resin layer exposed between the circuits, and to distinguish the "solder resist layer" from the "surface of the insulating resin layer exposed between the circuits" when the semi-quantitative analysis of XPS can be detected. The sex is getting worse.

[產業上之可能利用性][Industry possible use]

本發明之印刷配線板之製造方法,藉由對絕緣樹脂露出面上殘留金屬元素之印刷配線板施予淨化處理,使所殘留之金屬成分量以XPS裝置進行半定量分析時成為定量界限以下,可不使絕緣體樹脂層表面粗化,亦可獲得與在印刷配線板表面上事後設置之「抗焊劑層」之良好密著性。因此,可獲得與在印刷配線板表面上事後設置之「多層化之際之事後積層之樹脂層」亦良好的密著性,可提供高品質之印刷配線板。In the method for producing a printed wiring board according to the present invention, the printed wiring board having the metal element remaining on the exposed surface of the insulating resin is subjected to a purification treatment, and the amount of the remaining metal component is less than or equal to a limit value when subjected to semi-quantitative analysis by the XPS device. The surface of the insulating resin layer can be roughened, and good adhesion to the "solder resist layer" provided after the surface of the printed wiring board can be obtained. Therefore, it is possible to obtain a high-quality printed wiring board by providing good adhesion to the resin layer which is laminated after the "multilayer formation" which is provided after the surface of the printed wiring board.

BM...絕緣樹脂基材BM. . . Insulating resin substrate

CC...銅電路CC. . . Copper circuit

PSR...抗焊劑層PSR. . . Solder resist layer

DL...脫層DL. . . Delamination

第1圖係實施例3中剛經微蝕刻後之於印刷配線板之電路間露出之絕緣樹脂表面之掃描型電子顯微鏡觀察影像。Fig. 1 is a scanning electron microscope observation image of the surface of an insulating resin exposed between circuits of a printed wiring board immediately after micro-etching in Example 3.

第2圖係實施例3中剛經電漿蝕刻直後之於印刷配線板之電路間露出之絕緣樹脂表面之掃描型電子顯微鏡觀察影像。Fig. 2 is a scanning electron microscope observation image of the surface of the insulating resin exposed between the circuits of the printed wiring board immediately after plasma etching in Example 3.

第3圖係實施例3中剛形成電路後之於印刷配線板之電路間露出之絕緣樹脂表面之掃描型電子顯微鏡觀察影像。Fig. 3 is a scanning electron microscope observation image of the surface of the insulating resin exposed between the circuits of the printed wiring board immediately after the circuit was formed in Example 3.

第4圖係對比較例1中所發生之脫層,使用透射光從抗焊劑層側所觀察之表面觀察影像。Fig. 4 is a view showing the delamination which occurred in Comparative Example 1, and the image was observed from the surface observed on the side of the solder resist layer using transmitted light.

第5圖係對比較例2中所發生之脫層,使用透射光從抗焊劑層側所觀察之表面觀察影像。Fig. 5 is a view showing the delamination which occurred in Comparative Example 2, and the image was observed from the surface observed on the side of the solder resist layer using transmitted light.

第6圖係發生脫層之印刷配線板之剖面觀察影像。該第6圖中BM表示絕緣樹脂基材,CC表示銅電路,PSR表示抗焊劑層,DL表示脫層。Fig. 6 is a cross-sectional observation image of a printed wiring board in which delamination occurred. In Fig. 6, BM denotes an insulating resin substrate, CC denotes a copper circuit, PSR denotes a solder resist layer, and DL denotes delamination.

Claims (11)

一種印刷配線板之製造方法,其係使用貼合無粗化銅箔而成之貼銅層壓板製造印刷配線板者,該方法之特徵為該無粗化銅箔係未施予粗化處理與絕緣樹脂層貼合,且該無粗化銅箔表面經過防銹成分處理,該防銹成分係包含選自由鎳、鉬、鈷、及錫所組成之群組之金屬,將該無粗化銅箔以銅蝕刻液蝕刻形成電路之後,對在電路間露出之絕緣樹脂表面施予電漿處理並使用銅之微蝕刻液的洗淨作為淨化處理,使該施予淨化處理之絕緣樹脂表面所殘留之該鎳、鉬、鈷、錫或其混合金屬成分,以XPS分析裝置(X線源:A1(K α),加速電壓:15kV,射束徑:50μm)進行半定量分析時,各表面處理金屬成分成為檢測界限值以下。 A method for producing a printed wiring board, which is a method of manufacturing a printed wiring board by using a copper-clad laminate obtained by laminating a non-roughened copper foil, wherein the method is characterized in that the roughened copper foil is not subjected to roughening treatment and The insulating resin layer is bonded, and the surface of the roughened copper foil is treated with a rust preventive component containing a metal selected from the group consisting of nickel, molybdenum, cobalt, and tin, and the roughened copper is not used. After the foil is etched by the copper etching solution to form a circuit, the surface of the insulating resin exposed between the circuits is subjected to a plasma treatment and washed with a copper microetching liquid as a purification treatment to leave the surface of the insulating resin to be subjected to the purification treatment. When the nickel, molybdenum, cobalt, tin or a mixed metal component thereof is subjected to semi-quantitative analysis by an XPS analyzer (X-ray source: A1 (K α), acceleration voltage: 15 kV, beam diameter: 50 μm), each surface-treated metal The component is below the detection limit value. 如申請專利範圍第1項之印刷配線板之製造方法,其中該銅蝕刻液蝕刻為硫酸-過氧化氫系蝕刻液。 The method of manufacturing a printed wiring board according to the first aspect of the invention, wherein the copper etching solution is etched into a sulfuric acid-hydrogen peroxide-based etching solution. 如申請專利範圍第1項之印刷配線板之製造方法,其中,於該電路間露出之絕緣樹脂表面,於將其淨化處理前之露出於電路間之絕緣樹脂表面之表面粗糙度(10點平均粗糙度:Rzjis)之值設為Rz(S),且將該淨化處理後之露出於電路間之絕緣樹脂表面之表面粗糙度(10點平均粗糙度:Rzjis)之值設為Rz(C)時,Rz(C)和Rz(S)之比[Rz(C)/Rz(S)]之值成為1.2以下。 The method of manufacturing a printed wiring board according to the first aspect of the invention, wherein the surface of the insulating resin exposed between the circuits is exposed to the surface roughness of the insulating resin surface between the circuits before the cleaning process (10 point average) Roughness: Rzjis) is set to Rz(S), and the surface roughness (10-point average roughness: Rzjis) of the surface of the insulating resin exposed between the circuits after the purification treatment is set to Rz (C). When the ratio of Rz(C) and Rz(S) [Rz(C)/Rz(S)] is 1.2 or less. 如申請專利範圍第3項之印刷配線板之製造方法,其中該淨化處理係使得該Rz(C)值為1.8μm以下。 The method for producing a printed wiring board according to the third aspect of the invention, wherein the purification treatment is such that the Rz (C) value is 1.8 μm or less. 如申請專利範圍第1項之印刷配線板之製造方法,其中該電漿處理係於輸入能量為10~120J/cm2之條件進行電漿蝕刻者。 The method of manufacturing a printed wiring board according to the first aspect of the invention, wherein the plasma processing is performed by plasma etching under conditions of an input energy of 10 to 120 J/cm 2 . 如申請專利範圍第1項之印刷配線板之製造方法,其中該電漿處理係在CF4與O2之氣體分壓比[(CF4分壓)/(O2分壓)]之值為0.2~5.0,氣壓為5.0Pa~200Pa之CF4/O2氣體環境下進行之電漿蝕刻。 The method for manufacturing a printed wiring board according to the first aspect of the invention, wherein the plasma treatment is based on a gas partial pressure ratio [(CF 4 partial pressure) / (O 2 partial pressure)] of CF 4 and O 2 Plasma etching performed in a CF 4 /O 2 gas atmosphere of 0.2 to 5.0 and a pressure of 5.0 Pa to 200 Pa. 如申請專利範圍第1項之印刷配線板之製造方法,該電漿處理之後,進行,接著,進行使用含有界面活性劑之酸性溶液之洗淨及使用銅之微蝕刻液之洗淨。 The method for producing a printed wiring board according to the first aspect of the invention is carried out after the plasma treatment, followed by washing with an acidic solution containing a surfactant and washing with a microetching solution using copper. 如申請專利範圍第7項之印刷配線板之製造方法,其中該使用銅之微蝕刻液之洗淨係將前述電路蝕刻以質量換算厚度表示為0.5μm以上而粗化者。 The method for producing a printed wiring board according to the seventh aspect of the invention, wherein the cleaning using the copper micro-etching liquid is performed by etching the circuit in a mass-converted thickness of 0.5 μm or more. 如申請專利範圍第1項之印刷配線板之製造方法,其中該貼銅層壓板係使用利用具有底塗樹脂層之無粗化銅箔而得者。 The method for producing a printed wiring board according to the first aspect of the invention, wherein the copper-clad laminate is obtained by using a non-roughened copper foil having a primer resin layer. 一種形成抗焊劑層後之印刷配線板之製造方法,其特徵係在如申請專利範圍第1項之印刷配線板之製造方法中,於進行淨化處理之後,形成抗焊劑層。 A method of producing a printed wiring board after forming a solder resist layer, characterized in that in the method of manufacturing a printed wiring board according to the first aspect of the invention, after the purification treatment, a solder resist layer is formed. 一種印刷配線板,其係以如申請專利範圍第10項之印刷配線板之製造方法所得之形成抗焊劑層後之印刷配線板,其特徵為在2大氣壓之壓力蒸煮鍋內保持5小時後,在260℃下之焊浴內浸漬60秒鐘後,抗焊劑層與絕緣樹脂表面之間,不發生直徑20μm以上之斑點狀之脫層。 A printed wiring board obtained by forming a solder resist layer obtained by the method for producing a printed wiring board according to claim 10, which is characterized in that after being held in a pressure cooker of 2 atm for 5 hours, After immersing in a solder bath at 260 ° C for 60 seconds, no delamination of a spot having a diameter of 20 μm or more occurred between the solder resist layer and the surface of the insulating resin.
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