WO2012006899A1 - 低噪声模块（lnb）下变频电路及芯片、lnb下变频电路及方法 - Google Patents

低噪声模块（lnb）下变频电路及芯片、lnb下变频电路及方法 Download PDF

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WO2012006899A1
WO2012006899A1 PCT/CN2011/073870 CN2011073870W WO2012006899A1 WO 2012006899 A1 WO2012006899 A1 WO 2012006899A1 CN 2011073870 W CN2011073870 W CN 2011073870W WO 2012006899 A1 WO2012006899 A1 WO 2012006899A1
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signal
level
circuit
phase
chip
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PCT/CN2011/073870
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English (en)
French (fr)
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魏述然
尹雪松
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锐迪科科技有限公司
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Priority to EP11806241.3A priority Critical patent/EP2595311B1/en
Priority to US13/809,464 priority patent/US8913702B2/en
Priority to JP2013518937A priority patent/JP2013532455A/ja
Priority to SG2013002746A priority patent/SG187541A1/en
Priority to KR1020137003611A priority patent/KR101738979B1/ko
Publication of WO2012006899A1 publication Critical patent/WO2012006899A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/18—Modifications of frequency-changers for eliminating image frequencies
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/16—Multiple-frequency-changing
    • H03D7/165—Multiple-frequency-changing at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0036—Systems modifying transmission characteristics according to link quality, e.g. power backoff arrangements specific to the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H40/00—Arrangements specially adapted for receiving broadcast information
    • H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/90—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for satellite broadcast receiving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/20—Adaptations for transmission via a GHz frequency band, e.g. via satellite

Definitions

  • the invention relates to a circuit of a signal processing chip, in particular to an LNB down conversion chip circuit.
  • the invention relates to an LNB down conversion chip.
  • the invention also relates to a signal processing circuit, and more particularly to an LNB down conversion circuit.
  • the invention also relates to an LNB down conversion method.
  • LNB Low Noise Block (low noise module), commonly known as the high frequency head, is a device placed at the reflection focus of the satellite receiving antenna to amplify and downconvert the satellite signal.
  • LNBs use discrete components, including high-drop transistors, passive bandpass filters, dielectric oscillators, mixers, intermediate frequency amplifiers, voltage regulators, bias circuits, negative voltage generation circuits, and 22k detection circuits. As shown in Figure 1 and Figure 2.
  • the dielectric oscillator has a large temperature drift characteristic, so the frequency stability of the LNB is not high.
  • a passive bandpass filter is required to filter out signals outside the band, especially the mirrored portion, which has improved the noise performance of the LNB.
  • the bandpass filter has attenuation characteristics while occupying a precious plate area.
  • the technical problem to be solved by the present invention is to provide an LNB down-conversion chip circuit, a chip using the LNB down-conversion chip circuit, an LNB down-conversion circuit applying the LNB down-conversion chip circuit, and an LNB applying the LNB down-conversion chip circuit.
  • the frequency conversion method can have a high image rejection function, which can save valuable plate space occupied by the band pass filter and ensure excellent noise performance of the LNB.
  • the technical solution of the LNB down-conversion chip circuit of the present invention includes:
  • the preamplifier receives the output of the intermediate stage high-level output of the front-end circuit and increases the noise figure of the chip to avoid deteriorating the noise of the entire LNB system, and simultaneously converts the single-ended signal of the intermediate stage high-level transmission into two differential signals, thereby improving the chip.
  • the two differential signals are a first differential signal of 0 degree phase and a second differential signal of 180 degree phase, respectively;
  • the four-phase voltage controlled oscillator outputs four local oscillator signals whose phases are different by 90°, and the four local oscillator signals are respectively a first local oscillator signal of a phase of 90 degrees, a second local oscillator signal of a phase of 0 degrees, and a 270 degree of 270 degrees. a third local oscillator signal of phase and a fourth local oscillator signal of 180 degrees;
  • a quadrature mixer receiving four local oscillator signals from the four-phase voltage controlled oscillator and two differential signals output from the preamplifier, the quadrature mixer transmitting the first local oscillator signal
  • a differential signal is mixed to generate a first intermediate frequency signal of a phase of 90 degrees
  • a second local oscillator signal is mixed with the first differential signal to generate a second intermediate frequency signal of a phase of 0 degrees
  • a third local oscillator signal is mixed with the second differential signal.
  • Generating a third intermediate frequency signal of a phase of 270 degrees mixing the fourth local oscillator signal with the second differential signal to generate a fourth intermediate frequency signal of a phase of 180 degrees;
  • An intermediate frequency amplifier receives four intermediate frequency signals output by the quadrature mixer to improve driving capability of the quadrature mixer and prevent signal attenuation;
  • a multi-phase filter receiving the output of the on-chip IQ intermediate frequency amplifier, filtering the four intermediate frequency signals, eliminating the image signal, realizing the image suppression function of the chip, and then the four intermediate frequency signals, the first intermediate frequency signal and the second The intermediate frequency signals are added, and the third intermediate frequency signal and the fourth intermediate frequency signal are added to generate two signal outputs.
  • the invention also discloses an LNB down-conversion circuit, the technical proposal comprising the above-mentioned LNB down-conversion chip circuit and the peripheral circuit of the LNB down-conversion chip circuit, the peripheral circuit comprising:
  • the vertical level is high-level, receiving the radio frequency vertical signal and amplifying the electromagnetic wave in the vertical direction of the satellite transmission signal received by the satellite receiving antenna, and the vertical level is placed in the receiving frequency band and has a band-pass characteristic;
  • the horizontal level is high-level, receiving the radio frequency level signal and amplifying the electromagnetic wave in the horizontal direction of the satellite transmission signal received by the satellite receiving antenna, and the horizontal level is placed in the receiving frequency band to have a band-pass characteristic;
  • the intermediate stage is high-level, receiving the output signals of the vertical level high level and the horizontal level high level, the middle level high level is always in the normally open state, and the signal sent by the first stage high level is secondarily amplified, and the mixer is improved.
  • the overall gain of the front amplifier reduces the noise figure of the entire LNB system.
  • the invention further discloses an LNB down-conversion chip, wherein the LNB down-conversion chip integrates the LNB down-conversion chip circuit, and the LNB down-conversion chip circuit passes through the pin of the LNB down-conversion chip The peripheral circuits of the LNB down conversion chip circuit are connected.
  • the invention further discloses an LNB down-conversion method implemented by using the above LNB down-conversion chip circuit, wherein the technical solution is that the pre-amplifier pre-amplifies the received signal to improve the noise coefficient of the chip, so as not to deteriorate the entire LNB system.
  • the noise converts the received single-ended signal into two differential signals to improve the common mode noise suppression performance of the chip.
  • the two differential signals are the first differential signal of 0 degree phase and the second phase of 180 degree phase respectively.
  • the four-phase voltage-controlled oscillator outputs four local oscillator signals whose phases are sequentially different by 90°, and the four local oscillator signals are respectively a first local oscillator signal of a phase of 90 degrees and a second local oscillator of a phase of 0 degrees.
  • a quadrature mixer that mixes the first local oscillator signal with the first differential signal to generate a first intermediate frequency signal of a phase of 90 degrees Mixing the second local oscillator signal with the first differential signal to generate a second intermediate frequency signal of 0 degree phase, mixing the third local oscillation signal with the second differential signal to generate a third intermediate frequency signal of 270 degree phase, and fourth this The signal is mixed with the second differential signal to generate a fourth intermediate frequency signal of 180 degrees; and then the four intermediate frequency signals output by the quadrature mixer are received by the IQ intermediate frequency amplifier to improve the driving capability of the quadrature mixer to prevent Signal attenuation; the multi-phase filter receives the output of the on-chip IQ intermediate frequency amplifier, filters the four intermediate frequency signals, eliminates the image signal, implements the image suppression function of the chip, and then the four intermediate frequency signals, the first intermediate frequency The signal and the second intermediate frequency
  • the invention integrates most of the discrete component parts of the existing discrete LNB solution, simplifies the application, production and maintenance of the LNB, and saves the cost; the integrated phase-locked loop greatly improves the frequency stability of the LNB; the integrated image suppression function It can save the bandpass filter on the PCB board, save the cost of the board and improve the noise performance; make up for the shortcomings of the prior art in the production of low yield, improve the yield of the production process, and improve the production efficiency.
  • 1 and 2 are structural diagrams of a conventional LNB down conversion circuit
  • FIG. 3 is a structural diagram of a LNB down conversion circuit of the present invention.
  • FIG. 4 and FIG. 5 are schematic diagrams of a voltage controlled oscillator in an LNB down conversion circuit of the present invention.
  • FIG. 6 is a schematic diagram of a phase locked loop circuit in an LNB down conversion circuit of the present invention.
  • FIG. 7 is a schematic diagram of a multi-phase filter in an LNB down conversion circuit of the present invention.
  • the invention discloses an LNB down-conversion chip circuit, as shown in FIG. 3, comprising:
  • the preamplifier receives the output of the intermediate stage high-level output of the front-end circuit and increases the noise figure of the chip to avoid deteriorating the noise of the entire LNB system, and simultaneously converts the single-ended signal of the intermediate stage high-level transmission into two differential signals, thereby improving the chip.
  • the two differential signals are a first differential signal of 0 degree phase and a second differential signal of 180 degree phase, respectively;
  • the four-phase voltage controlled oscillator outputs four local oscillator signals whose phases are different by 90°, and the four local oscillator signals are respectively a first local oscillator signal of a phase of 90 degrees, a second local oscillator signal of a phase of 0 degrees, and a 270 degree of 270 degrees. a third local oscillator signal of phase and a fourth local oscillator signal of 180 degrees;
  • a quadrature mixer receiving four local oscillator signals from the four-phase voltage controlled oscillator and two differential signals output from the preamplifier, the quadrature mixer transmitting the first local oscillator signal
  • a differential signal is mixed to generate a first intermediate frequency signal of a phase of 90 degrees
  • a second local oscillator signal is mixed with the first differential signal to generate a second intermediate frequency signal of a phase of 0 degrees
  • a third local oscillator signal is mixed with the second differential signal.
  • Generating a third intermediate frequency signal of a phase of 270 degrees mixing the fourth local oscillator signal with the second differential signal to generate a fourth intermediate frequency signal of a phase of 180 degrees;
  • An intermediate frequency amplifier receives four intermediate frequency signals output by the quadrature mixer to improve driving capability of the quadrature mixer and prevent signal attenuation;
  • a multi-phase filter receiving the output of the on-chip IQ intermediate frequency amplifier, filtering the four intermediate frequency signals, eliminating the image signal, realizing the image suppression function of the chip, and then the four intermediate frequency signals, the first intermediate frequency signal and the second The intermediate frequency signals are added, and the third intermediate frequency signal and the fourth intermediate frequency signal are added to generate two signal outputs.
  • the LNB down-conversion chip circuit further includes an on-chip high-level discharge control circuit and a vertical horizontal switching circuit, and is connected to a vertical-level high-level discharge, a horizontal-level high-level discharge, and an intermediate-level high-level discharge of the chip peripheral circuit, and the on-chip high-level discharge tube
  • the control circuit provides a bias circuit for the source, the drain and the gate of the high-level discharge tube in the vertical high-level, horizontal high-level and intermediate high-level discharge, and controls the working current of the high discharge tube to operate normally.
  • the vertical horizontal switching circuit according to the vertical/horizontal switching voltage, the bias applied to the high discharge pipe is turned on or off to realize the reception switching between the vertical and horizontal signals, and the intermediate level high-level control is always controlled. In the normally open state.
  • the LNB down-conversion chip circuit further includes an on-chip intermediate frequency amplifier that receives the output of the multi-phase filter and drives the off-chip 75 ohm cable line to ensure output matching, especially to ensure matching with the set top box, and IF signal output.
  • the four-phase voltage-controlled oscillator includes two mutually coupled voltage-controlled oscillator units VCO1 and VCO2, and outputs four local oscillator signals with phase differences of 90°, respectively, which are 90-degree phase.
  • the invention selects the heartley structure to realize the image suppression function. According to the realization principle of the heartley structure down converter, the invention must generate the 4-phase orthogonal local oscillation signal. There are usually three methods for implementing orthogonal local oscillator signals, a multi-phase filter scheme, a two-way scheme, and a four-phase voltage-controlled oscillator scheme.
  • the invention adopts a four-phase voltage controlled oscillator scheme, thereby avoiding the driving problem of the multi-phase filter at a high frequency, and if the voltage-controlled oscillator is required to vibrate at twice the local oscillator in the two-way scheme, for the Ku band
  • the voltage controlled oscillator needs to operate at 21 GHz.
  • the implementation of the CMOS crossover is very difficult.
  • the four-phase voltage controlled oscillator realizes a 4-phase local oscillation signal with a phase difference of 90 degrees by mutual coupling between two voltage controlled oscillator (VCO) units.
  • the two voltage controlled oscillator units are composed of a main oscillating tube (M1, M2, M5, M6) and a coupling tube (M3, M4, M7, M8).
  • the output signals IP and IN of the first stage voltage controlled oscillator VCO1 are input to the coupling tube of the second voltage controlled oscillator VCO2, and the outputs QP and QN of the second stage voltage controlled oscillator VCO2 are input to the first stage voltage controlled oscillation.
  • the voltage controlled oscillator is connected with a phase locked loop and a prescaler circuit.
  • the frequency stability of the voltage controlled oscillator is realized by a phase locked loop, that is, the output signal of the voltage controlled oscillator is passed through a prescaler circuit.
  • the phase-locked loop Dividing to the reference clock frequency, the phase-locked loop compares the divided output signal with the reference clock frequency, and the frequency error is compensated by continuously adjusting the variable capacitor of the voltage-controlled oscillator through the phase-locked loop, thereby achieving an accurate Vibration frequency.
  • the local oscillator signal of the voltage controlled oscillator must be phase-locked through the phase-locked loop (PLL) to achieve accurate local oscillator signal.
  • PLL phase-locked loop
  • DRO unstable dielectric oscillator
  • the comparison error is compensated by constantly adjusting the variable capacitance of the voltage-controlled oscillator, thereby realizing the phase-locking function of the local oscillator frequency. Since the crystal has a very high Q value, the frequency stability is extremely high, and the phase-locked loop will be voltage-controlled. The frequency of the oscillator is phase-locked to the crystal frequency, ensuring the frequency stability of the voltage controlled oscillator.
  • the present invention can integrate a phase-locked loop and a crystal oscillator to accurately control the frequency of the voltage controlled oscillator and filter out the low-frequency phase noise of the voltage controlled oscillator.
  • the prescaler divides the high frequency signal near 10 GHz sent by the four-phase voltage controlled oscillator composed of two voltage controlled oscillator units to the vicinity of the crystal oscillation frequency and sends it to the phase detector.
  • the crystal oscillator sends the stable crystal frequency signal to the phase detector.
  • the phase detector compares the phase error of the two sets of frequency signals, sends the corresponding control signal to the charge pump, and the loop filter filters the charge pump output signal.
  • the function of precisely adjusting the frequency of the voltage controlled oscillator is to control the voltage signal with the phase change to control the variable capacitor inside the voltage controlled oscillator.
  • the invention adopts a four-phase cross-coupled voltage controlled oscillator composed of two voltage controlled oscillators.
  • the phases of the two VCOs are different, but the oscillation frequencies are completely the same, so the loop filter only needs to filter the control voltage and simultaneously send it Two VCOs are all.
  • the entire phase-locked loop has a negative feedback characteristic, which realizes that the phase of the voltage-controlled oscillator, that is, the frequency, is completely proportional to the phase and frequency of the crystal oscillator. Since the crystal has a very high Q value, its frequency stability is extremely high, thereby ensuring The frequency stability of the voltage controlled oscillator.
  • the voltage-controlled oscillator sends a 10 GHz high-frequency signal to the phase-locked loop, and sends a 10 GHz signal to the mixer to implement the down-conversion function.
  • the passive polyphase filter includes four paths corresponding to four intermediate frequency signals. As shown in FIG. 6, each path includes a plurality of resistors connected in series, and a front end of each resistor of the previous path passes through a capacitor. Connected to the rear end of the corresponding resistor of the latter path, the front end of each resistor of the last path is connected to the rear end of the corresponding resistor of the first path through a capacitor.
  • the invention adopts the heartley structure to realize the image suppression function.
  • the heartley structure down converter it can be known that after the RF signal is down-converted by the quadrature mixer, the signal of the mirror position needs to be filtered out by the multi-phase filter.
  • the LNB system requires an L-band intermediate frequency signal output of 950 MHz to 2150 MHz
  • the present invention employs a 4-stage passive polyphase filter structure.
  • the polyphase filter has a band-stop characteristic for a negative frequency (or positive frequency) signal while maintaining a band-pass characteristic of a positive frequency (or negative frequency) signal, and the number of stages determines its resistance.
  • the belt width the more the number of stages, the larger the stop band width, but the larger the insertion band loss in the pass band, the invention selects the 4-stage multi-phase filter structure by the compromise of the stop band width and the pass band insertion loss.
  • the LNB down-conversion chip circuit further includes an on-chip 22k detection circuit that responds to the received 22k signal.
  • the detection circuit sends a high level to the phase-locked loop, and the phase-locked loop controls the voltage-controlled oscillation.
  • the device works in a high local oscillator. Once the 22k signal disappears, the detection circuit will send a low level, and the phase-locked loop will lock the voltage-controlled oscillator at a low local oscillator.
  • the LNB down-conversion chip circuit further includes an on-chip negative voltage generating circuit that generates a negative voltage to provide a required bias for the horizontal-level high-level, vertical-level high-level, and high-level tube gate voltages in the intermediate stage high-level discharge. Set.
  • the LNB down-conversion chip circuit further includes an on-chip voltage regulator circuit that supplies power to other portions of the LNB down-conversion chip circuit.
  • the LNB downconversion chip circuit further includes an on-chip crystal oscillation circuit that provides a reference frequency for other portions of the LNB down conversion chip circuit.
  • the invention also discloses an LNB down conversion circuit, comprising the above LNB down conversion chip circuit, and a peripheral circuit of the LNB down conversion chip circuit, the peripheral circuit comprising:
  • the vertical level is high-level, receiving the radio frequency vertical signal and amplifying the electromagnetic wave in the vertical direction of the satellite transmission signal received by the satellite receiving antenna, wherein the vertical level is placed in the receiving frequency band and has a band pass characteristic;
  • the horizontal level is high-level, receiving the radio frequency level signal and amplifying the electromagnetic wave in the horizontal direction of the satellite transmission signal received by the satellite receiving antenna, and the horizontal level is placed in the receiving frequency band to have a band-pass characteristic;
  • the intermediate stage is high-level, receiving the output signals of the vertical level high level and the horizontal level high level, the middle level high level is always in the normally open state, and the signal sent by the first stage high level is secondarily amplified, and the mixer is improved.
  • the overall gain of the front amplifier reduces the noise figure of the entire LNB system.
  • the peripheral circuit further includes an off-chip high-level discharge control circuit and a vertical horizontal switching circuit, and the vertical-level high-level discharge, the horizontal-level high-level discharge and the intermediate-level high-level discharge connected to the peripheral circuit, the off-chip high-level discharge control circuit Providing a bias circuit for the source, drain and gate of the high-level discharge tube in the vertical high-level, horizontal high-level and intermediate high-level discharge, and controlling the working current of the high discharge tube in the normal working range
  • the vertical horizontal switching circuit turns on or off the bias applied to the high discharge pipe according to the vertical/horizontal switching voltage to realize the reception switching between the vertical and horizontal signals, and the intermediate level high-level control is always controlled. Open state.
  • the peripheral circuit further includes an off-chip intermediate frequency amplifier that receives the output of the multi-phase filter, drives the off-chip 75 ohm cable, ensures output matching, and outputs the intermediate frequency signal.
  • the high drain control circuit and the vertical horizontal switching circuit and the intermediate frequency amplifier may be integrated in the LNB down conversion chip circuit, or may be integrated in the peripheral circuit as described above.
  • the peripheral circuit further includes an off-chip 22k detection circuit responsive to the received 22k signal.
  • the off-chip 22k detection circuit sends a high level to the phase-locked loop, and the phase-locked loop control voltage
  • the controlled oscillator operates at a high local oscillator. Once the 22k signal disappears, the off-chip 22k detection circuit will send a low level, and the phase-locked loop will lock the voltage-controlled oscillator at a low local oscillator.
  • the detection circuit can be integrated in the LNB downconversion chip circuit, i.e., the on-chip 22k detection circuit, or integrated in the peripheral circuit as previously described. Or, the LNB down-conversion chip circuit and the peripheral circuit are integrated with a 22k detection circuit, and the LNB down-conversion circuit can select one of them to implement the corresponding function.
  • the 22k detection circuit sends a corresponding control signal to the prescaler to change the prescaler by whether it detects the 22k signal.
  • Frequency ratio as shown in Figure 6. For example, when a 22k signal is detected, a high level is sent to the prescaler, and when a 22k signal is not detected, a low level is sent to the prescaler.
  • the prescaler switches different frequency division ratios according to the received voltage of the 22k detection circuit to realize the function of switching the oscillation frequency of the voltage controlled oscillator, thereby changing the local oscillation frequency.
  • the usual Ku-band LNB needs to support the local oscillator frequency of 9.75 GHz and 10.6 GHz.
  • the 22k signal is 9.75 GHz local oscillator, and the 22k signal is switched to 10.6 GHz local oscillator.
  • the peripheral circuit further includes an off-chip negative voltage generating circuit that generates a negative voltage to provide a desired bias point for the gate voltage of the high-level, high-level, high-level, and high-level discharges in the horizontal high-level discharge.
  • the negative voltage generating circuit may be integrated in the LNB down conversion chip circuit, that is, the on-chip negative voltage generating circuit, or integrated in the peripheral circuit as described above. Or, a negative voltage generating circuit is integrated in the LNB down-conversion chip circuit and the peripheral circuit, and the LNB down-conversion circuit can select one of them to implement the corresponding function.
  • the peripheral circuit further includes an off-chip voltage regulator circuit for supplying power to the LNB down-conversion chip circuit.
  • the LNB down-conversion chip circuit and the peripheral circuit may be integrated with a voltage stabilization circuit to fully ensure a stable power supply for the LNB down-conversion chip circuit.
  • the peripheral circuit further includes an off-chip crystal oscillation circuit that provides a reference frequency for the LNB down-conversion chip circuit.
  • the crystal oscillation circuit may be integrated in the LNB down conversion chip circuit, that is, the on-chip crystal oscillation circuit, or integrated in the peripheral circuit as described above. Or, a crystal oscillation circuit is integrated in the LNB down-conversion chip circuit and in the peripheral circuit, and the LNB down conversion circuit may select one of them to provide a reference frequency for the LNB down-conversion chip circuit.
  • the invention also discloses an LNB down-conversion chip, wherein the LNB down-conversion chip integrates the LNB down-conversion chip circuit, and the LNB down-conversion chip circuit is down-converted by the LNB down-conversion chip pin and the LNB The peripheral circuits of the chip circuit are connected.
  • FIG. 3 is a specific implementation of the present invention.
  • the present invention adopts a Hartley receiver structure, and the main purpose is to implement image rejection performance of the chip. Since the noise of the image frequency portion deteriorates the noise figure of the receiver by 3 dB, the performance of image rejection is particularly important for systems such as the LNB which require extremely high noise figure.
  • the invention also discloses an LNB down-conversion method implemented by using the above LNB down-conversion circuit, which pre-amplifies the received signal by a pre-amplifier to improve the noise coefficient of the chip, so as not to deteriorate the noise of the entire LNB system, and at the same time receive
  • the single-ended signal is converted into two differential signals to improve the common mode noise suppression performance of the chip.
  • the two differential signals are a first differential signal of 0 degree phase and a second differential signal of 180 degree phase respectively;
  • the voltage controlled oscillator outputs four local oscillator signals whose phases are sequentially different by 90°, and the four local oscillator signals are respectively a first local oscillator signal of a phase of 90 degrees, a second local oscillator signal of a phase of 0 degrees, and a phase of 270 degrees of phase.
  • a quadrature mixer mixing the first local oscillator signal with the first differential signal to generate a first intermediate frequency signal of a phase of 90 degrees, and the second local oscillator The signal is mixed with the first differential signal to generate a second intermediate frequency signal of 0 degree phase, the third local oscillation signal is mixed with the second differential signal to generate a third intermediate frequency signal of 270 degree phase, and the fourth local oscillation signal is second Differential signal Mixing to generate a fourth intermediate frequency signal of 180 degrees phase; then receiving, by the IQ intermediate frequency amplifier, four intermediate frequency signals output by the quadrature mixer to improve the driving capability of the quadrature mixer and preventing signal attenuation;
  • the phase filter receives the output of the on-chip IQ intermediate frequency amplifier, filters the four intermediate frequency signals, eliminates the image signal, implements the image suppression function of the chip, and then among the four intermediate frequency signals, the first intermediate frequency signal and the second intermediate frequency signal Adding, the third intermediate frequency signal and the
  • the frequency stability of the voltage controlled oscillator is realized by a phase-locked loop, that is, the output signal of the voltage controlled oscillator is passed through a prescaler circuit, and is continuously divided to a reference clock frequency, and the phase-locked loop divides the output signal. Compared with the reference clock frequency, the frequency error is compensated by continuously adjusting the variable capacitor of the voltage controlled oscillator through the phase-locked loop to achieve an accurate local oscillator frequency.
  • the high discharge pipe control circuit provides a bias circuit for the source, the drain and the gate of the high-level discharge tube in the vertical high-level discharge, the horizontal high-level discharge, and the intermediate high-level discharge, and the high discharge pipe works.
  • the current control is within a range of normal operation, and the vertical horizontal switching circuit turns on or off the bias applied to the high discharge pipe according to the vertical/horizontal switching voltage to realize the reception switching between the vertical and horizontal signals, and at the same time, the middle
  • the high level is always controlled in the normally open state.
  • the intermediate frequency amplifier receives the output of the polyphase filter, drives the off-chip 75 ohm cable, ensures output matching, and outputs the intermediate frequency signal.
  • the frequency stability of the voltage controlled oscillator is realized by a phase-locked loop, that is, the output signal of the voltage controlled oscillator is passed through a prescaler circuit, and is continuously divided to a reference clock frequency, and the phase-locked loop divides the output signal. Compared with the reference clock frequency, the frequency error is compensated by continuously adjusting the variable capacitor of the voltage controlled oscillator through the phase-locked loop to achieve an accurate local oscillator frequency.
  • the 22k detection circuit responds to the received 22k signal. When there is a 22k signal, the detection circuit sends a high level to the phase-locked loop, and the phase-locked loop controls the voltage-controlled oscillator to operate at a high local oscillator, once the 22k signal disappears The detection circuit will send a low level, and the phase-locked loop will lock the voltage-controlled oscillator at a low local oscillator.
  • a negative voltage is generated by the negative voltage generating circuit to provide the required bias point for the gate voltage of the high level discharge, the vertical level high level discharge, and the high level discharge tube in the intermediate stage high level.
  • the basic principle of the Hartley structure used in the present invention is through quadrature local oscillator signals (Quadrature)
  • the LO and the quadrature mixer down-convert the RF signal, and then use a passive polyphase filter to phase-shift the mixed orthogonal IF signal by 90 degrees to ensure that the image signal is filtered out and the image suppression function is realized. .
  • the invention can achieve an image rejection rate of approximately 25 dB, and substantially eliminates the deterioration of the image frequency to noise.
  • a bandpass filter needs to be added to the PCB.
  • a key issue in realizing the Hartley structure is how to generate a four-phase local oscillator signal, especially for Ku-band LNB chips. Since the local oscillator signal frequency range is 9.75 GHz and 10.75 GHz, and even a high frequency of 11.3 GHz is required, how to generate a four-phase version The vibration signal becomes a difficult point to be solved by the present invention.
  • the present invention adopts a four-phase voltage controlled oscillator scheme, thereby avoiding multi-phase filtering at high frequencies.
  • the present invention While realizing a heartley receiver with image rejection performance, the present invention also utilizes the CMOS chip to facilitate integration, and integrates 22k signal detection and negative voltage generation circuits and receivers in the same chip, which greatly saves LNB production. cost.
  • the invention integrates most of the discrete component parts of the existing discrete LNB solution, simplifies the application, production and maintenance of the LNB, and saves the cost; the integrated phase-locked loop greatly improves the frequency stability of the LNB; the integrated image suppression function It can save the bandpass filter on the PCB board, save the cost of the board and improve the noise performance; integrate negative voltage, 22k signal detection and high discharge tube control, which greatly saves the production cost of LNB; make up the existing technology in production.
  • the disadvantage of low rate increases the yield of the production process and improves production efficiency.

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Abstract

公开了一种低噪声模块（LNB）下变频芯片电路。本方案利用正交本振信号和正交混频器将射频信号进行下变频，再利用无源多相滤波器对混频后的正交中频信号进行90度的相移。还公开了一种LNB下变频芯片、具有该LNB下变频芯片电路的LNB下变频电路和LNB下变频方法。通过本方案，滤除了镜像信号，实现了镜像抑制。

Description

[根据细则37.2由ISA制定的发明名称]　低噪声模块（LNB）下变频电路及芯片、LNB下变频电路及方法 Technical Field
本发明涉及一种信号处理芯片的电路，尤其是一种LNB下变频芯片电路。本发明涉及一种LNB下变频芯片。本发明还涉及一种信号处理电路，尤其是一种LNB下变频电路。本发明还涉及一种LNB下变频方法。
Background Art
LNB ，即Low Noise Block（低噪声模块），俗称高频头，是放置在卫星接收天线的反射焦点位置，用来对卫星信号进行放大和下变频的装置。
目前的LNB大都采用分立元件，包括高放管、无源带通滤波器、介质振荡器、混频器、中频放大器、稳压块、偏置电路、负压生成电路、22k检测电路等构成，如图1和图2所示。
传统方案的缺点在于：
1. 介质振荡器具有较大的温度漂移特性，因此LNB的频率稳定度不高。
2. 需要无源带通滤波器来滤除带外尤其是镜像部分的信号，已提高LNB的噪声性能，带通滤波器具有衰减特性，同时占用珍贵的板材面积。
3. 由于LNB一般尺寸较小，因此数量较大的分立元件给维修和调试带来很大的不便。
 Technical Problem
本发明所要解决的技术问题是提供一种LNB下变频芯片电路、应用该LNB下变频芯片电路的芯片、应用该LNB下变频芯片电路的LNB下变频电路以及应用该LNB下变频芯片电路的LNB下变频方法，能够具有较高的镜像抑制功能，可以节省带通滤波器所占用的宝贵的板材空间，同时保证LNB优异的噪声性能。
Technical Solution
为解决上述技术问题，本发明LNB下变频芯片电路的技术方案是，包括：
预放大器，接收前端电路的中间级高放的输出，并提高芯片的噪声系数，以免恶化整个LNB系统的噪声，同时将中间级高放送来的单端信号转化成两路差分信号，提高芯片的共模噪声抑制性能，所述两路差分信号分别是0度相位的第一差分信号和180度相位的第二差分信号；
四相压控振荡器，输出四个相位相差90°的本振信号，所述四个本振信号分别为90度相位的第一本振信号、0度相位的第二本振信号、270度相位的第三本振信号和180度相位的第四本振信号；
正交混频器，接收来自所述四相压控振荡器送来的四个本振信号，以及预放大器输出的两个差分信号，所述正交混频器将第一本振信号与第一差分信号混频生成90度相位的第一中频信号，将第二本振信号与第一差分信号混频生成0度相位的第二中频信号，将第三本振信号与第二差分信号混频生成270度相位的第三中频信号，将第四本振信号与第二差分信号混频生成180度相位的第四中频信号；
IQ 中频放大器，接收所述正交混频器输出的四个中频信号，提高正交混频器的驱动能力，防止信号衰减；
多相位滤波器，接收所述片内IQ中频放大器的输出，将四个中频信号进行滤波，消除镜像信号，实现芯片的镜像抑制功能，然后将四个中频信号中，第一中频信号和第二中频信号相加，第三中频信号和第四中频信号相加，生成两个信号输出。
本发明还公开了一种LNB下变频电路，其技术方案是，包括上述LNB下变频芯片电路，以及LNB下变频芯片电路的外围电路，所述外围电路包括：
垂直级高放，接收射频垂直信号并对卫星接收天线接收下来的卫星传输信号的垂直方向的电磁波进行放大，所述垂直级高放在接收频段内具有带通特性；
水平级高放，接收射频水平信号并对卫星接收天线接收下来的卫星传输信号的水平方向的电磁波进行放大，所述水平级高放在接收频段内具有带通特性；
中间级高放，接收垂直级高放和水平级高放的输出信号，所述中间级高放一直处于常开的状态，对第一级高放送出的信号进行二次放大，提高混频器前面放大器的整体增益，降低整个LNB系统的噪声系数。
本发明又公开了一种LNB下变频芯片，其技术方案是，所述LNB下变频芯片集成有上述LNB下变频芯片电路，所述LNB下变频芯片电路通过所述LNB下变频芯片的引脚与所述LNB下变频芯片电路的外围电路相连接。
本发明再公开了一种采用上述LNB下变频芯片电路实现的LNB下变频方法，其技术方案是，由预放大器，将接收到的信号进行预放大，提高芯片的噪声系数，以免恶化整个LNB系统的噪声，同时将接收到的单端信号转化成两路差分信号，提高芯片的共模噪声抑制性能，所述两路差分信号分别是0度相位的第一差分信号和180度相位的第二差分信号；由四相压控振荡器输出四个相位依次相差90°的本振信号，所述四个本振信号分别为90度相位的第一本振信号、0度相位的第二本振信号、270度相位的第三本振信号和180度相位的第四本振信号；正交混频器，将第一本振信号与第一差分信号混频生成90度相位的第一中频信号，将第二本振信号与第一差分信号混频生成0度相位的第二中频信号，将第三本振信号与第二差分信号混频生成270度相位的第三中频信号，将第四本振信号与第二差分信号混频生成180度相位的第四中频信号；之后由IQ中频放大器，接收所述正交混频器输出的四个中频信号，提高正交混频器的驱动能力，防止信号衰减；再由多相位滤波器接收所述片内IQ中频放大器的输出，将四个中频信号进行滤波，消除镜像信号，实现芯片的镜像抑制功能，然后将四个中频信号中，第一中频信号和第二中频信号相加，第三中频信号和第四中频信号相加，生成两个信号输出；最后通过中频放大器接收所述多相位滤波器的输出，对片外75欧姆cable线的驱动，保证输出匹配，并将中频信号输出。
 Advantageous Effects
本发明由于集成了现有分立LNB方案中大部分分立元件部分，简化了LNB的应用、生产和维修，节约了成本；集成锁相环路，大大提高了LNB的频率稳定性能；集成镜像抑制功能，可以节省PCB板上的带通滤波器，节约了板材成本，提高了噪声性能；弥补了现有技术在生产中良率低的缺点，提高了生产过程的成品率，提高生产效率。
Description of Drawings
下面结合附图和实施例对本发明作进一步详细的说明：
图1和图2为现有的LNB下变频电路的结构图；
图3为本发明LNB下变频电路的结构图；
图4和图5为本发明LNB下变频电路中压控振荡器的示意图；
图6为本发明LNB下变频电路中锁相环电路的示意图；
图7为本发明LNB下变频电路中多相位滤波器的示意图。
 Best Mode
本发明公开了一种LNB下变频芯片电路，如图3所示，包括：
预放大器，接收前端电路的中间级高放的输出，并提高芯片的噪声系数，以免恶化整个LNB系统的噪声，同时将中间级高放送来的单端信号转化成两路差分信号，提高芯片的共模噪声抑制性能，所述两路差分信号分别是0度相位的第一差分信号和180度相位的第二差分信号；
四相压控振荡器，输出四个相位相差90°的本振信号，所述四个本振信号分别为90度相位的第一本振信号、0度相位的第二本振信号、270度相位的第三本振信号和180度相位的第四本振信号；
正交混频器，接收来自所述四相压控振荡器送来的四个本振信号，以及预放大器输出的两个差分信号，所述正交混频器将第一本振信号与第一差分信号混频生成90度相位的第一中频信号，将第二本振信号与第一差分信号混频生成0度相位的第二中频信号，将第三本振信号与第二差分信号混频生成270度相位的第三中频信号，将第四本振信号与第二差分信号混频生成180度相位的第四中频信号；
IQ 中频放大器，接收所述正交混频器输出的四个中频信号，提高正交混频器的驱动能力，防止信号衰减；
多相位滤波器，接收所述片内IQ中频放大器的输出，将四个中频信号进行滤波，消除镜像信号，实现芯片的镜像抑制功能，然后将四个中频信号中，第一中频信号和第二中频信号相加，第三中频信号和第四中频信号相加，生成两个信号输出。
 Mode for Invention
所述LNB下变频芯片电路还包括片内高放管控制电路及垂直水平切换电路，连接到芯片外围电路的垂直级高放、水平级高放和中间级高放，所述片内高放管控制电路为所述垂直级高放、水平级高放和中间级高放中的高放管的源极、漏极和栅极提供偏置电路，并将高放管的工作电流控制在正常工作的范围内，所述垂直水平切换电路根据垂直/水平切换电压的大小，打开或关闭送给高放管的偏置，以实现垂直和水平信号间的接收切换，同时，中间级高放一直控制在常开的状态。
所述LNB下变频芯片电路还包括片内中频放大器，接收所述多相位滤波器的输出，对片外75欧姆cable线的驱动，保证输出匹配，尤其是保证和机顶盒之间的匹配，并将中频信号输出。
所述四相压控振荡器如图4和图5所示，包括两个相互耦合的压控振荡器单元VCO1和VCO2，输出四个相位相差90°的本振信号，分别为90度相位的第一本振信号IP、0度相位的第二本振信号QP、270度相位的第三本振信号IN和180度相位的第四本振信号QN。
本发明选用hartley结构实现镜像抑制功能，根据hartley结构下变频器的实现原理可知，本发明必须产生4相正交本振信号。正交本振信号的实现方法通常有3种，多相位滤波器方案、二分频方案和四相压控振荡器方案。
本发明采用了四相压控振荡器方案，这样避免了高频下对多相位滤波器的驱动问题，同时如果采用二分频方案中压控振荡器需要振在两倍本振，对于Ku波段10.6GHz的本振频率来说，压控振荡器需要工作在21GHz，在如此高的频率下，CMOS二分频器的实现难度非常大。
如图4和图5所示，四相压控振荡器通过两个压控振荡器（VCO）单元之间的相互耦合，实现了相位相差90度的4相本振信号。两个压控振荡器单元分别有主振荡管（M1、M2、M5、M6）和耦合管（M3、M4、M7、M8）组成。第一级压控振荡器VCO1的输出信号IP、IN输入到第二个压控振荡器VCO2的耦合管，第二级压控振荡器VCO2的输出QP、QN则输入到第一级压控振荡器VCO1的耦合管。从而确保了IP、QP、IN、QN之间90度的相位差。
所述压控振荡器连接有锁相环路和预分频电路，所述压控振荡器的频率稳定性通过锁相环路实现，即将压控振荡器的输出信号通过预分频电路，不断分频到参考时钟频率，锁相环路将分频后的输出信号与参考时钟频率进行比较，频率误差通过锁相环路不断调整压控振荡器的可变电容器进行补偿，从而实现精确的本振频率。
为确保压控振荡器产生的本振信号不随温度等环境变化而变化，必须通过所述锁相环路（PLL）对压控振荡器的本振信号进行锁相，以实现精准的本振信号，克服分立方案中介质振荡器（DRO）频率不稳定的缺点。具体的实现方案为，通过预分频器将压控振荡器的本振信号进行分频，将频率分频到参考时钟（即晶体时钟）频率附近，锁相环路将之与参考时钟频率进行比较，比较误差通过不断调整压控振荡器的可变电容来补偿，从而实现对本振频率的锁相功能，由于晶体具有极高的Q值，频率稳定度极高，锁相环路将压控振荡器的频率与晶体频率进行锁相，确保了压控振荡器的频率稳定度。
本发明为了提高LNB系统的频率稳定性和相位噪声性能，内部可以集成锁相环路和晶体振荡器，以实现精确控制压控振荡器的频率，并滤除压控振荡器的低频相位噪声。
如图6所示，预分频器将由两个压控振荡器单元组成的四相压控振荡器送出的10GHz附近的高频信号，不断分频到晶体振荡频率附近，并送给鉴相器；同时晶体振荡器将稳定的晶体频率信号也送给鉴相器，鉴相器通过比较两组频率信号的相位误差，送出相应的控制信号给电荷泵，环路滤波器将电荷泵输出信号滤波为随相位变化的控制电压信号以控制压控振荡器内部的可变电容器，实现精确调整压控振荡器频率的功能。
本发明采用两个压控振荡器构成的四相交叉耦合型压控振荡器，两个VCO的相位不同，但振荡频率完全相同，因此环路滤波器只需将控制电压滤波后，同时送给两个VCO即可。
整个锁相环路具有负反馈特性，这样实现了压控振荡器的相位即频率完全正比于晶体振荡器的相位与频率，由于晶体具有极高的Q值，其频率稳定性极高，从而确保了压控振荡器的频率稳定性。
压控振荡器在将10GHz高频信号送给锁相环路的同时，又将10GHz信号送给混频器实现下变频功能。
所述无源多相位滤波器中包括与四个中频信号对应的四条通路，如图6所示，每条通路包括串联的多个电阻，前一条通路的每个电阻的前一端都通过一个电容与后一条通路相应电阻的后一端相连接，最后一条通路的每个电阻的前一端都通过一个电容与第一条通路相应电阻的后一端相连接。
本发明采用hartley结构实现镜像抑制功能，根据hartley结构下变频器的实现原理可知，射频信号经过正交混频器下变频以后，需要通过多相位滤波器将镜像位置的信号滤除掉。由于LNB系统要求950MHz到2150MHz的L波段中频信号输出，因此本发明采用了4级无源多相位滤波器结构。如图7所示，多相位滤波器具有对负频率（或正频率）信号带阻特性，而保持对正频率（或负频率）信号的带通特性，同时，级数的多少决定了其阻带宽度，级数越多，阻带宽度越大，但通带内插损越大，本发明通过对阻带宽度和通带插损的折中，选择了4级多相位滤波器结构。
所述LNB下变频芯片电路还包括片内22k检测电路，对接收的22k信号进行响应，当存在22k信号时，检测电路会送出高电平给锁相环路，锁相环路控制压控振荡器工作在高本振，一旦22k信号消失，检测电路会送出低电平，锁相环路将压控振荡器锁频在低本振。
所述LNB下变频芯片电路还包括片内负电压生成电路，产生一个负电压，为所述水平级高放、垂直级高放以及中间级高放中的高放管的栅压提供需要的偏置点。
所述LNB下变频芯片电路还包括片内稳压电路，为所述LNB下变频芯片电路的其它部分提供电源。
所述LNB下变频芯片电路还包括片内晶体振荡电路，为所述LNB下变频芯片电路的其它部分提供基准频率。
本发明还公开了一种LNB下变频电路，包括上述LNB下变频芯片电路，以及LNB下变频芯片电路的外围电路，所述外围电路包括：
垂直级高放，接收射频垂直信号并对卫星接收天线接收下来的卫星传输信号的垂直方向的电磁波进行放大，所述垂直级高放在接收频段内具有带通特性；
水平级高放，接收射频水平信号并对卫星接收天线接收下来的卫星传输信号的水平方向的电磁波进行放大，所述水平级高放在接收频段内具有带通特性；
中间级高放，接收垂直级高放和水平级高放的输出信号，所述中间级高放一直处于常开的状态，对第一级高放送出的信号进行二次放大，提高混频器前面放大器的整体增益，降低整个LNB系统的噪声系数。
所述外围电路还包括片外高放管控制电路及垂直水平切换电路，连接到所述外围电路的垂直级高放、水平级高放和中间级高放，所述片外高放管控制电路为所述垂直级高放、水平级高放和中间级高放中的高放管的源极、漏极和栅极提供偏置电路，并将高放管的工作电流控制在正常工作的范围内，所述垂直水平切换电路根据垂直/水平切换电压的大小，打开或关闭送给高放管的偏置，以实现垂直和水平信号间的接收切换，同时，中间级高放一直控制在常开的状态。
所述外围电路还包括片外中频放大器，接收所述多相位滤波器的输出，对片外75欧姆cable线的驱动，保证输出匹配，并将中频信号输出。
高放管控制电路及垂直水平切换电路和所述中频放大器可以集成在所述LNB下变频芯片电路中，也可以如前所述集成在所述外围电路中。
所述外围电路还包括片外22k检测电路，对接收的22k信号进行响应，当存在22k信号时，所述片外22k检测电路会送出高电平给锁相环路，锁相环路控制压控振荡器工作在高本振，一旦22k信号消失，所述片外22k检测电路会送出低电平，锁相环路将压控振荡器锁频在低本振。
22k 检测电路可以集成在所述LNB下变频芯片电路中，即所述片内22k检测电路，或者如前所述集成在所述外围电路中。再或者，所述LNB下变频芯片电路中和外围电路中都集成有22k检测电路，所述LNB下变频电路可以选择采用其中一个来实现相应的功能。
所述22k检测电路无论是集成在芯片电路中还是外围电路中，所述22k检测电路通过其是否检测到22k信号，送出相应的控制信号给预分频器，以改变与预分频器的分频比例，如图6所示。例如，检测到22k信号时，送出高电平给预分频器，未检测到22k信号时，则送出低电平到预分频器。预分频器根据接收到的22k检测电路从来的电压，切换不同的分频比例，以实现切换压控振荡器的振荡频率的，进而改变本振频率的功能。
通常的Ku波段LNB，需要支持9.75GHz和10.6GHz的本振频率，没有22k信号为9.75GHz本振，22k信号存在时，切换为10.6GHz本振。
所述外围电路还包括片外负电压生成电路，产生一个负电压，为所述水平级高放、垂直级高放以及中间级高放中的高放管的栅压提供需要的偏置点。
负电压生成电路可以集成在所述LNB下变频芯片电路中，即所述片内负电压生成电路，或者如前所述集成在所述外围电路中。再或者，所述LNB下变频芯片电路中和外围电路中都集成有负电压生成电路，所述LNB下变频电路可以选择采用其中一个来实现相应的功能。
所述外围电路还包括片外稳压电路，为所述LNB下变频芯片电路提供电源。
所述LNB下变频芯片电路中和外围电路中可以都集成有稳压电路，以充分保证为所述LNB下变频芯片电路提供稳定的电源。
所述外围电路还包括片外晶体振荡电路，为所述LNB下变频芯片电路提供基准频率。
晶体振荡电路可以集成在所述LNB下变频芯片电路中，即所述片内晶体振荡电路，或者如前所述集成在所述外围电路中。再或者，所述LNB下变频芯片电路中和外围电路中都集成有晶体振荡电路，所述LNB下变频电路可以选择采用其中一个为所述LNB下变频芯片电路提供基准频率。
本发明还公开了一种LNB下变频芯片，所述LNB下变频芯片集成有上述LNB下变频芯片电路，所述LNB下变频芯片电路通过所述LNB下变频芯片的引脚与所述LNB下变频芯片电路的外围电路相连接。
图3为本发明采用的具体实施方案，本发明采用Hartley接收机结构，主要目的在于实现芯片的镜像抑制性能。由于镜像频率部分的噪声会使得接收机的噪声系数恶化3dB，因此对于LNB这样对噪声系数要求极高的系统来说，镜像抑制的性能就显得尤为重要。
本发明还公开了一种采用上述LNB下变频电路实现的LNB下变频方法，由预放大器，将接收到的信号进行预放大，提高芯片的噪声系数，以免恶化整个LNB系统的噪声，同时将接收到的单端信号转化成两路差分信号，提高芯片的共模噪声抑制性能，所述两路差分信号分别是0度相位的第一差分信号和180度相位的第二差分信号；由四相压控振荡器输出四个相位依次相差90°的本振信号，所述四个本振信号分别为90度相位的第一本振信号、0度相位的第二本振信号、270度相位的第三本振信号和180度相位的第四本振信号；正交混频器，将第一本振信号与第一差分信号混频生成90度相位的第一中频信号，将第二本振信号与第一差分信号混频生成0度相位的第二中频信号，将第三本振信号与第二差分信号混频生成270度相位的第三中频信号，将第四本振信号与第二差分信号混频生成180度相位的第四中频信号；之后由IQ中频放大器，接收所述正交混频器输出的四个中频信号，提高正交混频器的驱动能力，防止信号衰减；再由多相位滤波器接收所述片内IQ中频放大器的输出，将四个中频信号进行滤波，消除镜像信号，实现芯片的镜像抑制功能，然后将四个中频信号中，第一中频信号和第二中频信号相加，第三中频信号和第四中频信号相加，生成两个信号输出；最后通过中频放大器接收所述多相位滤波器的输出，对片外75欧姆cable线的驱动，保证输出匹配，并将中频信号输出。
所述压控振荡器的频率稳定性通过锁相环路实现，即将压控振荡器的输出信号通过预分频电路，不断分频到参考时钟频率，锁相环路将分频后的输出信号与参考时钟频率进行比较，频率误差通过锁相环路不断调整压控振荡器的可变电容器进行补偿，从而实现精确的本振频率。
所述高放管控制电路为所述垂直级高放、水平级高放和中间级高放中的高放管的源极、漏极和栅极提供偏置电路，并将高放管的工作电流控制在正常工作的范围内，所述垂直水平切换电路根据垂直/水平切换电压的大小，打开或关闭送给高放管的偏置，以实现垂直和水平信号间的接收切换，同时，中间级高放一直控制在常开的状态。
所述中频放大器接收所述多相位滤波器的输出，对片外75欧姆cable线的驱动，保证输出匹配，并将中频信号输出。
所述压控振荡器的频率稳定性通过锁相环路实现，即将压控振荡器的输出信号通过预分频电路，不断分频到参考时钟频率，锁相环路将分频后的输出信号与参考时钟频率进行比较，频率误差通过锁相环路不断调整压控振荡器的可变电容器进行补偿，从而实现精确的本振频率。
所述22k检测电路，对接收的22k信号进行响应，当存在22k信号时，检测电路会送出高电平给锁相环路，锁相环路控制压控振荡器工作在高本振，一旦22k信号消失，检测电路会送出低电平，锁相环路将压控振荡器锁频在低本振。
由负电压生成电路，产生一个负电压，为所述水平级高放、垂直级高放以及中间级高放中的高放管的栅压提供需要的偏置点。
本发明所采用的Hartley结构的基本原理是通过正交本振信号（Quadrature LO）和正交混频器将射频信号进行下变频，再利用无源多相滤波器对混频后的正交中频信号进行90度相移，从而确保滤除镜像信号，实现镜像抑制的功能。
本发明可以实现接近25dB的镜像抑制率，基本消除了镜像频率对噪声的恶化。同时，由于传统的采用分立元件的LNB产品，为了满足1dB以下的噪声系数，需要在PCB板上加上带通滤波器。而采用本发明以后，由于本发明采用hartley结构的下变频结构，镜像信号通过正交混频器的下变频以及多相位滤波器相移作用得以消除，则可以省去带通滤波器，节省了PCB面积，简化了应用。
实现Hartley结构的一个关键问题是如何生成四相本振信号，尤其对于Ku波段的LNB芯片，由于要求本振信号频率范围为9.75GHz和10.75GHz，甚至需要11.3GHz的高频，因此如何生成四相本振信号成为本发明需要解决的一个难点。
生成四相本振信号的方案一般有三种，多相位滤波器方案、二分频方案和四相压控振荡器方案，本发明采用四相压控振荡器方案，这样避免了高频下多相位滤波器的驱动问题，同时如果采用二分频方案中压控振荡器需要振在两倍本振，二分频器的实现难度非常大。
在实现具有镜像抑制性能的hartley接收机的同时，本发明还利用CMOS芯片便于集成的特点，将22k信号检测和负电压生成电路和接收机集成在同一颗芯片内，这样大大节约了LNB的生产成本。
 Industrial Applicability
本发明由于集成了现有分立LNB方案中大部分分立元件部分，简化了LNB的应用、生产和维修，节约了成本；集成锁相环路，大大提高了LNB的频率稳定性能；集成镜像抑制功能，可以节省PCB板上的带通滤波器，节约了板材成本，提高了噪声性能；集成负电压、22k信号检测和高放管控制，大大节约LNB生产成本；弥补了现有技术在生产中良率低的缺点，提高了生产过程的成品率，提高生产效率。
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Claims (1)

1. 一种LNB下变频芯片电路，其特征在于，包括：
预放大器，接收前端电路的中间级高放的输出，并提高芯片的噪声系数，以免恶化整个LNB系统的噪声，同时将中间级高放送来的单端信号转化成两路差分信号，提高芯片的共模噪声抑制性能，所述两路差分信号分别是0度相位的第一差分信号和180度相位的第二差分信号；
四相压控振荡器，输出四个相位相差90°的本振信号，所述四个本振信号分别为90度相位的第一本振信号、0度相位的第二本振信号、270度相位的第三本振信号和180度相位的第四本振信号；
正交混频器，接收来自所述四相压控振荡器送来的四个本振信号，以及预放大器输出的两个差分信号，所述正交混频器将第一本振信号与第一差分信号混频生成90度相位的第一中频信号，将第二本振信号与第一差分信号混频生成0度相位的第二中频信号，将第三本振信号与第二差分信号混频生成270度相位的第三中频信号，将第四本振信号与第二差分信号混频生成180度相位的第四中频信号；
IQ 中频放大器，接收所述正交混频器输出的四个中频信号，提高正交混频器的驱动能力，防止信号衰减；
多相位滤波器，接收所述片内IQ中频放大器的输出，将四个中频信号进行滤波，消除镜像信号，实现芯片的镜像抑制功能，然后将四个中频信号中，第一中频信号和第二中频信号相加，第三中频信号和第四中频信号相加，生成两个信号输出。
2. 根据权利要求1所述的LNB下变频芯片电路，其特征在于，还包括片内高放管控制电路及垂直水平切换电路，连接到芯片外围电路的垂直级高放、水平级高放和中间级高放，所述片内高放管控制电路为所述垂直级高放、水平级高放和中间级高放中的高放管的源极、漏极和栅极提供偏置电路，并将高放管的工作电流控制在正常工作的范围内，所述垂直水平切换电路根据垂直/水平切换电压的大小，打开或关闭送给高放管的偏置，以实现垂直和水平信号间的接收切换，同时，中间级高放一直控制在常开的状态。
3. 根据权利要求1所述的LNB下变频芯片电路，其特征在于，还包括片内中频放大器，接收所述多相位滤波器的输出，对片外75欧姆cable线的驱动，保证输出匹配，并将中频信号输出。
4. 根据权利要求1所述的LNB下变频芯片电路，其特征在于，所述四相压控振荡器包括两个相互耦合的压控振荡器单元，输出四个相位依次相差90°的本振信号。
5. 根据权利要求4所述的LNB下变频芯片电路，其特征在于，所述压控振荡器连接有锁相环路和预分频电路，所述压控振荡器的频率稳定性通过锁相环路实现，即将压控振荡器的输出信号通过预分频电路，不断分频到参考时钟频率，锁相环路将分频后的输出信号与参考时钟频率进行比较，频率误差通过锁相环路不断调整压控振荡器的可变电容器进行补偿，从而实现精确的本振频率。
6. 根据权利要求1所述的LNB下变频芯片电路，其特征在于，所述多相位滤波器中包括与四个中频信号对应的四条通路，每条通路包括串联的多个电阻，前一条通路的每个电阻的前一端都通过一个电容与后一条通路相应电阻的后一端相连接，最后一条通路的每个电阻的前一端都通过一个电容与第一条通路相应电阻的后一端相连接。
7. 根据权利要求1所述的LNB下变频芯片电路，其特征在于，还包括片内22k检测电路，对接收的22k信号进行响应，当存在22k信号时，检测电路会送出高电平给锁相环路，锁相环路控制压控振荡器工作在高本振，一旦22k信号消失，检测电路会送出低电平，锁相环路将压控振荡器锁频在低本振。
8. 根据权利要求1所述的LNB下变频芯片电路，其特征在于，还包括片内负电压生成电路，产生一个负电压，为所述水平级高放、垂直级高放以及中间级高放中的高放管的栅压提供需要的偏置点。
9. 根据权利要求1所述的LNB下变频芯片电路，其特征在于，还包括片内稳压电路，为所述LNB下变频芯片电路的其它部分提供电源。
10. 根据权利要求1所述的LNB下变频芯片电路，其特征在于，还包括片内晶体振荡电路，为所述LNB下变频芯片电路的其它部分提供基准频率。
11. 一种LNB下变频电路，其特征在于，包括如权利要求1～10中任意一项所述的LNB下变频芯片电路，以及LNB下变频芯片电路的外围电路，所述外围电路包括：
垂直级高放，接收射频垂直信号并对卫星接收天线接收下来的卫星传输信号的垂直方向的电磁波进行放大，所述垂直级高放在接收频段内具有带通特性；
水平级高放，接收射频水平信号并对卫星接收天线接收下来的卫星传输信号的水平方向的电磁波进行放大，所述水平级高放在接收频段内具有带通特性；
中间级高放，接收垂直级高放和水平级高放的输出信号，所述中间级高放一直处于常开的状态，对第一级高放送出的信号进行二次放大，提高混频器前面放大器的整体增益，降低整个LNB系统的噪声系数。
12. 根据权利要求11所述的LNB下变频电路，其特征在于，所述外围电路还包括片外高放管控制电路及垂直水平切换电路，连接到所述外围电路的垂直级高放、水平级高放和中间级高放，所述片外高放管控制电路为所述垂直级高放、水平级高放和中间级高放中的高放管的源极、漏极和栅极提供偏置电路，并将高放管的工作电流控制在正常工作的范围内，所述垂直水平切换电路根据垂直/水平切换电压的大小，打开或关闭送给高放管的偏置，以实现垂直和水平信号间的接收切换，同时，中间级高放一直控制在常开的状态。
13. 根据权利要求11所述的LNB下变频电路，其特征在于，所述外围电路还包括片外中频放大器，接收所述多相位滤波器的输出，对片外75欧姆cable线的驱动，保证输出匹配，并将中频信号输出。
14. 根据权利要求11所述的LNB下变频电路，其特征在于，所述外围电路还包括片外22k检测电路，对接收的22k信号进行响应，当存在22k信号时，所述片外22k检测电路会送出高电平给锁相环路，锁相环路控制压控振荡器工作在高本振，一旦22k信号消失，所述片外22k检测电路会送出低电平，锁相环路将压控振荡器锁频在低本振。
15. 根据权利要求11所述的LNB下变频电路，其特征在于，所述外围电路还包括片外负电压生成电路，产生一个负电压，为所述水平级高放、垂直级高放以及中间级高放中的高放管的栅压提供需要的偏置点。
16. 根据权利要求11所述的LNB下变频电路，其特征在于，所述外围电路还包括片外稳压电路，为所述LNB下变频芯片电路提供电源。
17. 根据权利要求11所述的LNB下变频电路，其特征在于，所述外围电路还包括片外晶体振荡电路，为所述LNB下变频芯片电路提供基准频率。
18. 一种LNB下变频芯片，其特征在于，所述LNB下变频芯片集成有如权利要求1～10中任意一项所述的LNB下变频芯片电路，所述LNB下变频芯片电路通过所述LNB下变频芯片的引脚与所述LNB下变频芯片电路的外围电路相连接。
19. 一种采用权利要求1～10中任意一项所述的LNB下变频芯片电路实现的LNB下变频方法，其特征在于，由预放大器，将接收到的信号进行预放大，提高芯片的噪声系数，以免恶化整个LNB系统的噪声，同时将接收到的单端信号转化成两路差分信号，提高芯片的共模噪声抑制性能，所述两路差分信号分别是0度相位的第一差分信号和180度相位的第二差分信号；由四相压控振荡器输出四个相位依次相差90°的本振信号，所述四个本振信号分别为90度相位的第一本振信号、0度相位的第二本振信号、270度相位的第三本振信号和180度相位的第四本振信号；正交混频器，将第一本振信号与第一差分信号混频生成90度相位的第一中频信号，将第二本振信号与第一差分信号混频生成0度相位的第二中频信号，将第三本振信号与第二差分信号混频生成270度相位的第三中频信号，将第四本振信号与第二差分信号混频生成180度相位的第四中频信号；之后由IQ中频放大器，接收所述正交混频器输出的四个中频信号，提高正交混频器的驱动能力，防止信号衰减；再由多相位滤波器接收所述片内IQ中频放大器的输出，将四个中频信号进行滤波，消除镜像信号，实现芯片的镜像抑制功能，然后将四个中频信号中，第一中频信号和第二中频信号相加，第三中频信号和第四中频信号相加，生成两个信号输出；最后通过中频放大器接收所述多相位滤波器的输出，对片外75欧姆cable线的驱动，保证输出匹配，并将中频信号输出。
20. 根据权利要求19所述的LNB下变频方法，其特征在于，所述压控振荡器的频率稳定性通过锁相环路实现，即将压控振荡器的输出信号通过预分频电路，不断分频到参考时钟频率，锁相环路将分频后的输出信号与参考时钟频率进行比较，频率误差通过锁相环路不断调整压控振荡器的可变电容器进行补偿，从而实现精确的本振频率。
21. 根据权利要求19所述的LNB下变频方法，其特征在于，还包括高放管控制电路及垂直水平切换电路，连接到芯片外围电路的垂直级高放、水平级高放和中间级高放，所述高放管控制电路为所述垂直级高放、水平级高放和中间级高放中的高放管的源极、漏极和栅极提供偏置电路，并将高放管的工作电流控制在正常工作的范围内，所述垂直水平切换电路根据垂直/水平切换电压的大小，打开或关闭送给高放管的偏置，以实现垂直和水平信号间的接收切换，同时，中间级高放一直控制在常开的状态。
22. 根据权利要求19所述的LNB下变频方法，其特征在于，还包括中频放大器，接收所述多相位滤波器的输出，对片外75欧姆cable线的驱动，保证输出匹配，并将中频信号输出。
23. 根据权利要求19所述的LNB下变频方法，其特征在于，所述压控振荡器连接有锁相环路和预分频电路，所述压控振荡器的频率稳定性通过锁相环路实现，即将压控振荡器的输出信号通过预分频电路，不断分频到参考时钟频率，锁相环路将分频后的输出信号与参考时钟频率进行比较，频率误差通过锁相环路不断调整压控振荡器的可变电容器进行补偿，从而实现精确的本振频率。
24. 根据权利要求19所述的LNB下变频方法，其特征在于，还包括22k检测电路，对接收的22k信号进行响应，当存在22k信号时，22k检测电路会送出高电平给锁相环路，锁相环路控制压控振荡器工作在高本振，一旦22k信号消失，22k检测电路会送出低电平，锁相环路将压控振荡器锁频在低本振。
25. 根据权利要求19所述的LNB下变频方法，其特征在于，还包括负电压生成电路，产生一个负电压，为所述水平级高放、垂直级高放以及中间级高放中的高放管的栅压提供需要的偏置点。
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