WO2012001993A1 - 抵抗変化型不揮発性記憶素子、抵抗変化型不揮発性記憶装置及び抵抗変化型不揮発性記憶素子の製造方法 - Google Patents
抵抗変化型不揮発性記憶素子、抵抗変化型不揮発性記憶装置及び抵抗変化型不揮発性記憶素子の製造方法 Download PDFInfo
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- WO2012001993A1 WO2012001993A1 PCT/JP2011/003785 JP2011003785W WO2012001993A1 WO 2012001993 A1 WO2012001993 A1 WO 2012001993A1 JP 2011003785 W JP2011003785 W JP 2011003785W WO 2012001993 A1 WO2012001993 A1 WO 2012001993A1
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- variable resistance
- electrode
- resistance change
- nonvolatile memory
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Images
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
- H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Shaping switching materials
- H10N70/066—Shaping switching materials by filling of openings, e.g. damascene method
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
Definitions
- the present invention relates to a variable resistance nonvolatile memory element having a variable resistance element whose resistance value changes by application of an electric pulse.
- the resistance change element is an element that has a property that the resistance value reversibly changes by an electrical signal, and that can store information corresponding to the resistance value in a nonvolatile manner.
- a cross-point type nonvolatile memory device has been proposed as an example of a large-capacity nonvolatile memory device equipped with a variable resistance element.
- the cross-point type nonvolatile memory device has a 1D (Diode) -1R (Resistor) structure in which a resistance change element and a diode element as a switching element are electrically connected in series as one memory unit.
- a memory cell is preferably used.
- FIG. 13A shows a cross-sectional view of a memory cell 280, a bit line 210, and a word line 220 along a bit line direction of a nonvolatile semiconductor memory device 60 equipped with a conventional variable resistance element (Patent Literature). 1).
- a resistance change element 260 is formed by sandwiching a resistance change layer 230 that stores information due to a change in electrical resistance due to electrical stress, between the upper electrode 240 and the lower electrode 250.
- a two-terminal non-linear element 270 having a non-linear current-voltage characteristic capable of flowing a current in both directions is formed above the resistance change element 260.
- a memory cell 280 is formed by a series circuit of the resistance change element 260 and the non-linear element 270.
- the non-linear element 270 is a two-terminal element having a non-linear current-voltage characteristic, such as a diode, in which the current change with respect to the voltage change is not constant.
- the bit line 210 serving as the upper wiring is electrically connected to the nonlinear element 270
- the word line 220 serving as the lower wiring is electrically connected to the lower electrode 250 of the resistance change element 260.
- the nonlinear element 270 uses a varistor (ZnO, SrTiO 3, etc.) having a nonlinear current-voltage characteristic that is symmetrical in both directions because current flows in both directions when the memory cell 280 is rewritten.
- a current density required for rewriting the variable resistance element 260 a current of 30 kA / cm 2 or more can be passed, and a large capacity can be realized.
- FIG. 13B shows a perspective view of a conventional resistive memory element 70 (see Patent Document 2).
- the resistive memory element 70 includes a first electrode E1, a second electrode E2 spaced apart from the first electrode E1, and a material having variable resistance characteristics between the first electrode E1 and the second electrode E2.
- a first structure S1 composed of a resistance change layer R1, an intermediate electrode M1, and a switching element D1 electrically connected to the resistance change layer R1 through the intermediate electrode M1, and further on the second electrode E2.
- the first electrode E1 and the second electrode E2 is formed of an alloy layer containing a noble metal such as platinum or iridium, so that both resistance change characteristics and adhesion with other layers can be achieved, and The manufacturing cost can be reduced.
- the switching element is preferably a pn diode having a stacked structure of a p-type oxide layer and an n-type oxide layer or a stacked structure of p-type silicon and n-type silicon.
- variable resistance element and the diode element are configured by a six-layered structure including the bit line and the word line, and the upper electrode 240 and the variable resistance layer 230 are formed.
- the lower electrode 250 and the non-linear element 270 are simultaneously patterned in the direction along the bit line 210 when the bit line 210 is processed, and simultaneously patterned in the direction along the word line when the word line 220 is processed.
- a memory cell 280 is formed only at the intersection of 220 and the bit line 210.
- the thickness of the target layer to be patterned is increased, and a plurality of layers made of different materials are processed at the same time. I can't say that.
- the resistive memory element has a problem in that the manufacturing method is complicated because the upper and lower electrodes include a six-layer stacked structure.
- the switching element is composed of a pn diode, it is suitable for a unipolar resistance change element, that is, a resistance change element in which the write voltage for increasing resistance and the write voltage for decreasing resistance have the same polarity.
- a pn diode is combined with a bipolar resistance change element, that is, a resistance change element in which the write voltage for increasing resistance and the write voltage for decreasing resistance are reversed in polarity, the reverse bias of the diode is the resistance change element. There is a problem that a sufficient write voltage cannot be applied.
- the present invention solves the above-described conventional problems, and realizes a variable resistance nonvolatile memory element composed of a variable resistance element and a bidirectional diode element with a simple configuration,
- non-volatile memory elements with such a simple structure to memory cells that can be miniaturized, non-volatile memory suitable for high-capacity integration with a large capacity that makes the manufacturing method easy and reduces the manufacturing process and cost
- An object is to provide an apparatus.
- variable resistance nonvolatile memory element includes a first electrode made of a metal-based material and a thickness adjacent to the first electrode. And a resistance change layer whose resistance value reversibly changes in response to application of a positive electric pulse and a negative electric pulse, and is arranged adjacent to the resistance change layer in the thickness direction.
- the variable resistance layer further includes a third variable resistance layer interposed between the first variable resistance layer and the second variable resistance layer, and oxygen deficiency included in the third variable resistance layer.
- the oxygen content of the transition metal oxide is lower than the oxygen content of the oxygen-deficient transition metal oxide contained in the first resistance change layer, and the oxygen-deficient transition metal contained in the second resistance change layer It may be higher than the oxygen content of the oxide.
- the mechanism of resistance change operation is dominated by the oxygen oxidation / reduction reaction in the vicinity of the electrode interface, and operates preferentially at the interface where there is much oxygen that can contribute to oxidation / reduction,
- the resistance change operation can be stably caused in the vicinity of the interface between the first electrode and the resistance change layer. Therefore, a variable resistance nonvolatile memory element having stable resistance change characteristics can be realized.
- the first electrode is made of a metal selected from platinum, iridium, palladium, copper, and tantalum nitride, or a combination and alloy of these metals
- the second electrode is made of tantalum nitride or titanium nitride. And any one of metals of tungsten or a combination of these metals.
- the oxygen-deficient tantalum oxide contained in the second resistance change layer preferably has a composition of TaO y (0 ⁇ y ⁇ 1.29), and further, the second resistance change layer includes It is desirable that the oxygen-deficient tantalum oxide contained has a composition of TaO y (0.8 ⁇ y ⁇ 1.29).
- a material that exhibits a resistance change operation by the combination of the first electrode and the resistance change layer is used for the first electrode and the resistance change layer, and the resistance is increased in the vicinity of the interface between the first electrode and the resistance change layer. Can cause change behavior.
- a Schottky barrier is formed at the interface between the resistance change layer and the semiconductor layer.
- the resistance change layer is configured by a stacked body of the first resistance change layer and the second resistance change layer, the first resistance change layer is adjacent to the first electrode, and the first resistance change layer and the second resistance change layer are When the oxygen content of the first variable resistance layer is higher than the oxygen content of the second variable resistance layer, the second variable resistance layer is higher than the work function of the semiconductor layer. It is desirable to use a material having a work function. Also in this case, a Schottky barrier is formed at the interface between the second resistance change layer and the semiconductor layer.
- variable resistance nonvolatile memory element having a 1D-1R structure including a variable resistance element and a bidirectional diode element in a four-layered structure including upper and lower electrodes.
- a bidirectional diode element is defined as a two-terminal element that exhibits nonlinear electrical resistance characteristics and whose current-voltage characteristics are substantially symmetric with respect to the polarity of the applied voltage. That is, the change in current with respect to the positive applied voltage and the change in current with respect to the negative applied voltage are substantially point-symmetric with respect to the origin 0.
- this two-terminal element has a very high electric resistance when the applied voltage is lower than the critical voltage. On the other hand, when the voltage exceeds the critical voltage, the electric resistance sharply decreases and a non-linear electric resistance characteristic that a large current flows is obtained. Have.
- an MSM diode Metal-Semiconductor-Metal
- an MIM diode Metal-Insulator-Metal
- a varistor As a two-terminal element having such characteristics, for example, an MSM diode (Metal-Semiconductor-Metal), an MIM diode (Metal-Insulator-Metal), or a varistor is known.
- bidirectional diode element in a variable resistance nonvolatile memory device having a 1D-1R structure, in a bipolar variable resistance element that changes its resistance by an electric pulse having a different polarity, writing to adjacent memory cells is possible. It is possible to reliably avoid the occurrence of disturbance.
- variable resistance nonvolatile memory device of the present invention a plurality of first wirings extending in the first direction and a plurality extending in the second direction intersecting the first direction are provided.
- the first wiring is connected to the first electrodes of the plurality of variable resistance nonvolatile memory elements
- the second wiring is connected to the second electrodes of the plurality of variable resistance nonvolatile memory elements. It will be.
- variable resistance nonvolatile memory device capable of large capacity and high integration without providing a switching element such as a transistor.
- the memory cell can be composed of a variable resistance layer composed of tantalum oxide, but tantalum and its oxide have good affinity with silicon semiconductor processes.
- the memory cell is composed of tantalum oxide.
- the variable resistance layer to be formed can be embedded by using CMP.
- the resistance change layer of the memory cell is made of tantalum oxide and does not contain noble metals or copper that are difficult to dry etch, so that the memory cell can be easily processed. In addition, miniaturization is possible.
- the semiconductor layer constituting the diode element can be formed in the same wiring shape as that of the second electrode, it can be processed simultaneously with the second electrode, and the manufacturing process can be reduced.
- the contact area between the second electrode and the semiconductor layer is larger than the contact area between the resistance change layer and the semiconductor layer, the lines of electric force spread to the periphery of the second electrode, and the current drive capability of the diode element. Can be increased.
- variable resistance nonvolatile memory element that is easy to manufacture and can reduce the manufacturing process and cost.
- the present invention can be realized not only as such a variable resistance nonvolatile memory element and a variable resistance nonvolatile memory device, but also as a method of manufacturing such a variable resistance nonvolatile memory element.
- a variable resistance nonvolatile memory element includes a first electrode, a variable resistance layer connected to the first electrode, a semiconductor layer connected to the variable resistance layer, and a four layer connected to the semiconductor layer. It is comprised by the laminated structure of.
- the resistance change element includes a first electrode and a resistance change layer
- the diode element includes a resistance change layer, a semiconductor layer, and a second electrode.
- This variable resistance nonvolatile memory element is characterized by using a material having a higher work function than the semiconductor layer for the variable resistance layer, so that the variable resistance layer functions as an electrode of the diode element.
- a Schottky barrier is formed at the interface.
- a Schottky barrier is formed at the interface between the semiconductor layer and the second electrode, so that a bidirectional MSM diode can be realized. .
- a 1D-1R structure in which a variable resistance element and a diode element are combined can be realized by a four-layer structure.
- the mechanism of the resistance change operation is due to oxidation and reduction of the resistance change layer.
- the oxidation / reduction reaction of the resistance change layer occurs in the vicinity of the interface with the first electrode, and shows a resistance change operation.
- variable resistance layer is configured to have a two-layer structure of a high-concentration oxygen-containing layer and a low-concentration-oxygen-containing layer.
- a resistance change operation can be caused in the vicinity of the interface between the first electrode and the resistance change layer, and the polarity of resistance change is further stabilized. Stable memory characteristics can be obtained. This is because the resistance change operation preferentially appears at the interface where there is a large amount of oxygen that can contribute to oxidation and reduction.
- the oxidation and reduction of the resistance change layer does not occur near the interface between the resistance change layer and the semiconductor layer constituted by the low-concentration oxygen-containing layer, the oxygen concentration in the resistance change layer near the interface with the semiconductor layer No change occurs. Therefore, the Schottky barrier formed at the interface between the resistance change layer and the semiconductor layer exhibits stable diode characteristics regardless of the resistance change operation.
- variable resistance nonvolatile memory element composed of these four layers is added to a structure suitable for miniaturization and large capacity, that is, a structure composed of memory cells sandwiched between bit lines and word lines and these wirings.
- a structure suitable for miniaturization and large capacity that is, a structure composed of memory cells sandwiched between bit lines and word lines and these wirings.
- FIG. 1A is a cross-sectional view showing a configuration example of a variable resistance nonvolatile memory element according to Embodiment 1 of the present invention.
- FIG. 1B is a cross-sectional view illustrating a configuration example of the variable resistance nonvolatile memory element according to Embodiment 1 of the present invention.
- FIG. 1C is a cross-sectional view illustrating a configuration example of the variable resistance nonvolatile memory element according to Embodiment 1 of the present invention.
- FIG. 1D is a graph showing the relationship between the configuration of the resistance change layer and the endurance characteristics of the resistance change nonvolatile memory element according to Embodiment 1 of the present invention.
- FIG. 1A is a cross-sectional view showing a configuration example of a variable resistance nonvolatile memory element according to Embodiment 1 of the present invention.
- FIG. 1B is a cross-sectional view illustrating a configuration example of the variable resistance nonvolatile memory element according to Embodiment 1 of the present invention
- FIG. 2A is a graph showing current-voltage characteristics of a single diode element of the variable resistance nonvolatile memory element according to Embodiment 1 of the present invention.
- FIG. 2B is a graph showing a pulse resistance change characteristic of the variable resistance nonvolatile memory element according to Embodiment 1 of the present invention.
- FIG. 2C is a graph showing the relationship between the amount of current flowing through the diode element used in the variable resistance nonvolatile memory element according to Embodiment 1 of the present invention and the diode element according to the comparative example, and the electrode material.
- FIG. 2D is an energy band diagram illustrating the relationship between the current capacity of the diode element and the electrode material.
- FIG. 3A is a cross-sectional view showing a configuration example of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 3B is a cross-sectional view showing a configuration example of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 3C is a plan view showing a configuration example of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 4A is a cross-sectional view showing a manufacturing method using a damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 4A is a cross-sectional view showing a manufacturing method using a damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 4B is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 4C is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 4D is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 5A is a cross-sectional view showing a manufacturing method using a damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 5B is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 5C is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 5D is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 5B is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 5C is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 5D
- FIG. 6A is a cross-sectional view showing a manufacturing method using an etching process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 6B is a cross-sectional view showing the manufacturing method using the etching process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 6C is a cross-sectional view showing the manufacturing method using the etching process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 6D is a cross-sectional view showing the manufacturing method using the etching process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 6E is a cross-sectional view showing the manufacturing method using the etching process of the main part of the variable resistance nonvolatile memory device according to Embodiment 2 of the present invention.
- FIG. 7A is a cross-sectional view showing a configuration example of the variable resistance nonvolatile memory device according to Embodiment 3 of the present invention.
- FIG. 7B is a cross-sectional view showing a configuration example of the variable resistance nonvolatile memory device according to Embodiment 3 of the present invention.
- FIG. 8A is a cross-sectional view showing a manufacturing method using a damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 3 of the present invention.
- FIG. 8B is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 3 of the present invention.
- FIG. 8C is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 3 of the present invention.
- FIG. 8D is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 3 of the present invention.
- FIG. 8E is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 3 of the present invention.
- FIG. 8C is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 3 of the present invention.
- FIG. 8D
- FIG. 9A is a cross-sectional view showing a configuration example of the variable resistance nonvolatile memory device according to Embodiment 4 of the present invention.
- FIG. 9B is a cross-sectional view showing a configuration example of the variable resistance nonvolatile memory device according to Embodiment 4 of the present invention.
- FIG. 10A is a cross-sectional view showing a manufacturing method using a damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 4 of the present invention.
- FIG. 10B is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 4 of the present invention.
- FIG. 10A is a cross-sectional view showing a manufacturing method using a damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 4 of the present invention.
- FIG. 10B is a cross-sectional view showing the manufacturing method using the
- FIG. 10C is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 4 of the present invention.
- FIG. 10D is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 4 of the present invention.
- FIG. 11A is a cross-sectional view showing a manufacturing method using a damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 4 of the present invention.
- FIG. 11B is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 4 of the present invention.
- FIG. 11C is a cross-sectional view showing the manufacturing method using the damascene process of the main part of the variable resistance nonvolatile memory device according to Embodiment 4 of the present invention.
- FIG. 12A is a cross-sectional view showing a configuration example of the variable resistance nonvolatile memory device according to Embodiment 5 of the present invention.
- FIG. 12B is a cross-sectional view showing a configuration example of the variable resistance nonvolatile memory device according to Embodiment 5 of the present invention.
- FIG. 13A is a cross-sectional view illustrating a configuration example of a conventional general variable resistance nonvolatile memory device.
- FIG. 13B is a cross-sectional view illustrating a configuration example of a conventional general variable resistance nonvolatile memory device.
- variable resistance nonvolatile memory element hereinafter also simply referred to as a nonvolatile memory element
- manufacturing method thereof will be described with reference to the drawings.
- the description with the same reference numerals may be omitted.
- the drawings schematically show each component for easy understanding, and shapes and dimensions are not accurate.
- FIG. 1A and 1B are cross-sectional views showing a configuration example of the nonvolatile memory element 10 according to Embodiment 1 of the present invention.
- the nonvolatile memory element 10 of Embodiment 1 includes a first electrode 101, a second electrode 104, a resistance change layer 102 sandwiched between the two electrodes, and a semiconductor layer 103.
- the resistance change element 105 includes a first electrode 101 and a resistance change layer 102
- the diode element 106 includes a resistance change layer 102, a semiconductor layer 103, and a second electrode 104.
- the resistance change layer 102 of the resistance change element 105 is made of a transition metal oxide made of oxygen-deficient tantalum oxide.
- the oxygen-deficient transition metal oxide is a state where the composition x of oxygen O is stoichiometrically stable when the transition metal is represented by M, oxygen is O, and the transition metal oxide is represented by MO x.
- Ta 2 O 5 is in a stoichiometrically stable state. Therefore, when 0 ⁇ x ⁇ 2.5, it can be said that it is an oxygen-deficient tantalum oxide.
- variable resistance layer composed of the above-mentioned oxygen-deficient tantalum oxide
- the electrical resistance value reversibly changes in response to the application of a predetermined electric pulse having a different polarity, and stable rewriting characteristics are achieved. It is possible to obtain a nonvolatile memory element using the resistance change phenomenon.
- the basic configuration, manufacturing method, and operation characteristics of such a resistance change element are described in detail in, for example, International Publication No. 2008/059701 (Patent Document 3), which is a related patent application.
- the resistance change layer is not limited to the oxygen-deficient tantalum oxide described above, but may be another oxygen-deficient transition metal oxide, such as hafnium oxide or zirconium oxide. Absent.
- hafnium oxide assuming that the composition of the hafnium oxide is HfO x , about 0.9 ⁇ x ⁇ 1.6 is preferable, and when zirconium oxide is used, the composition of the zirconium oxide is In the case of ZrO x , it is preferable that 0.9 ⁇ x ⁇ 1.4.
- the resistance change layer 102 may be formed of a stacked body of the first resistance change layer 102a and the second resistance change layer 102b.
- the first resistance change layer 102a is the first resistance change layer 102a.
- the oxygen content of the first resistance change layer 102a is connected to one electrode 101, and is higher than the oxygen content of the second resistance change layer 102b.
- Patent Document 4 International Publication No. 2008/149484 (Patent Document 4), which is a related patent application, for the manufacturing method and the operation characteristics of the resistance change element when the resistance change layer is formed of such a two-layer laminate. Is described in detail.
- the second variable resistance layer 102b having a low resistance value among the variable resistance layers 102 functions as one electrode of the diode element 106, as shown in FIG. 1B.
- the resistance change element 105 exhibits a resistance change mainly in the first resistance change layer 102 a having a high oxygen content in the resistance change layer 102.
- the first resistance change layer 102a having a high oxygen content exhibits a resistance change by exchanging oxygen with the second resistance change layer 102b.
- the first variable resistance layer 102a is selected according to the resistance change characteristics on the one hand
- the second variable resistance layer 102b is selected according to the diode characteristics on the other hand. You can choose.
- the resistance change layer 102 may further include a third resistance change layer 102c interposed between the first resistance change layer 102a and the second resistance change layer 102b. .
- the oxygen content of the oxygen-deficient transition metal oxide contained in the third resistance change layer 102c is lower than the oxygen content of the oxygen-deficient transition metal oxide contained in the first resistance change layer, And it is higher than the oxygen content of the oxygen-deficient transition metal oxide contained in the second resistance change layer.
- FIG. 1D is a diagram showing endurance characteristics of a nonvolatile memory element in a sample in which the variable resistance layer 102 has a two-layer structure and a sample in which a three-layer structure is formed.
- the horizontal axis indicates the configuration of the resistance change layer.
- the sample shown on the left and center is composed of a first resistance change layer 102a that is a high resistance layer and a second resistance change layer 102b that is an oxygen deficient layer having a lower oxygen content than the high resistance layer. It has a layered structure.
- the sample shown on the right side has a three-layer structure including a first resistance change layer 102a which is a high resistance layer, a second resistance change layer 102b and a third resistance change layer 102c which are oxygen deficient layers.
- the left vertical axis indicates the defect rate (arbitrary unit) of HR defects that do not become high resistance or LR defects that do not become low resistance.
- the right vertical axis represents the pass rate (arbitrary unit) of 100,000 endurance characteristics of a memory cell array composed of a nonvolatile memory element including such a resistance change layer.
- FIG. 1D as data corresponding to the left vertical axis, the LR failure rate (bar graph located on the left) and the HR failure rate (bar graph located on the right) corresponding to the samples shown on the left side, center, and right side, respectively. And are shown in pairs. Also, three black circles are plotted as data corresponding to the right vertical axis.
- the bar graph corresponding to the sample shown on the left and center of FIG. 1D shows that when the resistance of the oxygen deficient layer (first resistance change layer 102a) is lowered in the nonvolatile memory element in which the resistance change layer 102 has a two-layer structure, HR This indicates that there is a trade-off relationship that the number of occurrences of defects increases, and conversely, when the resistivity of the oxygen deficient layer is increased, the number of occurrences of LR defects increases.
- the bar graph and the black circle plot corresponding to the sample shown on the right side in FIG. 1D show that the HR and LR of the HR and LR are formed by making the oxygen deficient layer into two layers, that is, by making the resistance change layer into three layers. Both defects are improved, indicating that the pass rate of the endurance characteristic is improved. That is, by making the resistance change layer 102 have a three-layer structure, a nonvolatile memory element having better endurance characteristics can be obtained.
- each resistance change layer is determined as follows.
- the composition and film thickness of the first resistance change layer 102a are such that a forming operation (operation for electrically forming the first resistance change layer 102a, which is a high resistance layer) is not required, and the oxidation and reduction reactions can be selectively promoted.
- the composition and film thickness are close to stoichiometric composition.
- the composition and film thickness of the first variable resistance layer 102a determine the read current at high resistance.
- composition and film thickness of the third resistance change layer 102c are such that the resistance change layer is stably supplied as an oxygen supply and reception layer to the first resistance change layer 102a as a matrix resistance change layer, and the first resistance change layer 102a
- the composition and film thickness are such that the rapid change in the oxygen concentration profile is alleviated.
- the composition and film thickness of the second variable resistance layer 102b are set to an appropriate composition and film thickness as an electrode of the diode by increasing the read current when the resistance is lowered to widen the read window.
- the oxygen content of the first resistance change layer 102a (first tantalum oxide layer). Is 67.7 atm% or more (when TaO y is expressed, 2.1 ⁇ y), and the oxygen content of the second resistance change layer 102b (second tantalum oxide layer) is 44.4 atm% or more 65 .5 atm% or less (0.8 ⁇ x ⁇ 1.9 when expressed as TaO x ).
- the oxygen content of the third resistance change layer 102c is equal to the oxygen content of the first resistance change layer 102a and the second resistance change.
- the value is intermediate with the oxygen content of the layer 102b.
- the oxygen content of the second variable resistance layer 102b (second tantalum oxide) forms a suitable Schottky barrier between the semiconductor layer 103, as will be described later. It is desirable to be selected as follows.
- the oxygen content rate of the first resistance change layer 102a connected to the first electrode 101 is higher than the oxygen content rate of the second resistance change layer 102b, the first resistance change layer 102a is connected to the first electrode 101. Resistance change due to oxidation and reduction near the interface is likely to occur. As a result, it is possible to obtain the resistance change element 105 having a stable resistance change characteristic with small variations in initial resistance.
- the thickness of the first tantalum oxide layer is preferably 1 nm or more and 10 nm or less.
- a Ta 2 O 5 target When forming a laminated structure of tantalum oxide, a Ta 2 O 5 target was used, and a first tantalum oxide layer 102a (TaO y ) was formed on the first electrode 101 by sputtering in argon gas. After that, a so-called reactive sputtering method using a Ta target and sputtering in an argon gas and an oxygen gas is an oxygen-deficient type on the first tantalum oxide layer 102a and has an oxygen content higher than that of the first tantalum oxide layer. A low second tantalum oxide layer 102b (TaO x ) can be formed.
- first tantalum oxide layer 102a When forming the first tantalum oxide layer 102a (TaO y ), sputtering may be performed in argon gas and oxygen gas.
- the oxygen content of the second tantalum oxide layer 102b (TaO x ) can be changed by appropriately adjusting the oxygen gas flow rate during sputtering.
- the first tantalum oxide layer 102a is formed by first forming a predetermined film thickness by the same method as the second tantalum oxide layer 102b (TaO x ) and then oxidizing the first tantalum with a high oxygen content.
- the oxide layer 102a may be changed, and then the second tantalum oxide layer 102b (TaO x ) may be formed.
- the first resistance change layer 102a having a high oxygen content is formed under the second resistance change layer 102b having a low oxygen content.
- the reverse configuration is simpler, and the first electrode After the second tantalum oxide layer 102b (TaO x ) is formed on the surface 101, the surface thereof may be oxidized using an oxidation treatment such as plasma oxidation.
- transition metal oxide layer was demonstrated in the example comprised by the laminated structure of a tantalum oxide, the laminated structure of a hafnium oxide, the laminated structure of a zirconium oxide etc. may be sufficient, for example.
- the composition of the first hafnium oxide is HfO y and the composition of the second hafnium oxide is HfO x , 0.9 ⁇ x ⁇ 1.6 Then, it is preferable that y is 1.8 ⁇ y and the film thickness of the first hafnium oxide is 3 nm or more and 4 nm or less.
- the composition of the first zirconium oxide is ZrO y and the composition of the second zirconium oxide is ZrO x , 0.9 ⁇ x ⁇ 1.4 It is preferable that y is 1.9 ⁇ y, and the thickness of the first zirconium oxide is 1 nm or more and 5 nm or less.
- the stacked structure of hafnium oxide or zirconium oxide can be formed by the same method as the stacked structure of tantalum oxide.
- the first electrode 101 is made of the first hafnium oxide (HfO y ) and has a thickness of 3 nm to 4 nm.
- a thin film in the following range can be formed.
- the second hafnium oxide layer (HfO x ) has a desired film thickness and an oxygen content of about 0.9 ⁇ x ⁇ 1.6.
- a resistance change layer composed of hafnium oxide having a stacked structure with different oxygen contents can be formed.
- the oxygen content of the second hafnium oxide layer can be easily adjusted by changing the flow rate ratio of the oxygen gas to the argon gas during the reactive sputtering as in the case of the tantalum oxide described above.
- the substrate temperature can be set to room temperature without any particular heating.
- the second hafnium oxide layer is formed in the plasma of argon gas and oxygen gas after the second hafnium oxide layer is formed. It can be formed by exposing the surface of the oxide layer. At this time, the film thickness of the first hafnium oxide layer can be easily adjusted by the exposure time of the argon gas and the oxygen gas to the plasma.
- the first hafnium Stable resistance change characteristics can be realized when the thickness of the oxide layer is in the range of 3 nm to 4 nm.
- the first electrode 101 is composed of the second zirconium oxide (ZrO y ) and has a thickness of 1 nm to 5 nm. Form a thin film of the range.
- a resistance change composed of a zirconium oxide having a laminated structure with different oxygen contents A layer can be formed.
- the oxygen content of the second zirconium oxide layer can be easily adjusted by changing the flow ratio of oxygen gas to argon gas during reactive sputtering, as in the case of the tantalum oxide described above.
- the substrate temperature can be set to room temperature without any particular heating.
- the second zirconium oxide layer is formed, and then the second zirconium oxide is applied to the argon gas and oxygen gas plasma. It can be formed by exposing the surface of the oxide layer. At this time, the film thickness of the first zirconium oxide layer can be easily adjusted by the exposure time of the argon gas and oxygen gas to the plasma.
- composition of the first zirconium oxide layer is expressed as ZrO y and the composition of the second zirconium oxide layer is expressed as ZrO x , 0.9 ⁇ x ⁇ 1.4, 1.9 ⁇ y
- ZrO x the composition of the first zirconium oxide layer
- ZrO x the composition of the second zirconium oxide layer
- the second variable resistance layer 102b having the interface with the semiconductor layer 103 can be formed by heat treatment or the like in the manufacturing process. Oxidation of the semiconductor layer 103 due to diffusion of oxygen from the semiconductor layer 103 to the semiconductor layer 103 can be suppressed.
- the resistance change operation due to oxidation and reduction is preferentially expressed near the interface between the first resistance change layer 102a and the first electrode 101, the resistance change occurs near the interface between the second resistance change layer 102b and the semiconductor layer 103. Since it does not contribute to the operation, the oxygen content in the vicinity of the interface between the second resistance change layer 102b and the semiconductor layer 103 is constant regardless of the resistance change operation.
- the semiconductor layer 103 is positioned on the opposite side of the resistance change layer 102 or the stacked structure of the first resistance change layer 102a and the second resistance change layer 102b with the first electrode 101 interposed therebetween. It can also be regarded as an electrode.
- the variable resistance element includes the first electrode 101, the variable resistance layer 102 (or the stacked structure of the first variable resistance layer 102 a and the second variable resistance layer 102 b), and the semiconductor layer 103.
- the standard electrode potential of platinum or iridium is about 1.2 eV.
- the standard electrode potential is one index of the difficulty of oxidation, and if this value is high, it means that it is difficult to oxidize, and if it is low, it means that it is easily oxidized.
- the greater the difference in the standard electrode potential between the electrode and the metal constituting the resistance change layer the more the oxidation reaction occurs on the resistance change layer side, so the resistance change is more likely to occur. Since change does not easily occur, it is presumed that the resistance of the resistance change layer at the interface between the electrode and the resistance change layer plays a major role in the mechanism of the resistance change phenomenon.
- the standard electrode potential of tantalum is about ⁇ 0.6 eV, which is lower than the standard electrode potential of platinum or iridium
- the first electrode 101 and the resistance change layer 102 made of platinum or iridium. Oxidation and reduction reactions of oxygen-deficient tantalum oxide occur near the interface with oxygen, and oxygen is exchanged in the resistance change layer 102 or between the resistance change layer 102 and the first electrode 101, thereby changing resistance. The phenomenon appears.
- Examples of materials having a higher standard electrode potential than tantalum include platinum, iridium, palladium, copper, and tungsten.
- Nitrogen-deficient silicon nitride is used for the semiconductor layer 103 constituting the diode element 106, and tantalum nitride is used for the second electrode 104.
- the nitrogen-deficient silicon nitride is a composition in which the composition of nitrogen N is less than the stoichiometrically stable state when the silicon nitride is expressed as SiN y (0 ⁇ y).
- Nitride Since Si 3 N 4 is in a stoichiometrically stable state, it can be said that it is a nitrogen-deficient silicon nitride when 0 ⁇ y ⁇ 1.33.
- SiN y When tantalum nitride is used, SiN y exhibits semiconductor characteristics when 0 ⁇ y ⁇ 0.85, and a current (for example, 10 kA / cm 2 or more) that can turn on / off a sufficient voltage / current for resistance change.
- An MSM (Metal-Semiconductor-Metal) diode capable of flowing can be configured.
- the film formation of the nitrogen-deficient silicon nitride for example, a so-called reactive sputtering method is used in which a polycrystalline silicon target is sputtered in a mixed gas atmosphere of argon and nitrogen.
- the pressure is 0.08 to 2 Pa
- the substrate temperature is 20 to 300 ° C.
- the flow rate ratio of nitrogen gas ratio of the flow rate of nitrogen to the total flow rate of argon and nitrogen
- the film forming time is adjusted so that the thickness of the silicon nitride is 5 to 20 nm after setting the DC power to 100 to 1300 W and ⁇ 40%.
- a Schottky barrier is formed at the interface between the semiconductor layer 103 and the second electrode 104.
- a Schottky barrier is also formed at the interface between the resistance change layer 102 (second resistance change layer 102b) and the semiconductor layer 103.
- the diode element 106 functions as a bidirectional MSM diode.
- the electrode material of the MSM diode is preferably tantalum, titanium, tungsten, tantalum nitride, titanium nitride, tungsten nitride, tantalum oxide, or the like.
- the nonvolatile memory element 10 shown in FIG. 1A was actually manufactured, and the current-voltage characteristic (rectification characteristic) obtained by the diode element 106 and the resistance change characteristic obtained by the resistance change element 105 were measured. Is described.
- a non-volatile memory element 10 made of insufficient silicon nitride (SiN y , y 0.30) and tantalum nitride having a film thickness of 50 nm on the second electrode 104 and having an element size of 50 ⁇ m ⁇ 50 ⁇ m was manufactured.
- the variable resistance layer 102 is formed of one layer.
- FIG. 2A is a graph showing the current-voltage characteristics of the diode element 106 of the nonvolatile memory element 10 according to the first embodiment.
- This current-voltage characteristic represents the result of measuring the flowing current while changing the applied voltage every 0.25 V in the range of -3 to 3 V.
- the applied voltage is a voltage applied to the first electrode 101 with the second electrode 104 as a reference.
- the horizontal axis represents the voltage applied to the diode element
- the vertical axis represents the absolute value of the current flowing through the diode element.
- FIG. 2B shows a graph showing the pulse resistance change characteristics of the resistance change element when the resistance change element 105 and the diode element 106 of the nonvolatile memory element 10 according to Embodiment 1 of the present invention are combined. .
- a pulse width of 500 nanoseconds (ns) and a voltage of +2.0 V and ⁇ 1.5 V are alternately applied to the resistance change element 105.
- the resistance value of the variable resistance element was measured while applying an electrical pulse.
- the pulse voltage is applied to the first electrode 101 with reference to the second electrode 104.
- the resistance value becomes about 1 k ⁇ , and when an electric pulse with a voltage of ⁇ 1.5 V is applied, it becomes about 100 ⁇ , indicating a resistance change of about one digit. I understand.
- the resistance change layer 102 functions as a resistance change layer in the resistance change element 105 and functions as an electrode in the diode element 106. It was confirmed that
- the nonvolatile memory element 10 having both diode characteristics and resistance change characteristics functions as a memory cell having a 1D-1R structure.
- each memory cell is composed of a laminated body of a minimum of four layers including the electrodes, and has a simple configuration. Memory is realized.
- the inventors of the present application further examined a suitable composition of the oxygen-deficient tantalum oxide constituting the resistance change layer 102 from the viewpoint of the amount of current that can be passed through the diode element 106 (hereinafter also referred to as current capacity). did.
- the current capacity of the diode element 106 is preferably large in order to supply a large current when the resistance of the variable resistance element 105 changes.
- FIG. 2C is a graph showing measured values of currents flowing through the diode elements when a voltage of 2.5 V is applied between the electrodes of the diode elements.
- a layer of the diode element according to Example 1, Example 2, and Comparative Example is composed of tantalum oxide having a composition of TaO 0.8 , tantalum oxide having a composition of TaO 1.29 , and tantalum nitride, respectively. Yes.
- TaO 0.8 was 2 m ⁇ ⁇ cm
- TaO 1.29 was 6 m ⁇ ⁇ cm
- TaN was 0.2 m ⁇ ⁇ cm. .
- the diode elements of Example 1 and Example 2 in which the A layer is composed of oxygen-deficient tantalum oxide are more than the diode elements in the comparative example in which the A layer is composed of tantalum nitride. It can be seen that the current can flow (that is, the current capacity is large).
- the inventors of the present application presume that the difference between the current capacity of the comparative example and the current capacity of Example 1 and Example 2 is due to the difference in the constituent material of the A layer.
- FIG. 2D is an energy band diagram illustrating an estimation mechanism in which the current capacity of the diode element depends on the electrode material.
- the height of the barrier generated at the interface between the A layer and the semiconductor layer depends on the work function of the material constituting the A layer, and becomes lower as the work function is smaller.
- the height of the barrier generated at the interface between the A layer and the semiconductor layer is higher in the first and second embodiments in which the oxygen-deficient tantalum oxide is used for the A layer.
- the current capacity of Examples 1 and 2 is considered to be larger than that of the comparative example, as shown in FIG. 2C.
- the work function of the oxygen-deficient tantalum oxide TaO x is smaller than the work function of tantalum nitride, 4.6 eV.
- the difference in current capacity between Examples 1 and 2 and the comparative example seen in FIG. 2C is considered to reflect such a difference in the height of the barrier generated at the interface between the A layer and the semiconductor layer.
- transition metal oxides whose work function is smaller than that of TaN for example, titanium oxide, work function 4.0 eV, non-patent document 1: titanium oxide, physical properties and applied technology, Manabu Kiyono, Gihodo Publishing, Alternatively, using hafnium oxide, work function 2.5 eV, Patent Document 5: Japanese Patent Laid-Open No. 2000-68061, etc.
- a layer is also effective for obtaining a diode element having a large current capacity.
- Example 1 and Example 2 in which the A layer is composed of the same oxygen-deficient tantalum oxide is considered to be due to the difference in resistivity of the A layer.
- the oxygen-deficient tantalum oxide of the A layer becomes an insulator if the oxygen content is too high, and drastically reduces the current capacity of the diode element.
- the tantalum oxide TaO 1.29 of Example 2 is an example of a preferable upper limit of the oxygen content that can provide a larger current capacity than the comparative example.
- the oxygen-deficient tantalum oxide of the A layer impairs the resistance change characteristics of the resistance change element if the oxygen content is too small.
- the tantalum oxide TaO 0.80 of Example 1 in the result of the experiment shown in FIG. 2C is an example of a preferable lower limit of the oxygen content at which resistance change characteristics can be obtained.
- variable resistance nonvolatile memory device using the nonvolatile memory element 10 according to the first embodiment of the present invention as individual memory cells will be described.
- FIG. 3A and 3B are cross-sectional views showing a configuration example of the nonvolatile memory device 20 according to Embodiment 2 of the present invention.
- FIG. 3C is a plan view showing a configuration example of the nonvolatile memory device 20 according to Embodiment 2 of the present invention. 3C corresponds to FIG. 3A, and a cross-sectional view of the alternate long and short dash line indicated by B in FIG. 3C is viewed in the direction of the arrow. The figure corresponds to FIG. 3B. As shown in the plan view of FIG.
- a plurality of first electrodes 111 formed in a stripe shape parallel to each other and a plurality of semiconductor layers 116 formed in a stripe shape parallel to each other.
- the memory cell 113 is formed at a position where the stacked body constituted by the second electrode 117 intersects.
- a portion called a memory cell array or a memory main body in a general semiconductor memory device is shown as a nonvolatile memory device 20.
- the nonvolatile memory device 20 may further include a drive circuit for driving the memory cell array together with such a memory cell array.
- the nonvolatile memory device 20 changes the resistance state of a desired memory cell 113 by supplying an electric pulse for writing data from the driving circuit to the memory cell array, and supplies an electric pulse for reading data from the driving circuit to the memory cell array. As a result, the desired resistance state of the memory cell 113 can be read out.
- the nonvolatile memory device 20 is formed on the substrate 110 on which the first electrode 111 is formed, and on the substrate 110 so as to cover the first electrode 111.
- the resistance change layer 114 is embedded in a memory cell hole formed so as to penetrate the first interlayer insulating layer 112 to the first electrode 111.
- a second interlayer insulating layer 115 made of silicon oxide is formed on the first interlayer insulating layer 112, and on the bottom and side walls of the wiring trench formed in the second interlayer insulating layer 115, A semiconductor layer 116 is formed so as to cover the resistance change layer 114, and a second electrode 117 is formed so as to cover at least the semiconductor layer 116 on the resistance change layer 114.
- the resistance change element includes a first electrode 111 and a resistance change layer 114
- the diode element includes a resistance change layer 114, a semiconductor layer 116, and a second electrode 117.
- the memory cell 113 includes a resistance change element and a diode element.
- a lower layer wiring composed of the first electrode 111, and an upper layer wiring composed of the semiconductor layer 116, the second electrode 117, and the lead-out wiring 118 And have a stripe shape and are orthogonal to each other.
- a resistance change element and a diode element as the memory cell 113 are formed at the intersection.
- the lower layer wiring and the upper layer wiring are assumed to be orthogonal to each other. However, they are not necessarily orthogonal to each other, and may be arranged to intersect each other. The same applies to the third to fifth embodiments described below.
- the upper layer wiring including the lead wiring 118 extends to the outside of the area where the memory cells 113 are formed in a matrix, and is connected to the circuit connection wiring 120 via the lead contact 119. It is connected to a drive circuit (not shown) (a circuit formed on the substrate 110 and generally composed of elements necessary for a memory circuit such as a DRAM).
- the lead contact 119 and the lead wiring 118 may be formed integrally.
- the bidirectional diode including the semiconductor layer 116 sandwiched between the resistance change layer 114 and the second electrode 117 is provided. It can be formed on the memory cell hole. Therefore, it is possible to realize a nonvolatile memory device capable of high capacity and high integration without providing a switching element such as a transistor.
- the resistance change layer 114 made of tantalum oxide is formed in the memory cell hole, the manufacturing method becomes easier as compared with the case where a stacked structure of a plurality of materials is provided in the memory cell hole. The manufacturing process and cost can also be reduced. In addition, the thickness of the resistance change layer 114 that greatly affects the memory characteristics can be easily controlled, and stable memory characteristics can be obtained.
- the contact area between the second electrode 117 and the semiconductor layer 116 is larger than the contact area between the resistance change layer 114 and the semiconductor layer 116, so that the electric lines of force extend around the second electrode 117.
- the current driving capability can be increased.
- the second electrode 117 made of tantalum nitride also functions as a barrier layer of the lead wiring 118 made of copper. Note that representative examples of other components of the nonvolatile memory device 20 are the same as those of the nonvolatile memory element 10, and thus description thereof is omitted.
- FIGS. 5A to 5D are cross-sectional views illustrating a manufacturing method for forming a memory cell using a damascene process of a main part of the nonvolatile memory device 20 according to the second embodiment. The manufacturing method is demonstrated using these.
- a first electrode 111 made of a noble metal material such as platinum is formed on a substrate 110 on which transistors, lower layer wirings, and the like are formed using a desired mask.
- a first interlayer insulating layer 112 made of silicon oxide is formed on the entire surface so as to cover the first electrode 111, and then penetrate the first interlayer insulating layer 112. Then, an opening (memory cell hole) 113a connected to the first electrode 111 is formed.
- a resistance change layer 114 made of oxygen-deficient tantalum oxide is formed in the memory cell hole 113a.
- so-called reactive sputtering in which a tantalum target is sputtered in a mixed gas atmosphere of argon and oxygen, was used.
- Oxygen-deficient tantalum oxide is formed by sputtering until the memory cell hole 113a is completely filled, and then unnecessary tantalum oxide on the first interlayer insulating layer 112 is removed by CMP, and the memory is removed.
- a resistance change layer 114 is formed in the cell hole 113a.
- a second interlayer insulating layer 115 (thickness 100 to 400 nm) made of silicon oxide is formed on the first interlayer insulating layer 112, and the subsequent extraction wiring 118 is formed.
- the wiring trench 121 for embedding is embedded with a desired mask. At this time, the resistance change layer 114 is exposed at the bottom of the wiring trench 121.
- a semiconductor thin film 116a made of nitrogen-deficient silicon nitride is formed on the entire surface including the wiring trench 121 where the resistance change layer 114 is exposed.
- the semiconductor thin film 116a was formed by reactive sputtering in which a silicon target was sputtered in an argon and nitrogen gas atmosphere. Its nitrogen content is 20 to 40 atm%.
- an opening (contact hole) 119a that penetrates through the first interlayer insulating layer 112 and the semiconductor thin film 116a formed in the wiring trench 121 and is connected to the first electrode 111 is formed.
- a second electrode layer 117a made of tantalum nitride is formed on the entire surface by covering the semiconductor thin film 116a and the contact hole 119a on the wiring trench 121 and the second interlayer insulating layer 115. Further, the lead wiring layer 118a made of copper is formed so as to completely fill the wiring trench 121 and the contact hole 119a.
- the resistance change element includes the first electrode 111 and the resistance change layer 114, and the resistance change operation can be performed on the interface region of the first electrode 111. By stabilizing, stable memory characteristics can be obtained.
- the diode element includes the variable resistance layer 114, the semiconductor layer 116, and the second electrode 117, and a bidirectional diode can be formed on the memory cell. Therefore, a switching element such as a transistor is arranged on the substrate. There is no need. As described above, a variable resistance nonvolatile memory device that can be integrated with a large capacity with a hole-buried structure suitable for miniaturization can be realized.
- the resistance change layer 114 is formed in the memory cell hole 113a, it is easy to form the memory cell 113 using an etching process. It is also possible.
- 6A to 6E are cross-sectional views showing a manufacturing method for forming a memory cell using such an etching process. The manufacturing method is demonstrated using these.
- a first electrode 111 made of a noble metal material such as platinum is formed on a substrate 110 on which transistors, lower layer wirings, and the like are formed using a desired mask.
- variable resistance layer 114 is formed in a pillar shape on the first electrode 111 using an etching process using a desired mask.
- the resistance change layer 114 is formed in the memory cell region on the first electrode 111.
- a first interlayer insulating layer 112 made of silicon oxide is formed on the entire surface so as to cover the first electrode 111 and the resistance change layer 114.
- the first interlayer insulating layer 112 is patterned with a desired mask in a wiring groove 121 for embedding a subsequent extraction wiring 118 and the like. At this time, the resistance change layer 114 is exposed at the bottom of the wiring trench 121.
- the resistance change layer is embedded in the memory cell hole having a high aspect ratio (small opening and deep) according to the above manufacturing method (FIGS. 4A to 4D)
- the memory cell hole is sufficiently filled with the resistance change layer.
- the upper opening of the memory cell hole is previously blocked by the resistance change material formed in an overhang shape.
- FIGS. 7A and 7B are cross-sectional views showing a configuration example of the nonvolatile memory device 30 according to Embodiment 3 of the present invention.
- the nonvolatile memory device 30 according to the third embodiment of the present invention has substantially the same structure as the nonvolatile memory device 20 according to the second embodiment of the present invention, but the resistance change layer 114 constituting the memory cell is the first.
- the first resistance change layer 114a is connected to the first electrode 111, and the oxygen content of the first resistance change layer 114a is the second resistance. It is characterized by being higher than the oxygen content of the change layer 114b.
- FIG. 7A shows a configuration example of the nonvolatile memory device 30 according to the third embodiment of the present invention when a memory cell is formed using a damascene process
- FIG. 7B shows a configuration example when a memory cell is formed using an etching process. Indicates.
- the variable resistance element includes the first electrode 111 and the variable resistance layer 114 including the first variable resistance layer 114a and the second variable resistance layer 114b.
- the oxygen content of the first variable resistance layer 114a in the vicinity of the first electrode 111 is easily developed.
- a memory cell having good resistance change characteristics that can be driven at a low voltage can be obtained.
- the oxygen content in the second resistance change layer 114b in the vicinity of the interface with the semiconductor layer 116 is low. Since there is no change in the oxygen concentration, stable diode characteristics that do not depend on the resistance change operation can be obtained at the interface between the resistance change layer 114 and the semiconductor layer 116.
- 8A to 8E are cross-sectional views showing a manufacturing method using the damascene process of the main part of the nonvolatile memory device 30 according to Embodiment 3 of FIG. 7A. The manufacturing method is demonstrated using these.
- a first electrode 111 made of a noble metal material such as platinum is formed on a substrate 110 on which transistors, lower layer wirings, and the like are formed using a desired mask.
- a first interlayer insulating layer 112 made of silicon oxide is formed on the entire surface so as to cover the first electrode 111, and then penetrate through the first interlayer insulating layer 112. Then, an opening (memory cell hole) 113a connected to the first electrode 111 is formed.
- tantalum oxide is formed on the bottom and side walls of the memory cell hole 113a and the first interlayer insulating layer 112 by reactive sputtering in which a tantalum target is sputtered in an argon and oxygen gas atmosphere. Form a film. Thereafter, unnecessary tantalum oxide on the first interlayer insulating layer 112 is removed by CMP. As a result, the first resistance change layer 114a is formed on the bottom and side walls in the memory cell hole 113a. In the reactive sputtering method, the oxygen content can be increased by increasing the oxygen flow rate during film formation.
- the oxygen content is about 71 atm% under the conditions of argon 34 sccm, oxygen 24 sccm, and power 1.6 kW.
- One resistance change layer 114a is formed. Further, the first variable resistance layer 114a may be formed using a Ta 2 O 5 target.
- tantalum oxidation of the second resistance change layer 114b having a lower oxygen content than the first resistance change layer 114a is formed inside the memory cell hole having the first resistance change layer 114a formed on the surface.
- This formation is performed by reactive sputtering in the same manner as the first variable resistance layer 114a.
- Film formation is performed by sputtering until the inside of the memory cell hole 113a is completely filled, and then unnecessary tantalum oxide on the first interlayer insulating layer 112 is removed by CMP.
- the second resistance change layer 114b is formed in the memory cell hole 113a.
- the second resistance change layer 114b having an oxygen content of about 58 atm% is formed under the conditions of argon 34 sccm, oxygen 20.5 sccm, and power 1.6 kW.
- the first variable resistance layer 114a is first formed on the bottom and side walls of the memory cell hole 113a, and then the second variable resistance layer 114b is embedded in the memory cell hole 113a.
- the resistance change layer 114a and the second resistance change layer 114b are formed on the same or different materials.
- unnecessary tantalum oxide on the first interlayer insulating layer 112 is removed by CMP.
- the resistance change layer 114 may be embedded in the memory cell hole 113a.
- the resistance change layer 114 is deposited on the entire wafer surface including the inside of the memory cell hole 113a that has already been formed. Thereafter, the unnecessary variable resistance layer 114 outside the memory cell hole 113a is simply removed by CMP to complete the patterning of the variable resistance layer 114. Therefore, since an etching process is not required, dry etching, in which damage due to reaction with the etching gas of the resistance change layer 114, damage due to oxygen reduction during etching, damage due to charge-up during etching, and the like is a concern in principle. Thus, the resistance change layer 114 can be formed.
- the resistance change element includes the first electrode 111, the first resistance change layer 114a, and the second resistance change layer 114b, and in the interface region of the first electrode 111.
- the resistance can be changed reliably.
- the second variable resistance layer 114b having a low oxygen content is formed in the vicinity of the interface with the semiconductor layer 116, oxidation of the semiconductor layer 116 due to heat treatment or the like in the manufacturing process can be suppressed, so that stable resistance change characteristics and Diode characteristics can be obtained.
- FIGS. 9A and 9B are diagrams illustrating the configuration of the nonvolatile memory device 40 according to the fourth embodiment of the present invention.
- the nonvolatile memory device 40 according to the present embodiment has a structure that is substantially vertically inverted from the configuration of the nonvolatile memory device 20 according to the second embodiment of the present invention.
- a feature is that an electrode 117 and a semiconductor layer 116 are formed.
- the semiconductor layer 116 can be formed on the second electrode 117 having a smooth surface compared to the bottom surface of the wiring groove connected to the memory cell 113. Therefore, even if the thickness of the semiconductor layer 116 is reduced in order to increase the current density that can be passed through the diode element, a dense and continuous film can be obtained. Further, even in this configuration, since the semiconductor layer 116 has a shape larger in the horizontal direction than the memory cell 113, the second electrode 117 and the resistance change layer 114 do not leak due to contact. Furthermore, since the semiconductor layer 116 is also disposed outside the resistance change layer 114, the current path flowing through the diode element is formed to extend outside the area of the resistance change layer. Therefore, it is possible to obtain a diode element having a large current capacity and a small variation in characteristics as compared with the prior art.
- the resistance change layer 114 is formed of a two-layered structure of the first resistance change layer 114a and the second resistance change layer 114b, and the first resistance change layer 114a is The oxygen content of the first resistance change layer 114a is connected to the first electrode 111 and is higher than the oxygen content of the second resistance change layer 114b.
- the resistance change layer 114 by designing the resistance change layer 114 to have a high oxygen content in the vicinity of the interface with the first electrode 111, resistance change due to oxidation and reduction at the interface with the first electrode can be easily expressed.
- a memory cell having good resistance change characteristics that can be driven by a voltage can be obtained.
- FIGS. 11A to 11C are cross-sectional views showing a manufacturing method for forming memory cells using a damascene process in the main part in the nonvolatile memory device 40 of the fourth embodiment shown in FIG. 9B. It is. The manufacturing method is demonstrated using these.
- a second electrode 117 made of tantalum nitride and a nitrogen-deficient silicon nitride are formed on a substrate 110 on which transistors, lower wirings, and the like are formed using a desired mask.
- a semiconductor layer 116 is formed. Since the second electrode 117 is also required to have a function as a wiring (low resistivity), the second electrode 117 may have a laminated structure of a low resistivity material such as copper in the lower layer and a tantalum nitride in the upper layer.
- the first interlayer insulating layer 112 made of silicon oxide is formed on the entire surface by covering the second electrode 117 and the semiconductor layer 116, and then the first interlayer insulating layer.
- a second variable resistance layer 114b made of tantalum oxide having a low oxygen content is formed in the memory cell hole 113b.
- a film is formed by sputtering until the memory cell hole 113b is completely filled, and then unnecessary tantalum oxide on the first interlayer insulating layer 112 is removed by CMP.
- the second resistance change layer 114b is formed in the memory cell hole 113b.
- a part of the surface layer of the second variable resistance layer 114b is oxidized by plasma oxidation or thermal oxidation to form a first variable resistance layer 114a having a high oxygen content.
- a second interlayer insulating layer 115 (film thickness: 100 to 300 nm) made of silicon oxide is formed on the first interlayer insulating layer 112, and a lead wiring 118 described later is formed.
- the wiring trench 121 for embedding is embedded with a desired mask.
- the first resistance change layer 114 a is exposed at the bottom of the wiring trench 121.
- a part of the surface of the second resistance change layer 114b is oxidized by plasma oxidation treatment or thermal oxidation treatment to form the first resistance change layer 114a having a high oxygen content. It may be formed.
- an opening (contact hole) 119 a that penetrates the first interlayer insulating layer 112 and the semiconductor layer 116 and is connected to the second electrode 117 is formed.
- the first electrode layer 111a which covers the entire surface of the wiring trench 121, the second interlayer insulating layer 115, and the contact hole 119a and is entirely made of a noble metal material such as platinum,
- a lead wiring layer 118a made of copper or the like is formed so as to completely fill the wiring trench 121 and the contact hole 119a.
- the diode element is constituted by the second electrode 117, the semiconductor layer 116, and the resistance change layer 114, and a bidirectional diode can be formed below the memory cell.
- the variable resistance element includes a variable resistance layer 114 and a first electrode 111.
- the surface of the variable resistance layer 114 embedded in the memory cell hole 113a is subjected to oxygen oxidation using plasma oxidation treatment or thermal oxidation treatment. Since the high film thickness of the first resistance change layer 114a can be formed with good controllability, the resistance change can be surely performed in the interface region of the first electrode 111, and the resistance changing polarity is always stable. Stable memory characteristics can be obtained.
- a variable resistance nonvolatile memory device capable of high capacity and high integration with a hole-embedded type suitable for miniaturization can be manufactured.
- FIG. 5 is cross-sectional views showing a configuration example of the variable resistance nonvolatile memory device 50 according to Embodiment 5 of the present invention.
- the electrode formed on the upper layer side of the memory cell 113 is embedded in the second interlayer insulating layer 115 by using a damascene process.
- the nonvolatile memory device 50 according to No. 5 is characterized in that the semiconductor layer 116 and the second electrode 117 or the first electrode 111 formed on the upper layer side of the memory cell 113 are formed using an etching process.
- Such a configuration is effective when a material that is difficult to be formed by the process of CMP after embedding is used for the semiconductor layer 116, the second electrode 117, or the first electrode 111.
- a material that is difficult to be formed by the process of CMP after embedding is used for the semiconductor layer 116, the second electrode 117, or the first electrode 111.
- SiC or ZnO is used for the semiconductor layer
- a noble metal such as Pt
- an electrode formed on the upper portion of the memory cell 113 is also required to have a function as a wiring (low resistivity)
- an upper wiring made of a material having low resistivity such as copper or tungsten is formed on the electrode.
- the layer 122 may be formed.
- the method for forming the electrode and the upper wiring layer 122 on the first interlayer insulating layer 112 by using an etching process can be easily formed through a general exposure process and an etching process, and thus will be omitted.
- the technical feature of the present invention is that in a variable resistance nonvolatile memory element in which a variable resistance element and a diode element are electrically connected in series, Has found a suitable configuration for using the variable resistance layer provided as one component layer of the variable resistance element also as an electrode of the diode element, and based on the knowledge, a minimum of four layers including the electrode is also included. This is to realize a variable resistance nonvolatile memory element.
- the transition metal oxide as the resistance change layer has been described with respect to tantalum oxide, hafnium oxide, and zirconium oxide. However, the transition metal oxide layer sandwiched between the upper and lower electrodes.
- an oxide layer of tantalum, hafnium, zirconium, or the like may be included, and in addition to this, for example, a trace amount of other elements may be included. It is also possible to intentionally include a small amount of other elements by fine adjustment of the resistance value, and such a case is also included in the scope of the present invention. For example, if nitrogen is added to the resistance change layer, the resistance value of the resistance change layer increases and the reactivity of resistance change can be improved.
- the resistance change layer is set to MO x (where the configuration of the transition metal oxide in the stoichiometric configuration is MO s .
- MO x where the configuration of the transition metal oxide in the stoichiometric configuration is MO s .
- a second region containing a second oxygen-deficient transition metal oxide, the first region and the second region include a transition metal oxide having a corresponding composition. It does not preclude containing a predetermined impurity (for example, an additive for adjusting the resistance value).
- an unintended trace element may be mixed into the resistive film due to residual gas or outgassing from the vacuum vessel wall. Naturally, it is also included in the scope of the present invention when mixed into the film.
- variable resistance nonvolatile memory devices using such variable resistance nonvolatile memory elements as memory cells have been described.
- present invention is not limited to this.
- variable resistance layer is also used as an electrode of a diode element.
- the present invention provides a variable resistance nonvolatile memory device structure suitable for miniaturization and a method of manufacturing the same, and can realize a nonvolatile memory having an extremely large memory capacity. It is useful in the field of various electronic devices using.
- Nonvolatile memory element 20 30, 40, 50 Nonvolatile memory device 60
- Nonvolatile semiconductor memory device 70 Resistive memory element 101 1st electrode 102 Resistance change layer 102a 1st resistance change layer (1st tantalum oxide layer) 102b Second variable resistance layer (second tantalum oxide layer) 102c Third variable resistance layer (third tantalum oxide layer) DESCRIPTION OF SYMBOLS 103
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Abstract
Description
図1A及び図1Bは、本発明の実施の形態1に係る不揮発性記憶素子10の構成例を示した断面図である。
図3A及び図3Bは、本発明の実施の形態2に係る不揮発性記憶装置20の構成例を示した断面図である。また、図3Cは、本発明の実施の形態2の不揮発性記憶装置20の構成例を示す平面図である。図3C中のAで示された1点鎖線の断面を矢印方向に見た断面図が図3Aに相当し、図3C中のBで示された1点鎖線の断面を矢印方向に見た断面図が図3Bに相当する。図3Cの平面図に示すように、本実施の形態2では、互いに平行してストライプ形状に形成された複数の第1電極111と、互いに平行してストライプ形状に形成された複数の半導体層116及び第2電極117で構成される積層体とが交差する位置にメモリセル113が形成されている。
図7A及び図7Bは、本発明の実施の形態3の不揮発性記憶装置30の構成例を示した断面図である。本発明の実施の形態3の不揮発性記憶装置30は、本発明の実施の形態2の不揮発性記憶装置20とほぼ同様の構造となっているが、メモリセルを構成する抵抗変化層114が第1抵抗変化層114aと第2抵抗変化層114bの2層の積層体からなり、第1抵抗変化層114aが第1電極111と接続され、第1抵抗変化層114aの酸素含有率が第2抵抗変化層114bの酸素含有率よりも高いことが特徴である。
図9A及び図9Bは、本発明の第4の実施の形態に係る不揮発性記憶装置40の構成を説明する図である。本実施の形態の不揮発性記憶装置40は、本発明の第2の実施の形態に係る不揮発性記憶装置20の構成をほぼ上下反転した構造になっており、メモリセル113の下側に第2電極117及び半導体層116を形成することが特徴である。
図12A及び図12Bは、本発明の実施の形態5に係る抵抗変化型の不揮発性記憶装置50の構成例を示した断面図である。
20、30、40、50 不揮発性記憶装置
60 不揮発性半導体記憶装置
70 抵抗性メモリ素子
101 第1電極
102 抵抗変化層
102a 第1抵抗変化層(第1のタンタル酸化物層)
102b 第2抵抗変化層(第2のタンタル酸化物層)
102c 第3抵抗変化層(第3のタンタル酸化物層)
103 半導体層
104 第2電極
105 抵抗変化素子
106 ダイオード素子
110 基板
111 第1電極
111a 第1電極層
112 第1の層間絶縁層
113 メモリセル
113a、113b メモリセルホール
114 抵抗変化層
114a 第1抵抗変化層
114b 第2抵抗変化層
115 第2の層間絶縁層
116 半導体層
116a 半導体薄膜
117 第2電極
117a 第2電極層
118 引き出し配線
118a 引き出し配線層
119 引き出しコンタクト
119a コンタクトホール
120 回路接続配線
121 配線溝
122 上層配線層
210 ビット線
220 ワード線
230 抵抗変化層
240 上部電極
250 下部電極
260 抵抗変化素子
270 非線形素子
280 メモリセル
D1 第1ダイオード
E1 第1電極
E2 第2電極
M1 中間電極
R1 抵抗変化層
S1 第1構造体
S2 第2構造体
Claims (14)
- 金属を主成分とする材料で構成された第1電極と、
前記第1電極に厚さ方向に隣接して配置され、極性が異なる所定の電気パルスの印加に応じて抵抗値が可逆的に変化する抵抗変化層と、
前記抵抗変化層に厚さ方向に隣接して配置され、窒素不足型シリコン窒化物を主成分とする材料で構成された半導体層と、
前記半導体層に厚さ方向に隣接して配置された第2電極と、を備え、
前記抵抗変化層が、第1抵抗変化層と第2抵抗変化層との積層体で構成され、前記第1抵抗変化層が前記第1電極に隣接し、前記第1抵抗変化層及び前記第2抵抗変化層は酸素不足型遷移金属酸化物を主成分とする材料で構成され、前記第1抵抗変化層の酸素含有率は前記第2抵抗変化層の酸素含有率よりも高く、
前記抵抗変化層、前記半導体層及び前記第2電極で構成される積層体が双方向ダイオードとして機能する
抵抗変化型不揮発性記憶素子。 - 前記抵抗変化層は、さらに、前記第1抵抗変化層と前記第2抵抗変化層との間に介在された第3抵抗変化層を有し、
前記第3抵抗変化層に含まれる酸素不足型遷移金属酸化物の酸素含有率は、前記第1抵抗変化層に含まれる酸素不足型遷移金属酸化物の酸素含有率よりも低く、かつ前記第2抵抗変化層に含まれる酸素不足型遷移金属酸化物の酸素含有率よりも高い
請求項1に記載の抵抗変化型不揮発性記憶素子。 - 前記抵抗変化層が酸素不足型タンタル酸化物を主成分とする材料で構成される
請求項1または請求項2に記載の抵抗変化型不揮発性記憶素子。 - 前記第2抵抗変化層に含まれる酸素不足型タンタル酸化物はTaOy(0<y≦1.29)なる組成を有する
請求項3に記載の抵抗変化型不揮発性記憶素子。 - 前記第2抵抗変化層に含まれる酸素不足型タンタル酸化物はTaOy(0.8≦y≦1.29)なる組成を有する
請求項4に記載の抵抗変化型不揮発性記憶素子。 - 前記第1電極を構成する金属の標準電極電位が、前記第1抵抗変化層を構成する遷移金属の標準電極電位より高い
請求項1に記載の抵抗変化型不揮発性記憶素子。 - 前記第1電極は、白金、イリジウム、パラジウム、銅、及びタングステンのいずれかの金属、もしくはこれらの金属の組み合わせ及び合金から構成され、前記第2電極は、タンタル窒化物、チタン窒化物、及びタングステンのいずれかの金属、もしくはこれらの金属の組み合わせから構成される
請求項6に記載の抵抗変化型不揮発性記憶素子。 - 前記第2抵抗変化層は、前記半導体層の仕事関数よりも高い仕事関数を有する材料を用いる
請求項2に記載の抵抗変化型不揮発性記憶素子。 - 前記第2電極には、前記半導体層よりも高い仕事関数を有する材料を用いる
請求項7に記載の抵抗変化型不揮発性記憶素子。 - 第1方向に延設された複数の第1配線と、
前記第1方向と交差する第2方向に延設された複数の第2配線と、
前記第1配線と前記第2配線との各交差点に設けられた複数のメモリセルと、を備え、
各前記複数のメモリセルは、請求項1から請求項9の何れかに記載の抵抗変化型不揮発性記憶素子からなり、
前記第1配線は複数の前記抵抗変化型不揮発性記憶素子の第1電極が連結されてなり、
前記第2配線は複数の前記抵抗変化型不揮発性記憶素子の第2電極が連結されてなる
抵抗変化型不揮発性記憶装置。 - 第1電極を形成する工程と、
前記第1電極上に層間絶縁層を形成する工程と、
前記層間絶縁層におけるメモリセル用の領域に、前記第1電極に到達する開口を形成する工程と、
前記開口内に、前記第1電極に接続される抵抗変化層を形成する工程と、
前記抵抗変化層を被覆する半導体層を形成する工程と、
前記半導体層の少なくとも前記抵抗変化層上の部分を被覆する第2電極を形成する工程と
を含む抵抗変化型不揮発性記憶素子の製造方法。 - 第1電極を形成する工程と、
前記第1電極上におけるメモリセル用の領域に抵抗変化層を形成する工程と、
前記第1電極及び前記抵抗変化層を被覆する層間絶縁層を形成する工程と、
前記層間絶縁層の表面に、深さ方向に前記抵抗変化層まで到達する溝を形成する工程と、
前記溝から露出した前記抵抗変化層を被覆する半導体層を形成する工程と、
前記半導体層の少なくとも前記抵抗変化層上の部分を被覆する第2電極を形成する工程と
を含む抵抗変化型不揮発性記憶素子の製造方法。 - 第2電極を形成する工程と、
前記第2電極上に半導体層を形成する工程と、
前記第2電極及び前記半導体層を被覆する層間絶縁層を形成する工程と、
前記層間絶縁層におけるメモリセル用の領域に、前記半導体層に到達する開口を形成する工程と、
前記開口内に、前記半導体層に接続する抵抗変化層を形成する工程と、
前記抵抗変化層を被覆する第1電極を形成する工程と
を含む抵抗変化型不揮発性記憶素子の製造方法。 - 第2電極を形成する工程と、
前記第2電極上に半導体層を形成する工程と、
前記半導体層上におけるメモリセル用の領域に抵抗変化層を形成する工程と、
前記第2電極、前記半導体層及び前記抵抗変化層を被覆する層間絶縁層を形成する工程と、
前記層間絶縁層の表面に、深さ方向に前記抵抗変化層まで到達する溝を形成する工程と、
前記溝から露出した前記抵抗変化層を被覆する第1電極を形成する工程と
を含む抵抗変化型不揮発性記憶素子の製造方法。
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US13/499,961 US20120193600A1 (en) | 2010-07-02 | 2011-07-01 | Variable resistance nonvolatile memory element, method of manufacturing the same, and variable resistance nonvolatile memory device |
JP2011554300A JP4948688B2 (ja) | 2010-07-02 | 2011-07-01 | 抵抗変化型不揮発性記憶素子、抵抗変化型不揮発性記憶装置及び抵抗変化型不揮発性記憶素子の製造方法 |
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WO2014011596A1 (en) * | 2012-07-12 | 2014-01-16 | Applied Materials, Inc. | Methods for depositing oxygen deficient metal films |
CN103681727A (zh) * | 2012-09-17 | 2014-03-26 | 复旦大学 | 双层结构电阻型存储器及其制备方法 |
JP2014067845A (ja) * | 2012-09-26 | 2014-04-17 | Institute Of National Colleges Of Technology Japan | 傾斜機能膜及びその製造方法 |
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US8866121B2 (en) | 2011-07-29 | 2014-10-21 | Sandisk 3D Llc | Current-limiting layer and a current-reducing layer in a memory device |
US8659001B2 (en) * | 2011-09-01 | 2014-02-25 | Sandisk 3D Llc | Defect gradient to boost nonvolatile memory performance |
US8546275B2 (en) * | 2011-09-19 | 2013-10-01 | Intermolecular, Inc. | Atomic layer deposition of hafnium and zirconium oxides for memory applications |
US8698119B2 (en) | 2012-01-19 | 2014-04-15 | Sandisk 3D Llc | Nonvolatile memory device using a tunnel oxide as a current limiter element |
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