WO2011111436A1 - ゲルマニウム発光素子 - Google Patents
ゲルマニウム発光素子 Download PDFInfo
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- WO2011111436A1 WO2011111436A1 PCT/JP2011/051806 JP2011051806W WO2011111436A1 WO 2011111436 A1 WO2011111436 A1 WO 2011111436A1 JP 2011051806 W JP2011051806 W JP 2011051806W WO 2011111436 A1 WO2011111436 A1 WO 2011111436A1
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- light emitting
- germanium
- silicon
- light
- emitting device
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- 229910052732 germanium Inorganic materials 0.000 title claims abstract description 287
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 title claims abstract description 287
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 134
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 91
- 239000010703 silicon Substances 0.000 claims abstract description 91
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 67
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 67
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 91
- 230000003287 optical effect Effects 0.000 claims description 40
- 239000000758 substrate Substances 0.000 claims description 38
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 23
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 23
- 239000012535 impurity Substances 0.000 claims description 22
- 239000013078 crystal Substances 0.000 claims description 17
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 11
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 11
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 8
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 6
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- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims 2
- -1 Ta 2 O 5 Inorganic materials 0.000 claims 2
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- YBMRDBCBODYGJE-UHFFFAOYSA-N germanium dioxide Chemical compound O=[Ge]=O YBMRDBCBODYGJE-UHFFFAOYSA-N 0.000 description 6
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- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
- H01S5/3223—IV compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/34—Materials of the light emitting region containing only elements of Group IV of the Periodic Table
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
- H01S5/0207—Substrates having a special shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
- H01S5/021—Silicon based substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
- H01S5/0421—Electrical excitation ; Circuits therefor characterised by the semiconducting contacting layers
- H01S5/0422—Electrical excitation ; Circuits therefor characterised by the semiconducting contacting layers with n- and p-contacts on the same side of the active layer
- H01S5/0424—Electrical excitation ; Circuits therefor characterised by the semiconducting contacting layers with n- and p-contacts on the same side of the active layer lateral current injection
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
- H01S5/0425—Electrodes, e.g. characterised by the structure
- H01S5/04256—Electrodes, e.g. characterised by the structure characterised by the configuration
- H01S5/04257—Electrodes, e.g. characterised by the structure characterised by the configuration having positive and negative electrodes on the same side of the substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/12—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region the resonator having a periodic structure, e.g. in distributed feedback [DFB] lasers
- H01S5/1231—Grating growth or overgrowth details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
- H01S5/4025—Array arrangements, e.g. constituted by discrete laser diodes or laser bar
- H01S5/4031—Edge-emitting structures
Definitions
- the present invention relates to a light-emitting element using germanium, and more particularly to a germanium laser diode and a method for manufacturing the same.
- Laser diodes using compound semiconductors such as III-V and II-VI groups are used for transmission and reception of light in this optical communication.
- LSI Large Scale Integration, abbreviated large scale integrated circuits
- CMOS Complementary Metal-Oxide-Semiconductor, complementary MOS transistors
- silicon photonics The most challenging issue in silicon photonics is the light source. This is because silicon and germanium in a bulk state are indirect transition semiconductors and thus have extremely low luminous efficiency. In view of this, a method has been proposed in which silicon or germanium is directly transformed into a transition semiconductor in order to emit light with high efficiency.
- Non-Patent Document 1 reports that germanium is directly transformed into a transition semiconductor by applying an extension strain of about 2 GPa.
- Patent Document 2 (Special Table 2005-530360) discloses a method in which germanium is directly epitaxially grown on silicon, and elongation strain is applied to germanium by utilizing a difference in thermal expansion coefficient between silicon and germanium. It is disclosed.
- the energy gap is as small as 0.136 eV at the L point, which is the bottom of the conduction band of germanium, and the ⁇ point, which is the energy of direct transition, the ⁇ point can be obtained by injecting carriers at a high density even if the direct transition is not achieved.
- Patent Document 3 (Special Table 2009-514231), germanium with 0.25% tensile strain applied is epitaxially grown on silicon, and light is emitted by injecting high-concentration carriers that are not directly transitional. And a technique for making a laser diode is disclosed.
- Non-Patent Document 2 discloses a light-emitting diode (hereinafter abbreviated as LED) created using germanium epitaxially grown on silicon.
- Patent Document 4 Japanese Unexamined Patent Application Publication No. 2007-173590 discloses a technique for forming a light emitting element by applying an elongation strain to silicon.
- Patent Document 5 Japanese Patent Laid-Open No. 2009-76498) discloses a germanium laser diode using a parcel effect generated by strongly confining light in germanium.
- valley projection using a silicon nanostructure As a technique for transforming an indirect transition semiconductor into a direct transition semiconductor in addition to a method using elongation strain, a method called valley projection using a silicon nanostructure is known.
- silicon in a nanostructure the region in which electrons move spatially is limited, so that the momentum of electrons is effectively reduced.
- the direction in which the electrons have momentum is determined based on the inherent band structure.
- Valley projection is a method of confining electrons in a nanostructure in the direction in which the electrons have momentum. As a result, the momentum of electrons is effectively zero. That is, in this method, the energy valley of the conduction band effectively becomes the ⁇ point, and a pseudo direct transition is made.
- the conduction band bottom exists in the vicinity of the X point. Therefore, by making the (100) plane as the surface and thinning the silicon film thickness, the valley of energy is effectively made the ⁇ point. Thus, a pseudo direct transition semiconductor can be obtained.
- germanium since the conduction band bottom is present at the L point in the bulk, by forming a thin film having the (111) plane as the surface, the valley of energy can be effectively set as the ⁇ point, and the pseudo Direct transition semiconductors can be used.
- Patent Document 1 Japanese Patent Laid-Open No. 2007-294628
- an electrode is directly connected to ultrathin single crystal silicon having a (100) plane on the surface, and carriers are injected in a horizontal direction with respect to the substrate, thereby efficiently.
- a device for emitting ultrathin single crystal silicon was invented.
- germanium light-emitting element that can inject electrons into the light-emitting layer at a high concentration.
- germanium when germanium is caused to emit light by valley projection, since the light emitting portion is a thin film and the light confinement layer is formed outside the light emitting portion, it is difficult to increase the coupling between the light emitting portion and the light. Therefore, in order to form a population inversion more easily and to induce stimulated emission, there is a problem in that a germanium light emitting element having a large light confinement coefficient and a large coupling between the light emitting portion and the light is produced. There is a phenomenon called free carrier absorption in which light is absorbed by free carriers in the crystal as another factor that deteriorates the light emission characteristics.
- the waveguide core contains germanium doped with impurities at a high concentration
- the emitted light is absorbed by a large number of free carriers present in the electrode, and the threshold current for laser oscillation increases. Occurs. Therefore, there is a problem of producing a germanium light-emitting element with less free carrier absorption by the electrode.
- the threading dislocations generated in the germanium crystal make a defect in the direction perpendicular to the substrate, so that they are easily broken particularly when a voltage in the direction perpendicular to the substrate is applied. Therefore, there is a problem of making a germanium laser diode in which carriers are injected horizontally into the substrate in order to prevent the device reliability from being deteriorated by threading dislocations.
- the germanium light-emitting element according to the present invention is formed on an insulator, and the threading dislocation of the light-emitting layer is 1 ⁇ 10 6 / cm 2 or less, and silicon or silicon germanium doped with n-type impurities at a high concentration is used. It is a germanium laser diode used for an n-type electrode, and the light emitting part is the core of the waveguide, and can strongly confine light in the light emitting layer with few free carriers.
- the germanium light-emitting device according to the present invention is a germanium laser diode capable of precisely controlling the magnitude of the applied tensile strain by providing a member capable of applying an external stress.
- the germanium light-emitting device according to the present invention is a germanium laser diode in which carriers can be injected in the horizontal direction and deterioration of reliability due to threading dislocation is suppressed.
- germanium light-emitting devices There are two main technologies for germanium light-emitting devices. One is the technology that emits light by direct transition of germanium by the quantum effect called valley projection. The other is that electrons are injected at a high density into germanium epitaxially grown on silicon, thereby injecting electrons not only at the L point of the conduction band but also at the ⁇ point, thereby causing a direct transition.
- Germanium epitaxially grown on silicon is applied with an extension strain, which has the advantage of bringing germanium closer to a transition-type semiconductor.
- silicon and germanium have different lattice constants of 4%. Threading dislocations occur, and a high-quality germanium single crystal cannot be used for the light emitting layer.
- a germanium laser diode having a high-quality germanium light-emitting layer is realized by using germanium formed on silicon dioxide. Further, by using silicon for the n-type electrode, it is possible to provide a germanium laser diode that exceeds the limit of carrier density that can be injected with conventional n-type germanium.
- germanium laser diode since germanium is formed on an insulator, a germanium single crystal having a threading dislocation density of 1 ⁇ 10 6 / cm 2 or less can be used as a light emitting layer. A germanium laser diode capable of applying a high voltage can be produced.
- the germanium light-emitting device according to the present invention can achieve a high carrier density of 5 ⁇ 10 20 / cm 3 or more by using highly doped silicon or silicon-germanium as an n-type electrode.
- the germanium light-emitting device according to the present invention can confine light in the ridge-shaped germanium light-emitting layer, a strong light confinement coefficient and a large light-emitting layer / light coupling coefficient can be obtained.
- the germanium light-emitting device according to the present invention can apply elongation strain with good controllability by external stress.
- the germanium light emitting device according to the present invention can suppress deterioration of device reliability due to threading dislocation by injecting carriers in the horizontal direction.
- Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example.
- Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example.
- Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example.
- Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 1st Example The process top view in the manufacturing process of the germanium laser diode concerning a 1st Example.
- the process top view in the manufacturing process of the germanium laser diode concerning a 1st Example The process top view in the manufacturing process of the germanium laser diode concerning a 1st Example.
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- the process top view in the manufacturing process of the germanium laser diode concerning a 1st Example Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 2nd Example.
- Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 2nd Example Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 2nd Example.
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- Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 2nd Example Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 2nd Example.
- Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 2nd Example The process top view in the manufacturing process of the germanium laser diode which concerns on a 2nd Example.
- the process top view in the manufacturing process of the germanium laser diode which concerns on a 2nd Example The process top view in the manufacturing process of the germanium laser diode which concerns on a 2nd Example.
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- Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 2nd Example Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 3rd Example.
- Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 3rd Example Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 3rd Example.
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- Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 3rd Example Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 3rd Example.
- Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 3rd Example Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 3rd Example.
- Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 3rd Example. The process top view in the manufacturing process of the germanium laser diode which concerns on a 3rd Example.
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- Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 4th example. Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 4th example.
- Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 5th Example Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 5th Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 5th Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 5th Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 5th Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 5th Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 5th Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 5th Example.
- Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 5th Example Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 5th Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 5th Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 5th Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 5th Example. Process sectional drawing in the manufacturing process of the germanium laser diode which concerns on a 5th Example. The process top view in the manufacturing process of the germanium laser diode which concerns on a 5th Example. The process top view in the manufacturing process of the germanium laser diode which concerns on a 5th Example.
- the process top view in the manufacturing process of the germanium laser diode which concerns on a 5th Example The process top view in the manufacturing process of the germanium laser diode which concerns on a 5th Example.
- Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example.
- Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example.
- Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example Process sectional drawing in the manufacturing process of the german
- Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example. Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example. Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example. Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example. Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example. Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example. Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example. Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example. Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example.
- Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example Process sectional drawing in the manufacturing process of the germanium laser diode concerning a 6th Example.
- the process top view in the manufacturing process of the germanium laser diode which concerns on a 6th Example The process top view in the manufacturing process of the germanium laser diode which concerns on a 6th Example.
- the process top view in the manufacturing process of the germanium laser diode which concerns on a 6th Example The process top view in the manufacturing process of the germanium laser diode which concerns on a 6th Example.
- the process top view in the manufacturing process of the germanium laser diode which concerns on a 6th Example The process top view in the manufacturing process of the germanium laser diode which concerns on a 6th Example.
- the process top view in the manufacturing process of the germanium laser diode which concerns on a 6th Example The process top view
- FIGS. 1A to 1H and 2A to 2H show cross-sectional structures in the order of manufacturing steps.
- FIGS. 3A to 3H are plan views showing the order of the manufacturing process as viewed from above.
- the cross-sectional views of FIGS. 1A to 1H and FIGS. 2A to 2H show the structures taken along the cross-sections 23 and 24 in FIGS. 3A to 3H, respectively.
- the cross-sectional views of FIGS. 1H and 2H are completed views of the device in this embodiment when cut out at the positions indicated by the cut lines 23 and 24 in FIG. 3H, respectively.
- a silicon substrate 1 as a supporting substrate, silicon dioxide 2 as a buried oxide film (hereinafter abbreviated as BOX) and Germanium On Insulator (hereinafter abbreviated as GOI) 3 Prepare a GOI substrate with stacked layers.
- the GOI substrate is made by using the process of making germanium on the BOX by epitaxially growing silicon / germanium on the Silicon On Insulator without causing threading dislocations and then selectively oxidizing only silicon. Also good.
- the initial film thickness before the process of GOI3 prototyped in this example was 100 nm.
- the film thickness of silicon dioxide 2 was 1000 nm.
- silicon dioxide 2 is also formed on the back surface of the silicon substrate 1. This is to prevent the wafer of the silicon substrate 1 from warping. Since thick silicon dioxide 2 is formed as 1000 nm, a strong compressive stress is applied to the silicon substrate 1, and it is devised not to warp the entire wafer by forming only the same film thickness on the front and back surfaces. . Care must also be taken that this backside silicon dioxide 2 is not lost during the process. If the silicon dioxide 2 on the back surface disappears during the cleaning or wet etching process, the entire wafer is warped, and the wafer is not attracted to the electrostatic chuck, and there is a concern that the subsequent manufacturing process cannot be performed.
- silicon dioxide 4 is deposited on the surface using an apparatus such as Chemical Vapor Deposition (hereinafter abbreviated as CVD).
- CVD Chemical Vapor Deposition
- the silicon dioxide 4 is processed by performing wet etching after leaving the resist only in a desired region by photolithography mask exposure, and the states shown in FIGS. 1B, 2B, and 3B. It was.
- the processing method may use dry etching.
- germanium 5 doped with a high concentration of p-type is selectively grown only on the GOI 3 of the opening, and the structure shown in FIGS. 1C, 2C and 3C is epitaxially grown. State. Germanium 5 serves as an electrode for injecting holes after the device is completed. It should be noted that ion implantation may be used as a method for doping p-type impurities. Although element isolation is not illustrated in this embodiment, element isolation can be performed using a process of processing GOI3 into a mesa shape, a shallow trench isolation (STI) process, a local oxidation of silicon (LOCOS) process, and the like.
- STI shallow trench isolation
- LOC local oxidation of silicon
- silicon dioxide 6 was deposited on the surface using an apparatus such as CVD. Subsequently, after applying the resist, the silicon dioxide 4 is processed by performing wet etching after leaving the resist only in a desired region by mask exposure by photolithography, and the states shown in FIGS. 1D, 2D, and 3D It was.
- the processing method may use dry etching.
- germanium 7 having an impurity concentration of 1 ⁇ 10 18 / cm 3 or less is selectively grown only on the p-type germanium in the opening by 200 nm, FIG. It was set as the state of FIG. 2E and FIG. 3E.
- germanium 7 was 1 ⁇ 10 6 / cm 2 or less. Since germanium 7 has a role as a light emitting layer after the device is completed, it must be prepared with particular care so that threading dislocations do not enter. Note that silicon or silicon-germanium may be epitaxially grown as a cap layer following the epitaxial growth of germanium 7. When silicon-germanium is used for the cap layer, it also has a function of alleviating strain caused by a lattice constant between an n-type silicon electrode deposited later and germanium 7 which is a light emitting layer. Further, since germanium 7 also plays a role as an optical confinement layer after the device is completed, in this embodiment, germanium 7 is designed to be a thin-line optical resonator.
- n-type silicon 8 was processed into the states shown in FIGS. 1F, 2F and 3F.
- the n-type silicon 8 serves as an electrode for injecting holes after the device is completed. Note that ion implantation may be used as a method of doping the n-type silicon 8 with impurities.
- silicon has a refractive index smaller than that of germanium 7, which is an optical confinement layer, it becomes possible to effectively confine light in the optical confinement layer. In fact, it was possible to achieve a confinement factor of 80% or more between the light guided through the resonator and germanium 7. This is overwhelmingly larger than the confinement factor of about several percent obtained when a germanium quantum well is used.
- silicon is used as the n-type electrode, the effect of free carrier absorption by the electrode can be suppressed. Note that silicon-germanium may be used as the n-type electrode.
- germanium 7 has facets depending on the epitaxial growth conditions of germanium 7, it may be possible to deposit n-type silicon 8 after opening germanium 7 by resist patterning after performing passivation with silicon dioxide after epitaxial growth of germanium 7 .
- silicon dioxide 9 was deposited on the surface using an apparatus such as a CVD. Subsequently, after applying the resist, the silicon dioxide 9 is processed by wet etching after leaving the resist only in a desired region by photolithography mask exposure, and the states shown in FIGS. 1G, 2G, and 3G And p-type electrode and n-type electrode portions were opened. At this time, since the etching selectivity is sufficiently large between silicon dioxide and the electrode, even if there is a step between the n-type electrode and the p-type electrode, the opening can be made without any problem.
- the device was completed as shown in FIGS. 1H, 2H, and 3H by performing a hydrogen annealing process and performing a hydrogen termination process for defects generated in the process.
- a germanium light emitting layer 7 is formed between a p-type electrode 5 and an n-type electrode 8.
- the threading dislocations present in the germanium light-emitting layer 7 are 1 ⁇ 10 6 / cm 2 or less, so that a small number of carrier traps derived from crystal defects and a high current can be applied.
- the germanium light-emitting layer 7 is processed into a thin line shape and also serves as a Fabry-Perot type optical resonator.
- FIG. 2H, and FIG. 3H described above show the steps up to the wiring step and the cross-sectional structure thereof, but when an optical integrated circuit is formed, a desired wiring process may be performed thereafter.
- the germanium laser diode according to the present invention can oscillate near 1500 nm with a small transmission loss of the optical fiber. It became clear that it could be provided.
- a distributed Bragg reflector (abbreviated as “DBR”) germanium laser diode produced by a method that can be easily formed using a normal silicon process and a method for manufacturing the same are disclosed.
- 1A to 1F, 4A to 4D, 2A to 2F, and 5A to 5D show cross-sectional structures in the order of manufacturing steps.
- FIGS. 3A to 3F and FIGS. 6A to 6D are plan views showing the order of the manufacturing process as viewed from above.
- FIGS. 1A to 1F and FIGS. 2A to 2F show the structures taken along the cross-sections 23 and 24 in FIGS. 3A to 3F, respectively.
- 4A to 4D and the cross-sectional views of FIGS. 5A to 5D represent structures taken along the cross-sections 23 and 24 in FIGS. 6A to 6D, respectively.
- 4D and FIG. 5D are completed views of the device in this example when cut out at the positions indicated by the cut lines 23 and 24 in FIG. 6D, respectively.
- FIGS. 2A to 2F, and FIGS. 3A to 3F are the same as those in the first embodiment, and the description thereof is omitted.
- silicon dioxide 9 was deposited on the surface using an apparatus such as CVD from the state of FIGS. 1F, 2F and 3F.
- the silicon dioxide 9 is processed by performing anisotropic dry etching after leaving the resist only in a desired region by photolithography mask exposure, and FIG. 4A, FIG. 5A and FIG. The state was 6A.
- the DBR mirror 101 is a dielectric mirror composed of a difference in refractive index with the surrounding insulating film, and can achieve a high reflectivity of 99.9% or more.
- the width and interval of the pieces of amorphous silicon are important parameters, and they are designed to be an integral multiple of about 1 ⁇ 2 of the emission wavelength in the medium.
- the reflectance can be increased by increasing the number of pieces.
- prototypes were produced by changing the number of small pieces to 4, 10, 20, and 100. However, the larger the number of small pieces, the smaller the oscillation threshold current density becomes. It was confirmed that the reflectance was increased.
- silicon dioxide 102 was deposited on the surface using an apparatus such as CVD. Subsequently, after applying the resist, the silicon dioxide is processed by wet etching after leaving the resist only in a desired region by mask exposure by photolithography to obtain the states shown in FIGS. 4C, 5C, and 6C. The p-type electrode and n-type electrode portions were opened. At this time, since the etching selectivity is sufficiently large between silicon dioxide and the electrode, even if there is a step between the n-type electrode and the p-type electrode, the opening can be made without any problem.
- the device was completed as shown in FIGS. 4D, 5D, and 6D by performing a hydrogen annealing process and performing a process for terminating defects generated in the process with hydrogen.
- a germanium light emitting layer 7 is formed between a p-type electrode 5 and an n-type electrode 8. Since the threading dislocations present in the germanium light emitting layer 7 are 1 ⁇ 10 6 / cm 2 or less, it is possible to apply a high current with few carrier traps derived from crystal defects.
- the germanium light-emitting layer 7 has a thin line shape and also serves as a light confinement layer. Further, DBR mirrors 101 made of amorphous silicon are formed at both ends of the germanium light emitting layer 7.
- the DBR mirror achieved a reflectivity of 99.9% or higher, the loss due to mirror reflection could be reduced.
- the threshold current which was 3 mA in the Fabry-Perot type, could be reduced to 1 mA.
- the oscillation wavelength at this time is about 1500 nm which is a design wavelength, and according to the spectrum analysis, it was a single mode.
- a distributed feedback type (Distributed Feed-Back: Germanium DFB) germanium laser diode produced by a method that can be easily formed using a normal silicon process and a manufacturing method thereof are disclosed.
- 1A to 1C, FIGS. 7A to 7E, FIGS. 2A to 2C, and FIGS. 8A to 8E show cross-sectional structures in the order of manufacturing steps.
- 3A to 3C and FIGS. 9A to 9E show plan views in the order of the manufacturing process as seen from above.
- FIGS. 1A to 1C and FIGS. 2A to 2C represent structures taken along the cross-sections 23 and 24 in FIGS. 3A to 3C, respectively.
- 7A to 7E and FIGS. 8A to 8E are cross-sectional views showing the structures taken along sections 23 and 24 in FIGS. 9A to 9E, respectively.
- 7E and 8E are completed views of the device in this example when cut out at the positions indicated by the cut lines 23 and 24 in FIG. 9E, respectively.
- FIGS. 1A to 1C The manufacturing steps of FIGS. 1A to 1C, FIGS. 2A to 2C, and FIGS.
- silicon dioxide 6 was deposited on the surface using an apparatus such as CVD from the state of FIGS. 1C, 2C, and 3C. Subsequently, after applying the resist, the silicon dioxide 4 is processed by performing anisotropic dry etching after leaving the resist only in a desired region by mask exposure by photolithography, and FIG. 7A, FIG. 8A and FIG. The state was 9A.
- germanium 7 having an impurity concentration of 1 ⁇ 10 18 / cm 3 or less is selectively epitaxially grown only on the p-type germanium in the opening. 8B and FIG. 9B were set. At this time, the threading dislocation of germanium 7 was 1 ⁇ 10 6 / cm 2 or less. Since germanium 7 has a role as a light emitting layer after completion of the device, it needs to be prepared with particular care so that threading dislocations do not enter.
- silicon or silicon-germanium may be epitaxially grown as a cap layer following the epitaxial growth of germanium 7.
- silicon-germanium When silicon-germanium is used for the cap layer, it also has a function of alleviating strain caused by a lattice constant between an n-type silicon electrode deposited later and germanium 7 which is a light emitting layer.
- germanium 7 is periodically arranged to form a DFB type optical resonator.
- the optical resonator formed of germanium 7 gives a refractive index modulation to the light traveling through the resonator. That is, the refractive index is large in the portion where the small piece of germanium 7 exists, and the refractive index is small in the gap portion between the two germanium small pieces.
- the length of the small piece of germanium 7 and the gap portion in the waveguide direction are each designed to be an integral multiple of about 1 ⁇ 2 of the emission wavelength.
- n-type silicon 8 was processed into the states shown in FIGS. 7C, 8C and 9C.
- the n-type silicon 8 serves as an electrode for injecting holes after the device is completed. Further, since silicon has a refractive index smaller than that of germanium 7, which is an optical confinement layer, it becomes possible to effectively confine light in the optical confinement layer. Note that silicon-germanium may be used as the n-type electrode.
- germanium 7 has facets due to the epitaxial growth conditions of germanium 7, after germanium 7 is epitaxially grown, passivation with silicon dioxide or the like is performed, and after opening germanium 7 by resist patterning, n-type silicon 8 is deposited. There is no problem.
- silicon dioxide 9 was deposited on the surface using an apparatus such as a CVD. Subsequently, after applying the resist, the silicon dioxide 9 is processed by performing wet etching after leaving the resist only in a desired region by mask exposure by photolithography, and the states shown in FIGS. 7D, 8D, and 9D. And p-type electrode and n-type electrode portions were opened. At this time, since the etching selectivity is sufficiently large between silicon dioxide and the electrode, even if there is a step between the n-type electrode and the p-type electrode, the opening can be made without any problem.
- a germanium light emitting layer 7 is formed between a p-type electrode 5 and an n-type electrode 8. Since the threading dislocations present in the germanium light emitting layer 7 are 1 ⁇ 10 6 / cm 2 or less, it is possible to apply a high current with few carrier traps derived from crystal defects.
- the germanium light-emitting layer 7 has a periodic small piece structure, and also plays a role as a DFB type optical resonator.
- the laser diode using the DFB mirror of this example does not produce a DBR mirror and uses the light emitting layer as a DFB mirror, the production process can be simplified compared to a laser diode using a DBR mirror. The footprint could be reduced.
- the oscillation wavelength at this time is about 1500 nm which is a design wavelength, and according to the spectrum analysis, it was a single mode.
- a germanium laser diode to which an extension strain is applied which is manufactured by a method that can be easily formed using a normal silicon process, and a manufacturing method thereof are disclosed.
- a Fabry-Perot type laser diode is used in the drawing, but it may be applied to the DBR type or DFB type laser diode introduced in the second or third embodiment.
- 1A to 1F, FIGS. 10A to 10B, FIGS. 2A to 2F, and FIGS. 11A to 11B show cross-sectional structures in the order of manufacturing steps.
- FIGS. 3A to 3F and FIGS. 12A to 12B show plan views in the order of the manufacturing process as seen from above.
- FIGS. 10A to 10B, FIGS. 2A to 2F, and FIGS. 11A to 11B are structures taken along sections 23 and 24 in FIGS. 3A to 3F and FIGS. 12A to 12B, respectively. Represents.
- the completed drawings of the device in this example are FIGS. 10B, 11B, and 12B.
- FIGS. 1A to 1F and FIGS. 2A to 2F show the structures taken along the cross-sections 23 and 24 in FIGS. 3A to 3F, respectively.
- FIGS. 10A to 10B and FIGS. 11A to 11B show structures taken along the cross sections 23 and 24 in FIGS. 12A to 12B, respectively.
- 10B and 11B are completed views of the device in this example when cut out at the positions indicated by the cut lines 23 and 24 in FIG. 12B, respectively.
- FIGS. 1A to 1F, 2A to 2F, and 3A to 3F are the same as those of the first embodiment, and thus the description thereof is omitted.
- silicon dioxide 9 was deposited on the surface from the state of FIGS. 1F, 2F, and 3F by using a device such as a CVD, and then silicon nitride 201 was deposited only on the surface.
- a device such as a CVD
- silicon nitride 201 was deposited only on the surface.
- the magnitude of the applied strain is determined by the thickness of the silicon nitride 201, the magnitude of the applied strain can be controlled by adjusting the thickness of the silicon nitride 201. I can do it.
- the device was completed as shown in FIGS. 10B, 11B, and 12B by performing a hydrogen annealing process and performing a hydrogen termination process for defects generated in the process.
- a germanium light emitting layer 7 is formed between a p-type electrode 5 and an n-type electrode 8. Since the threading dislocations present in the germanium light emitting layer 7 are 1 ⁇ 10 6 / cm 2 or less, it is possible to apply a high current with few carrier traps derived from crystal defects.
- the germanium light-emitting layer 7 is processed into a thin line shape, and also serves as a Fabry-Perot type optical resonator.
- silicon nitride is formed in the vicinity of the germanium light-emitting layer 7 and has a function of imparting elongation strain to the germanium light-emitting layer 7.
- An elongation strain of about 0.3 GPa is applied to the light emitting layer, and the energy difference between the L point and the ⁇ point of the conduction band in the energy band structure is smaller than when no strain is applied. Electrons were injected into the ⁇ point at a low current density, and light could be emitted.
- the threshold current of the Fabry-Perot laser diode to which no strain was applied was 3 mA, whereas the threshold current could be reduced to 1 mA. Since the laser beam is emitted in parallel to the silicon substrate 1, it has been proved that the laser beam is optimal for applications such as on-chip optical wiring.
- FIG. 10B, FIG. 11B, and FIG. 12B show the process up to the wiring process and its cross-sectional structure. However, when an optical integrated circuit is formed, a desired wiring process may be performed thereafter. .
- the germanium laser diode according to the present invention can oscillate near 1550 nm with a small optical fiber transmission loss. Therefore, a highly reliable and low-cost laser can be obtained by utilizing the conventional optical communication infrastructure as it is. It became clear that it could be provided.
- FIGS. 14A to 14F show cross-sectional structures in the order of manufacturing steps. Further, FIGS. 15A to 15F show plan views in the order of the manufacturing process as seen from above.
- FIGS. 13A to 13F and FIGS. 14A to 14F show the structures taken along the cross-sections 23 and 24 in FIGS. 15A to 15F, respectively.
- the cross-sectional views of FIGS. 13F and 14F are completed views of the device in this example when cut out at the positions indicated by the cut lines 23 and 24 in FIG. 15F, respectively.
- a silicon substrate 301 as a supporting substrate
- silicon dioxide 302 as a buried oxide (hereinafter abbreviated as BOX)
- Germanium On Insulator (hereinafter abbreviated as GOI) 303 prepare a GOI substrate with stacked layers.
- the GOI substrate is made by using the process of making germanium on the BOX by epitaxially growing silicon-germanium on the silicon-on-insulator without causing threading dislocations and then selectively oxidizing only silicon. Also good.
- the initial film thickness before the process of GOI303 prototyped in this example was 200 nm.
- the film thickness of the silicon dioxide 302 was 1000 nm.
- silicon dioxide 302 is also formed on the back surface of the silicon substrate 301. This is to prevent the wafer of the silicon substrate 301 from warping. Since a thick silicon dioxide 302 of 1000 nm is formed, a strong compressive stress is applied to the silicon substrate 301, and it is devised not to warp the entire wafer by forming the same film thickness on the front and back surfaces. . Care must be taken that this backside silicon dioxide 302 is not lost during the process. If the silicon dioxide 302 on the back surface disappears during the cleaning or wet etching process, the entire wafer is warped, and the wafer is not attracted to the electrostatic chuck, and there is a concern that the subsequent manufacturing process cannot be performed.
- GOI 303 was processed into a mesa shape by performing anisotropic dry etching. For simplicity, only one element is shown in the figure, but it goes without saying that many elements can be formed on the substrate. Since a silicon process is used, many devices can be integrated with a high yield. This step establishes electrical separation between elements. Further, instead of processing the GOI 303 into a mesa shape as in the present embodiment, element isolation may be performed using a Shallow Trench Isolation (STI) or Local Oxidation of Silicon (LOCOS) process.
- STI Shallow Trench Isolation
- LOCS Local Oxidation of Silicon
- silicon dioxide 304 is deposited on the surface using an apparatus such as a CVD to protect the surface, and the states shown in FIGS. 13B, 14B, and 15B are obtained. did.
- the silicon dioxide 304 not only reduces damage to the substrate caused by ion implantation introduced in the subsequent process, but also has a role to suppress escape of impurities into the atmosphere by the activation heat treatment. At this time, silicon dioxide 304 is also formed on the back surface.
- impurities are introduced into a desired region in GOI 303 by ion implantation.
- impurity implantation first, the resist is left only in a desired region by resist patterning using photolithography, and then BF 2 ions are implanted at a dose of 1 ⁇ 10 15 / cm 3. Then, a p-type diffusion layer 305 was formed.
- single crystal silicon remains in the region adjacent to the BOX 302, so that the crystallinity can be recovered by activation heat treatment after ion implantation. it can. In order to emit light efficiently, good single crystallinity is extremely important.
- annealing was performed in a nitrogen atmosphere to activate impurities and at the same time restore the crystallinity of GOI 303 to obtain the states of FIGS. 13C, 14C, and 15C.
- silicon nitride 307 is deposited on the entire surface using an apparatus such as CVD.
- the silicon nitride 307 is processed by performing anisotropic dry etching after leaving the resist only in a desired region by photolithography mask exposure, and FIG. 13D, FIG. 14D and FIG. It was set as the state of FIG. 15D.
- the processed silicon nitride 307 is disposed on the GOI 303 that is not doped with impurities as a light emitting layer, and has a function of confining light in the light emitting layer 303 with respect to the horizontal direction of the substrate.
- the silicon nitride 307 also has a function of applying an elongation strain to the GOI 303 that is a light emitting layer.
- silicon nitride is processed into a thin line shape to produce a Fabry-Perot type laser diode, but the silicon nitride is periodically formed at both ends of GOI303 as a light emitting layer.
- a DBR type laser diode by arranging small pieces.
- DFB type laser diode by periodically arranging small pieces of silicon nitride on the GOI 303 which is a light emitting layer.
- silicon dioxide 308 was deposited on the surface using an apparatus such as CVD. Subsequently, after applying the resist, the silicon dioxide is processed by wet etching after leaving the resist only in a desired region by mask exposure by photolithography to obtain the states shown in FIGS. 13E, 14E, and 15E. The p-type and n-type electrode portions were opened.
- a germanium light emitting layer 303 is formed between a p-type electrode 305 and an n-type electrode 306. Note that threading dislocations present in the germanium light-emitting layer 303 are 1 ⁇ 10 6 / cm 2 or less, so that a small number of carrier traps derived from crystal defects and a high current can be applied.
- a silicon nitride optical resonator is processed into a thin line shape, which functions as a Fabry-Perot type optical resonator and applies strain to the light-emitting layer.
- An extension strain of 0.3 GPa is applied to the light emitting layer, and the energy difference between the L point and the ⁇ point of the energy band structure of the germanium light emitting layer 303 is small, which is lower than when no strain is applied. Carriers are injected into the ⁇ point with current density, and light is emitted.
- a germanium laser diode can be manufactured without performing a step of epitaxially growing germanium. Since the laser beam is emitted in parallel to the silicon substrate 1, it has been proved that the laser beam is optimal for applications such as on-chip optical wiring.
- FIG. 13F, FIG. 14F, and FIG. 15F described above the process up to the wiring process and the cross-sectional structure thereof are shown.
- the germanium laser diode according to the present invention can oscillate near 1550 nm with a small optical fiber transmission loss. Therefore, a highly reliable and low-cost laser can be obtained by utilizing the conventional optical communication infrastructure as it is. It became clear that it could be provided.
- a germanium laser diode having a ridge waveguide and injecting carriers in the horizontal direction which is produced by a method that can be easily formed using a normal silicon process, and a method for manufacturing the same are disclosed.
- 16A to 16G and FIGS. 17A to 17G show cross-sectional structures in the order of the manufacturing steps. Further, FIGS. 18A to 18G show plan views in the order of the manufacturing process as seen from above.
- FIGS. 16A to 16G and FIGS. 17A to 17G show the structures taken along the cross-sections 23 and 24 in FIGS. 18A to 18G, respectively.
- the cross-sectional views of FIGS. 16G and 17G are completed views of the device in this example when cut out at the positions indicated by the cut lines 23 and 24 in FIG. 18G, respectively.
- a silicon substrate 401 as a supporting substrate silicon dioxide 402 as a buried oxide (hereinafter abbreviated as BOX) and Germanium On Insulator (hereinafter abbreviated as GOI) 403 Prepare a GOI substrate with stacked layers.
- BOX silicon dioxide 402 as a buried oxide
- GOI Germanium On Insulator
- the GOI substrate is made by using the process of making germanium on the BOX by epitaxially growing silicon-germanium on the Silicon-On-Insulator without causing threading dislocations and then selectively oxidizing only silicon. Also good.
- the initial film thickness of the GOI403 prototyped in this example before the process was 200 nm.
- the film thickness of the silicon dioxide 402 was 1000 nm.
- silicon dioxide 402 is also formed on the back surface of the silicon substrate 401. This is for preventing the wafer of the silicon substrate 401 from warping. Since a thick silicon dioxide 402 of 1000 nm is formed, a strong compressive stress is applied to the silicon substrate 401, and it is devised not to warp the entire wafer by forming only the same film thickness on the front and back surfaces. . Care must also be taken that this backside silicon dioxide 402 is not lost during the process. If the silicon dioxide 402 on the back surface disappears during the cleaning or wet etching process, the entire wafer is warped, and the wafer is not attracted to the electrostatic chuck, and there is a concern that the subsequent manufacturing process cannot be performed.
- GOI403 was processed into a mesa shape by performing anisotropic dry etching. For simplicity, only one element is shown in the figure, but it goes without saying that many elements can be formed on the substrate. Since a silicon process is used, many devices can be integrated with a high yield. This step establishes electrical separation between elements. Further, instead of processing the GOI 403 into a mesa shape as in the present embodiment, element isolation may be performed using a Shallow Trench Isolation (STI) or Local Oxidation of Silicon (LOCOS) process.
- STI Shallow Trench Isolation
- LOCS Local Oxidation of Silicon
- silicon dioxide 404 as a protective film by CVD or the like
- silicon nitride 405 was deposited.
- the silicon nitride 405 is processed by performing anisotropic dry etching after leaving the resist only in a desired region by photolithography mask exposure, and FIGS. 16B, 17B and The state shown in FIG. 18B was obtained.
- GOI 403 was partially oxidized by applying an oxidation treatment to form germanium dioxide 406, and the states shown in FIGS. 16C, 17C, and 18C were obtained. At this time, the oxidation time was controlled so that the film thickness of the oxidized portion of GOI was 50 nm. Through this process, the GOI403 was processed into a ridge-shaped waveguide so as to function as an optical confinement layer.
- silicon nitride 405 is removed by wet etching using hot phosphoric acid, and subsequently silicon dioxide 404 and germanium dioxide 406 are removed by wet etching using hydrofluoric acid, and then an appropriate cleaning process is performed, followed by CVD or the like.
- Silicon 407 was deposited as a protective film, resulting in the states of FIGS. 16D, 17D and 18D.
- silicon dioxide 407 not only reduces damage to the substrate due to ion implantation introduced in the subsequent process, but also has a role of suppressing escape of impurities into the atmosphere by the activation heat treatment.
- impurities are introduced into a desired region in GOI 403 by ion implantation.
- care must be taken not to inject impurities into the ridge-shaped portion of GOI403.
- the impurity implantation first, the resist is left only in a desired region by resist patterning using photolithography, and then BF 2 ions are implanted at a dose of 1 ⁇ 10 15 / cm 3 , so that the GOI 403 Then, a p-type diffusion layer 408 was formed.
- the crystallinity can be recovered by activation heat treatment after the ion implantation. it can. In order to emit light efficiently, good single crystallinity is extremely important.
- annealing was performed in a nitrogen atmosphere to activate the impurities and at the same time restore the crystallinity of GOI 403 to obtain the states of FIGS. 16E, 17E, and 18E.
- silicon dioxide 410 was deposited as a passivation film by CVD or the like. Subsequently, after applying the resist, the silicon dioxide is processed by performing wet etching after leaving the resist only in a desired region by mask exposure by photolithography to obtain the states of FIGS. 16F, 17F, and 18F. The p-type and n-type electrode portions were opened.
- a germanium light emitting layer 403 is formed between a p-type electrode 408 and an n-type electrode 409. Note that threading dislocations present in the germanium light-emitting layer 403 are 1 ⁇ 10 6 / cm 2 or less, so that a small number of carrier traps derived from crystal defects and a high current can be applied.
- the germanium light-emitting layer 403 is processed into a ridge shape, and has a function as a Fabry-Perot type optical resonator.
- a germanium laser diode can be manufactured without performing a process of epitaxially growing germanium.
- the oscillation wavelength was about 1500 nm, which is the design wavelength. No strong strain is applied to the light emitting layer, and light is emitted with the original band gap energy of germanium.
- a germanium laser diode can be manufactured without performing a step of epitaxially growing germanium. Since the laser beam is emitted in parallel to the silicon substrate 1, it has been proved that the laser beam is optimal for applications such as on-chip optical wiring.
- FIG. 16G, FIG. 17G, and FIG. 18G show the steps up to the wiring step and the cross-sectional structure thereof.
- a desired wiring process may be performed thereafter.
- the electronic circuit is mixed, some of the above steps can be performed simultaneously with the transistor formation step.
- an optical device is manufactured through a normal silicon process in this way, it can be easily mixed with an electronic device.
- the germanium laser diode according to the present invention can oscillate near 1500 nm with a small transmission loss of the optical fiber. It became clear that it could be provided.
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Abstract
Description
そこで、シリコンやゲルマニウムを高効率で発光させるために直接遷移半導体へ変貌させる方法が提案されている。
ナノ構造中のシリコンでは、空間的に電子が動き回る領域が制限されているため、電子の運動量が実効的に小さくなる。シリコンやゲルマニウムなど、物質は固有のバンド構造に基づいて電子が運動量を持つ方向が決まっている。バレー・プロジェクションは電子が運動量を持つ方向に対してナノ構造に電子を閉じこめる手法である。その結果、電子の運動量が実効的に0になる。即ち、実効的に伝導帯のエネルギーの谷がΓ点になり、擬似的に直接遷移化する手法である。
シリコン上へのゲルマニウムのエピタキシャル成長によって、伸長歪みを印加し、キャリアを高濃度に注入することによってゲルマニウムを発光させる手法があるが、ゲルマニウムとシリコンの格子定数差は約4%と非常に大きいのでシリコン上にエピタキシャル成長されたゲルマニウムには107/cm2以上の多数の貫通転位が発生する。
その結果として、発光特性の劣化や信頼性の低下という問題を避けられない。従って、発光特性の劣化や信頼性の低下を防ぐために、貫通転位密度の小さいゲルマニウムを用いた発光素子の作成という課題がある。
したがって、高濃度に発光層に電子を注入することが可能なゲルマニウム発光素子の作成という課題がある。
従って、より簡単に反転分布を形成して誘導放出を引き起こすためには、光閉じ込め係数を大きくすると共に発光部と光の結合が大きいゲルマニウム発光素子を作成するという課題がある。
発光特性を劣化させる他の要因として結晶中の自由キャリアによって光が吸収されてしまう、自由キャリア吸収という現象がある。導波路のコアに高濃度に不純物がドーピングされたゲルマニウムが含まれる場合は電極に存在する多数の自由キャリアによって、発光した光が吸収され、レーザ発振のためのしきい値電流が上昇するという問題が生じる。従って、電極による自由キャリア吸収の少ないゲルマニウム発光素子を作成するという課題ある。
従って、発光層であるゲルマニウムに印加される歪みを精密に制御することができるゲルマニウム発光素子の作成という課題がある。
あるいは、発光層に高濃度にキャリアを注入することによって高効率に発光するゲルマニウム発光素子を提供することである。
あるいは強く光を閉じ込めると共に、電極による光の吸収を抑制した構造によって容易に反転分布を形成する事が出来るゲルマニウム発光素子を提供することである。
あるいはゲルマニウムに印加する伸長歪みの大きさを精密に制御することが可能なゲルマニウム発光素子を提供することである。
あるいは水平方向にキャリアを注入することによって貫通転位によるデバイスの信頼性劣化を抑制した構造のゲルマニウム発光素子を提供することである。
本発明によるゲルマニウム発光素子は絶縁体上に形成されており、発光層の貫通転位が1×106/cm2以下であり、高濃度にn型不純物をドーピングされたシリコン、あるいはシリコン・ゲルマニウムをn型電極に用いているゲルマニウム・レーザ・ダイオードであり、発光部は導波路のコアになっていて、自由キャリアの少ない発光層に強く光を閉じ込めることができる。
あるいは本発明によるゲルマニウム発光素子は、外部応力を与えることのできる部材を設けることによって印加する伸長歪みの大きさを精密に制御することができるゲルマニウム・レーザ・ダイオードである。
あるいは本発明によるゲルマニウム発光素子は水平方向にキャリアを注入することが出来て、貫通転位による信頼性の劣化が抑制されたゲルマニウム・レーザ・ダイオードである。
もう一つはシリコン上にエピタキシャル成長させたゲルマニウムに高密度に電子を注入することで伝導帯のL点だけでなくΓ点に電子を注入して、直接遷移を引き起こすというものである。
また、n型の電極にシリコンを用いることで従来のn型ゲルマニウムで注入することができたキャリア密度の限界を超えるゲルマニウム・レーザ・ダイオードを提供する事ができる。
本発明によるゲルマニウム・レーザ・ダイオードでは、ゲルマニウムが絶縁体の上に形成されているので発光層として貫通転位密度が1×106/cm2以下のゲルマニウム単結晶を用いることができるため、高電流、高電圧を印加することが出来るゲルマニウム・レーザ・ダイオードを作成することができる。
図1A~図1H、図2A~図2Hには、製造工程順に断面構造を示す。また、図3A~図3Hに上から見た製造工程順の平面図を示す。
ここで、図1A~図1Hと、図2A~図2Hの断面図は、それぞれ図3A~図3Hにおける断面23、及び24で切り出した時の構造を表している。
なお、図1H及び図2Hの断面図は、それぞれ図3Hの切出し線23,24で示す位置で切り出した時の本実施例におけるデバイスの完成図である。
まず、図1A、図2A及び図3Aに示すように、支持基板として、シリコン基板1、埋め込み酸化膜(Buried Oxide:以下BOXと略す)として二酸化シリコン2及びGermanium On Insulator(以下GOIと略す)3層が積層されたGOI基板を用意する。
なお、GOI基板はSilicon On Insulator上に貫通転位が発生しない条件でシリコン・ゲルマニウムをエピタキシャル成長させた後、シリコンのみを選択的に酸化することによってBOX上にゲルマニウムを作成する工程を用いて作成しても良い。
図1A~3Aから明白なように、シリコン基板1の裏面にも二酸化シリコン2が形成されている。これは、シリコン基板1のウェハの反りを防止するためのものである。
1000nmと厚い二酸化シリコン2を形成しているため、シリコン基板1に強い圧縮応力が印加されており、表面と裏面に同じ膜厚だけ形成させることでウェハ全体として反らないように工夫されている。この裏面の二酸化シリコン2もプロセス中に無くならないように注意を払わなくてはならない。洗浄やウェットエッチングのプロセス中に裏面の二酸化シリコン2が消失してしまうとウェハ全体が反ってしまい、静電チャックにウェハが吸着されないようになり、その後の製造プロセスが行えなくなる懸念がある。
なお、p型の不純物をドーピングする方法としてはイオン注入を用いても差し支えない。本実施例では素子分離を図示しなかったが、GOI3をメサ形状に加工する工程やShallow Trench Isolation (STI)、Local Oxidation of Silicon (LOCOS)工程などを用いて素子分離を行うことができる。
引き続き、レジストを塗布した後に、フォトリソグラフィーによるマスク露光によって、所望の領域にのみレジストを残した後に、ウェットエッチングを施す事によって、二酸化シリコン4を加工し、図1D、図2D及び図3Dの状態とした。なお、加工方法はドライエッチングを用いても差し支えない。
なお、ゲルマニウム7のエピタキシャル成長に引き続けてキャップ層としてシリコン、またはシリコン・ゲルマニウムをエピタキシャル成長しても差し支えない。キャップ層にシリコン・ゲルマニウムを用いると、後に堆積するn型シリコン電極と発光層であるゲルマニウム7間の格子定数によって生じる歪を緩和する機能も有する。
また、ゲルマニウム7はデバイス完成後に光閉じ込め層としての役割も担うので、本実施例ではゲルマニウム7が細線状の光共振器になるように設計されている。
なお、n型シリコン8に不純物をドーピングする方法としてはイオン注入を用いても差し支えない。
なお、n型の電極としてはシリコン・ゲルマニウムを用いても差し支えない。
引き続き、レジストを塗布した後に、フォトリソグラフィーによるマスク露光によって、所望の領域にのみレジストを残した後に、ウェットエッチングを施す事によって、二酸化シリコン9を加工し、図1G、図2G及び図3Gの状態としp型電極、n型電極部分を開口した。
この際、二酸化シリコンと電極では十分にエッチングの選択比が大きいのでn型電極とp型電極に段差があっても問題なく開口することが出来る。
なお、パターニングの方法としてはドライエッチングを用いても差し支えない。
まず、図1Hにおいて、p型電極5、n型電極8の間にゲルマニウム発光層7が形成されている。当該ゲルマニウム発光層7に存在する貫通転位は、1×106/cm2以下であるので結晶欠陥に由来するキャリアトラップが少ないと共に高電流を印加する事が可能となっている。
なお、ゲルマニウム発光層7は、細線形状に加工されており、ファブリ・ペロー型の光共振器としての役割も担っている。
また、レーザ光はシリコン基板1に対して平行に出射されるため、オンチップ上での光配線などの用途に最適であることも実証された。
なお、図4D及び図5Dの断面図は、それぞれ図6Dの切出し線23,24で示す位置で切り出した時の本実施例におけるデバイスの完成図である。
DBRミラー101は周囲の絶縁膜との屈折率の差から構成される誘電ミラーであり、99.9%以上もの高反射率を達成することができる。
DBRミラー101の設計に際してはアモルファス・シリコンの小片の幅と間隔が重要なパラメータであり、それらを媒質中の発光波長の約1/2の整数倍になるように設計されている。
本実施例では、この小片の数を4、10、20、100と変えたものをそれぞれ試作したが、小片の数が多い程、発振しきい値電流密度が小さくなっており、DBRミラー101の反射率が大きくなっていることが確認された。
引き続き、レジストを塗布した後に、フォトリソグラフィーによるマスク露光によって、所望の領域にのみレジストを残した後に、ウェットエッチングを施す事によって、二酸化シリコンを加工し、図4C、図5C及び図6Cの状態としp型電極、n型電極部分を開口した。
この際、二酸化シリコンと電極では十分にエッチングの選択比が大きいのでn型電極とp型電極に段差があっても問題なく開口することが出来る。
なお、パターニングの方法としてはドライエッチングを用いても差し支えない。
まず、図4D及び図5Dにおいて、p型電極5、n型電極8の間にゲルマニウム発光層7が形成されている。なお、ゲルマニウム発光層7に存在する貫通転位は1×106/cm2以下であるので結晶欠陥に由来するキャリアトラップが少ないと共に高電流を印加する事が可能となっている。なお、ゲルマニウム発光層7は細線形状になっており、光閉じ込め層としての役割も担っている。
また、ゲルマニウム発光層7の両端には、アモルファス・シリコンで形成されたDBRミラー101が形成されている。
なお、図7E及び図8Eの断面図は、それぞれ図9Eの切出し線23,24で示す位置で切り出した時の本実施例におけるデバイスの完成図である。
引き続き、レジストを塗布した後に、フォトリソグラフィーによるマスク露光によって、所望の領域にのみレジストを残した後に、異方性ドライエッチングを施す事によって、二酸化シリコン4を加工し、図7A、図8A及び図9Aの状態とした。
キャップ層にシリコン・ゲルマニウムを用いると、後に堆積するn型シリコン電極と発光層であるゲルマニウム7間の格子定数によって生じる歪を緩和する機能も有する。
引き続き、レジストを塗布した後に、フォトリソグラフィーによるマスク露光によって、所望の領域にのみレジストを残した後に、ウェットエッチングを施す事によって、二酸化シリコン9を加工し、図7D、図8D及び図9Dの状態としp型電極、n型電極部分を開口した。
この際、二酸化シリコンと電極では十分にエッチングの選択比が大きいのでn型電極とp型電極に段差があっても問題なく開口することが出来る。
なお、パターニングの方法としてはドライエッチングを用いても差し支えない。
引き続き、水素アニール処理を施し、プロセス中に生じた欠陥を水素終端する処理を行うことで図7E、図8E及び図9Eの状態としてデバイスを完成させた。
まず、図7E及び図8Eにおいて、p型電極5、n型電極8の間にゲルマニウム発光層7が形成されている。なお、ゲルマニウム発光層7に存在する貫通転位は1×106/cm2以下であるので結晶欠陥に由来するキャリアトラップが少ないと共に高電流を印加する事が可能となっている。なお、ゲルマニウム発光層7は周期的は小片構造になっており、DFB型の光共振器としての役割も担っている。
本実施例ではファブリ・ペロー型のレーザ・ダイオードを図面に使用しているが、実施例2や実施例3で紹介したDBR型やDFB型のレーザ・ダイオードに適用しても差し支えない。
図1A~図1F、図10A~10B、及び図2A~図2F、図11A~図11Bには製造工程順に断面構造を示す。また、図3A~図3F、図12A~図12Bに上から見た製造工程順の平面図を示す。
ここで、図1A~図1F、図10A~10B及び図2A~図2F、図11A~図11Bはそれぞれ図3A~図3F、図12A~図12Bにおける断面23、及び24で切り出した時の構造を表している。本実施例におけるデバイスの完成図は図10B、図11B及び図12Bである。
なお、図10B及び図11Bの断面図は、それぞれ図12Bの切出し線23,24で示す位置で切り出した時の本実施例におけるデバイスの完成図である。
表面にのみシリコン・ナイトライド201を堆積させることによってゲルマニウム発光層7に伸長歪みを印加することが出来る。
この際、二酸化シリコンと電極では十分にエッチングの選択比が大きいのでn型電極とp型電極に段差があっても問題なく開口することが出来る。
なお、パターニングの方法としてはドライエッチングを用いても差し支えない。
まず、図10Bにおいて、p型電極5、n型電極8の間にゲルマニウム発光層7が形成されている。なお、ゲルマニウム発光層7に存在する貫通転位は1×106/cm2以下であるので結晶欠陥に由来するキャリアトラップが少ないと共に高電流を印加する事が可能となっている。
なお、ゲルマニウム発光層7は細線形状に加工されており、ファブリ・ペロー型の光共振器としての役割も担っている。
レーザ光はシリコン基板1に対して平行に出射されるため、オンチップ上での光配線などの用途に最適であることも実証された。
なお、図13F及び図14Fの断面図は、それぞれ図15Fの切出し線23,24で示す位置で切り出した時の本実施例におけるデバイスの完成図である。
まず、図13A、図14A及び図15Aに示すように、支持基板として、シリコン基板301、埋め込み酸化膜(Buried Oxide:以下BOXと略す)として二酸化シリコン302及びGermanium On Insulator(以下GOIと略す)303層が積層されたGOI基板を用意する。
1000nmと厚い二酸化シリコン302を形成しているため、シリコン基板301に強い圧縮応力が印加されており、表面と裏面に同じ膜厚だけ形成させることでウェハ全体として反らないように工夫されている。この裏面の二酸化シリコン302もプロセス中に無くならないように注意を払わなくてはならない。
洗浄やウェットエッチングのプロセス中に裏面の二酸化シリコン302が消失してしまうとウェハ全体が反ってしまい、静電チャックにウェハが吸着されないようになり、その後の製造プロセスが行えなくなる懸念がある。
また、本実施例で行ったようにGOI303をメサ形状に加工する代わりに、Shallow Trench Isolation (STI)やLocal Oxidation of Silicon (LOCOS)工程などを用いて素子分離を施しても差し支えない。
イオン注入の加速電圧を高く設定しすぎると、イオン注入した領域のGOI303のすべてを非晶質化してしまうため、その後のアニール処理を施しても、単結晶性が回復せずに、多結晶となってしまうという問題が生じる。
引き続きレジストを塗布した後に、フォトリソグラフィーによるマスク露光によって、所望の領域にのみレジストを残した後に、異方性ドライエッチングを施す事によって、シリコン・ナイトライド307を加工し、図13D、図14D及び図15Dの状態とした。
加工されたシリコン・ナイトライド307は、発光層として不純物がドーピングされていないGOI303の上部に配置されており、基板の水平方向に対して、発光層303に光を閉じ込める機能を有する。
なお、本実施例ではシリコン・ナイトライドを細線状に加工し、ファブリ・ペロー型のレーザ・ダイオードを作成しているが、さらに発光層であるGOI303の両端にも周期的にシリコン・ナイトライドの小片を配置することによってDBR型のレーザ・ダイオードを作製することも可能である。
また、発光層であるGOI303上にシリコン・ナイトライドの小片を周期的に配置することでDFB型のレーザ・ダイオードを作製することも可能である。
引き続き、レジストを塗布した後に、フォトリソグラフィーによるマスク露光によって、所望の領域にのみレジストを残した後に、ウェットエッチングを施す事によって、二酸化シリコンを加工し、図13E、図14E及び図15Eの状態とし、p型電極、n型電極部分を開口した。
なお、パターニングの方法としてはドライエッチングを用いても差し支えない。
引き続き、水素アニール処理を施し、プロセス中に生じた欠陥を水素終端する処理を行うことで図13F、図14F及び図15Fの状態としてデバイスを完成させた。
まず、図13Fにおいて、p型電極305、n型電極306の間にゲルマニウム発光層303が形成されている。なお、ゲルマニウム発光層303に存在する貫通転位は1×106/cm2以下であるので結晶欠陥に由来するキャリアトラップが少ないと共に高電流を印加する事が可能となっている。
レーザ光はシリコン基板1に対して平行に出射されるため、オンチップ上での光配線などの用途に最適であることも実証された。
なお、図16G及び図17Gの断面図は、それぞれ図18Gの切出し線23,24で示す位置で切り出した時の本実施例におけるデバイスの完成図である。
まず、図16A、図17A及び図18Aに示すように、支持基板として、シリコン基板401、埋め込み酸化膜(Buried Oxide: 以下BOXと略す)として二酸化シリコン402及びGermanium On Insulator(以下GOIと略す)403層が積層されたGOI基板を用意する。
1000nmと厚い二酸化シリコン402を形成しているため、シリコン基板401に強い圧縮応力が印加されており、表面と裏面に同じ膜厚だけ形成させることでウェハ全体として反らないように工夫されている。この裏面の二酸化シリコン402もプロセス中に無くならないように注意を払わなくてはならない。洗浄やウェットエッチングのプロセス中に裏面の二酸化シリコン402が消失してしまうとウェハ全体が反ってしまい、静電チャックにウェハが吸着されないようになり、その後の製造プロセスが行えなくなる懸念がある。
また、本実施例で行ったようにGOI403をメサ形状に加工する代わりに、Shallow Trench Isolation (STI)やLocal Oxidation of Silicon (LOCOS)工程などを用いて素子分離を施しても差し支えない。
この際、酸化された部分のGOIの膜厚が50nmになるように酸化時間を制御した。
この工程によってGOI403をリッジ形状の導波路に加工し、光閉じ込め層としての機能を有すようにした。
二酸化シリコン407はこの後のプロセスで導入されるイオン注入によって基板が受けるダメージを軽減するばかりでなく、活性化熱処理によって不純物が大気中に抜けるのを抑制する役割がある。
この際に、光閉じ込め層で自由キャリア吸収が生じるのを防止するために、GOI403のリッジ形状部分には不純物を注入しないように注意する必要がある。
不純物注入に際しては、まず、フォトリソグラフィーを用いたレジスト・パターニングによって、所望の領域のみにレジストを残した後に、BF2イオンをドーズ量1×1015/cm3でイオン注入することによって、GOI403中に、p型拡散層408を形成した。
このイオン注入工程においては、イオンが注入された部分のGOI403がアモルファス化するため、結晶性が悪くなる。
イオン注入の加速電圧を高く設定しすぎると、イオン注入した領域のGOI403のすべてを非晶質化してしまうため、その後のアニール処理を施しても、単結晶性が回復せずに、多結晶となってしまうという問題が生じる。
引き続き、レジストを塗布した後に、フォトリソグラフィーによるマスク露光によって、所望の領域にのみレジストを残した後に、ウェットエッチングを施す事によって、二酸化シリコンを加工し、図16F、図17F及び図18Fの状態とし、p型電極、n型電極部分を開口した。
なお、パターニングの方法としてはドライエッチングを用いても差し支えない。
まず、図16Gにおいて、p型電極408、n型電極409の間にゲルマニウム発光層403が形成されている。なお、ゲルマニウム発光層403に存在する貫通転位は1×106/cm2以下であるので結晶欠陥に由来するキャリアトラップが少ないと共に高電流を印加する事が可能となっている。ゲルマニウム発光層403はリッジ形状に加工されており、ファブリ・ペロー型の光共振器としての機能を有している。
発光した光はリッジ構造のゲルマニウム発光層303に強く閉じ込められ、しきい値以上の電流を流すと誘導放出が引き起こされ、レーザ発振した。
その結果として、リッジ形状を用いていないレーザ・ダイオードではしきい値電流が10mAであったのを3mAにまで低減することができた。
発振波長は設計波長である約1500nmであった。発光層には強い歪みは印加されておらず、ゲルマニウム本来のバンドギャップエネルギーで発光する。
レーザ光はシリコン基板1に対して平行に出射されるため、オンチップ上での光配線などの用途に最適であることも実証された。
また、電子回路と混載させるときには、上述の工程の幾つかをトランジスタ形成の工程と同時に行うことが出来る。このように通常のシリコン・プロセスを通して光デバイスを作成すると、電子デバイスとの混載は容易である。
2…二酸化シリコン、
3…GOI(Germanium On Insulator)、
4…二酸化シリコン、
5…p型拡散層電極、
6…二酸化シリコン、
7…単結晶ゲルマニウム、
8…n型拡散層電極、
9…二酸化シリコン、
10…TiN電極、
11…Al電極、
101…アモルファス・シリコン・DBRミラー、
102…二酸化シリコン、
201…シリコン・ナイトライド、
301,401…シリコン基板、
302,402…二酸化シリコン、
303,403…GOI(Germanium On Insulator)、
304,404…二酸化シリコン、
305,408…p型拡散層電極、
306,409…n型拡散層電極、
307…シリコン・ナイトライド、
308…二酸化シリコン、
309,411…TiN電極、
310,412…Al電極、
405…シリコン・ナイトライド、
406…二酸化ゲルマニウム、
407,410…二酸化シリコン。
Claims (17)
- シリコン基板上の二酸化シリコン膜上に設けられた単結晶ゲルマニウム層からなる発光部と、
前記単結晶ゲルマニウム層の一端に隣接して設けられた第1の導電型を有する第1電極と、
前記単結晶ゲルマニウム層の他端に隣接して設けられた前記第1の導電型と逆の導電型を有する第2電極と、を有し、
前記第1電極と前記第2電極との間に電流を流すことによって前記発光部より光を発生させることを特徴とする発光素子。 - 請求項1記載の発光素子において、
前記第1電極と、前記第2電極と、前記発光部とが前記シリコン基板の主面に平行して配列され、前記二酸化シリコンに隣接して設けられていることを特徴とする発光素子。 - 請求項2記載の発光素子において、
前記第1電極は、n型もしくはp型に不純物をドーピングされたゲルマニウムで構成され、
前記第2電極は、前記第1電極と逆の導電型の不純物をドーピングされたゲルマニウムで構成されていることを特徴とする発光素子。 - 請求項2記載の発光素子において、
前記発光部に隣接した誘電体を介して
光共振器として動作する程度の大きさの細線状の形状を有する第1の誘電体からなる誘電体層が設けられていることを特徴とする発光素子。 - 請求項4記載の前記発光素子において、
前記第1の誘電体が、単結晶シリコン、多結晶シリコン、アモルファス・シリコン、二酸化シリコン、窒化シリコン、SiON、Al2O3、Ta2O5、HfO2、TiO2のいずれか、またはその組み合わせからなる材料で構成されることを特徴とする発光素子。 - 請求項5記載の発光素子において、
前記第1の誘電体の細線状部の両端に小片に加工された第2の誘電体からなる誘電体が一つ、または複数配置されていることを特徴とする発光素子。 - 請求項2記載の発光素子において、
前記発光部に隣接した誘電体を介して周期的に配置された小片状の第2の誘電体を複数有することを特徴とする発光素子。 - 請求項2記載の発光素子において、
前記発光部は、リッジ型構造を有していることを特徴とする発光素子。 - 請求項8記載の発光素子において、
前記発光部の両端に小片に加工された第2の誘電体からなる誘電体が一つ、または複数配置されていることを特徴とする発光素子。 - 請求項8記載の発光素子において、
前記発光部に隣接した誘電体を介して周期的に配置された小片状の第2の誘電体を複数有することを特徴とする発光素子。 - 請求項1記載の発光素子において、
前記第1電極が、前記二酸化シリコンに隣接して設けられ、前記第1電極上に前記発光部が設けられ、前記発光部上に前記第2電極が設けられていることを特徴とする発光素子。 - 請求項11記載の発光素子において、
前記第1電極は、p型に不純物をドーピングされたゲルマニウムで構成され、
前記第2電極は、n型に不純物をドーピングされたシリコン、もしくはシリコン・ゲルマニウムで構成されていることを特徴とする発光素子。 - 請求項11記載の発光素子において、
前記発光部が光共振器として動作する程度の大きさの細線状の形状を有することを特徴とする発光素子。 - 請求項13記載の発光素子において、
前記発光部の細線状部の両端に小片に加工された第2の誘電体からなる誘電体が一つ、または複数配置されていることを特徴とする発光素子。 - 請求項14記載の発光素子において、
前記第2の誘電体が単結晶シリコン、多結晶シリコン、アモルファス・シリコン、二酸化シリコン、窒化シリコン、SiON、Al2O3、Ta2O5、HfO2、TiO2のいずれか、またはその組み合わせからなる材料で構成されることを特徴とする発光素子。 - 請求項11記載の発光素子において、
小片状の形状を有する発光部を複数有し、前記発光部のそれぞれが互いに平行して前記二酸化シリコン上に配列されていることを特徴とする発光素子。 - 請求項1記載の発光素子において、
前記発光素子上に窒化シリコン膜が設けられていることを特徴とする発光素子。
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WO2018037450A1 (ja) * | 2016-08-22 | 2018-03-01 | 富士通株式会社 | 光デバイス及び光デバイスの製造方法 |
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EP3266079B1 (fr) | 2015-03-06 | 2020-07-08 | STMicroeletronics Crolles 2 SAS | Laser germanium sur silicium en technologie cmos |
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