Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
  • H01L22/10—Measuring as part of the manufacturing process
  • H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
  • G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
  • G01N27/62—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating the ionisation of gases, e.g. aerosols; by investigating electric discharges, e.g. emission of cathode
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02612—Formation types
  • H01L21/02617—Deposition types
  • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
  • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
  • H01L21/3065—Plasma etching; Reactive-ion etching
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
  • H01L22/10—Measuring as part of the manufacturing process
  • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

Definitions

• substrates e.g., semiconductor wafers
• substrates e.g., semiconductor wafers
• RF Radio Frequency
• plasma etch processes it is paramount that the stability and uniformity of the plasma is controlled in order to improve process efficiency and yield for the substrate under process. This can be accomplished through a variety of methods, one of which is to control the plasma formation through the use of mechanical and electrical elements within the plasma chamber to confine the plasma to the process region of interest.
• Fig. 1 is an example system configuration for producing confined multi-frequency capacitive RF plasma, in accordance with an embodiment of the present invention.
• FIG. 2 illustrates, in accordance with an embodiment of the present invention, a simplified circuit of the RF components of Fig. 1.
• FIG. 3 illustrates, in accordance with an embodiment of the present invention, the correlation between the ESC pole voltage and the state of plasma confinement.
• Fig. 4 is a flow diagram of an example algorithm implementing the plasma unconfinement detection technique, in accordance with an embodiment of the present invention.
• the plasma unconfinement detection methods employ an analog and/or digital circuit that can actively poll the RF voltage at the powered electrode in the form of an Electrostatic Chuck(ESC) as well as the open loop response of the bias power supply (PSU) responsible for chucking a wafer to the ESC.
• Embodiments of the invention facilitate detection of both a change in the RF voltage delivered to the ESC as well as a change in the open loop response of the PSU. By simultaneously monitoring these electrical signals, the disclosed techniques can detect when plasma changes from a confined to an unconfined state.
• RF_VDT_ESC and the open loop response (OLR_DC_BIAS) of the DC bias ESC power supply are examined.
• OLR_DC_BIAS open loop response
• an abnormal condition alert is triggered. If the magnitude of the changes is above a certain threshold that has previously been empirically determined to be indicative of a plasma unconfinement event, a plasma unconfinement condition is deemed to have occurred and an unconfinement alert signal is generated, in one or more embodiments.
• Fig. 1 is an example system configuration for generating confined multi- frequency capacitive RF plasma, where the powered electrode is a bipolar ESC. Plasma is also confined by a set of circular quartz rings, controlling the flow of gas and thus controlling the space within which the plasma exists.
• Plasma processing system 100 is a multi-frequency capacitively-coupled plasma processing system in which three RF power supplies 102, 104, and 106 deliver RF voltages to an ESC chuck 108 via a match network 110.
• 3 RF frequencies (2MHz, 27MHz, and 60MHz) are employed although any number and range of frequencies may be employed.
• ESC 108 is a bipolar ESC in that there are two poles: a positive pole 120 and a negative pole 122.
• An ESC PSU 126 supplies the clamping voltages to poles 120 and 122 via conductors 128 and 130 respectively.
• a center tap 140 drives the DC potential of ESC 108 to bias the DC potential of the ESC 108.
• Capacitor divider network 150 (comprising capacitors 152 and 154) and RF voltage probe 156 are employed to derive an ESC bias set point signal, which is input as a feedback signal to ESC PSU 126 to control the ESC bias provided to ESC 108. Further details regarding RF voltage probe 156 are disclosed in a commonly-owned provisional patent application entitled “BIAS COMPENSATION APPARATUS AND METHODS THEREFOR", US Application Number 61/303,628, filed on February 10, 2010 by John Valcore, Jr.
• the inherent delay in this feedback loop results in the presence of an momentary response that is detectable at center tap 140 when a plasma unconfinement event occurs.
• This momentary, essentially open-loop response is brief and occurs before the feedback signal from RF voltage probe 156 can compensate.
• the other metric of the two metrics indicative of a plasma unconfinement event is the rate of change and optionally magnitude of the RF voltage delivered to ESC chuck 108, as discussed earlier.
• a wafer is typically disposed on a powered electrode 168 which is in turn disposed above ESC chuck 108.
• a bulk plasma 170 is formed above the wafer, and is confined by a set of confinement rings 172 as well by upper grounded electrode 174.
• Fig. 2 illustrates a simplified circuit of the RF components of Fig. 1.
• the impedance matching network 1 10 and independent RF sources (102, 104, and 106) of Fig. 1 are consolidated into a single RF source 202 in Fig. 2.
• Powered electrode 168, grounded electrode 174, and plasma confinement rings 172 of Fig. 1 are represented by a simple variable capacitor 210 with plate 210a representing powered electrode 168 and plate 210b representing grounded electrode 174.
• a first order approximation of the equivalent electrical circuit for the capacitive chamber in Fig. 1 can be reduced to Fig. 2 by ignoring inductive and resistance circuit components.
• This simplified circuit can be used to illustrate the correlation between the plasma impedance, the magnitude of the RF voltage delivered to the ESC chuck and the state of plasma confinement.
• capacitance is defined by:
• C is the capacitance
• K is the dielectric constant of the electrodes
• E is the permittivity of free space
• A is the area of the electrodes
• D is the distance between the electrodes.
• the confinement rings control the capacitance by
• impedance is defined by:
• C is the capacitance. If f is constant, it can be seen from Eq. 2 that Z is inversely proportional to C.
• RF power delivered is a function of impedance.
• Z is the impedance
• V is voltage
• I is current.
• Z can be simplified to be l/(2*Pi*f*C) (see Eq. 2 above).
• Fig. 3 illustrates the correlation between ESC pole voltage(s) and the state of plasma confinement.
• a parallel plate capacitor 302 comprising plate 302a (representing the ESC clamp electrode) and plate 302b (representing the wafer) is presented.
• Parallel plate capacitor 302 is formed between the ESC pole and the plasma sheath, where the ceramic and wafer form the dielectric between the two plates.
• the ESC pole is driven by a DC power supply 310 and the sheath voltage is a function of plasma acting as a DC source.
• the ratio of powered electrode voltage to ground electrode voltage is equal to the ratio of ground electrode area to powered electrode area (ratio holds true for both DC and RF), as the area of the ground electrode increases due to the occurrence of an unconfined plasma event and the powered electrode area remains constant, the sheath voltage increases.
• the DC voltage at the ESC pole is a function of voltage supplied by the ESC PSU 310 as well as the charge on the opposite pole and the capacitance formed by the two poles.
• the sheath voltage increases as the plasma changes from a confined to unconfined state and the capacitance remains constant between the poles, the ESC pole will be charged by the sheath voltage. This charging effect can be seen in the impulse response of the ESC PSU 310 as the plasma goes unconfined.
• the center tap DC voltage supply will oscillate as a function of the load change induced by the charging of the ESC pole voltage.
• the center tap DC supply is used to maintain the reference voltage for the ESC clamp voltage supply for the purpose of providing a consistent clamp force on the wafer regardless of the plasma sheath potential.
• the momentary open loop response of the ESC PSU 310 (present at the center tap) provides the second metric used in detecting the state of plasma confinement (and correspondingly the state of plasma unconfinement) .
• PSU open loop response in response to the plasma changing from a confined to unconfined state provides the necessary parameters for detecting the state change of plasma confinement.
• Fig. 4 is a flow diagram of an example algorithm implemented within a microprocessor and/or via code, with the input parameters being the DC voltage measured at the ESC PSU center tap (402) and a RF voltage probe parameter (404).
• the RF voltage probe parameter 404 can be a singular or a composite signal representative of the RF voltage at the ESC.
• the RF Voltage parameter is labeled Broadband RF (BB RF) signal, and will be referred to as BB RF from here forward.
• BB RF Broadband RF
• BB RF signal and the ESC PSU Center Tap voltage are fed through independent low pass filters (408 and 406 respectively).
• Fig. 4 refers to a first order low pass filter known as a simple moving average. However, it should be understood that any other suitable filter, whether analog or digital, may also be employed.
• the output of each respective filter is then compared to the current sample of each respective signal (41 and 412). The comparison is shown in blocks 414 and 416.
• the plasma unconfinement detection scheme may be implemented within the analog domain using analog low pass filters and comparators and/or within the digital domain using a DSP, FPGA/CPLD, or microprocessor.
• the RF Voltage probe can be located anywhere along the transmission line between the impedance matching network and the powered electrode, as seen in Fig. 1.
• the ESC PSU center tap voltage can be measured anywhere between the ESC and the ESC PSU internal circuit.
• a high impedance voltage divider at the base of the ESC is employed, as seen in Fig. 1, and the ESC PSU center tap voltage at the direct output of the ESC PSU. Both of these signals may then be fed, in one or more embodiments, into a PIC 18F4523 8-bit microprocessor with an equivalent 40MHz clock (available from Microchip Technology, Inc. of Chandler, AZ).
• the time scale and direction of the transient responses may be a function of the driving RF frequencies, as well as the amount of power associated with each RF frequency.
• RF signals with more power tend to dominate, and the responses at these frequencies may be more pronounced, which render detection more reliable.
• embodiments of the invention enable the detection of an abnormal plasma condition (of which plasma unconfinement is an example) without requiring the use of an intrusive, in-situ monitoring instrument. In so doing, issues regarding plasma-induced wear, contamination, and replacement/cleaning associated with such in-situ monitoring instruments are eliminated.
• an abnormal plasma condition of which plasma unconfinement is an example
• embodiments of the invention provide a robust technique for detecting abnormal plasma conditions, thereby enabling the tool host to provide timely corrective measures or to shut down the tool to avoid further damage.

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• 2010
  • 2010-10-19 US US12/907,859 patent/US8901935B2/en active Active
  • 2010-11-19 SG SG10201406957PA patent/SG10201406957PA/en unknown
  • 2010-11-19 CN CN201080051817.1A patent/CN102612738B/zh active Active
  • 2010-11-19 WO PCT/US2010/057478 patent/WO2011063262A2/en not_active Ceased
  • 2010-11-19 JP JP2012540099A patent/JP5837503B2/ja active Active
  • 2010-11-19 KR KR1020127012991A patent/KR101821424B1/ko active Active
  • 2010-11-19 TW TW099140088A patent/TWI529844B/zh active

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