WO2011055511A1 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- WO2011055511A1 WO2011055511A1 PCT/JP2010/006302 JP2010006302W WO2011055511A1 WO 2011055511 A1 WO2011055511 A1 WO 2011055511A1 JP 2010006302 W JP2010006302 W JP 2010006302W WO 2011055511 A1 WO2011055511 A1 WO 2011055511A1
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- Prior art keywords
- optical
- semiconductor device
- optical waveguide
- package substrate
- flexible
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 159
- 238000000034 method Methods 0.000 title claims abstract description 14
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 9
- 230000003287 optical effect Effects 0.000 claims abstract description 454
- 239000000758 substrate Substances 0.000 claims abstract description 151
- 238000009429 electrical wiring Methods 0.000 claims description 27
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0232—Optical elements or arrangements associated with the device
- H01L31/02325—Optical elements or arrangements associated with the device the optical elements not being integrated nor being directly associated with the device
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4204—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
- G02B6/4214—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4219—Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
- G02B6/4236—Fixing or mounting methods of the aligned elements
- G02B6/4245—Mounting of the opto-electronic elements
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4256—Details of housings
- G02B6/4257—Details of housings having a supporting carrier or a mounting substrate or a mounting plate
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4274—Electrical aspects
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/43—Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
Definitions
- the present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly, to a semiconductor device that inputs and outputs by an optical signal and a manufacturing method thereof.
- the crosstalk between electrical wirings increases as the frequency increases. Therefore, as the signal transmission rate increases, signal waveform deterioration due to crosstalk becomes more severe. In order to reduce crosstalk, it is necessary to widen the wiring interval or provide a shield between the wirings. For this reason, the mounting density of the wiring is lowered, which leads to an increase in the size of the apparatus. Furthermore, since the electrical signal is affected by electromagnetic noise, a shield or the like for reducing the influence of electromagnetic noise is required. This also leads to a reduction in the wiring mounting density, which similarly increases the size of the apparatus.
- Optical wiring has the following advantages over electrical wiring.
- optical wiring is so small that high frequency loss is negligible compared to electrical wiring. For this reason, even when a high-speed and large-capacity optical signal is transmitted, the deterioration of the signal is so small that it can be ignored. Therefore, a waveform shaping circuit is unnecessary.
- the optical wiring since the optical wiring has no crosstalk, it is not necessary to widen the distance between the optical wirings, and shielding between the optical wirings is also unnecessary. Furthermore, since the optical wiring is not affected by electromagnetic noise, it is not necessary to shield against noise.
- an optical interface that performs mutual conversion between electrical signals and optical signals.
- an optical interface includes an optical element and a drive circuit that drives the optical element.
- the optical element is a laser diode that is a light emitting element, a photodiode that is a light receiving element, or the like.
- the drive circuit is a driver or receiver that drives the optical element.
- FIG. 12A is a top view showing a configuration of an LSI package 1000 having optical input / output.
- 12B is a cross-sectional view of the LSI package 1000 taken along the line XIIB-XIIB in FIG. 12A.
- an LSI chip 61 and an optical element chip 63 are arranged on the upper surface of the package substrate 62.
- the LSI chip 61 and the optical element chip 63 are electrically and mechanically connected to the electric wiring 66 of the package substrate 62 by flip chip connection or the like.
- the LSI chip 61 and the optical element chip 63 are electrically connected via the electrical wiring 66.
- the LSI package 1000 is mounted on the board 71.
- a plurality of optical waveguides 72 are formed on the board 71.
- an LSI chip 61 and an optical element chip 63 are mounted on the upper surface of the package substrate 62 via bumps 77.
- the LSI chip 61 and the optical element chip 63 are electrically connected via an electric wiring 66.
- An optical via 64 is formed in the package substrate 62 immediately below the optical element chip 63.
- a solder ball 67 is disposed on the lower surface of the package substrate 62.
- the solder ball 67 is electrically connected to the LSI chip 61, and is used for power feeding, GND (ground) connection, and the like.
- the package substrate 62 is electrically and mechanically connected to the board 71 by solder balls 67, and is used for power supply, GND (ground) connection, and the like.
- electrical wiring (not shown) and an optical waveguide 72 are formed on the board 71.
- a mirror 73 is formed at the end of the optical waveguide 72.
- the electrical signal output from the LSI chip 61 is input to the optical element chip 63 via the electrical wiring 66.
- This electrical signal is converted into an optical signal and emitted from the optical element chip 63.
- the optical signal emitted from the optical element chip 63 propagates to the lower surface side of the package substrate 62 through the optical via 64 formed in the package substrate 62. Then, the light enters the optical waveguide 72 of the board 71, undergoes optical path conversion by the mirror 73 formed in the optical waveguide 72, and propagates.
- the optical signal that has propagated through the optical waveguide 72 of the board 71 is optically converted by the mirror 73 and enters the optical via 64.
- the light propagates to the upper surface side of the package substrate 62 through the optical via 64 and enters the optical element chip 63.
- the optical signal incident on the optical element chip 63 is converted into an electrical signal and output from the optical element chip 63.
- the output electrical signal is input to the LSI chip 61 via the electrical wiring 66. Therefore, if the LSI package 1000 is used, it is possible to realize an optical signal exchange between the LSIs mounted in different packages via the optical waveguide of the board.
- a method using an optical via for example, Non-Patent Document 1 and a method using an optical pin (for example, Patent Document 1) have been proposed.
- the LSI package 1000 shown in FIGS. 12A and 12B has a configuration using optical vias.
- an optical via formed in an optical element chip and an optical waveguide formed in a board are provided by providing a path for light vertically penetrating the package substrate, such as an optical via or an optical pin. Realizes optical coupling.
- the LSI package according to the above-described configuration has the following problems.
- optical vias and optical pins that penetrate the package substrate must be formed.
- the optical via and the optical pin are formed or arranged in a hole formed in the package substrate with a tool such as a drill.
- a tool such as a drill.
- the positional accuracy is limited by the mechanical accuracy, and the positional accuracy required for the optical element cannot be realized. Therefore, there is a large misalignment between the optical element and the optical via, and the optical coupling efficiency is low.
- the optical via or optical pin has a linear shape
- the optical coupling point between the optical via or optical pin and the optical waveguide of the board is located directly below the optical element. Therefore, the optical coupling portion between the optical via or optical pin and the optical waveguide of the board spreads over a wide range. For this reason, it is easily affected by misalignment caused by warpage due to stress or heat of the package substrate or board, and the optical coupling efficiency is deteriorated.
- the present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor device capable of inputting and outputting optical signals with excellent optical coupling efficiency and a method for manufacturing the same. is there.
- a semiconductor device includes a semiconductor integrated circuit, a package substrate on which the semiconductor integrated circuit is mounted, a first surface of the package substrate, and the semiconductor integrated circuit via the package substrate.
- An optical element electrically connected to the circuit, one end is optically coupled to the optical element, and the other end is disposed on the second surface side of the package substrate facing the first surface, and is flexible. And a flexible optical waveguide.
- a method for manufacturing a semiconductor device wherein a semiconductor integrated circuit is mounted on a package substrate, an optical element is disposed on a first surface of the package substrate, and the semiconductor integrated circuit is interposed through the package substrate.
- a second surface side of the package substrate that is electrically connected to the circuit and optically couples one end of a flexible optical waveguide having flexibility with the optical element and has the other end facing the first surface Is to be placed.
- the present invention it is possible to provide a semiconductor device capable of inputting / outputting an optical signal with excellent optical coupling efficiency and a manufacturing method thereof.
- FIG. 1 is a top view of a semiconductor device according to a first embodiment; 1 is a cross-sectional view of a semiconductor device according to a first embodiment. 1 is a bottom view of a package of a semiconductor device according to a first embodiment; 3 is a top view of a flexible optical waveguide substrate of the semiconductor device according to the first embodiment; FIG. 6 is a top view of a semiconductor device according to a second embodiment; FIG. FIG. 6 is a cross-sectional view of a semiconductor device according to a second embodiment. FIG. 6 is a top view of a semiconductor device according to a third embodiment. FIG. 6 is a cross-sectional view of a semiconductor device according to a third embodiment. FIG.
- FIG. 6 is a top view of a semiconductor device according to a fourth embodiment.
- FIG. 6 is a cross-sectional view of a semiconductor device according to a fourth embodiment.
- FIG. 9 is a top view of a semiconductor device according to a fifth embodiment.
- FIG. 6 is a cross-sectional view of a semiconductor device according to a fifth embodiment.
- FIG. 10 is a top view of a semiconductor device according to a sixth embodiment.
- FIG. 9 is a cross-sectional view of a semiconductor device according to a sixth embodiment.
- FIG. 9 is a top view of a semiconductor device according to a seventh embodiment.
- FIG. 9 is a cross-sectional view of a semiconductor device according to a seventh embodiment.
- FIG. 10 is a top view of a semiconductor device according to an eighth embodiment.
- FIG. 10 is a sectional view of a semiconductor device according to an eighth embodiment.
- FIG. 10 is a top view of a flexible optical waveguide substrate according to a ninth embodiment.
- FIG. 10 is a cross-sectional view of a flexible optical waveguide substrate according to a ninth embodiment.
- FIG. 10 is a cross-sectional view of an end portion of a flexible optical waveguide substrate according to a ninth embodiment.
- FIG. 10 is a bottom view of a package of a semiconductor device according to a ninth embodiment. It is a top view of the LSI package of a general semiconductor device. It is sectional drawing of the LSI package of a common semiconductor device.
- FIG. 1A is a top view of the semiconductor device 100 according to the first exemplary embodiment.
- FIG. 1B is a cross-sectional view of the semiconductor device 100 taken along the line IB-IB in FIG. 1A.
- 1C is a bottom view of the semiconductor device 100 along the IC-IC line in FIG. 1B.
- an LSI chip 1 which is a semiconductor integrated circuit and a flexible optical waveguide substrate 4 which is a flexible optical waveguide are mounted on a package substrate 2.
- the LSI chip 1 is mounted on the package substrate 2 by flip chip connection, for example, and is electrically and mechanically connected to the electrical wiring 6 formed on the package substrate 2.
- the flexible optical waveguide substrate 4 is manufactured using a resin or the like and can be bent and stretched.
- the flexible optical waveguide substrate 4 is bent, and one end thereof is connected to the electric wiring 6 on the upper surface of the package substrate 2, and the other end is connected to the lower surface of the package substrate 2 (FIGS. 1A to 1C).
- a plurality of optical waveguides 5 are formed on the flexible optical waveguide substrate 4.
- a first mirror 8 and a second mirror 9 are formed in each optical waveguide 5.
- an electrical wiring 16 and a pad (not shown) penetrating the flexible optical waveguide substrate 4 are formed.
- the optical element chip 3 is optically coupled and mounted on the flexible optical waveguide substrate 4 by flip chip connection, for example.
- the optical element chip 3 is electrically and mechanically connected to the electrical wiring 16.
- the flexible optical waveguide substrate 4 is electrically and mechanically connected to the electrical wiring 6 of the package substrate 2 via the bumps 17. Therefore, the LSI chip 1 and the optical element chip 3 are electrically connected via the electric wiring 6 and the electric wiring 16 (FIG. 1B).
- Package board 2 is mounted on board 11. Solder balls 7 are formed on the lower surface of the package substrate 2. The solder balls 7 electrically and mechanically connect the LSI chip 1 and the package substrate 2 and are used for power supply and GND connection, respectively. On the board 11, electrical wiring (not shown) and an optical waveguide 12 are formed. A third mirror 13 is formed at the end of the optical waveguide 12 (FIGS. 1A to 1C).
- FIG. 2 is a top view of the flexible optical waveguide substrate 4.
- the flexible optical waveguide substrate 4 is formed with a plurality of optical waveguides 5, a first mirror 8, and a second mirror 9.
- the first mirror 8 and the second mirror 9 are formed by a processing method using a dicing blade, for example.
- the first mirror 8 is formed at the optical element chip mounting position 10.
- the optical element chip mounting position 10 is a position where the optical element chip 3 is mounted.
- the second mirror 9 is formed at the end opposite to the optical element chip mounting position.
- the optical waveguide 5 is formed so as to be located immediately below each optical element formed in the optical element chip 3.
- Four optical elements (not shown) are formed on each of the optical element chips 3 of the semiconductor device 100.
- Four optical waveguides 5 are formed immediately below the optical element chip mounting position 10.
- the optical elements of the optical element chip 3 are formed at a constant pitch.
- a commercially available optical element chip generally has optical elements formed at a pitch of 250 ⁇ m.
- the optical elements of the optical element chip 3 are formed at a general pitch of 250 ⁇ m.
- the pitch of the optical waveguide 5 is 250 ⁇ m immediately below the optical element chip 3, but the pitch between adjacent optical element chips 3 is wider than 250 ⁇ m.
- the pitch of the optical waveguide 5 can be made narrower than 250 ⁇ m, for example, 125 ⁇ m.
- all or one of the optical waveguides 5 is formed in a curved shape, and the pitch of the optical waveguides 5 is gradually narrowed.
- the pitch of the optical waveguide 5 in the vicinity of the second mirror 9 is narrowed to 125 ⁇ m as compared with the vicinity of the optical element chip mounting position 10. That is, the pitch conversion of the optical waveguide 5 is realized by making all or one of the optical waveguides 5 into a curved shape.
- the electrical signal output from the LSI chip 1 is input to the optical element chip 3 via the electrical wiring 6 and the electrical wiring 16.
- the optical element chip 3 converts the input electric signal into an optical signal and outputs it.
- the optical signal output from the optical element chip 3 is optically converted by the first mirror 8 and enters the optical waveguide 5.
- the optical signal incident on the optical waveguide 5 propagates through the optical waveguide 5 to the lower surface side of the package substrate 2.
- the propagated optical signal is subjected to optical path conversion by the second mirror 9 and the third mirror 13, enters the optical waveguide 12, and propagates through the optical waveguide 12.
- the optical signal propagated through the optical waveguide 12 is optically path-converted by the third mirror 13 and the second mirror 9 and enters the optical waveguide 5.
- the optical signal incident on the optical waveguide 5 propagates through the optical waveguide 5 to the upper surface side of the package substrate 2.
- the propagated optical signal is optically path-converted by the first mirror 8 and enters the optical element chip 3.
- the optical element chip 3 converts the incident optical signal into an electrical signal and outputs it.
- the output electrical signal is input to the LSI chip 1 via the electrical wiring 16 and the electrical wiring 6.
- the semiconductor device 100 can be driven by the optical input / output signal. Therefore, according to the semiconductor device 100, optical signal transmission between LSI chips becomes possible.
- optical coupling between the optical element and the optical waveguide formed on the board can be realized without using an optical via or an optical pin.
- the optical element is optically coupled to the optical waveguide 5 formed on the flexible optical waveguide substrate 4. Since the optical waveguide 5 can be formed with good positional accuracy by lithography, the positional accuracy is higher than a method of forming using a drill such as an optical via or an optical pin. Therefore, the efficiency of optical coupling between the optical element and the optical waveguide can be improved.
- the pitch of the optical waveguide 5 of the flexible optical waveguide substrate 4 is pitch-converted so as to be wide at the optical element chip mounting position 10 and narrow at the second mirror 9 side.
- region required in order to optically couple the optical waveguide 5 and the optical waveguide 12 can be made narrower. For this reason, it is possible to reduce the influence of misalignment of the optical coupling caused by the stress of the package substrate 2 or the board 11 or warping due to heat. Therefore, according to this configuration, the efficiency of optical coupling can be further improved.
- bonding location of the optical waveguide 5 and the optical waveguide 12 can be arrange
- FIG. 3A is a top view of the semiconductor device 200 according to the second embodiment.
- 3B is a cross-sectional view of the semiconductor device 200 taken along the line IIIB-IIIB in FIG. 3A.
- the optical element chip 3 is directly mounted on the package substrate 2.
- the flexible optical waveguide substrate 4 is disposed on the upper side of the optical element chip 3. Therefore, in the semiconductor device 200, it is not necessary to provide the electric wiring 16 as shown in FIG.
- the mirror 8 is disposed so as to change the optical path of an optical signal that is emitted upward or incident from above with respect to the optical element chip. Since other configurations are the same as those of the semiconductor device 100 according to the first embodiment, description thereof is omitted.
- the same function as that of the semiconductor device 100 according to the first embodiment can be realized. Furthermore, the bending radius of the flexible optical waveguide substrate 4 can be made larger than that of the semiconductor device 100. As a result, the loss in the optical waveguide 5 can be reduced as compared with the semiconductor device 100.
- FIG. 4A is a top view of the semiconductor device 300 according to the third embodiment.
- 4B is a cross-sectional view of the semiconductor device 300 taken along the line IVB-IVB in FIG. 4A.
- the optical element chip 3 and the electronic element chip 14 are mounted on the flexible optical waveguide substrate 4.
- a driver and a receiver for driving an optical element are integrated on the electronic element chip 14.
- the electronic device and the electronic circuit integrated on the electronic element chip 14 can be arbitrary. For example, a driver or a receiver for driving an optical element or a circuit for performing parallel / serial conversion may be used. Good.
- the optical element chip 3 and the electronic element chip 14 are electrically connected via an electric wiring 16 formed on the flexible optical waveguide substrate 4. Since other configurations are the same as those of the semiconductor device 100 according to the first embodiment, description thereof is omitted.
- a parallel / serial conversion circuit or a serial / parallel conversion circuit can be integrated in the electronic element chip 14.
- the parallel electric signal output from the LSI chip 1 can be serialized and converted into an optical signal.
- the number of optical inputs and outputs can be reduced, and the density of the optical wiring can be improved.
- an electronic element chip 14 manufactured by a process or material different from that of the LSI chip 1.
- the LSI chip 1 is generally made of silicon CMOS (Complementary Metal Metal Oxide Semiconductor)
- CMOS Complementary Metal Metal Oxide Semiconductor
- a driver or receiver made of a compound semiconductor such as SiGe is used instead of silicon CMOS. That is, if a driver or receiver made of a compound semiconductor such as SiGe is used for the electronic element chip 14, an optical element that requires high voltage driving can be used.
- optical element chip 3 may be integrated with electronic devices and electronic circuits in addition to the optical elements. Not only electronic devices and electronic circuits but also optical elements may be integrated in the electronic element chip 14.
- FIG. 5A is a top view of the semiconductor device 400 according to the fourth embodiment.
- FIG. 5B is a cross-sectional view of the semiconductor device 400 taken along the line VB-VB in FIG. 5A.
- the optical element chip 3 and the electronic element chip 14 are directly mounted on the package substrate 2.
- the optical element chip 3 and the electronic element chip 14 are electrically connected via the electric wiring 6.
- the flexible optical waveguide substrate 4 is disposed on the optical element chip 3. Therefore, in the semiconductor device 200, it is not necessary to provide the electric wiring 16 as shown in FIG.
- the mirror 8 is disposed so as to change the optical path of an optical signal that is emitted upward or incident from above with respect to the optical element chip. Since other configurations are the same as those of the semiconductor device 100 according to the first embodiment, description thereof is omitted.
- the same function as the semiconductor device 300 according to the third embodiment can be realized. Furthermore, the bending radius of the flexible optical waveguide substrate 4 can be made larger than that of the semiconductor device 300. As a result, the loss in the optical waveguide 5 can be reduced as compared with the semiconductor device 300.
- FIG. 6A is a top view of the semiconductor device 500 according to the fifth embodiment.
- 6B is a cross-sectional view of the semiconductor device 500 taken along the line VIB-VIB of FIG. 6A.
- the electronic element chip 14 is directly mounted on the package substrate 2.
- the flexible optical waveguide substrate 4 is disposed above the electronic element chip 14, and the optical element chip 3 is disposed on the flexible optical waveguide substrate 4.
- the optical element chip 3 and the electronic element chip 14 are electrically connected via an electric wiring 16 formed so as to penetrate the flexible optical waveguide substrate 4.
- electrical pads are formed on both surfaces of the electronic element chip 14, and through electrodes (not shown) penetrating the chip are formed between the electrical pads. Since other configurations are the same as those of the semiconductor device 100 according to the first embodiment, description thereof is omitted.
- the same function as the semiconductor device 300 according to the third embodiment can be realized. Further, since the bending radius of the flexible optical waveguide substrate 4 can be increased as compared with the semiconductor device 300, the loss of the optical waveguide 5 can be reduced. Further, since the optical element chip 3 and the electronic element chip 14 are arranged so as to overlap in the vertical direction, the area occupied by the optical element chip 3 and the electronic element chip 14 can be narrower than that of the semiconductor device 300. As a result, the mounting density can be improved.
- FIG. 7A is a top view of the semiconductor device 600 according to the sixth embodiment.
- FIG. 7B is a cross-sectional view of the semiconductor device 600 taken along the line VIIB-VIIB in FIG. 7A.
- the electronic element chip 14 is disposed on the upper side of the flexible optical waveguide substrate 4.
- An optical element chip 3 is disposed below the flexible optical waveguide substrate 4.
- the electronic element chip 14 is electrically connected to the optical element chip 3 and the package substrate 2 via an electric wiring 16 formed so as to penetrate the flexible optical waveguide substrate 4.
- the through-electrode is not formed in the electronic element chip 14. Since other configurations are the same as those of the semiconductor device 100 according to the first embodiment, description thereof is omitted.
- the same function as the semiconductor device 500 according to the fifth embodiment can be realized. Further, in the semiconductor device 500, it is necessary to form a through electrode in the electronic element chip 14, but in this configuration, the through electrode is not necessary. Therefore, it is advantageous in that the cost required for manufacturing the electronic element chip 14 can be reduced.
- FIG. 8A is a top view of the semiconductor device 700 according to the seventh embodiment.
- FIG. 8B is a cross-sectional view of the semiconductor device 700 taken along line VIIIB-VIIIB in FIG. 8A.
- the electronic element chip 14 and the optical element chip 3 are vertically stacked and mounted on the upper side of the flexible optical waveguide substrate 4.
- the electronic element chip 14 and the package substrate 2 are electrically connected via an electrical wiring 16 formed so as to penetrate the flexible optical waveguide substrate 4. Since other configurations are the same as those of the semiconductor device 100 according to the first embodiment, description thereof is omitted.
- the same function as the semiconductor device 500 according to the fifth embodiment can be realized. Further, in this configuration, the optical element chip 3 and the electronic element chip 14 are directly connected by overlapping in the vertical direction. For this reason, the optical element chip 3 and the electronic element chip 14 are exchanged at a higher speed than the configuration in which the optical element chip 3 and the electronic element chip 14 are connected via the flexible optical waveguide substrate 4 as in the semiconductor device 500. It is possible to reduce the deterioration of the electric signal.
- FIG. 9A is a top view of the semiconductor device 800 according to the eighth embodiment.
- FIG. 9B is a cross-sectional view of the semiconductor device 800 taken along the line IXB-IXB in FIG. 9A.
- the electronic element chip 14 and the optical element chip 3 are vertically stacked and mounted on the lower side of the flexible optical waveguide substrate 4.
- the electronic element chip 14 and the package substrate 2 are electrically connected via an electrical wiring 16 formed on the flexible optical waveguide substrate 4. Since other configurations are the same as those of the semiconductor device 700 according to the seventh embodiment, description thereof is omitted.
- the bending radius of the flexible optical waveguide substrate 4 can be increased as compared with the semiconductor device 700.
- the loss in the optical waveguide 5 can be reduced as compared with the semiconductor device 700.
- FIG. 10A is a top view of the flexible optical waveguide substrate 40 according to the ninth embodiment.
- FIG. 10B is a cross-sectional view of the flexible optical waveguide substrate 40 taken along line XB-XB in FIG. 10A.
- FIG. 10C is a cross-sectional view of the end 90 taken along line XC-XC in FIG. 10A.
- the flexible optical waveguide substrate 40 is formed with multiple optical waveguides. In the present embodiment, as an example, a case where four layers of optical waveguides 51 to 54 are formed will be described.
- optical element chips 31 to 34 are mounted on the flexible optical waveguide substrate 40.
- the positions where these are mounted are indicated by dotted lines.
- Each of the optical element chips 31 to 34 is formed with four optical elements.
- Four flexible optical waveguides 51 to 54 are formed on the flexible optical waveguide substrate 40, respectively.
- First mirrors 81 to 84 are formed at the ends of the optical waveguides 51 to 54 on the side where the optical element chip 31 is mounted (FIG. 10A). That is, the optical element chips 31 to 34 are arranged so as to be optically coupled to the optical waveguides 51 to 54, respectively.
- the optical waveguide 51 is formed in the uppermost layer, and optical waveguides 52 to 54 are sequentially formed in the lower layers (FIGS. 10B and 10C).
- the flexible optical waveguide substrate 40 is provided with a step. Thereby, each optical waveguide and the optical element optically coupled thereto can be arranged at a distance as short as possible (FIG. 10B).
- second mirrors 91 to 94 for changing the optical path of the propagating light are formed at the ends of the optical waveguides 51 to 54, respectively (FIG. 10C).
- the pitch of the optical waveguides 51 to 54 gradually becomes narrower from the optical element chips 31 to 34 toward the end 90 through the curved portion.
- the optical waveguides 51 to 54 overlap the layers in the vertical direction, and the end portion 90 has a layer structure as shown in FIG. 10C.
- a step is formed in the flexible optical waveguide substrate 40, and the thickness of the flexible optical waveguide substrate 40 is gradually reduced from the mirror 91 toward the mirror 94. That is, according to this configuration, the width of the flexible optical waveguide substrate 40 on the end 90 side can be made narrower than that of the flexible optical waveguide substrate 4.
- FIG. 12 is a bottom view of the semiconductor device when the flexible optical waveguide substrate 40 is used in the first to eighth embodiments. As shown in FIG. 12, if the flexible optical waveguide substrate 40 is used, the width of the range where the second mirror is formed, that is, the range of the portion optically coupled to the board 11 can be narrowed. Therefore, the optical coupling point with the board 11 can be further arranged near the center of the package substrate 2.
- the influence of misalignment of the optical coupling caused by the warp due to the stress or heat of the package substrate 2 or the board 11 can be further reduced as compared with the first to eighth embodiments. Thereby, the optical coupling efficiency can be further improved, and the optical wiring density of the board 11 can be further improved.
- the optical waveguide 12 of the board 11 is also composed of a plurality of optical waveguide layers.
- the present invention is not limited to the above-described embodiments, and can be appropriately changed without departing from the spirit of the present invention.
- the optical waveguide of the flexible optical waveguide substrate and the optical waveguide of the board are optically coupled by the mirror.
- the second mirror of the flexible optical waveguide substrate is used.
- a condensing means such as a lens may be disposed between the mirror and the board mirror.
- the light conversion means is not limited to a mirror, and any means such as a grating coupler or a connector may be used.
- the package substrate and the board are connected by solder balls, but any connection method such as a socket may be used. Further, although the optical waveguide is formed on the surface of the board, the optical waveguide may be formed inside the board.
- the number of optical elements formed on the optical element chip is not limited to four and may be any number. Further, the number of optical elements formed in each optical element chip 3 may be different. Further, the optical element chip 3 may be formed by integrating not only the optical element but also any electronic device or electric circuit, for example, a driver or receiver for driving the optical element.
- the number of LSI chips mounted on the package substrate is not limited to one and may be plural.
- the LSI chip and the optical element chip are mounted by flip chip connection, but may be mounted by any mounting method such as wire bonding or TAB (Tape Automated Automated Bonding).
- the number of flexible optical waveguide substrates is not limited to four, and may be any number. Further, the flexible optical waveguide substrate may be connected to the package substrate 2 by any method other than the bump. Further, the first to third mirrors may be formed by any processing method such as laser processing instead of processing by a dicing blade.
- the number of optical waveguides formed on the flexible optical waveguide substrate 40 is not limited to four.
- the number of optical element chips 3 mounted on the flexible optical waveguide substrate 40 is not limited to four, and may be an arbitrary number.
- the optical element chips 31 to 34 are configured to be optically coupled to the optical waveguides 51 to 54, respectively.
- the optical waveguides optically coupled to the optical element chip may be arbitrarily combined.
- the flexible optical waveguide substrate 40 becomes thinner stepwise from the optical element chip 31 toward the optical element chip 34.
- the step is not limited to be provided stepwise, and a step is formed.
- the optical waveguides formed in a plurality of layers may not overlap at the end portion 90 or may partially overlap.
- the thickness of the flexible optical waveguide substrate 40 is gradually reduced from the mirror 91 toward the mirror 94.
- the step is not limited to being provided stepwise, and the step is not formed. Also good.
- the technology according to the present invention can be used for optical interconnection between semiconductor components such as LSIs used in devices such as servers, routers and computers.
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Abstract
Description
以下、図面を参照して本発明の実施の形態について説明する。まず、実施の形態1にかかる半導体装置の構成について説明する。図1Aは、実施の形態1にかかる半導体装置100の上面図である。図1Bは、図1AのIB-IB線における半導体装置100の断面図である。また、図1Cは、図1BのIC-IC線における半導体装置100の下面図である。
次に、実施の形態2にかかる半導体装置の構成について説明する。図3Aは、実施の形態2にかかる半導体装置200の上面図である。図3Bは、図3AのIIIB-IIIB線における半導体装置200の断面図である。半導体装置200では、光素子チップ3がパッケージ基板2に直接実装されている。フレキシブル光導波路基板4は光素子チップ3の上側に配置されている。従って、半導体装置200では、フレキシブル光導波路基板4に図1に示すような電気配線16を設けずともよい。ミラー8は、光素子チップに対して上方に出射する、または上方から入射する光信号を光路変換するように配置される。その他の構成は、実施の形態1にかかる半導体装置100と同様であるので説明を省略する。
次に、実施の形態3にかかる半導体装置の構成について説明する。図4Aは、実施の形態3にかかる半導体装置300の上面図である。図4Bは、図4AのIVB-IVB線における半導体装置300の断面図である。半導体装置300では、光素子チップ3及び電子素子チップ14がフレキシブル光導波路基板4に実装されている。半導体装置300においては、電子素子チップ14には光素子を駆動するドライバ、レシーバが集積されている。電子素子チップ14に集積される電子デバイスや電子回路は、任意のものとすることが可能であり、例えば、光素子を駆動するドライバやレシーバでもよく、パラレル/シリアル変換を行う回路であってもよい。そして、光素子チップ3と電子素子チップ14とは、フレキシブル光導波路基板4に形成された電気配線16を介して電気的に接続されている。その他の構成は、実施の形態1にかかる半導体装置100と同様であるので説明を省略する。
次に、実施の形態4にかかる半導体装置の構成について説明する。図5Aは、実施の形態4にかかる半導体装置400の上面図である。図5Bは、図5AのVB-VB線における半導体装置400の断面図である。半導体装置400では、光素子チップ3及び電子素子チップ14がパッケージ基板2に直接実装される。光素子チップ3と電子素子チップ14とは、電気配線6を介して電気的に接続されている。フレキシブル光導波路基板4は、光素子チップ3の上に配置されている。従って、半導体装置200では、フレキシブル光導波路基板4に図1に示すような電気配線16を設けずともよい。ミラー8は、光素子チップに対して上方に出射する、または上方から入射する光信号を光路変換するように配置される。その他の構成は、実施の形態1にかかる半導体装置100と同様であるので説明を省略する。
次に、実施の形態5にかかる半導体装置の構成について説明する。図6Aは、実施の形態5にかかる半導体装置500の上面図である。図6Bは、図6AのVIB-VIB線における半導体装置500の断面図である。半導体装置500は、電子素子チップ14がパッケージ基板2に直接実装される。電子素子チップ14の上側にはフレキシブル光導波路基板4が配置され、フレキシブル光導波路基板4の上には光素子チップ3が配置される。光素子チップ3と電子素子チップ14とは、フレキシブル光導波路基板4を貫通して形成される電気配線16を介して電気的に接続されている。また、電子素子チップ14の両面には電気パッド(不図示)が形成され、これら電気パッド間には、チップを貫通する貫通電極(不図示)が形成されている。その他の構成は、実施の形態1にかかる半導体装置100と同様であるので、説明を省略する。
次に、実施の形態6にかかる半導体装置の構成について説明する。図7Aは、実施の形態6にかかる半導体装置600の上面図である。図7Bは、図7AのVIIB-VIIB線における半導体装置600の断面図である。半導体装置600は、フレキシブル光導波路基板4の上側に電子素子チップ14が配置される。フレキシブル光導波路基板4の下側には光素子チップ3が配置されている。電子素子チップ14と、光素子チップ3及びパッケージ基板2と、はフレキシブル光導波路基板4を貫通して形成される電気配線16を介して電気的に接続されている。電子素子チップ14には、貫通電極は形成されていない。その他の構成は、実施の形態1にかかる半導体装置100と同様であるので、説明を省略する。
次に、実施の形態7にかかる半導体装置の構成について説明する。図8Aは、実施の形態7にかかる半導体装置700の上面図である。図8Bは、図8AのVIIIB-VIIIB線における半導体装置700の断面図である。半導体装置700は、フレキシブル光導波路基板4の上側に、電子素子チップ14及び光素子チップ3を垂直方向に重ねて実装している。電子素子チップ14とパッケージ基板2とは、フレキシブル光導波路基板4を貫通して形成される電気配線16を介して電気的に接続されている。その他の構成は、実施の形態1にかかる半導体装置100と同様であるので、説明を省略する。
次に、実施の形態8にかかる半導体装置の構成について説明する。図9Aは、実施の形態8にかかる半導体装置800の上面図である。図9Bは、図9AのIXB-IXB線における半導体装置800の断面図である。半導体装置800は、フレキシブル光導波路基板4の下側に、電子素子チップ14及び光素子チップ3を垂直方向に重ねて実装している。電子素子チップ14とパッケージ基板2とは、フレキシブル光導波路基板4に形成された電気配線16を介して電気的に接続されている。その他の構成は、実施の形態7にかかる半導体装置700と同様であるので、説明を省略する。
次に、実施の形態9について説明する。実施の形態9は、上述の実施の形態1~8において、フレキシブル光導波路基板の構成を変更したものである。よって、フレキシブル光導波路基板の構成以外には、実施の形態9と実施の形態1~8との構成は同様であるので、以下では実施の形態9にかかるフレキシブル光導波路基板40について説明する。図10Aは、実施の形態9にかかるフレキシブル光導波路基板40の上面図である。図10Bは、図10AのXB-XB線におけるフレキシブル光導波路基板40の断面図である。図10Cは、図10AのXC-XC線における端部90の断面図である。図2に示すフレキシブル光導波路基板4と比べて、フレキシブル光導波路基板40には、光導波路が多層化されて形成されている。本実施の形態では、一例として、4層の光導波路51~54が形成されている場合について説明する。
なお、本発明は上記実施の形態に限られたものではなく、趣旨を逸脱しない範囲で適宜変更することが可能である。例えば、上述の各実施の形態では、フレキシブル光導波路基板の光導波路と、ボードの光導波路と、をミラーにより光結合したが、結合効率を向上させるために、フレキシブル光導波路基板の第2のミラーと、ボードのミラーとの間にレンズなどの集光手段を配置してもよい。これにより、フレキシブル光導波路基板から出射された光を集光してボードの導波路に、また、ボードから出射された光を集光してフレキシブル光導波路基板の導波路に高効率で入射させることが可能となる。また、光変換手段はミラーに限られず、グレーティングカップラやコネクタなど、任意の手段を用いてもよい。
2 パッケージ基板
3 光素子チップ
4 フレキシブル光導波路基板
5 光導波路
6 電気配線
7 はんだボール
8 第1のミラー
9 第2のミラー
10 光素子チップ搭載位置
11 ボード
12 光導波路
13 第3のミラー
14 電子素子チップ
16 電気配線
17 バンプ
31~34 光素子チップ
40 フレキシブル光導波路基板
51~54 光導波路
61 LSIチップ
62 パッケージ基板
63 光素子チップ
64 光ビア
66 電気配線
67 はんだボール
71 ボード
72 光導波路
73 ミラー
77 バンプ
81~84 第1のミラー
90 端部
91~94 第2のミラー
100、200、300、400、500、600、700、800 半導体装置
1000 LSIパッケージ
Claims (25)
- 半導体集積回路と、
前記半導体集積回路が実装されるパッケージ基板と、
前記パッケージ基板の第1の面上に配置され、前記パッケージ基板を介して前記半導体集積回路と電気的に接続される光素子と、
一端が前記光素子と光結合され、他端が前記第1の面と対向する前記パッケージ基板の第2の面側に配置され、可撓性を有する可撓性光導波路と、を少なくとも備える、
半導体装置。 - 前記可撓性光導波路は、
可撓性を有する可撓性基板と、
前記可撓性基板に形成された複数の光導波路と、
前記複数の光導波路を伝搬する光の方向を変換する光路変換手段と、を備える、
請求項1に記載の半導体装置。 - 前記光路変換手段は、
前記複数の光導波路の一端又は両端に形成される、
請求項2に記載の半導体装置。 - 前記光路変換手段は、
前記複数の光導波路のうち、一部の前記光導波路の一端又は両端に形成される、
請求項3に記載の半導体装置。 - 前記光路変換手段は反射鏡である、
請求項2乃至4のいずれか一項に記載の半導体装置。 - 前記複数の光導波路はそれぞれ曲線部を備え、
前記光素子と光結合された一端での前記曲線部を備える前記光導波路間の間隔は、他端での間隔よりも大きい、
請求項2乃至5のいずれか一項に記載の半導体装置。 - 前記複数の光導波路のうち、一部の前記光導波路はそれぞれ曲線部を備え、
前記光素子と光結合された一端での前記曲線部を備える前記一部の光導波路間の間隔は、他端での間隔よりも大きい、
請求項2乃至5のいずれか一項に記載の半導体装置。 - 前記複数の光導波路は、積層された複数の光導波路層に分かれて形成される、
請求項2乃至7のいずれか一項に記載の半導体装置。 - 前記第1の面と対向する前記パッケージ基板の前記第2の面側に配置された前記可撓性光導波路の一端側では、前記光導波路層がそれぞれ重なり合うことにより、前記複数の光導波路は部分的に重なり合って形成されている、
請求項8に記載の半導体装置。 - 前記可撓性光導波路は、前記光路変換手段により光路が変換され、当該可撓性光導波路から出射する光を集光する第1の集光手段を更に備える、
請求項2乃至9のいずれか一項に記載の半導体装置。 - 前記第1の集光手段はレンズである、
請求項10に記載の半導体装置。 - 前記可撓性光導波路は、当該可撓性光導波路の外部から当該可撓性光導波路の前記光路変換手段に入射する光を集光する第2の集光手段を更に備える、
請求項2乃至11のいずれか一項に記載の半導体装置。 - 前記第2の集光手段はレンズである、
請求項12に記載の半導体装置。 - 前記第1の面上に配置され、前記光素子を駆動する半導体素子を更に備える、
請求項1乃至13のいずれか一項に記載の半導体装置。 - 前記光素子は、前記可撓性光導波路と前記パッケージ基板との間に配置される、
請求項1乃至14のいずれか一項に記載の半導体装置。 - 前記半導体素子は、前記可撓性光導波路と前記パッケージ基板との間に配置される、
請求項15に記載の半導体装置。 - 前記可撓性光導波路は、
当該可撓性光導波路に形成された電気配線を更に備え、
前記電気配線は当該可撓性光導波路を貫通する貫通配線を備える、
請求項1乃至14のいずれか一項に記載の半導体装置。 - 前記可撓性光導波路は、前記光素子と前記パッケージ基板との間に配置され、
前記光素子は前記貫通配線を介して前記パッケージ基板と電気的に接続される、
請求項17に記載の半導体装置。 - 前記半導体素子は、前記可撓性光導波路を介して前記パッケージ基板の前記第1の面と対向して配置され、
前記電気配線を介して前記光素子と電気的に接続される、
請求項18に記載の半導体装置。 - 前記半導体素子は、前記可撓性光導波路と前記パッケージ基板と間に配置され、
前記電気配線を介して前記光素子と電気的に接続される、
請求項18に記載の半導体装置。 - 前記可撓性光導波路は、前記光素子と前記パッケージ基板との間に配置され、
前記半導体素子は、前記可撓性光導波路と前記パッケージ基板との間に配置され、
前記光素子は、前記貫通電極を介して前記半導体素子と電気的に接続される、
請求項17に記載の半導体装置。 - 前記可撓性光導波路は、前記パッケージ基板と電気的に接続され、
前記光素子は、前記可撓性光導波路と前記パッケージ基板との間に配置され、
前記半導体素子は、前記可撓性光導波路を介して前記パッケージ基板の前記第1の面と対向して配置され、前記貫通配線を介して前記パッケージ及び前記光素子と電気的に接続される、
請求項17に記載の半導体装置。 - 前記可撓性光導波路は、前記半導体素子と前記パッケージ基板との間に配置され、前記パッケージ基板と電気的に接続され、
前記光素子は前記可撓性光導波路と前記半導体素子との間に、前記半導体素子と集積されて配置され、
前記半導体素子は、前記貫通電極を介して前記パッケージ基板と電気的に接続される、
請求項17に記載の半導体装置。 - 前記可撓性光導波路は、前記パッケージ基板と電気的に接続され、
前記半導体素子は、前記可撓性光導波路と前記パッケージ基板との間に配置され、前記電気配線を介して前記パッケージ基板と電気的に接続され、
前記光素子は前記可撓性光導波路と前記半導体素子との間に、前記半導体素子と集積されて配置される、
請求項17に記載の半導体装置。 - 半導体集積回路をパッケージ基板に実装し、
光素子を前記パッケージ基板の第1の面上に配置して、前記パッケージ基板を介して前記半導体集積回路と電気的に接続し、
可撓性を有する可撓性光導波路の一端を前記光素子と光結合するとともに、他端を前記第1の面と対向する前記パッケージ基板の第2の面側に配置する、
半導体装置の製造方法。
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US9715131B2 (en) | 2014-09-11 | 2017-07-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrated fan-out package including dielectric waveguide |
US9671572B2 (en) * | 2014-09-22 | 2017-06-06 | Oracle International Corporation | Integrated chip package with optical interface |
US9689956B2 (en) * | 2015-03-10 | 2017-06-27 | The Boeing Company | Systems and methods for detecting light |
US11402752B2 (en) | 2015-10-02 | 2022-08-02 | Arizona Board Of Regents On Behalf Of The University Of Arizona | Fabrication of optical interconnect structures for a photonic integrated circuit |
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WO2017189955A1 (en) * | 2016-04-29 | 2017-11-02 | Arizona Board Of Regents On Behalf Of The University Of Arizona | Optical printed circuit board with polymer array stitch |
US11531174B2 (en) | 2017-09-28 | 2022-12-20 | Intel Corporation | Co-packaging with silicon photonics hybrid planar lightwave circuit |
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JP2001004864A (ja) * | 1999-06-25 | 2001-01-12 | Toppan Printing Co Ltd | 光・電気配線基板及び製造方法並びに実装基板 |
JP2003021722A (ja) * | 2001-07-06 | 2003-01-24 | Fuji Xerox Co Ltd | 光伝送媒体及びこれを用いた光伝送装置 |
JP2006059884A (ja) * | 2004-08-17 | 2006-03-02 | Toshiba Corp | 伝送線路実装体、インターフェイスモジュール付lsiパッケージ、およびリボン光伝送線路 |
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JP2006091241A (ja) * | 2004-09-22 | 2006-04-06 | Hitachi Cable Ltd | 光電気複合配線部品及びこれを用いた電子機器 |
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