WO2011027834A1 - Co膜の形成方法及びCu配線膜の形成方法 - Google Patents
Co膜の形成方法及びCu配線膜の形成方法 Download PDFInfo
- Publication number
- WO2011027834A1 WO2011027834A1 PCT/JP2010/065063 JP2010065063W WO2011027834A1 WO 2011027834 A1 WO2011027834 A1 WO 2011027834A1 JP 2010065063 W JP2010065063 W JP 2010065063W WO 2011027834 A1 WO2011027834 A1 WO 2011027834A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- film
- forming
- gas
- wiring
- cobalt
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
- C23C16/18—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metallo-organic compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
- H01L21/28562—Selective deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32051—Deposition of metallic or metal-silicide layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76846—Layer combinations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76883—Post-treatment or after-treatment of the conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
Description
103 PVD-シード膜 104 Cu膜
201 基板 202 TiNバリア膜
203 CVD-Cu膜 901 Ti膜
902 Co膜 903 Cu
Claims (29)
- 下地としてのSiO2膜又はバリア膜からなる基材表面上に、コバルトアルキルアミジナート、並びに還元ガスとして、H2ガスと、NH3、N2H4、NH(CH3)2、N2H3CH、及びN2から選ばれた少なくとも1種のガスとを組み合わせたガス、又は還元ガスとして、NH3、N2H4、NH(CH3)2、N2H3CH、及びN2から選ばれた少なくとも1種のガスを供給してCo膜を形成することを特徴とするCo膜の形成方法。
- 前記バリア膜が、Ti、TiN、Ta、TaN、W、WN、又はシリサイドからなる膜であることを特徴とする請求項1に記載のCo膜の形成方法。
- 前記シリサイド膜が、CoSi2、TiSi2、NiSi2、又はWSiであることを特徴とする請求項2に記載のCo膜の形成方法。
- 前記コバルトアルキルアミジナートが、Co(tBu-Et-Et-amd)2であることを特徴とする請求項1~3のいずれか1項に記載のCo膜の形成方法。
- 前記Co膜を形成する際の成膜温度が、180~400℃であることを特徴とする請求項1~4のいずれか1項に記載のCo膜の形成方法。
- 前記Co膜を形成する際の成膜圧力が50~1000Paであることを特徴とする請求項1~5のいずれか1項に記載のCo膜の形成方法。
- 前記H2と、NH3、N2H4、NH(CH3)2、N2H3CH、及びN2から選ばれた少なくとも1種のガス(第2還元ガスと称す)との供給割合を、流量基準で、40%≦H2/(H2+第2還元ガス)≦80%の範囲内とすることを特徴とする請求項1~6のいずれか1項に記載のCo膜の形成方法。
- 前記供給される際のコバルトアルキルアミジナートの温度が、65~80℃であることを特徴とする請求項1~7のいずれか1項に記載のCo膜の形成方法。
- 前記コバルトアルキルアミジナートと還元ガスとの供給前に基材表面をNH3ガスで前処理することを特徴とする請求項1~8のいずれか1項に記載のCo膜の形成方法。
- 前記コバルトアルキルアミジナートと還元ガスとの供給時に、Ar又はN2を同時に供給することを特徴とする請求項1~9のいずれか1項に記載のCo膜の形成方法。
- 下地としてのSiO2膜又はバリア膜からなる基材表面上に、コバルトアルキルアミジナートと、還元ガスとしてのH2及びNH3とを供給し、CVD法により、成膜温度180~400℃でCo膜を形成することを特徴とするCo膜の形成方法。
- 前記Co膜を形成する際の成膜圧力が50~1000Paであることを特徴とする請求項11記載のCo膜の形成方法。
- 前記H2及びNH3の供給割合を、流量基準で、40%≦H2/(H2+NH3)≦80%の範囲内とすることを特徴とする請求項11又は12に記載のCo膜の形成方法。
- 前記供給される際のコバルトアルキルアミジナートの温度が、65~80℃であることを特徴とする請求項11~13のいずれか1項に記載のCo膜の形成方法。
- 前記コバルトアルキルアミジナートと、還元ガスとしてのH2及びNH3との供給前に基材表面をNH3ガスで前処理することを特徴とする請求項11~14のいずれか1項に記載のCo膜の形成方法。
- 前記コバルトアルキルアミジナートと、還元ガスとしてのH2及びNH3との供給時に、Ar又はN2を同時に供給することを特徴とする請求項11~15のいずれか1項に記載のCo膜の形成方法。
- 前記バリア膜が、Ti、TiN、Ta、TaN、W、WN、又はCoSi2、TiSi2、NiSi2、及びWSiから選ばれたシリサイドからなる膜であることを特徴とする請求項11~16のいずれか1項に記載のCo膜の形成方法。
- 前記コバルトアルキルアミジナートが、Co(tBu-Et-Et-amd)2であることを特徴とする請求項11~17のいずれか1項に記載のCo膜の形成方法。
- ホール又はトレンチが形成されている基材上にTi、TiN、Ta、TaN、W、WN、及びシリサイドから選ばれたバリア膜又はSiO2膜を形成した後、その上に、コバルトアルキルアミジナート、並びに還元ガスとして、H2ガスと、NH3、N2H4、NH(CH3)2、N2H3CH、及びN2から選ばれた少なくとも1種のガスとを組み合わせたガス、又は還元ガスとして、NH3、N2H4、NH(CH3)2、N2H3CH、及びN2から選ばれた少なくとも1種のガスを供給してCo膜を形成し、このCo膜が表面に形成されたホール又はトレンチ内をCu膜で埋め込んだ後、350℃以下の温度で加熱処理することによりCu配線膜を形成することを特徴とするCu配線膜の形成方法。
- ホール又はトレンチが形成されている基材上にTi、TiN、Ta、TaN、W、WN、及びシリサイドから選ばれたバリア膜又はSiO2膜を形成した後、その上に、コバルトアルキルアミジナート、並びに還元ガスとして、H2ガスと、NH3、N2H4、NH(CH3)2、N2H3CH、及びN2から選ばれた少なくとも1種のガスとを組み合わせたガス、又は還元ガスとして、NH3、N2H4、NH(CH3)2、N2H3CH、及びN2から選ばれた少なくとも1種のガスを供給してCo膜を形成し、このCo膜上にシード膜としてCu膜を形成し、次いで該シード膜が表面に形成されたホール又はトレンチ内をメッキ法によりCu膜で埋め込んだ後、350℃以下の温度で加熱処理することによりCu配線膜を形成することを特徴とするCu配線膜の形成方法。
- ホール又はトレンチが形成されている基材上にバリア膜を形成した後に大気暴露し、次いでバリア膜上に、コバルトアルキルアミジナート、並びに還元ガスとして、H2ガスと、NH3、N2H4、NH(CH3)2、N2H3CH、及びN2から選ばれた少なくとも1種のガスとを組み合わせたガス、又は還元ガスとして、NH3、N2H4、NH(CH3)2、N2H3CH、及びN2から選ばれた少なくとも1種のガスを供給してCo膜を形成した後に大気暴露し又は大気暴露せずに、このCo膜が表面に形成されたホール又はトレンチ内をCu膜で埋め込んだ後、350℃以下の温度で加熱処理することによりCu配線膜を形成することを特徴とするCu配線膜の形成方法。
- ホール又はトレンチが形成されている基材上にバリア膜を形成した後に大気暴露し、次いでバリア膜上に、コバルトアルキルアミジナート、並びに還元ガスとして、H2ガスと、NH3、N2H4、NH(CH3)2、N2H3CH、及びN2から選ばれた少なくとも1種のガスとを組み合わせたガス、又は還元ガスとして、NH3、N2H4、NH(CH3)2、N2H3CH、及びN2から選ばれた少なくとも1種のガスを供給してCo膜を形成した後に大気暴露し又は大気暴露せずに、このCo膜上にシード膜としてCVD-Cu膜又はPVD-Cu膜を形成し、次いで該シード膜が表面に形成されたホール又はトレンチ内をメッキ法によりCu膜で埋め込んだ後、350℃以下の温度で加熱処理することによりCu配線膜を形成することを特徴とするCu配線膜の形成方法。
- 前記Co膜の形成が、コバルトアルキルアミジナートと、還元ガスとしてのH2及びNH3とを供給し、CVD法により、成膜温度180~400℃で実施されることを特徴とする請求項19~22のいずれか1項に記載のCu配線膜の形成方法。
- 前記Co膜を形成する際の成膜圧力が50~1000Paであることを特徴とする請求項19~23のいずれか1項に記載のCu配線膜の形成方法。
- 前記H2及びNH3の供給割合を、流量基準で、40%≦H2/(H2+NH3)≦80%の範囲内とすることを特徴とする請求項23に記載のCu配線膜の形成方法。
- 前記供給される際のコバルトアルキルアミジナートの温度が、65~80℃であることを特徴とする請求項19~25のいずれか1項に記載のCu配線膜の形成方法。
- 前記コバルトアルキルアミジナートと還元ガスとの供給前に基材表面をNH3ガスで前処理することを特徴とする請求項19~26のいずれか1項に記載のCu配線膜の形成方法。
- 前記コバルトアルキルアミジナートと還元ガスとの供給時に、Ar又はN2を同時に供給することを特徴とする請求項19~27のいずれか1項に記載のCu配線膜の形成方法。
- 前記加熱処理が、250~350℃で行われることを特徴とする請求項19~28のいずれか1項に記載のCu配線膜の形成方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/393,790 US8809193B2 (en) | 2009-09-02 | 2010-09-02 | Method for the formation of Co film and method for the formation of Cu interconnection film |
JP2011529944A JPWO2011027834A1 (ja) | 2009-09-02 | 2010-09-02 | Co膜の形成方法及びCu配線膜の形成方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009-202891 | 2009-09-02 | ||
JP2009202891 | 2009-09-02 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2011027834A1 true WO2011027834A1 (ja) | 2011-03-10 |
Family
ID=43649368
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2010/065063 WO2011027834A1 (ja) | 2009-09-02 | 2010-09-02 | Co膜の形成方法及びCu配線膜の形成方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8809193B2 (ja) |
JP (1) | JPWO2011027834A1 (ja) |
KR (1) | KR20120046786A (ja) |
TW (1) | TW201125028A (ja) |
WO (1) | WO2011027834A1 (ja) |
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2013051670A1 (ja) * | 2011-10-07 | 2013-04-11 | 気相成長株式会社 | コバルト系膜形成方法、コバルト系膜形成材料、及び新規化合物 |
JP2013104100A (ja) * | 2011-11-14 | 2013-05-30 | Taiyo Nippon Sanso Corp | 金属薄膜の成膜方法および金属薄膜成膜用原料 |
JP2014101564A (ja) * | 2012-11-21 | 2014-06-05 | Ulvac Japan Ltd | コバルト膜の形成方法 |
JP2016046532A (ja) * | 2014-08-21 | 2016-04-04 | ラム リサーチ コーポレーションLam Research Corporation | コバルトの間隙をボイドなしで充填する方法及び装置 |
WO2017056242A1 (ja) * | 2015-09-30 | 2017-04-06 | 株式会社日立国際電気 | 半導体装置の製造方法、基板処理装置および記録媒体 |
JP2019106549A (ja) * | 2012-03-28 | 2019-06-27 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | シームレスのコバルト間隙充填を可能にする方法 |
JP2020021802A (ja) * | 2018-07-31 | 2020-02-06 | 株式会社アルバック | Co膜製造方法 |
US10573522B2 (en) | 2016-08-16 | 2020-02-25 | Lam Research Corporation | Method for preventing line bending during metal fill process |
US10916434B2 (en) | 2015-05-18 | 2021-02-09 | Lam Research Corporation | Feature fill with multi-stage nucleation inhibition |
US11075115B2 (en) | 2009-08-04 | 2021-07-27 | Novellus Systems, Inc. | Tungsten feature fill |
US11410883B2 (en) | 2009-08-04 | 2022-08-09 | Novellus Systems, Inc. | Tungsten feature fill with nucleation inhibition |
US11437269B2 (en) | 2012-03-27 | 2022-09-06 | Novellus Systems, Inc. | Tungsten feature fill with nucleation inhibition |
US11901227B2 (en) | 2014-09-30 | 2024-02-13 | Lam Research Corporation | Feature fill with nucleation inhibition |
US11978666B2 (en) | 2018-12-05 | 2024-05-07 | Lam Research Corporation | Void free low stress fill |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6008682B2 (ja) * | 2012-10-05 | 2016-10-19 | 大陽日酸株式会社 | 気相成長装置用配管のクリーニング方法 |
WO2015047731A1 (en) | 2013-09-27 | 2015-04-02 | Applied Materials, Inc. | Method of enabling seamless cobalt gap-fill |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6365502B1 (en) * | 1998-12-22 | 2002-04-02 | Cvc Products, Inc. | Microelectronic interconnect material with adhesion promotion layer and fabrication method |
JP2003133377A (ja) * | 2001-08-14 | 2003-05-09 | Oki Electric Ind Co Ltd | 多層配線構造の検査パターン、検査パターンを備えた半導体装置、半導体装置の検査方法、及び半導体装置の検査システム |
JP2005086185A (ja) * | 2003-09-11 | 2005-03-31 | Tokyo Electron Ltd | 成膜方法 |
JP2006511716A (ja) * | 2002-11-15 | 2006-04-06 | プレジデント・アンド・フェロウズ・オブ・ハーバード・カレッジ | 金属アミジナートを用いる原子層の析出 |
JP2009130288A (ja) * | 2007-11-27 | 2009-06-11 | Ulvac Japan Ltd | 薄膜形成方法 |
WO2009088522A2 (en) * | 2007-04-09 | 2009-07-16 | President And Fellows Of Harvard College | Cobalt nitride layers for copper interconnects and methods for forming them |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6627995B2 (en) | 2000-03-03 | 2003-09-30 | Cvc Products, Inc. | Microelectronic interconnect material with adhesion promotion layer and fabrication method |
KR100413482B1 (ko) | 2001-06-12 | 2003-12-31 | 주식회사 하이닉스반도체 | 화학적 강화제(ce) 처리 챔버 |
US9051641B2 (en) | 2001-07-25 | 2015-06-09 | Applied Materials, Inc. | Cobalt deposition on barrier surfaces |
KR101076927B1 (ko) | 2004-06-25 | 2011-10-26 | 매그나칩 반도체 유한회사 | 반도체 소자의 구리 배선 구조 및 그 형성방법 |
JP2006299407A (ja) | 2005-03-23 | 2006-11-02 | Tokyo Electron Ltd | 成膜方法、成膜装置およびコンピュータ読取可能な記憶媒体 |
-
2010
- 2010-09-02 TW TW099129688A patent/TW201125028A/zh unknown
- 2010-09-02 JP JP2011529944A patent/JPWO2011027834A1/ja active Pending
- 2010-09-02 WO PCT/JP2010/065063 patent/WO2011027834A1/ja active Application Filing
- 2010-09-02 US US13/393,790 patent/US8809193B2/en active Active
- 2010-09-02 KR KR1020127008154A patent/KR20120046786A/ko not_active Application Discontinuation
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6365502B1 (en) * | 1998-12-22 | 2002-04-02 | Cvc Products, Inc. | Microelectronic interconnect material with adhesion promotion layer and fabrication method |
JP2003133377A (ja) * | 2001-08-14 | 2003-05-09 | Oki Electric Ind Co Ltd | 多層配線構造の検査パターン、検査パターンを備えた半導体装置、半導体装置の検査方法、及び半導体装置の検査システム |
JP2006511716A (ja) * | 2002-11-15 | 2006-04-06 | プレジデント・アンド・フェロウズ・オブ・ハーバード・カレッジ | 金属アミジナートを用いる原子層の析出 |
JP2005086185A (ja) * | 2003-09-11 | 2005-03-31 | Tokyo Electron Ltd | 成膜方法 |
WO2009088522A2 (en) * | 2007-04-09 | 2009-07-16 | President And Fellows Of Harvard College | Cobalt nitride layers for copper interconnects and methods for forming them |
JP2009130288A (ja) * | 2007-11-27 | 2009-06-11 | Ulvac Japan Ltd | 薄膜形成方法 |
Cited By (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11410883B2 (en) | 2009-08-04 | 2022-08-09 | Novellus Systems, Inc. | Tungsten feature fill with nucleation inhibition |
US11075115B2 (en) | 2009-08-04 | 2021-07-27 | Novellus Systems, Inc. | Tungsten feature fill |
CN103874781A (zh) * | 2011-10-07 | 2014-06-18 | 气相成长株式会社 | 钴基膜形成方法、钴基膜形成材料和新型化合物 |
JPWO2013051670A1 (ja) * | 2011-10-07 | 2015-03-30 | 気相成長株式会社 | コバルト系膜形成方法、コバルト系膜形成材料、及び新規化合物 |
WO2013051670A1 (ja) * | 2011-10-07 | 2013-04-11 | 気相成長株式会社 | コバルト系膜形成方法、コバルト系膜形成材料、及び新規化合物 |
US9428835B2 (en) | 2011-10-07 | 2016-08-30 | Gas-Phase Growth Ltd. | Cobalt base film-forming method, cobalt base film-forming material, and novel compound |
JP2013104100A (ja) * | 2011-11-14 | 2013-05-30 | Taiyo Nippon Sanso Corp | 金属薄膜の成膜方法および金属薄膜成膜用原料 |
US11437269B2 (en) | 2012-03-27 | 2022-09-06 | Novellus Systems, Inc. | Tungsten feature fill with nucleation inhibition |
JP2019106549A (ja) * | 2012-03-28 | 2019-06-27 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | シームレスのコバルト間隙充填を可能にする方法 |
JP2014101564A (ja) * | 2012-11-21 | 2014-06-05 | Ulvac Japan Ltd | コバルト膜の形成方法 |
JP2016046532A (ja) * | 2014-08-21 | 2016-04-04 | ラム リサーチ コーポレーションLam Research Corporation | コバルトの間隙をボイドなしで充填する方法及び装置 |
US11901227B2 (en) | 2014-09-30 | 2024-02-13 | Lam Research Corporation | Feature fill with nucleation inhibition |
US10916434B2 (en) | 2015-05-18 | 2021-02-09 | Lam Research Corporation | Feature fill with multi-stage nucleation inhibition |
US10410870B2 (en) | 2015-09-30 | 2019-09-10 | Kokusa Electric Corporation | Method of manufacturing semiconductor device |
CN107924829B (zh) * | 2015-09-30 | 2021-07-23 | 株式会社国际电气 | 半导体器件的制造方法、衬底处理装置及记录介质 |
CN107924829A (zh) * | 2015-09-30 | 2018-04-17 | 株式会社日立国际电气 | 半导体器件的制造方法、衬底处理装置及记录介质 |
JPWO2017056242A1 (ja) * | 2015-09-30 | 2018-04-05 | 株式会社日立国際電気 | 半導体装置の製造方法、基板処理装置および記録媒体 |
WO2017056242A1 (ja) * | 2015-09-30 | 2017-04-06 | 株式会社日立国際電気 | 半導体装置の製造方法、基板処理装置および記録媒体 |
US10573522B2 (en) | 2016-08-16 | 2020-02-25 | Lam Research Corporation | Method for preventing line bending during metal fill process |
US11355345B2 (en) | 2016-08-16 | 2022-06-07 | Lam Research Corporation | Method for preventing line bending during metal fill process |
JP2020021802A (ja) * | 2018-07-31 | 2020-02-06 | 株式会社アルバック | Co膜製造方法 |
JP7164349B2 (ja) | 2018-07-31 | 2022-11-01 | 株式会社アルバック | Co膜製造方法 |
US11978666B2 (en) | 2018-12-05 | 2024-05-07 | Lam Research Corporation | Void free low stress fill |
Also Published As
Publication number | Publication date |
---|---|
JPWO2011027834A1 (ja) | 2013-02-04 |
KR20120046786A (ko) | 2012-05-10 |
US20130023116A1 (en) | 2013-01-24 |
TW201125028A (en) | 2011-07-16 |
US8809193B2 (en) | 2014-08-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2011027834A1 (ja) | Co膜の形成方法及びCu配線膜の形成方法 | |
TW495801B (en) | Semiconductor device fabricating method and system for carrying out the same | |
US20050124154A1 (en) | Method of forming copper interconnections for semiconductor integrated circuits on a substrate | |
TWI374482B (ja) | ||
JP5593320B2 (ja) | Co膜の形成方法 | |
JP5141683B2 (ja) | 半導体装置の製造方法 | |
JP2006028572A (ja) | 薄膜形成方法 | |
JP2004525510A (ja) | 拡散バリアを有する銅の配線構造 | |
JP2009206472A (ja) | 半導体装置の製造方法、半導体装置、電子機器、半導体製造装置及び記憶媒体 | |
TW201029185A (en) | Thin-film transistor and thin-film transistor intermediate | |
JP2010037622A (ja) | 無電解置換めっきにより銅薄膜を形成しためっき物 | |
JP5300156B2 (ja) | 無電解めっきにより銅薄膜を形成しためっき物 | |
TWI384552B (zh) | 基板及其製造方法 | |
JP5371783B2 (ja) | バリア層上にルテニウム電気めっき層を有するulsi微細配線部材 | |
TWI803510B (zh) | 用於銅互連件之晶種層 | |
JP5377489B2 (ja) | Cu配線膜の形成方法 | |
JPH10144627A (ja) | 導電性拡散障壁層の付着法 | |
TWI408749B (zh) | 基板及其製造方法 | |
JP2004179605A (ja) | アルミニウム金属配線形成方法 | |
JP2000200762A (ja) | 半導体装置の製造方法及び半導体製造装置 | |
JP3868043B2 (ja) | タングステン窒化膜の製造方法及びこれを用いた金属配線製造方法 | |
JP2004014626A (ja) | シード膜及びその形成方法、Cu配線及びその形成方法、半導体装置及びその製造方法、並びに半導体装置の製造装置。 | |
JP2009044056A (ja) | 銅膜作製方法 | |
JPWO2017199767A1 (ja) | Cu膜の形成方法 | |
JP2013258183A (ja) | 半導体装置及びその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 10813782 Country of ref document: EP Kind code of ref document: A1 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2011529944 Country of ref document: JP |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
ENP | Entry into the national phase |
Ref document number: 20127008154 Country of ref document: KR Kind code of ref document: A |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 10813782 Country of ref document: EP Kind code of ref document: A1 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 13393790 Country of ref document: US |