WO2010118688A1 - 薄膜太阳能电池结构、薄膜太阳能电池阵列及其制造方法 - Google Patents
薄膜太阳能电池结构、薄膜太阳能电池阵列及其制造方法 Download PDFInfo
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- WO2010118688A1 WO2010118688A1 PCT/CN2010/071772 CN2010071772W WO2010118688A1 WO 2010118688 A1 WO2010118688 A1 WO 2010118688A1 CN 2010071772 W CN2010071772 W CN 2010071772W WO 2010118688 A1 WO2010118688 A1 WO 2010118688A1
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- 239000010409 thin film Substances 0.000 title claims abstract description 97
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 239000004065 semiconductor Substances 0.000 claims abstract description 191
- 239000000758 substrate Substances 0.000 claims abstract description 127
- 239000000463 material Substances 0.000 claims abstract description 15
- 238000005530 etching Methods 0.000 claims abstract description 10
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 48
- 238000000034 method Methods 0.000 claims description 46
- 239000013078 crystal Substances 0.000 claims description 36
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 24
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 20
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- 150000001875 compounds Chemical class 0.000 claims description 6
- 238000005520 cutting process Methods 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 6
- 238000009792 diffusion process Methods 0.000 claims description 6
- 239000004020 conductor Substances 0.000 claims description 4
- 125000006850 spacer group Chemical group 0.000 claims description 4
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 3
- 239000007769 metal material Substances 0.000 claims description 2
- 239000010410 layer Substances 0.000 claims 92
- -1 ln 2 0 3 Inorganic materials 0.000 claims 10
- 229910006404 SnO 2 Inorganic materials 0.000 claims 5
- 238000000137 annealing Methods 0.000 claims 2
- 239000002344 surface layer Substances 0.000 claims 2
- 239000011810 insulating material Substances 0.000 claims 1
- 238000005215 recombination Methods 0.000 abstract description 12
- 230000006798 recombination Effects 0.000 abstract description 12
- 238000010248 power generation Methods 0.000 description 18
- 235000012431 wafers Nutrition 0.000 description 11
- 229920002120 photoresistant polymer Polymers 0.000 description 10
- 239000000969 carrier Substances 0.000 description 6
- 239000002131 composite material Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 238000005452 bending Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 238000004904 shortening Methods 0.000 description 2
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- MARUHZGHZWCEQU-UHFFFAOYSA-N 5-phenyl-2h-tetrazole Chemical compound C1=CC=CC=C1C1=NNN=N1 MARUHZGHZWCEQU-UHFFFAOYSA-N 0.000 description 1
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 1
- KTSFMFGEAAANTF-UHFFFAOYSA-N [Cu].[Se].[Se].[In] Chemical compound [Cu].[Se].[Se].[In] KTSFMFGEAAANTF-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 239000000908 ammonium hydroxide Substances 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 239000004566 building material Substances 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
- H01L31/0392—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
- H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
- H01L31/035281—Shape of the body
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Definitions
- Thin film solar cell structure, thin film solar cell array and manufacturing method thereof are Thin film solar cell structure, thin film solar cell array and manufacturing method thereof.
- the present invention relates to the field of solar cell manufacturing, and in particular to a novel, high efficiency, low cost thin film solar cell structure, array and method of fabricating the same. Background technique
- thin-film solar cells are made of a thin film made of solar cells, which have few semiconductor materials, so it is easier to reduce costs. At the same time, it is not only a high-efficiency energy product, but also a new building material, which is easier. Achieve the perfect combination with architecture.
- thin-film solar cells have become a new trend and new hot spot in the development of the international photovoltaic market.
- thin film batteries there are mainly three kinds of thin film batteries that can be industrially mass-produced: silicon-based thin film solar cells, copper indium gallium selenide thin film solar cells, and cadmium telluride thin film solar cells. Because thin film solar cells use less material, simple process, low energy consumption, and have certain advantages in cost, they have achieved rapid development.
- FIG. 1 and FIG. 2 it is a schematic diagram of a thin film solar cell structure and a solar energy conversion into electric energy in the prior art.
- the thin film solar cell structure 200 formed in the thickness direction of the wafer has electrodes 230 on both sides of the battery substrate 210, and a region between the electrodes 230 is a light entrance region 220. Inside the battery substrate 200 is a PN junction. 2 is a view of the thin film solar cell structure 200 shown in FIG. 1 in the direction of AA.
- the electrode 230 has a small area and a large electric resistance; in order to increase the absorption area of the solar energy, it is necessary to increase the area of the light entering region 220, and the distance between the two electrodes 230.
- the width of the light-incident region 220 is the same (generally greater than 0.5 mm), which causes the recombination region 260 between the two electrodes 230 to increase, so that the bulk current and the surface recombination current are too large, resulting in low power generation efficiency.
- the investment cost of existing solar cell structures is high, which also affects the promotion and application of thin film solar cells. Summary of the invention
- An object of the present invention is to solve at least one of the above-mentioned technical drawbacks, and in particular to solve the drawback that the recombination zone between two electrodes is increased to cause low power generation efficiency.
- an aspect of the present invention provides a method of fabricating a thin film solar cell structure, the method comprising: providing a semiconductor substrate, the semiconductor substrate having a first doping type, the semiconductor substrate including the first a surface and a second surface opposite thereto; etching the semiconductor substrate from the first surface to form at least two first trenches, and etching the semiconductor substrate from the second surface to form at least one second trench, each The second trench is located between two adjacent first trenches; forming a first structure at least on a sidewall of the first trench; forming at least a sidewall of the second trench a second structure; cutting or stretching the semiconductor substrate from the first trench and the second trench to form a thin film solar cell structure, wherein a semiconductor lining between the first trench and the second trench Forming a semiconductor substrate of the thin film solar cell structure, the first structure, the second structure or a combination thereof is a light incident surface of the thin film solar cell structure.
- Another aspect of the present invention also provides a thin film solar cell structure, the structure comprising: a semiconductor substrate having a first doping type, the semiconductor substrate including a third surface and a fourth surface opposite thereto; a first structure on a third surface of the semiconductor substrate, and a second structure on the fourth surface, the first structure, the second structure or a combination thereof being a light incident surface of the solar cell structure; and being located on the semiconductor substrate Side walls and side walls between the third surface and the fourth surface.
- Still another aspect of the present invention provides a thin film solar cell array comprising a plurality of the above-described thin film solar cell structures, wherein each of the two thin film solar cell structures are connected in parallel.
- Still another aspect of the present invention provides a thin film solar cell array, the array comprising: a plurality of thin film solar cell structures, the solar cell structure comprising a semiconductor substrate having a first doping type, the semiconductor substrate having a third surface And a fourth surface opposite thereto, and a first structure on the third surface and a second structure on the fourth surface, the first structure including at least a first semiconductor layer having a second doping type and the first An electrode layer, the second structure includes at least a second electrode layer, the second doping type is opposite to the first doping type, and the first structure, the second structure, or a combination thereof is the thin film solar cell structure a light-incident surface; a plurality of bendable insulating layers formed on opposite surfaces of adjacent substrates and connected to the An adjacent substrate; a plurality of first conductive layers and a second conductive layer matched with the plurality of bendable insulating layers, the first conductive layer and the second conductive layer being located on opposite sides of the insulating layer, the first The conductive layer connect
- the thickness of the substrate is effectively utilized, the effective area of the electrode is increased, and the electrode and the light-incident surface are disposed on the same side, thereby effectively reducing the composite distance and shortening the electrode The distance between them reduces the composite current of the carriers and improves the power generation efficiency.
- an insulating layer is formed on the sidewall of the semiconductor substrate, on the one hand, the recombination of carriers at the side wall portion is reduced, and the power generation efficiency is further improved.
- the insulating layer can be formed to be connected to the electrode.
- the conductive layer and the conductive layer are isolated to prevent possible short circuit between the two electrodes, and the parallel connection between the structures in the battery array through the conductive layer reduces the connection resistance and improves the power generation efficiency.
- FIG. 1 is a schematic view showing a structure of a prior art thin film solar cell
- Figure 2 is a view showing the structure of the thin film solar cell shown in Figure 1 in the direction of AA;
- FIG. 3 is a flow chart showing a method of fabricating a thin film solar cell structure according to an embodiment of the present invention
- 4-15 are cross-sectional views of various stages of fabrication of a thin film solar cell structure in accordance with an embodiment of the present invention.
- FIG 16 is a diagram showing the structure and operation of a solar cell according to an embodiment of the present invention. detailed description
- the present invention mainly aims to form an electrode on a plane in which the thickness direction of the substrate is formed by using the thickness of the substrate, and to set the electrode and the light-incident surface of the solar cell on the same side, thereby effectively reducing the composite distance and shortening between the electrodes.
- the distance reduce the body composite current, and improve power generation efficiency.
- the structure of the present invention has an insulating layer on both sides of the battery substrate, which can further reduce the recombination of carriers on the side surface and improve power generation efficiency.
- a flow chart of a method of forming a thin film solar cell structure according to an embodiment of the present invention includes the following steps:
- Step S301 providing a semiconductor substrate, the semiconductor substrate 101 having a first doping type, the semiconductor substrate 101 including a first surface 101-1 and a second surface 101-2 opposite thereto, with reference to FIGS. .
- the semiconductor substrate 101 is single crystal silicon, single crystal germanium or single crystal germanium silicon.
- the crystal orientation of the surfaces 101-1, 101-2 is ⁇ 110 ⁇ or ⁇ 112 ⁇ .
- the crystal orientation of the semiconductor substrate 101 perpendicular to the first surface and the second surface is ⁇ 111 ⁇ .
- the semiconductor substrate 101 may also be polycrystalline Si, polycrystalline Ge, or polycrystalline SiGe. , ⁇ -V or II-VI compound semiconductor or a combination thereof.
- the semiconductor substrate 101 has a first doping type, and the first doping type may be p-type doping or n-type doping. In one embodiment of the invention, a p-type wafer or an n-type may be selected. Wafers, in other embodiments, may be formed by performing a desired doping configuration on a semiconductor substrate. Wherein, the thickness of the semiconductor substrate may be 0.2-3 mm.
- Step S302 etching the semiconductor substrate 101 from the first surface 101-1 to form at least two first trenches 123, and etching the semiconductor substrate 101 from the second surface 101-2 to form at least one second trench.
- a groove 124, each of the second grooves 124 is located between two adjacent first grooves 123, as shown in FIG.
- the implementation steps of an embodiment of the present invention are shown in Figures 4-9.
- the insulating layer 100 is formed on the first surface 101-1, the second surface 101-2, and the side surface of the semiconductor substrate 101.
- a nitride layer which in this embodiment is a nitride material, has an etch barrier layer and an insulating layer, and then forms a patterned photoresist 110 on the insulating layer 100 (or Photoresist), wherein the pattern of the photoresist 110 corresponds to at least two first trenches to be etched.
- the first trenches are arranged at equal intervals. As shown in FIG.
- FIG. 4 a top view of a silicon wafer in which an insulating layer 100 and a patterned photoresist 110 are deposited according to an embodiment of the present invention, the crystal orientation of the silicon wafer is as shown, and a patterned photoresist 110 is formed.
- FIG. 5 a cross-sectional view of the silicon wafer in which the insulating layer 100 and the patterned photoresist 110 are deposited as shown in FIG. 4 of the embodiment of the present invention is taken along line A-A'.
- the insulating layer 100 is etched to the semiconductor substrate 101 to form a first opening 121, and the patterned photoresist 110 is removed to form a patterned insulating layer 120, as shown in FIG.
- a second opening 122 corresponding to the second trench is formed on the insulating layer 100 on the second surface of the semiconductor substrate, and each second opening 122 is located at two positions. Between one opening 121.
- the interval between each of the first openings 121 and each of the second openings 122 is equal, so that the distance between the second trenches formed in the subsequent steps and the first trenches on both sides is equal, Thereby, the production efficiency can be effectively improved and the cost can be reduced.
- FIG. 7 a schematic diagram of forming a patterned photoresist 130 on the insulating layer 100 of the second surface after removing the first surface photoresist of the semiconductor substrate according to an embodiment of the present invention is shown. Specifically, the nitride layer 100 is etched to the semiconductor substrate 101 to form a second opening 122, and the patterned photoresist 130 is removed to form a patterned insulating layer 120 (see FIG. 8).
- the semiconductor substrate 101 is simultaneously etched from the first opening 121 and the second opening 122 by using the insulating layer 120 as a mask to form the first trench 123 and the opening direction opposite to each other.
- the second trench 124 is such that the semiconductor substrate 101 between the first trench 123 and the second trench 124 forms a semiconductor substrate 150 of a thin film solar cell structure, the semiconductor substrate 150 having a thickness of about 5-120 ⁇ m, width The thickness is about 0.2-3 mm, and the thickness is a distance between surfaces corresponding to sidewalls of adjacent trenches 123, 124 belonging to the same substrate 150, the width being the first surface 101-1 and the second surface 101
- the distance between -2 is shown in Figure 9.
- the first trench 123 and the second trench 124 may be formed by anisotropically etching the semiconductor substrate by dry etching, such as RIE, or wet etching.
- dry etching such as RIE
- wet etching may be utilized, such as potassium hydroxide (KOH), Ammonium hydroxide (TMAH) or ethylenediamine-o-phenylene
- KOH potassium hydroxide
- TMAH Ammonium hydroxide
- EDP ethylenediamine-o-phenylene
- the first groove and the second groove thus formed have a crystal orientation of a surface corresponding to a side wall of ⁇ 111 ⁇ .
- the distance between the first trench 123 and the second trench 124 determines the thickness of the thin film solar cell structure, so that the method uses photolithography to control the thickness of the thin film solar cell structure.
- the thin film solar cell structure has a thickness of 10 to 120 microns.
- the depth of the first trench 123 and the second trench 124 may be less than or equal to the thickness of the semiconductor substrate 101, for example, only a portion of the semiconductor substrate may be etched, that is, the first trench 123 and the second The bottom of the trench 124 does not contact the insulating layer 120, and the object of the present invention can also be achieved.
- the method for forming the first trenches 123 and 124 is an embodiment of the present invention.
- those skilled in the art may also select other methods, and the methods that achieve the same effects as the present invention are all included in the protection scope of the present invention.
- Step S303 forming a first structure 160 on at least a sidewall of the first trench, as shown in FIG.
- the first structure 160 may be a multi-layer structure.
- the first structure 160 includes a first semiconductor layer 160-1 and a first electrode layer 160-2, and the first semiconductor layer has a first a second doping type, the second doping type being opposite to the first doping type, that is, when the first type of doping is p-type, the second type of doping is n-type, the first type of doping When it is n-type, the second type of doping is p-type.
- the first semiconductor layer 160-1 may form a first semiconductor layer 160-1 having a second doping type in a sidewall of the first trench 123 by a method of dopant ion diffusion; A first semiconductor layer 160-1 having a second doping type is deposited thereon, and then further diffused.
- the first semiconductor layer 160-1 may be amorphous silicon a - Si, polysilicon. Poly-Si, single crystal silicon or a combination thereof.
- the first structure 160 may also be formed covering the entire first trench 123.
- the first intrinsic amorphous silicon layer i_a__Si may be formed on at least the sidewall of the first trench 123 before the first semiconductor layer 160-1 is formed.
- the first intrinsic amorphous silicon layer is undoped amorphous silicon and has a thickness of about 1 to 10 nm.
- the first semiconductor layer 160-1 is amorphous having a second doping type.
- the silicon a-Si has a thickness of about 10 to 50 nm. After the first semiconductor layer 160-1 is formed, the first electrode layer 160-2 is formed thereon.
- a transparent conductive oxide TCO Transparent Conductive Oxide
- the temperature is controlled at 550 during deposition.
- TC0 is Sn0 2 and ZnO. In other embodiments, TC0 may also be ln 2 0 3 , IT0, CdO, Cd 2 Sn0 4 , FT0, AZO or a combination thereof.
- Step S304 forming a second structure 170 on at least the sidewall of the second trench 214, as shown in FIG.
- the second structure 170 can be a one or more layer structure.
- the second structure 170 is a layer structure comprising a second electrode 170-2 which may be formed by covering the second trench.
- the second structure 170 is a multi-layer structure, and the second structure 170 may include a second semiconductor layer 170-1 and a second electrode layer 170-2 having a first doping type.
- the second semiconductor layer 170-1 may have a second semiconductor layer 170-1 of a first doping type in a sidewall of the second trench 124 by doping ion diffusion; and may also pass through the structure A second doping type second semiconductor layer 170-1 is deposited to be formed, and then further diffused.
- the second semiconductor layer 170-1 may be amorphous silicon a - Si, polysilicon poly _ Si, single crystal silicon or a combination thereof.
- the second structure 170 may also be formed covering the entire second trench 124.
- the second intrinsic amorphous silicon layer i_a__Si may be formed on at least the sidewall of the second trench 124 before the second semiconductor layer 170-1 is formed.
- the second intrinsic amorphous silicon layer is undoped amorphous silicon having a thickness of about 1 to 10 nm.
- the second semiconductor layer 170-1 is amorphous having a first doping type.
- the silicon a-Si has a thickness of about 10 to 50 nm.
- the second electrode layer 170-2 is formed thereon, and similarly, the second electrode layer 170-2 may be formed of any conductive material, such as a metal material, as a preferred implementation of the present invention.
- a transparent conductive oxide TCO Transparent Conductive Oxide
- the temperature is controlled at 550 during deposition. Below C.
- the TCO is Sn0 2 and ZnO, and in other embodiments, the TCO may also It is thought that ln 2 0 3 , ITO, CdO, Cd 2 Sn0 4 , FTO, AZO or a combination thereof.
- the edge wafer is cut by a laser beam or other cutting tool. As shown in FIG. 12, it is a top view of the edge wafer after cutting off the edge wafer. As shown in FIG. 13, the embodiment of the present invention is cut. A cross-sectional view of the edge wafer.
- the semiconductor substrate is cut or stretched from the first trench and the second trench to form a thin film solar cell structure, wherein the first trench portion covered by the first structure forms a first structure of the thin film solar cell structure, and second The second trench portion covered by the structure forms a second structure of the thin film solar cell structure, and the first structure, the second structure, or a combination thereof is a light incident surface of the solar cell structure.
- Fig. 14 which is a schematic view (along the A-A' cross section) of a complete thin film solar cell 190 formed after stretching
- the solar cell structure thus formed has opposite bending curvatures of adjacent insulating layers.
- FIG. 16 is a view showing the structure and operation principle of a solar cell formed by the above steps.
- sunlight When sunlight is irradiated to a solar cell, electrons and holes are generated in the silicon or semiconductor substrate 150, and electrons and holes are separated by a pn junction electric field and diffused to
- the terminals T1 and ⁇ 2 finally form a voltage of about 0.3 to 0.8 V between the terminals T1 and ⁇ 2 of the terminal, thereby realizing the conversion of solar energy to electric energy.
- Light illumination typically enters the thin film solar cell structure from the first structure 160, but may also optionally enter from the second structure 170 due to the thin thickness of the thin film solar cell structure.
- the thickness of the thin film solar cell structure formed by this method is determined by the distance between the first trench and the second trench (Fig.
- the thickness such as 5 ⁇ ⁇ . At the same time, this thickness also determines the distance between the first structure and the second structure.
- the width of the thin film solar cell structure formed by this method is determined by the depth of the trench, and the deepest may be the thickness of the semiconductor substrate (Fig. 9).
- the distance between the first structure and the second structure of the thin film solar cell structure formed by this method is determined by the thickness of the thin film solar cell structure, regardless of the width, so the first structure and the first The distance between the two structures can be greatly shortened, and
- This method can achieve a wide thin film solar cell structure with a thick semiconductor substrate (such as l-3mm) without increasing the distance between the first structure and the second structure without affecting power generation efficiency.
- this method can further reduce the cost per unit area of a thin film solar cell structure compared to a thin semiconductor substrate.
- the solar cell manufactured by the method of the above embodiment can effectively reduce the manufacturing cost of the solar cell.
- the solar cell structure proposed by the invention can also effectively reduce the composite distance, shorten the distance between the electrodes, reduce the body recombination current, and improve the power generation efficiency.
- the present invention can also increase the effective area of the electrode and reduce the series resistance.
- the side wall of the thin film solar cell of the present invention has an insulating layer, the recombination of electrons and holes on the side is effectively reduced, and the power generation efficiency is further improved.
- the structure includes: a semiconductor substrate 150 having a first doping type, the semiconductor substrate 150 including a third surface 150-1 and a fourth surface 150-2 opposite thereto; and a portion located on the semiconductor substrate a first structure 160 on the three surface 150-1, and a second structure 170 on the fourth surface 150-2, the first structure 160, the second structure 170 or a combination thereof is a light incident surface of the solar cell structure; Side walls located on both sides of the semiconductor substrate 150 and between the third surface 150-1 and the fourth surface 150-2.
- the sidewall spacer includes an insulating layer 120.
- the sidewall spacer further includes a conductive layer 180 on the insulating layer 120, wherein the conductive layer 180-1 and the first electrode layer 160-
- the two conductive layers 180-2 are connected to the second electrode layer 170-2.
- the conductive layer 180-1 may also be integrated with the first electrode 160-2.
- the conductive layer 180- 2 may also be integrated with the second electrode 170-2 and formed of a TCO material.
- the material of the insulating layer 120 includes silicon nitride, silicon oxide, silicon oxynitride, Ti0 2 , Hf0 2 , Zr0 2 , A1 2 0 3 or a combination thereof.
- the semiconductor substrate is single crystal Si, single crystal Ge, single crystal SiGe, preferably, the third surface and the fourth surface have a crystal orientation of ⁇ 111 ⁇ , and the third surface The crystal orientation of the vertical plane is ⁇ 110 ⁇ or ⁇ 112 ⁇ .
- the semiconductor substrate may also be a polycrystalline Si, a polycrystalline Ge, a polycrystalline SiGe, a III-V or a II-VI compound semiconductor, or a combination thereof.
- the semiconductor substrate has a first doping type, and the first doping type may be p-type doping or n-type doping.
- the thickness between the third surface and the fourth surface of the semiconductor substrate is about 5-120 ⁇ ⁇ , The width is approximately 0.2-3 mm.
- the first structure 160 may be a multi-layer structure.
- the first structure 160 includes a first semiconductor layer 160-1 and a first electrode layer 160-2 having a second doping type.
- the first semiconductor layer 160-1 may be amorphous silicon a - Si, polycrystalline silicon poly - Si, single crystal silicon, or a combination thereof.
- the first structure 160 includes a first semiconductor layer 160-1 having a second doping type, a first electrode layer 160-2, and a first semiconductor layer 160-1 and a semiconductor substrate 150.
- first intrinsic amorphous silicon layer i - a - Si the first semiconductor layer 160-1 being amorphous silicon a - Si, having a thickness of about 10-50 nm, the first intrinsic amorphous silicon The thickness of the layer is about 1-10 nm.
- the second structure 170 can be a one or more layer structure.
- the second structure 170 is a layer structure comprising a second electrode layer 170-2.
- the second structure 170 is a multi-layer structure, and the second structure 170 includes a second semiconductor layer 170-1 and a second electrode layer 170-2 having a first doping type.
- the second semiconductor layer 170-1 may be amorphous silicon a-Si, polycrystalline silicon poly-Si, single crystal silicon, or a combination thereof.
- the second structure 170 includes a second semiconductor layer 170-1 having a first doping type, a second electrode layer 170-2, and a second semiconductor layer 170-1 and the semiconductor substrate 150.
- the second semiconductor layer 170-1 is amorphous silicon a-Si, having a thickness of about 10-50 nm, and the second intrinsic amorphous silicon The thickness of the layer is about 1-10 nm.
- the first and second electrode layers described above are preferably formed of a TC0 material, and the TC0 is Sn0 2 , ln 2 0 3 , ZnO, IT0, CdO, Cd 2 Sn0 4 , FT0, AZO, or a combination thereof.
- the first doping type and the second doping type are mutually opposite doping types, that is, when the first doping type is p-type, the second doping type is n-type, and the first doping type is n In the case of the type, the second doping type is p-type.
- the thin film solar cell structure of the present invention has been described above according to another embodiment of the present invention, and the structure includes an insulating layer which isolates the first and second electrode layers on the one hand to prevent short circuit and on the other hand Reduce the recombination of photoexcited carriers on the side, thereby improving power generation efficiency.
- a conductive layer is further included on the insulating layer, the conductive layer and the electrode are integrated, and the conductive layer does not block the light incident surface, thereby increasing the conductivity of the electrode. , reducing the resistance of thin film solar cells, thereby improving power generation efficiency.
- the present invention also forms a thin film solar cell array by combining the above thin film solar cells. Referring to FIG.
- the array includes a plurality of the above thin film solar cell structures 190, wherein each of the two thin film solar cell structures are connected in parallel , refer to Figure 14.
- a plurality of the above-described thin film solar cell structures 190 may be formed by the above method, and then the first electrode layers 160-2 of two adjacent thin film solar cell structures 190 are connected by the conductive layer 180-1, and the second The electrode layer 170-2 is connected by the conductive layer 180-2 to form a thin film solar cell array formed by a plurality of thin film solar cells in parallel, and the conductive layers 180-1, 180-2 are any conductive materials, in the present invention
- the conductive layers 180-1, 180-2 may be formed together when the first and second electrode layers are formed, that is, the conductive layer 180-1 and the first electrode layer 160-2 have an integrated structure, and the conductive layer 180-2 has an integral structure with the second electrode layer 170-2, and may be formed separately in other embodiments.
- the battery array formed by the thin film solar cell structure connection wherein the structure comprises an insulating layer, which isolates the first and second electrode layers on one hand to prevent short circuit, and on the other hand, can reduce photoexcited carriers.
- the side is compounded to increase power generation efficiency.
- a conductive layer is further included on the insulating layer, the conductive layer and the electrode are integrated, and the conductive layer does not block the light incident surface, thereby increasing the conductivity of the electrode. , reducing the connection resistance between the thin film solar cell structures, thereby improving power generation efficiency.
- a new thin film solar cell array is also formed, as shown in FIG. a plurality of thin film solar cell structures 190, the solar cell structure 190 including a semiconductor substrate 150 having a first doping type, the semiconductor substrate 150 having a third surface 150-1 and a fourth surface 150-2 opposite thereto, and a first structure 160 on the third surface 150-1 and a second structure 170 on the fourth surface 150-2, the first structure 150 including a first semiconductor layer 160-1 having a second doping type and a first electrode layer 160-2, the second structure 170 includes a second electrode layer 170-2, and the second doping type is opposite to the first doping type, the first structure 160, the second structure 170 or The combination is the light incident surface of the thin film solar cell structure 190.
- the solar cell structure 190 further includes a plurality of bendable insulating layers 120 formed on opposite surfaces of adjacent semiconductor substrates 150 and connected to the adjacent substrates 150, wherein adjacent The bending curvature of the bendable insulating layer 120 is reversed; a plurality of first conductive layers 180-1 and second conductive layers 180-2 matched by a plurality of bendable insulating layers, the first conductive layer 180-1 and the second conductive layer 180-2 being located at two of the insulating layers 120 On the side, the first conductive layer 180-1 connects the first electrode layers 160-2 of the adjacent two thin film solar cell structures 190, and the second conductive layer 180-2 connects the adjacent two thin film solar cell structures 190.
- the array may be formed by the method described in the embodiment of the thin film solar cell structure and stretched in step S305 to form the thin film solar cell array of the embodiment of the present invention. After stretching, the semiconductor substrate 150 is substantially On the same horizontal surface, the insulating layer becomes the curved insulating layer 150, and the adjacent two substrates 150 are connected from the opposite surfaces of the adjacent two substrates 150, which can also be realized by other methods.
- the first conductive layer 180-1 and the second conductive layer 180-1 may be formed together when the first and second electrode layers are formed, that is, the first conductive layer and the first electrode layer have The integrated structure, the second conductive layer and the second electrode layer have an integral structure, and the first and second electrode layers are preferably formed of a TCO material, and the TCO is Sn0 2 , In 2 0 3 , ZnO, ITO, CdO, Cd 2 Sn0 4 , FTO, AZO or a combination thereof.
- the semiconductor substrate is single crystal Si, single crystal Ge, single crystal SiGe, polycrystalline Si, polycrystalline Ge, polycrystalline SiGe, III-V or yttrium-VI compound semiconductor. Or a combination thereof.
- the crystal orientation of the third surface of the semiconductor substrate may be ⁇ 111 ⁇ , and the crystal orientation of the surface perpendicular to the three surfaces Is ⁇ 110 ⁇ or ⁇ 112 ⁇ .
- the thickness between the third surface and the fourth surface of the semiconductor substrate is about 5-120 ⁇ m, and the width is about 0.2-3 mm, wherein the thickness is a distance between the third surface and the fourth surface, and the width is a semiconductor The distance between the insides of the two bendable insulating layers of the substrate.
- the first structure 160 may be a multi-layer structure.
- the first structure 160 includes a first semiconductor layer 160-1 and a first electrode layer 160-2 having a second doping type.
- the first semiconductor layer 160-1 may be amorphous silicon a - Si, polycrystalline silicon poly - Si, single crystal silicon, or a combination thereof.
- the first structure 160 includes a first semiconductor layer 160-1 having a second doping type, a first electrode layer 160-2, and a first semiconductor layer 160-1 and a semiconductor substrate 150.
- first intrinsic amorphous silicon layer i - a - Si the first semiconductor layer 160-1 being amorphous silicon a - Si, having a thickness of about 10-50 nm, the first intrinsic amorphous silicon The thickness of the layer is about 1-10 nm.
- the second structure 170 can be a one or more layer structure.
- the second structure 170 is a layer structure comprising a second electrode layer 170-2.
- the second structure 170 is a multi-layer structure, and the second structure 170 includes a second semiconductor layer 170-1 and a second electrode layer 170-2 having a first doping type.
- the second semiconductor layer 170-1 may be amorphous silicon a-Si, polycrystalline silicon poly-Si, single crystal silicon, or a combination thereof.
- the second structure 170 includes a second semiconductor layer 170-1 having a first doping type, a second electrode layer 170-2, and a second semiconductor layer 170-1 and the semiconductor substrate 150.
- the second semiconductor layer 170-1 is amorphous silicon a-Si, having a thickness of about 10-50 nm, and the second intrinsic amorphous silicon The thickness of the layer is about 1-10 nm.
- the second doping type and the first doping type are mutually opposite types of doping, that is, when the first doping type is p-type, the second doping type is n-type, and the first doping type is n In the case of the type, the second doping type is p-type.
- the battery array described above has a flexible insulating layer on the sidewall of the substrate, which can reduce the recombination of photoexcited carriers on the sidewall of the substrate, improve power generation efficiency, and can also isolate the first and second electrode layers to prevent short circuit of the electrodes.
- a conductive layer is formed on the insulating layer of the sidewall portion of the substrate, which can reduce the connection resistance between the battery structures, increase the conductivity of the battery array, and further improve the power generation efficiency.
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Description
Claims
Priority Applications (3)
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JP2012505037A JP5346121B2 (ja) | 2009-04-15 | 2010-04-14 | 薄膜太陽電池構造の製造方法及び薄膜太陽電池アレイ |
EP10764101A EP2421050A1 (en) | 2009-04-15 | 2010-04-14 | Thin film of solar battery structure, thin film of solar battery array and manufacturing method thereof |
US13/264,126 US20120037211A1 (en) | 2009-04-15 | 2010-04-14 | Thin Film of Solar Battery Structure, Thin Film of Solar Array and Manufacturing Method Thereof |
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US21267309P | 2009-04-15 | 2009-04-15 | |
US61/212,673 | 2009-04-15 | ||
CN201010120365 | 2010-03-05 | ||
CN201010120365.X | 2010-03-05 |
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WO2010118688A1 true WO2010118688A1 (zh) | 2010-10-21 |
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PCT/CN2010/071770 WO2010118687A1 (zh) | 2009-04-15 | 2010-04-14 | 用于半导体器件制造的基板结构及其制造方法 |
PCT/CN2010/071772 WO2010118688A1 (zh) | 2009-04-15 | 2010-04-14 | 薄膜太阳能电池结构、薄膜太阳能电池阵列及其制造方法 |
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US (2) | US20120037211A1 (zh) |
EP (2) | EP2421026A4 (zh) |
JP (1) | JP5346121B2 (zh) |
WO (2) | WO2010118687A1 (zh) |
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WO2012100703A1 (zh) * | 2011-01-24 | 2012-08-02 | Zhu Huilong | 用于半导体器件制造的基板结构及其制造方法 |
CN102832116A (zh) * | 2011-06-13 | 2012-12-19 | 聚日(苏州)科技有限公司 | 一种薄膜条形结构、太阳能电池及其制造方法 |
JP2014501456A (ja) * | 2010-12-29 | 2014-01-20 | ジーティーエイティー・コーポレーション | 薄い半導体膜上に支持要素を構築することによって装置を形成するための方法 |
CN110767762A (zh) * | 2018-07-25 | 2020-02-07 | 北京铂阳顶荣光伏科技有限公司 | 太阳能电池前板膜及其制作方法、太阳能电池 |
EP2682990B1 (en) | 2012-07-02 | 2021-03-24 | Meyer Burger (Germany) GmbH | Hetero-junction solar cells with edge isolation and methods of manufacturing same |
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US10396229B2 (en) * | 2011-05-09 | 2019-08-27 | International Business Machines Corporation | Solar cell with interdigitated back contacts formed from high and low work-function-tuned silicides of the same metal |
US10649000B2 (en) * | 2015-12-17 | 2020-05-12 | Panasonic Intellectual Property Management Co., Ltd. | Connection assembly |
CN108735862A (zh) * | 2018-07-25 | 2018-11-02 | 汉能新材料科技有限公司 | 太阳能发电组件、薄膜太阳能电池及其制备方法 |
CN110277463B (zh) * | 2019-07-10 | 2024-03-15 | 通威太阳能(成都)有限公司 | 一种太阳能电池结构制作方法 |
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- 2010-04-14 US US13/264,063 patent/US8742545B2/en not_active Expired - Fee Related
- 2010-04-14 EP EP10764101A patent/EP2421050A1/en not_active Withdrawn
- 2010-04-14 WO PCT/CN2010/071770 patent/WO2010118687A1/zh active Application Filing
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Also Published As
Publication number | Publication date |
---|---|
US8742545B2 (en) | 2014-06-03 |
JP2012524387A (ja) | 2012-10-11 |
WO2010118687A1 (zh) | 2010-10-21 |
US20120181664A1 (en) | 2012-07-19 |
EP2421026A4 (en) | 2017-11-29 |
EP2421050A1 (en) | 2012-02-22 |
EP2421026A1 (en) | 2012-02-22 |
US20120037211A1 (en) | 2012-02-16 |
JP5346121B2 (ja) | 2013-11-20 |
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