WO2010095811A2 - 광소자용 기판, 이를 갖는 광소자 패키지 및 이의 제조 방법 - Google Patents
광소자용 기판, 이를 갖는 광소자 패키지 및 이의 제조 방법 Download PDFInfo
- Publication number
- WO2010095811A2 WO2010095811A2 PCT/KR2009/007852 KR2009007852W WO2010095811A2 WO 2010095811 A2 WO2010095811 A2 WO 2010095811A2 KR 2009007852 W KR2009007852 W KR 2009007852W WO 2010095811 A2 WO2010095811 A2 WO 2010095811A2
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- WO
- WIPO (PCT)
- Prior art keywords
- metal
- metal layer
- optical device
- anodic oxide
- oxide film
- Prior art date
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- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
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- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 4
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Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
- H01L33/642—Heat extraction or cooling elements characterized by the shape
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
- H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10106—Light emitting diode [LED]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
Definitions
- the present invention relates to a substrate for an optical device, an optical device package having the same, and a manufacturing method thereof.
- An optical device converts electrical energy into light or converts light energy into electrical energy and has various sizes and shapes according to a purpose of use.
- LEDs light emitting diodes
- the LED is mounted on a printed circuit board and used as a single device or an array.
- the LED has a high brightness and high energy efficiency, but has a problem of generating heat.
- a heat sink is used under the LED package, or metal pads for heat conduction are formed on a printed circuit board.
- the heat sink has the disadvantage of increasing the size of the LED package, and has the disadvantage of going through an additional process.
- the metal pads of the printed circuit board is formed, there is a disadvantage that does not efficiently discharge heat generated from the LED to the outside.
- Optical devices as well as LEDs often include a driving unit, and heat sinks and the like mentioned above are used to radiate heat generated from the driving unit to the outside, but the size and cost are increased.
- An object of the present invention is to propose a substrate for an optical device having a high thermal conductivity by forming an anodic oxide film having no pores in a metal substrate, an optical device package having the same, and a manufacturing method thereof.
- Another object of the present invention is to propose a substrate for an optical device, an optical device package having the same, and a manufacturing method thereof, which can control and form a thickness of an anodizing film through one or more anodizing processes.
- Another object of the present invention is to propose a substrate for an optical device having improved light utilization efficiency, an optical device package having the same, and a method of manufacturing the same.
- the metal substrate A first anodization film formed on a surface of the metal substrate to insulate the metal substrate; And first and second electrodes formed on the first anodic oxide film to be insulated from each other.
- a metal substrate including a metal substrate, a first anodization film formed on a surface of the metal substrate to insulate the metal substrate, and first and second electrodes formed to be insulated from each other on the first anodization film.
- a magnetic substrate An optical element disposed between the first and second electrodes; A first wire connecting the optical device and the first electrode; And a second wire connecting the optical device and the second electrode to each other.
- an optical device package manufacturing method comprising a manufacturing method.
- the present invention has the effect of efficiently dissipating heat generated in the optical device using a metal substrate.
- the present invention has the effect of easily adjusting the thickness of the anodized film of the metal substrate.
- reflection grooves are formed in the metal substrate to improve light utilization efficiency and facilitate alignment of the optical devices.
- FIG. 1 is a plan view showing a light emitting diode package array according to a first embodiment of the present invention.
- FIG. 2 is a cross-sectional view taken along the line II ′ of the light emitting diode package array shown in FIG. 1.
- FIG. 2 is a cross-sectional view taken along the line II ′ of the light emitting diode package array shown in FIG. 1.
- 3 to 13 are cross-sectional views sequentially illustrating a method of manufacturing the light emitting diode package shown in FIG. 2 of the present invention.
- FIG. 14 is a cross-sectional view showing a light emitting diode package according to a second embodiment of the present invention.
- 15 to 20 are cross-sectional views sequentially illustrating a method of manufacturing a light emitting diode package shown in FIG. 14.
- 21 is a sectional view showing a light emitting diode package according to a third embodiment of the present invention.
- FIG. 22 is a cross-sectional view illustrating a light emitting diode package according to a fourth embodiment of the present invention.
- FIG. 23 is a plan view illustrating a backlight unit having a light emitting diode package according to an embodiment of the present invention.
- metal substrate 20 first anodic oxide film
- first and second may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another.
- FIG. 1 is a plan view illustrating a light emitting diode package array according to a first embodiment of the present invention
- FIG. 2 is a cross-sectional view taken along a line II ′ of the light emitting diode package array shown in FIG. 1.
- a light emitting diode substrate and a light emitting diode package are described separately for convenience, but the light emitting diode package may include a light emitting diode substrate.
- the light emitting diode package according to the present invention may include a light emitting diode substrate 400 and a light emitting diode 100.
- the light emitting diode substrate 400 may include a metal substrate 10, a reflective groove 90, a first anodization film 20, a second anodic oxidation film 30, a photo solder resist pattern 55, and first to fifth materials. It may include four electrodes 70, 80, 71, and 81 and a partition wall 56.
- the light emitting diodes 100 may include first and second wires 110 and 120 for applying a voltage, and the protective layer 130 and the protective cap 140 to protect the light emitting diodes 100. It may include.
- the metal substrate 10 may be aluminum or an alloy substrate including aluminum.
- the metal substrate 10 of the aluminum material has excellent thermal conductivity and has an advantage of easy processing.
- the metal substrate 10 may include not only aluminum but also titanium, magnesium, zinc, niobium, or a alloy containing the same.
- the reflective groove 90 is formed to be recessed into the metal substrate 10.
- the reflective groove 90 reflects the light emitted from the light emitting diodes 100.
- the reflective groove 90 may serve to guide the mounting of the light emitting diode 100.
- the reflective groove 90 may include a lower surface 91 of the recessed bottom and a reflective surface 92 having an inclined cross section.
- the reflective groove 90 may have an inclination angle ⁇ formed between the extension line of the lower surface and the reflective surface 92 at 20 to 70 °.
- the reflecting surface 92 may be widened to increase the amount of light reflection, but the number of light emitting diodes 100 that may be disposed on the same size metal substrate 10 may be reduced.
- the inclination angle ⁇ is 70 ° or more, the area of the reflective surface 92 may be reduced, thereby lowering the light reflection efficiency of the light emitting diode 100.
- the reflective groove 90 may be formed to a depth d1 of 200 to 300 ⁇ m. However, the present invention is not limited thereto, and the reflective groove 90 may be formed to a different depth according to the shape of the light emitting diode 100. Further, the first and second anodic oxide films 20 and 30 formed in the region where the reflective groove 90 is to be formed may be formed to have different depths.
- the reflective groove 90 may vary in size depending on the number, size, and shape of the light emitting diodes 100. As shown in FIG. 1, the reflective groove 90 has been described as an example in the form of a circle to increase the light reflection efficiency. However, the present invention is not limited thereto and may be formed in the shape of a polygon such as a quadrangle or a triangle.
- the reflective groove 90 may be used as a means for facilitating alignment when a surface emitting laser or photodiode other than the light emitting diode 100 is mounted.
- the shape of the reflecting groove 90 may be formed similarly to the shape of an optical device such as the light emitting diode 100 to be seated.
- the first anodic oxide film 20 is formed through a method of anodizing the metal substrate 10.
- the first anodic oxide film 20 may be formed on the entire surface of the metal substrate 10.
- the first anodic oxide film 20 is formed such that there is no vacancy therein so that heat generated from the light emitting diodes 100 is easily conducted to the metal substrate 10.
- the first anodic oxide film 20 insulates the metal substrate 10 from the first to fourth electrodes 70, 80, 71, and 81.
- the first anodic oxide film 20 insulates the metal substrate 10 from the first to third metal layers 40, 50, and 60.
- the first anodic oxide film 20 may include alumina (Al 2 O 3) formed by oxidizing aluminum. Since the first anodization layer 20 is formed of alumina (Al 2 O 3), the thermal conductivity is high, and thus heat generated from the light emitting diodes 100 may be easily transferred to the metal substrate 10.
- the first anodic oxide film 20 may be formed to a thickness of 0.2 to 1.5 ⁇ m.
- the second anodic oxide film 30 may be made of the same material as the first anodic oxide film 20 and may include alumina (Al 2 O 3) formed by an anodizing method in which the first anodic oxide film 20 is formed.
- the second anodic oxide film 30 may be further formed when the thickness of the first anodic oxide film 20 is thin.
- the anode oxide film is formed in two layers, but may be formed in three or more layers as necessary. Accordingly, the thickness of the anodic oxide film can be adjusted.
- the first electrode 70 is formed on the second anodic oxide film 30.
- the first electrode 70 may be formed of any one metal material of chromium, copper, silver, aluminum, gold, tungsten, and the like.
- the first electrode 70 may be formed of an alloy including any one of metal materials such as chromium, copper, silver, aluminum, gold, and tungsten.
- the first electrode 70 may be formed of a single layer or a double layer or more. As illustrated in FIG. 2, the first electrode 70 may have first to third metal layers 41, 51, and 61 stacked thereon.
- the first electrode 70 is a first metal layer 41 formed of a metal material containing chromium on the second anodic oxide film 30, and a second metal layer 51 formed of a metal material containing copper on the first metal layer 41. ) And a third metal layer 61 formed of a metal material including silver on the second metal layer 51.
- the first metal layer 41 is formed of a metal containing chromium which increases the affinity between the first electrode 70 and the second anodic oxide film 30, and is formed between the second anodic oxide film 30 and the second metal layer 51.
- the second metal layer 51 may be formed of a metal material such as copper, copper-nickel, copper-nickel-gold, or the like.
- the third metal layer 61 is electrically connected to the first wire 110 through soldering or the like.
- the second electrode 80 is formed of the same metal material as the first electrode 70.
- the second electrode 80 may include a first metal layer 42 formed of chromium or the like on a portion in contact with the second anodic oxide film 30, a second metal layer 52 formed of copper on the first metal layer 52, and a second portion of the second electrode 80.
- the metal layer 52 may include a third metal layer 62 formed of silver.
- the second metal layer 52 may be formed of a conductive material such as copper-nickel or copper-nickel-gold as well as copper.
- the third metal layer 62 is formed of a conductive material such as silver.
- the third metal layer 62 is electrically connected to the second wire 120.
- the third electrode 71 is formed by stacking the first to third metal layers 41, 51, and 71.
- the first and second metal layers are formed by extending the first and second metal layers 41 and 51 of the first electrode 70.
- the third metal layer 71 may be formed of silver or a metal material containing silver. In this case, the third electrode 71 is electrically connected to the printed circuit board.
- the fourth electrode 81 is formed by stacking the first to third metal layers 42, 52, and 81.
- the first and second metal layers of the fourth electrode 81 are formed by extending the first and second metal layers 42 and 52 of the second electrode 80.
- the third metal layer 81 may be formed of silver or a metal material containing silver. In this case, the fourth electrode 81 is electrically connected to the printed circuit board.
- the first to fourth electrodes 70, 80, 71, and 81 of the present invention may be composed of only the first and second metal layers 41, 42, 51, and 52, respectively.
- the photo solder resist pattern 55 is formed to surround side surfaces of the first to fourth electrodes 70, 80, 71, and 81 to be electrically insulated.
- the photo solder resist pattern 55 may be formed not only on the first and second electrodes 80 but also in the remaining regions except for the region where the light emitting diodes 100 are formed.
- the photo solder resist pattern 55 may be formed of a white material to reflect light emitted from the light emitting diodes 100.
- the present invention may include first to third metal layers 40, 50, and 60 in a stacked manner in a region in which the reflective groove 90 is formed.
- the first to third metal layers 40, 50, and 60 in the region in which the reflective groove 90 is formed may effectively conduct heat generated from the light emitting diodes 100 to the metal substrate 10.
- the third metal layer 60 may be formed of silver or a metal material containing silver to increase light reflection efficiency.
- the light emitting diodes 100 are seated in the reflecting grooves 90 and are adhered to the bottom surface of the light emitting diodes 100 using an adhesive or the like.
- the first wire 110 is drawn out of the light emitting diode 100 and electrically connected to the first electrode 70.
- the second wire 120 is drawn out of the light emitting diode 100 and electrically connected to the second electrode 80.
- the first and second wires 110 and 120 supply a voltage supplied from each of the first and second electrodes 80 to the light emitting diode 100.
- the light emitting diode package according to the present invention may further include a protective layer 130 and a protective cap 140 to protect the light emitting diodes 100.
- the protective layer 130 may be formed of a mixture of phosphor and epoxy.
- the protective layer 130 may fix the light emitting diodes 100.
- the phosphor of the protective layer 130 may convert the light emitted from the light emitting diodes 100 in a specific color or wavelength into white light.
- the phosphor may change the white light emitted from the light emitting diode 100 to a specific wavelength.
- the protective cap 140 may be formed of a transparent material such as plastic on the outer side of the protective layer 130.
- the light emitting diode package according to the present invention may further include a partition wall 56 for preventing the protective layer 130 inside the 500 from leaking to the outside.
- the light emitting diode package according to the present invention includes the second metal layers 61 and 62 to prevent the growth or oxidation of copper used as the second metal layers 61 and 62 of the first and second electrodes 70 and 80, respectively. It may further include a conductive metal layer containing nickel or nickel on the upper).
- the light emitting diode package to which the light emitting diode is bonded has been described, but an optical device such as a surface emitting laser or a photodiode may be used in addition to the light emitting diode.
- 3 to 13 are cross-sectional views sequentially illustrating a method of manufacturing a light emitting diode package according to a first embodiment of the present invention.
- the metal substrate 10 may be a single metal such as aluminum, titanium, magnesium, zinc, niobium, or an alloy including at least one of them.
- the metal substrate 10 will be described using, for example, aluminum or an aluminum alloy having a heat transfer coefficient of 210 to 230 W / m ° K.
- the reflective groove 90 may be formed to improve the reflection efficiency of the light emitted from the light emitting diodes 100.
- the reflective groove 90 may be formed through a machining center lapping method. That is, the reflective groove 90 forms the metal substrate 10 to a depth of several tens to several hundred micrometers by using a machining center lapping method which is a precision micro lathe processing technology.
- the reflective groove 90 may be formed through other metal forming processing technology in addition to the machining center lapping method.
- the reflective groove 90 may include a reflective surface 92 having an inclination angle ⁇ from the lower surface 91 as shown in FIG. 3.
- the reflective groove 90 may be formed such that the inclination angle ⁇ between the line extending from the lower surface 91 and the reflective surface 92 is 20 to 70 °.
- the reflective groove 90 may have a larger area of the upper open area than that of the lower surface 91.
- the depth d1 of the reflecting groove 90 may be formed to about 100 ⁇ 300 ⁇ m. However, the depth of the reflecting groove 90 is not limited thereto.
- the reflective groove 90 may be formed in the number of MxN (M, N is a natural number) in the metal substrate 10.
- Reflective groove 90 may be formed in a circular shape, as shown in FIG.
- the present invention is not limited thereto and may be formed in the shape of a polygon such as a rectangle or a triangle.
- the surface treatment step is a pretreatment step of forming a uniform anodization film.
- a first anodic oxide film 20 is formed on the metal substrate 10.
- the forming of the first anodization layer may include forming alumina (Al 2 O 3) on the surface of the metal substrate 10 by applying a voltage between the metal substrate 10 and the electrolyte while the metal substrate 10 is immersed in the electrolytic bath. Barrier Type Anodizing method is used.
- a hole of alumina (Al2O3) is removed using a borate or tartarate bath method to form a 100% alumina (Al2O3) layer.
- the metal substrate 10 is immersed in an electrolyte such as neutral boric acid, ammonium borate, tartrate, ammonium tetraborate, ammonium tartrate, and a voltage of 250 to 450 V is applied between the metal substrate 10 and the electrolyte.
- an electrolyte such as neutral boric acid, ammonium borate, tartrate, ammonium tetraborate, ammonium tartrate, and a voltage of 250 to 450 V is applied between the metal substrate 10 and the electrolyte.
- an electrolyte such as neutral boric acid, ammonium borate, tartrate, ammonium tetraborate, ammonium tartrate, and a voltage of 250 to 450 V is applied between the metal substrate 10 and the electrolyte.
- the first anodic oxide film 20 may be formed to have a thickness of 0.2 to 1.5 ⁇ m.
- a metal layer 25 is formed on the first anodic oxide film 20.
- the metal layer 25 is formed on the first anodic oxide film 20 using a deposition method such as sputtering or chemical vapor deposition.
- the metal layer 25 may be formed to a thickness of about 0.4 to 1.5 ⁇ m.
- the metal layer 25 may be formed of a single metal such as aluminum, titanium, magnesium, zinc, niobium, or an alloy including the same. In the present invention, for example, it is easy to form an anodized film and uses aluminum or an aluminum alloy having high thermal conductivity.
- alumina is formed on the metal layer 25 using the barrier type anodizing method, thereby forming a second anodic oxide film 30 as shown in FIG. 6.
- the steps of forming the metal layer 25 shown in FIG. 5 and converting the metal layer 25 shown in FIG. 6 into the second anodic oxide film 30 are repeated.
- the thickness of the oxide film can be adjusted thickly. That is, a metal layer may be formed on the second anodic oxide film 30, and the anodic oxide film may be further formed through an anodizing method.
- the first metal layer 40 and the second metal layer 200 are continuously formed on the second anodic oxide film 30 by sputtering or chemical vapor deposition.
- the first metal layer 40 may be chromium or an alloy containing chromium.
- a metal other than chromium having high affinity with the second anodic oxide film 30 may be used.
- the second metal layer 200 may be copper or an alloy including copper.
- the second metal layer 200 may be formed of a material having high conductivity in addition to copper, and may be formed of a material capable of electrolytic plating later.
- the photoresist pattern 210 shown in FIG. 8 is formed on the second metal layer 200.
- the photo resist is formed on the second metal layer 200, and then the photoresist pattern 210 illustrated in FIG. 8 is formed through an exposure and development process.
- the photoresist pattern 210 is formed to cover all regions except for the region where the reflective groove 90 is formed and the region where the first to fourth electrodes 70, 80, 71, and 81 are to be formed.
- the metal pattern 220 is formed in the region exposed by the photoresist pattern 210. As shown in FIG. 9, the metal pattern 220 is formed in an exposed area due to the photoresist pattern using a metal capable of electroplating, for example, copper or an alloy including copper.
- the metal pattern 220 may be formed by electroplating metals such as copper, copper-nickel, and copper-nickel-gold.
- the second metal layer 230 shown in FIG. 10 is formed stepped.
- a portion of the thickness of the stepped metal layer 230 may be removed through an etching process by changing the etching ratio of the stepped metal layer 230, and a part of the thick portion of the stepped metal layer 230 remains.
- a part of the first metal layer 40 is etched and removed. That is, the exposed first metal layer 40 is removed due to the region where the stepped metal layer 230 is removed. Since the material of the stepped metal layer 230 and the first metal layer 40 are different metal materials, only an exposed region may be etched through a material capable of etching only the first metal layer 40.
- the pattern illustrated in FIG. 11 may be formed using the etching process as described above.
- a photo solder resist pattern 55 is formed.
- the photo solder resist pattern 55 is formed through an exposure and development process using a mask after the photo solder resist is formed over the entire area. At this time, the photo solder resist pattern 55 is formed to be white to increase the reflectance of the light emitting diode.
- the partition wall 56 is formed after forming the first to fourth electrodes 70, 80, 71, and 81 and the metal layer in the region where the optical device is to be seated. As shown in FIG. 12, the partition wall 56 is formed on the photo solder resist pattern 55 between the first and third electrodes 71 and between the second and fourth electrodes 81, respectively.
- the partition wall 56 may be formed of a material having high reflectance. In addition, the partition wall 56 may be simultaneously formed of the same material when the photo solder resist is formed.
- third metal layers 60, 61, and 62 are formed in regions exposed by the photo solder resist pattern 55.
- the third metal layers 60, 61, and 62 may be formed using a conductive metal.
- the third metal layers 60, 61, and 62 formed in the region where the light emitting diodes 100 are to be disposed, that is, the region where the reflective groove 90 is formed may use a conductive metal material having high reflectance.
- the third metal layers 60, 61, and 62 may be formed of silver or a metal containing silver, and may be formed through an electroless plating method, a sputtering method, or the like.
- a blocking metal layer may be further formed by using a metal such as nickel to prevent the growth of copper. have.
- the light emitting diodes 100 are adhered to each other and the first and second wires 110 and 120 are connected to the first and second electrodes 80, respectively. Thereafter, the protective layer 130 is formed and the protective cap 140 is covered and finished.
- the light emitting diode package is formed by cutting along the cutting line 600.
- the light emitting diode substrate 400 may be cut and then bonded to the light emitting diode 100.
- FIG. 14 is a cross-sectional view illustrating a light emitting diode package according to a second embodiment of the present invention.
- FIG. 14 includes the same components except that the first and second metal layers 40 and 50 of the light emitting diode package shown in FIG. 2 are removed. In the following description, the description of the components duplicated with FIG. 2 will be omitted.
- a light emitting diode package may include a light emitting diode substrate 400, a light emitting diode 100, a first wire 110, and a second wire 120. have.
- the light emitting diode substrate 400 may include a metal substrate 10, a reflective groove 90, a first anodic oxide film 20, a second anodic oxide film 30, a photo solder resist pattern 55, and a first electrode. 70 to 4th electrodes 81 and the partition wall 56 may be included.
- the metal substrate 10 may include aluminum, titanium, magnesium, zinc, niobium, or a alloy containing the same.
- At least one reflective groove 90 may be formed on one side of the metal substrate 10.
- the reflective groove 90 is formed to be concave inside the metal substrate 10.
- the reflective groove 90 may be formed in a circular shape as shown in FIG. 1, but is not limited thereto.
- the reflective groove 90 may be formed in a polygon such as a triangle or a quadrangle.
- the reflective groove 90 may have an inclination angle ⁇ formed by an extension line of the reflective surface 92 and the lower surface 91 of 20 to 70 °.
- the inclination angle ⁇ is less than 20 °, the reflecting surface 92 may be widened to increase the amount of light reflection, but the number of light emitting diodes 100 that may be formed on the metal substrate 10 having the same size may be reduced.
- the inclination angle ⁇ is 70 ° or more, the area of the reflective surface 92 may be reduced, thereby lowering the light reflection efficiency of the light emitting diode.
- the reflective groove 90 may be formed to a depth d1 of 200 to 300 ⁇ m. However, the present invention is not limited thereto, and the reflective groove 90 may be formed to a different depth according to the shape of the light emitting diode 100. Further, the first and second anodic oxide films 20 and 30 formed in the region where the reflective groove 90 is to be formed may be formed to have different depths.
- the first anodic oxide film 20 is formed through a method of anodizing the metal substrate 10.
- the first anodic oxide film 20 may be formed on the entire metal substrate 10.
- the first anodic oxide film 20 is formed to be free of voids in order to increase thermal conduction to the metal substrate 10.
- the first anodic oxide film 20 insulates the metal substrate 10 from the first to fourth electrodes 70, 80, 71, and 81.
- the first anodic oxide film 20 may be formed to a thickness of 0.2 to 1.5 ⁇ m.
- the second anodic oxide film 30 is formed on the first anodic oxide film 20.
- the second anodic oxide film 30 may include alumina (Al 2 O 3), which is the same material as the first anodic oxide film 20.
- the second anodic oxide film 30 may be formed to a thickness of 0.4 ⁇ 1.5 ⁇ m.
- the first and second anodic oxide films 20 and 30 are formed.
- the anodic oxide film formed on the second anodic oxide film 30 may be further included. Through this, the thickness of the anodic oxide film that insulates the metal substrate 10 may be adjusted.
- the photo solder resist pattern 55 electrically insulates the first electrode 70 from the second electrode 80.
- the photo solder resist pattern 55 may include all regions except for regions in which the first to fourth electrodes 70, 80, 71, and 81 are exposed to the outside, and regions in which the light emitting diodes 100 are seated. It can be formed in the area.
- the first electrode 70 may be formed by stacking the first to third metal layers 41, 51, and 61.
- the first metal layer 41 may be formed of a metal material including chromium or chromium having excellent affinity with the second anodic oxide film 30.
- the second gold layer 51 may be formed of copper or a metal material including copper having excellent conductivity.
- the third metal layer 61 may be formed of silver or a metal material including silver capable of electroless plating. The third metal layer 61 is exposed to the outside and electrically connected to the first wire 110.
- the second electrode 80 may be formed of a metal material including chromium or chromium having excellent affinity with the second anodic oxide film 30.
- the second metal layer 52 may be formed of copper or a metal material including copper having excellent conductivity.
- the third metal layer 62 may be formed of silver or a metal material including silver capable of electroless plating. The third metal layer 62 is exposed to the outside and electrically connected to the second wire 120.
- the third electrode 71 is formed on the region where the first and second metal layers 41 and 51 of the first electrode 70 extend.
- the third electrode 71 is formed of the same material as the third metal layer 61 of the first electrode 70 through the same process.
- the third electrode 71 may be connected to a printed circuit board (not shown). Accordingly, the third electrode 71 may apply the voltage applied through the printed circuit board to the first electrode 70.
- the fourth electrode 81 is formed on the region where the first and second metal layers 42 and 52 of the second electrode 80 extend.
- the third electrode 71 is formed of the same material as the third metal layer 62 of the second electrode 80 through the same process. In this case, the third electrode 71 may be connected to a printed circuit board (not shown). Accordingly, the third electrode 71 may apply the voltage applied through the printed circuit board to the second electrode 80.
- the light emitting diodes 100 are bonded to a region where the reflecting grooves 90 are formed.
- the light emitting diodes 100 may be formed on the third metal layer 60.
- the third metal layer 60 is formed of a conductive material such as silver having high light reflectance.
- the first wire 110 drawn from the light emitting diode 100 is electrically connected to the first electrode 70, and the second wire 120 is connected to the second electrode 80.
- the present invention may further include a protective layer 130 on the upper portion of the light emitting diode 100 to protect the light emitting diode 100 from external factors.
- the protective layer 130 uses a mixture of phosphor and epoxy.
- the protective layer 130 may convert the light emitted from the light emitting diodes 100 into a white light by using phosphors.
- the phosphor may convert the white light emitted from the light emitting diodes 100 into one of red, green, and blue to be emitted.
- the light emitting diode package according to the present invention may further include a protective cap 140 formed of a material such as plastic of a transparent material outside the protective layer 130.
- the light emitting diode package according to the present invention may further include a partition wall 56 for preventing the protective layer 130 from leaking to the outside when the protective layer 130 is formed.
- the partition wall 56 may have a rectangular cross section.
- the present invention is not limited thereto and may be formed in a triangular or trapezoidal shape to improve light reflectance.
- 15 to 20 are cross-sectional views sequentially illustrating a method of manufacturing an optical device package according to a second exemplary embodiment of the present invention illustrated in FIG. 14.
- Forming the reflective groove 90, the first anodic oxide film 20, the second anodic oxide film 30, the first metal layer 40, and the second metal layer 200 in the metal substrate 10 may be performed by the method of the present invention. It may be manufactured by the same process as FIGS. 3 to 7 described the optical device package manufacturing method according to an embodiment. Hereinafter, a process after the second metal layer is formed will be described in detail.
- the reflective groove 90 is formed in the metal substrate 10. Subsequently, the metal substrate 10 is smoothly processed through a process such as lapping and polishing. Next, the surface of the metal substrate 10 is oxidized through a barrier type anodizing method to form the first anodic oxide film 20.
- an aluminum layer is formed on the first anodic oxide film 20, and the second anodic oxide film 30 is formed again through a barrier type anodizing method.
- the first metal layer 40 including chromium or the chromium-containing metal material and the second metal layer 200 including the copper or copper metal material 200 are continuously deposited by sputtering or chemical vapor deposition. do.
- a photoresist pattern 210 is formed on the second metal layer 200.
- the photoresist pattern 210 forms a photoresist pattern 210 illustrated in FIG. 15 through an exposure and development process after applying photoresist on the second metal layer 200.
- the photoresist pattern 210 is formed by remaining photoresist in all regions except for regions in which the first to fourth electrodes 70, 80, 71, and 81 are to be formed.
- the metal pattern 220 is formed on the second metal layer 200 exposed by the photoresist pattern 210. As shown in FIG. 16, the metal pattern 220 is formed of the same material as the second metal layer 200 by using an electroplating method.
- the stepped metal layer 230 is formed as shown in FIG. 17.
- the stepped metal layer 230 is removed using a wet etching method or a dry etching method to remove the metal layer having a thin thickness.
- the remaining regions except for the regions where the first to fourth electrodes 70, 80, 71, and 81 are to be formed are removed.
- the second metal layer 230 is removed by a wet etching method or a dry etching method to etch the first metal layer 40 in the exposed region.
- a photo solder resist pattern 55 is formed.
- the third metal layers 61 and 62 are formed of silver or a metal containing silver.
- the partition wall 56 is formed.
- the partition wall 56 may be formed before the third metal layers 61 and 62 are formed.
- the light emitting diodes 100 are adhered to each other, the first wire 110 is connected to the first electrode 70 by soldering, or the like, and the second wire 120 is connected to the second electrode 80. Connect to Subsequently, the protective layer 130 and the protective cap 140 are formed.
- FIG. 21 is a cross-sectional view of a light emitting diode package according to a third embodiment of the present invention.
- the light emitting diode package illustrated in FIG. 21 includes the same components except that the reflective groove 90 is not formed in the light emitting diode package illustrated in FIG. 2.
- the optical device package according to the third embodiment of the present invention includes a light emitting diode substrate and a light emitting diode (100).
- a first anodic oxide film 20 may be formed on the metal substrate 10.
- the method may further include a second anodic oxide film 30 formed on the first anodic oxide film 20.
- the substrate for a light emitting diode includes first to fourth electrodes 70, 80, 71, and 81. Since the first to fourth electrodes 70, 80, 71, and 81 are the same as the first to fourth electrodes 70, 80, 71, and 81 shown in FIG. 2, redundant description thereof will be omitted.
- the light emitting diode 100 is formed on the third metal layer 60, and the first wire 110 is connected to the first electrode 70 by soldering or the like.
- the protective layer 130 is formed of a material in which a phosphor and an epoxy are mixed to cover the light emitting diodes 100, and includes a protective cap 140 formed on the protective layer 130.
- the first and second metal layers 40 and 50 may be removed in the region where the light emitting diode 100 is to be seated.
- the partition wall 56 formed in FIG. 2 may be further formed.
- the optical device package manufacturing method according to the third embodiment of the present invention may be formed by the same method without going through the step of forming a reflective groove in the manufacturing method of the optical device package according to the first embodiment of the present invention.
- FIG. 22 is a cross-sectional view illustrating an optical device package according to a fourth exemplary embodiment of the present invention.
- FIG. 22 is a view illustrating a single light emitting diode package after the optical device package illustrated in FIG. 2 is cut along a cutting line.
- a printed circuit board 270 is attached to the light emitting diode package illustrated in FIG. 2, and a reflective plate 280 is provided between the printed circuit board 270 and the protective cap 140. Same as except. Duplicate description of the same configuration will be omitted.
- the reflector 280 may be formed of a metal or a nonmetallic material having high reflectance.
- the reflective plate 280 may further include a reflective film coated with a non-metal material having a high reflectance.
- the light emitting diode package of the present invention can be used as a backlight unit of a liquid crystal display device.
- FIG. 23 is a plan view schematically illustrating a backlight unit using a light emitting diode package according to an embodiment of the present invention.
- the backlight unit may include a light guide plate 800, a light emitting diode package 500, and a frame 700.
- the light emitting diode package illustrated in FIG. 2 may be formed in a bar type.
- the light guide plate 800 guides the light supplied from the light emitting diodes 100 and uniformly emits the light incident from the light emitting diodes 100 in the vertical direction.
- the frame 700 is bonded to one side of the light emitting diode package 500.
- heat generated from the light emitting diodes 100 is transferred to the light emitting diode substrate 400 and is emitted to the outside through the frame 700 connected thereto. Accordingly, even when the number of light emitting diodes 100 is used, heat is easily released to the outside.
- the backlight unit in the form of a surface light source may be configured.
- optical device substrate, the optical device package and the manufacturing method thereof according to an embodiment of the present invention may be used for indoor and outdoor lighting devices in addition to the backlight unit.
- the present invention has the effect of efficiently dissipating heat generated in the optical device using a metal substrate.
- the present invention has the effect of easily adjusting the thickness of the anodized film of the metal substrate.
- reflection grooves are formed in the metal substrate to improve light utilization efficiency and facilitate alignment of the optical devices.
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Abstract
Description
Claims (22)
- 금속 기판;상기 금속 기판의 표면에 형성되어 상기 금속 기판을 절연시키는 제1 양극 산화막; 및상기 제1 양극 산화막 위에 서로 절연되게 형성된 제1 및 제2 전극을 포함하는 광소자용 기판.
- 제1 항에 있어서,상기 제1 양극 산화막 위에 형성된 제2 양극 산화막을 더 포함하는 광소자용 기판.
- 제 1 항에 있어서,상기 금속층은크롬 또는 크롬을 포함하는 합금으로 이루어진 제1 금속층; 및상기 제1 금속층 상부에 형성되며, 구리 또는 구리를 포함하는 금속 물질로 형성된 제2 금속층을 포함하는 광소자용 기판.
- 제 1 내지 제 3 항 중 어느 한 항에 있어서,상기 제1 및 제2 전극 사이에 상기 금속 기판이 함몰되어 형성된 홈을 더 포함하는 광소자용 기판.
- 제 4 항에 있어서,상기 홈이 형성된 영역에 은 또는 은을 포함하는 금속 물질로 형성된 제3 금속층을 더 포함하는 광소자용 기판.
- 금속 기판, 상기 금속 기판의 표면에 형성되어 상기 금속 기판을 절연시키는 제1 양극 산화막 및 상기 제1 양극 산화막 위에 서로 절연되게 형성된 제1 및 제2 전극을 포함하는 광소자용 기판;상기 제1 및 제2 전극 사이의 배치되는 광소자;상기 광소자와 상기 제1 전극을 연결하는 제1 와이어; 및상기 광소자와 상기 제2 전극을 연결하는 제2 와이어를 포함하는 광소자 패키지.
- 제 6 항에 있어서,상기 제1 양극 산화막 위에 형성된 제2 양극 산화막을 더 포함하는 광소자 패키지.
- 제 6 항에 있어서,상기 금속층은크롬 또는 크롬을 포함하는 합금으로 이루어진 제1 금속층;구리 또는 구리를 포함하는 도전성 물질로 형성된 제2 금속층; 및은 또는 은을 포함하는 도전성 물질로 형성된 제3 금속층 중 적어도 어느 하나의 금속층을 포함하는 광소자 패키지.
- 제 6 항에 있어서,상기 광소자가 배치되는 하부에 상기 제1 및 제2 전극과 절연되며, 은 또는 은을 포함하는 금속 물질로 형성된 제3 금속층을 포함하는 광소자 패키지.
- 제 6 항 내지 제 9 항 중 어느 한 항에 있어서,상기 금속 기판은상기 광소자가 배치된 영역이 함몰되어 형성된 반사홈을 더 포함하는 광소자 패키지.
- 제 10 항에 있어서,상기 광소자를 덮는 보호층 및 보호캡을 더 포함하되,상기 보호층은 상기 광소자로부터 방출된 광을 백색광으로 변환하는 인광물질을 포함하는 광소자 패키지.
- 제 11 항에 있어서,상기 보호층이 외부로 유출되는 것을 방지하는 격벽을 더 포함하는 광소자 패키지.
- (a) 금속 기판 표면에 상기 금속 기판을 절연시키는 제1 양극 산화막을 형성하는 단계;(b) 상기 제1 양극 산화막 위에 제2 양극 산화막을 형성하는 단계;(c) 상기 제1 양극 산화막 위에 제1 금속층을 형성하는 단계;(d) 상기 제1 금속층 위에 제2 금속층을 형성하는 단계; 및(e) 상기 제1 및 제2 금속층을 식각하여 서로 마주하며 절연되도록 제1 및 제2 전극을 형성하는 단계를 포함하는 광소자용 기판 제조 방법.
- 제 13 항에 있어서,상기 단계 (a)는상기 금속 기판을 붕산염 또는 주석산염 배스 방법을 통해 애노다이징 하여 상기 금속 기판 표면에 제1 양극 산화막을 형성하는 것을 특징으로 하는 광소자용 기판 제조 방법.
- 제 13 항에 있어서,상기 단계 (b)는상기 제1 양극 산화막 위에 금속층을 형성하는 단계; 및상기 금속층을 붕산염 또는 주석산염 배스 방법을 통해 애노다이징 하는 단계를 포함하는 광소자용 기판 제조 방법.
- 제 13 항에 있어서,상기 단계(c) 및 단계(d)는상기 제1 및 제2 금속층을 연속하여 증착하는 단계;상기 제2 금속층 위에 상기 제1 및 제2 전극이 형성될 영역의 포토 레지스트가 제거된 포토 레지스트 패턴을 형성하는 단계;상기 제2 금속층과 동일한 물질로 상기 제2 금속층이 노출된 영역에 도금하고 상기 포토 레지스트 패턴을 제거하여 제2 금속층을 단차지도록 형성하는 단계;상기 단차진 금속층을 제1 식각 공정을 통해 상기 단차지게 형성된 제2 금속층 중 두께가 두꺼운 영역의 제2 금속층을 남기고 나머지 영역의 제2 금속층을 제거하여 제1 금속층을 노출시키는 단계; 및제2 식각 공정을 통해 상기 노출된 제1 금속층을 식각하는 단계를 포함하는 광소자용 기판 제조 방법.
- 제 13 항에 있어서,상기 단계 (a) 이전에상기 제1 및 제2 전극 사이에 상기 금속 기판을 함몰시켜 홈을 형성하는 단계를 더 포함하는 광소자용 기판 제조 방법.
- 제 17 항에 있어서,상기 홈이 형성된 영역에 상기 제2 양극 산화막 또는 상기 제2 금속층 중 어느 하나 상부에 은 또는 은을 포함하는 제3 금속층을 형성하는 단계를 더 포함하는 광소자용 기판 제조 방법.
- (a) 금속 기판 표면에 상기 금속 기판을 절연 시키는 제1 양극 산화막을 형성하는 단계;(b) 상기 제1 양극 산화막 위에 제1 내지 제3 금속층 중 어느 하나의 금속층을 포함하며 서로 마주하며 절연되게 형성된 제1 및 제2 전극을 형성하는 단계;(c) 상기 제1 및 제2 전극 사이에 광소자를 배치하는 단계; 및(d) 상기 광소자로부터 인출된 제1 와이어와 상기 제1 전극을 전기적으로 연결하고, 상기 광소자로부타 인출된 제2 와이어와 상기 제2 전극을 전기적으로 연결하는 단계를 포함하는 광소자 패키지 제조 방법.
- 제 19 항에 있어서,상기 단계 (a) 이후에,상기 제1 양극 산화막 위에 제2 양극 산화막을 형성하는 단계를 포함하되,상기 제2 양극 산화막 형성 단계는상기 제2 양극 산화막 위에 금속 물질을 형성하는 단계;상기 금속 물질을 붕산염 또는 주석산염 배스 방법을 통해 애노다이징 하는 단계를 포함하는 광소자 패키지 제조 방법.
- 제 19 항에 있어서,상기 단계 (b)는상기 광소자가 배치될 영역에 상기 제1 내지 제3 금속층과 동일한 금속층 중 적어도 어느 하나의 금속층을 형성하는 단계를 더 포함하는 광소자 패키지 제조 방법.
- 제 19 내지 제 21 항 중 어느 한에 있어서,상기 단계 (a) 이전에상기 광소자가 배치될 영역에 상기 금속 기판이 함몰되어 형성된 반사홈을 형성하는 단계를 더 포함하는 광소자 패키지 제조 방법.
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CN2009801568141A CN102318092A (zh) | 2009-02-17 | 2009-12-29 | 用于光学器件的基板、包括该基板的光学器件封装及其制造方法 |
JP2011549055A JP2012517697A (ja) | 2009-02-17 | 2009-12-29 | 光素子用基板、これを有する光素子パッケージおよびその製造方法 |
US13/146,337 US20110278624A1 (en) | 2009-02-17 | 2009-12-29 | Substrate for an optical device, an optical device package comprising the same and a production method for the same |
EP09840487A EP2400570A2 (en) | 2009-02-17 | 2009-12-29 | Substrate for an optical device, an optical device package comprising the same and a production method for the same |
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US20110278624A1 (en) | 2011-11-17 |
EP2400570A2 (en) | 2011-12-28 |
JP2012517697A (ja) | 2012-08-02 |
WO2010095811A3 (ko) | 2010-10-14 |
KR20100093681A (ko) | 2010-08-26 |
CN102318092A (zh) | 2012-01-11 |
KR101077264B1 (ko) | 2011-10-27 |
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