WO2010052541A2 - Procédé d'oxydation et de nettoyage pour tranches de silicium - Google Patents

Procédé d'oxydation et de nettoyage pour tranches de silicium Download PDF

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Publication number
WO2010052541A2
WO2010052541A2 PCT/IB2009/007310 IB2009007310W WO2010052541A2 WO 2010052541 A2 WO2010052541 A2 WO 2010052541A2 IB 2009007310 W IB2009007310 W IB 2009007310W WO 2010052541 A2 WO2010052541 A2 WO 2010052541A2
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WO
WIPO (PCT)
Prior art keywords
silicon wafers
silicon oxide
oxide layer
process according
silicon
Prior art date
Application number
PCT/IB2009/007310
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English (en)
Other versions
WO2010052541A3 (fr
Inventor
Ainhoa Esturo-Breton
Steffen Keller
Original Assignee
Centrotherm Photovoltaics Technology Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Centrotherm Photovoltaics Technology Gmbh filed Critical Centrotherm Photovoltaics Technology Gmbh
Publication of WO2010052541A2 publication Critical patent/WO2010052541A2/fr
Publication of WO2010052541A3 publication Critical patent/WO2010052541A3/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02052—Wet cleaning only

Definitions

  • the invention concerns an oxidation and cleaning process for silicon wafers according to the preamble of claim 1 and also a solar cell produced using this process.
  • the silicon wafers are often given a texture on their surface which reduces the reflection of the silicon wafer and so improves the light injection into the later solar cell.
  • the surface texture is normally produced using wet chemical processes.
  • the manufacture of a solar cell always requires the formation of a pn-transition in the silicon wafer.
  • a doping agent is diffused into the silicon wafers for this purpose. This usually takes place at temperatures above 700 0 C. At such high temperatures, however, any impurities already present on the surface of the silicon wafer or in the diffusion device are likewise diffused into the silicon wafer. There they act as recombination centres for generated charged particles and in this way they substantially degrade the efficiency of the finished solar cell. For this reason, it is necessary to clean silicon wafers which are to be diffused before they are introduced into the diffusion device. This is normally done using wet chemical processes, where in principle various cleaning processes can be applied.
  • a cleaning process has become established in the industrial production of crystalline silicon solar cells in which the silicon wafers are firstly etched in an alkaline etching solution before they are placed in a metal-oxidising acid. Finally the silicon wafers are overetched in an aqueous hydrofluoric acid solution. Rinsing processes in water, most commonly in deionised water, can be provided between the individual steps. In each case, however, the silicon wafers are rinsed in deionised water after the overetching with hydrofluoric .acid. This serves to remove dissolved impurities from the silicon wafers and to dispose of any acid residues or at least to dilute them sufficiently.
  • the most commonly used alkaline etching solutions are potassium hydroxide or sodium hydroxide solutions.
  • the overetching of the silicon wafers with hydrofluoric acid, or a solution .containing hydrofluoric acid serves to remove any silicon oxide on the surface of the silicon wafers.
  • This silicon oxide c'an either first be grown on with suitable process steps, for example wet chemical oxidation, or it is what is known as natural silicon oxide, which forms under ordinary environmental conditions under the effect of atmospheric oxygen. After removing the silicon oxide layer using hydrofluoric acid, a hydrophobic silicon surface remains. The result of this is that in the subsequent rinsing in deionised water, the water pearls off the surface of the silicon wafers, so that the silicon wafers can be placed in the diffusion device with little or no residue of the deionised water.
  • the invention is based on the problem of providing a cleaning process for silicon wafers which have a silicon oxide layer on at least part of their surface.
  • the subject matter of the invention is also a solar cell with the features of claim 14.
  • the process according to the invention is therefore designed to provide the silicon wafers with a silicon oxide layer over at least part of their surface before they are etched. The etching then takes place in a solution which contains an acid which oxidises metallic impurities.
  • the silicon oxide layer of each solar cell is exposed unprotected to the acid.
  • the silicon wafers are rinsed in deionised water.
  • the at least one unprotected portion of the silicon oxide layer is at least partly left on the silicon wafers.
  • the silicon wafers are dried after rinsing.
  • the silicon wafers are etched in deionised water in an alkaline etching solution, when at least a portion of the silicon oxide layer is exposed unprotected to the etching solution. Should it be necessary, this can improve the cleaning effect.
  • the sequence of the various etching processes is not relevant. There may be intermediate rinsing steps between the individual etching processes.
  • the at least one unprotected portion of the silicon oxide layer is at least partially left on the silicon wafers, at least this portion is hydrophilic and thus not hydrophobic.
  • a complete removal of the silicon oxide layer by means of a solution containing hydrofluoric acid, which was formerly done in the cleaning process to form hydrophobic surfaces, is therefore precluded.
  • this also precludes the complete removal of the silicon oxide layer during the etching in the alkaline etching solution. This risk remains anyway only in principle, but with the alkaline etching solutions commonly used to clean silicon wafers and the etching periods which are normal in this connection, it is practically nonexistent.
  • the etching rate of the alkaline etching solutions as well as the etching periods are adjusted in such a way that a complete removal of the silicon oxide layer does not occur.
  • the silicon wafers therefore exist in at least partly hydrophilic condition, hence they are dried after rinsing in deionised water.
  • the actual drying process can be realised in any way known in the art.
  • One advantageous variant embodiment of the invention provides the silicon wafers with a silicon oxide layer by means of deposition from the vapour phase.
  • low-pressure (LPCVD) low-pressure (LPCVD)
  • atmospheric pressure (APCVD) atmospheric pressure
  • PECVD plasma-enhanced
  • the silicon oxide layer is formed by means of a wet thermal oxidation.
  • the silicon oxide layer can in principle be applied in any thickness. It has, however, emerged that the longer the etching processes of the cleaning method last, in particular the action of the alkaline etching solution, the more severe the damage to the surface of the silicon wafers.
  • One refinement of the invention is therefore designed to apply the silicon oxide layer in a thickness of between 2 nm and 70 nm, preferably in a thickness of between 10 nm and 70 nm.
  • an alkali hydroxide solution in particular an aqueous alkali hydroxide solution, is used as alkaline etching solution, and especially preferably a potassium or sodium hydroxide solution.
  • the alkaline etching solution has a silicon oxide etching rate of less than 25 nm per minute. These etching rates have been proven in practice.
  • One refinement of the process according to the invention is designed so that any saw damage is removed from the silicon wafers using wet chemical methods, before they are provided with the silicon oxide layer.
  • Any of the saw-damage etching processes known in the art can be used for this purpose.
  • the saw damage can be removed using an alkali hydroxide solution.
  • acidic etching solutions can also be used.
  • a further advantageous refinement of the invention is designed so that on at least part of the surface of the silicon wafers, a texture is formed using wet chemical processes, before the silicon wafers are provided with the silicon oxide layer.
  • wet chemical processes all texture etching solutions known in the art can be used, in particular alkaline or acidic texture etching solutions.
  • the wet chemical formation of a texture can be provided in addition or as an alternative to the wet chemical removal of the saw damage.
  • An alternative variant embodiment to the complete omission of etching with hydrofluoric acid is designed so that the silicon wafers are additionally etched in a heavily diluted or buffered hydrofluoric acid solution, which has a silicon oxide etching rate of less than 25 nm per minute.
  • a heavily diluted or buffered hydrofluoric acid solution which has a silicon oxide etching rate of less than 25 nm per minute.
  • the etching period should then obviously be adapted to the etching rate.
  • the etching described, in a heavily diluted or buffered hydrofluoric acid solution can be provided in conjunction with etching in the acid which oxidises metallic impurities alone or in conjunction with the etching in the alkaline etching solution.
  • the silicon wafers are etched in a hydrofluoric acid solution for less than one minute, preferably less than 30 seconds and especially preferably for less than 15 seconds.
  • the process according to the invention can advantageously be used in the production of solar cells.
  • Figure 2 Diagrammatic view of a further embodiment of the process according to the invention
  • FIG. 3 A further embodiment of the process according to the invention in a schematic view
  • FIG. 4 A further embodiment of the process according to the invention.
  • Figure 1 shows a diagrammatic view of a first embodiment of the process according to the invention.
  • any saw damage is first removed by etching 10. Consequently, this process is especially suitable for silicon wafers sawn from blocks. It can, however, also easily be used for other silicon materials, for example for silicon film materials.
  • a silicon oxide layer is applied to the silicon wafers using APCVD 12, although other silicon oxide deposition processes can also be used, in particular LPCVD or PECVD processes or a thermal oxidation.
  • the silicon wafers are etched in an aqueous sodium hydroxide (NaOH) solution 14, followed by etching 16 in hydrochloric acid (HCl) .
  • aqueous sodium hydroxide (NaOH) solution 14 aqueous sodium hydroxide
  • HCl hydrochloric acid
  • the silicon oxide layer is exposed unprotected to the etching media. No masks, for example with the aid of lacquers or dielectrics, are applied to protect the silicon oxide layer from the etching media. So the silicon oxide layer is completely unprotected. Insofar as special • manufacturing processes require and the process flow permits, in particular where the purity requirements are met, there is, however, in principle the possibility of at least partially protecting the silicon oxide layer against the etching media, for example by using appropriate dielectrics.
  • etching in NaOH solution 14 followed by etching in HCl 16 there may also be a first etching in HCl.
  • the silicon wafers are rinsed in deionised water 18.
  • no etching with hydrofluoric acid takes place, so that the silicon oxide layer is at least partially left on the silicon wafers.
  • the etching rate of the alkaline etching solutions as well as the etching periods are adjusted so that this does not happen.
  • an alkaline etching solution in particular an aqueous NaOH or potassium hydroxide (KOH) solution, which has a silicon oxide etching rate of less than 25 nm per minute.
  • KOH potassium hydroxide
  • the drying process 20 may be more expensive than in the cleaning processes formerly in common use.
  • all drying processes known in the art can be applied. For example a dried gas such as nitrogen, preferably under additional heat exposure, can be used.
  • FIG. 2 illustrates in diagrammatic form a further embodiment of the process according to the invention.
  • This differs from the embodiment in Figure 1 firstly in that after removing the saw damage 10, a texture is formed on at least part of the surface of the silicon wafers using wet chemical means 22. This process is usually referred to as texture etching.
  • a further difference lies in the fact that the silicon oxide layer here is applied by means of a thermal oxidation 24.
  • an aqueous potassium hydroxide (KOH) solution is provided, in which the silicon wafers are etched 26.
  • centrifuging 28 takes place before the final drying process 20. This involves the silicon wafers being spun while arranged, for example, in a holder. The centrifuging 28 assists the subsequent drying 20 and can accelerate it.
  • the embodiment in Figure 3 omits any initial removal 10 of the saw damage and in this way differs from the embodiment in Figure 2.
  • a further difference lies in the fact that the rinsing step 18 following the etching processes 26, 16 is followed by etching 30 in buffered hydrofluoric acid (HF) solution.
  • This additional etching step 30 can provide certainty in the case of very badly contaminated silicon wafers or can be used when initial saw damage etching is omitted.
  • the buffering guarantees that any silicon oxide 24 which has been applied will at best be partly removed during the etching 30-. In this case, the buffering is selected such that a silicon oxide etching rate of less than 25 nm per minute is guaranteed.
  • etching period must be suitably adapted, in order to prevent the silicon oxide being completely removed.
  • the etching 30 in buffered HF is followed by ah additional rinsing step 32, in order to remove HF residues.
  • the variant embodiment in Figure 3 makes provision for blowing-off 34. This involves a gas stream blowing water mechanically down off the silicon wafers. This is, again, followed by drying 20 of the silicon wafers.
  • the embodiment in Figure 4 largely corresponds to that in Figure 2.
  • Only the etching 26 in a KOH solution is replaced by an etching 36 in a buffered HF solution.
  • the buffering and hence the etching rate as well as the etching period are selected such that a previously applied 24 silicon oxide layer is only partially removed during the etching 36 in the buffered HF solution.
  • a silicon oxide etching rate of less than 25 nm per minute is appropriate for this. This can also be assured with a sufficiently diluted HF solution, in particular an agueous HF solution, so that this can always be used as an alternative to a buffered HF solution.
  • An etching 36 in a buffered HF solution, or a suitably diluted HF solution, can for example be advantageous when etching in an alkaline etching solution is to be avoided.
  • the other method steps correspond to those of the embodiment from Figure 2, so that reference may be made to the corresponding discussions above.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
  • Photovoltaic Devices (AREA)
  • Cleaning Or Drying Semiconductors (AREA)

Abstract

La présente invention concerne un procédé d'oxydation et de nettoyage pour des tranches de silicium qui sont, au moins sur une partie de leur surface (12; 24) recouvertes d'une couche d'oxyde de silicium avant d'être gravées dans une solution d'attaque alcaline (14; 26) et d'être gravées dans une solution (16) contenant un acide qui oxyde les impuretés métalliques; au moins une partie de la couche d'oxyde de silicium étant exposée sans protection à la solution de gravure et à l'acide; puis les couches de silicium sont rincées dans de l'eau désionisée après les étapes de gravure (18); ladite portion non protégée de la couche d'oxyde de silicium est au moins en partie laissée sur les tranches de silicium qui sont ensuite séchées (20) après rinçage (18; 32).
PCT/IB2009/007310 2008-11-07 2009-11-04 Procédé d'oxydation et de nettoyage pour tranches de silicium WO2010052541A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102008056455.9 2008-11-07
DE200810056455 DE102008056455B3 (de) 2008-11-07 2008-11-07 Oxidations- und Reinigungsverfahren für Siliziumscheiben

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WO2010052541A2 true WO2010052541A2 (fr) 2010-05-14
WO2010052541A3 WO2010052541A3 (fr) 2010-10-07

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102694078A (zh) * 2012-06-16 2012-09-26 成都聚合科技有限公司 一种清洗高倍聚光光伏光电转换接收器模块工艺
JP2013518425A (ja) * 2010-01-27 2013-05-20 コミサリア ア レネルジー アトミック エ オ ゼネルジー アルテルナティブ 結晶シリコン基板の表面の下処理を含む光起電セルの製造方法
CN103341458A (zh) * 2013-06-15 2013-10-09 成都聚合科技有限公司 一种高倍聚光光伏光电转换接收器电路板清洗工艺
CN104384125A (zh) * 2014-10-08 2015-03-04 昆山诃德新能源科技有限公司 一种高倍聚光太阳能光电接收器模块清洗工艺
CN104384126A (zh) * 2014-10-10 2015-03-04 昆山诃德新能源科技有限公司 一种高倍聚光光伏光电转换接收器电路板清洗工艺
EP3370267A1 (fr) * 2017-02-23 2018-09-05 LG Electronics Inc. Procédé de fabrication d'une couche d'oxydation pour cellule solaire
EP4238663A1 (fr) 2022-03-03 2023-09-06 Arva Greentech AG Procédé d'élimination de polluants organiques de surfaces au moyen de persulfates et de persulfonates générés in situ

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CN110600363A (zh) * 2019-09-18 2019-12-20 武汉新芯集成电路制造有限公司 去除氧化硅的方法及半导体器件的制造方法
CN117457549B (zh) * 2023-12-25 2024-04-12 富芯微电子有限公司 一种用于晶闸管管芯生产的表面腐蚀设备

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0472441A1 (fr) * 1990-08-24 1992-02-26 Seiko Epson Corporation Méthode de nettoyage de composants semi-conducteur en deux étapes
US5904574A (en) * 1995-08-10 1999-05-18 Seiko Epson Corporation Process of making semiconductor device and improved semiconductor device
WO2001013418A1 (fr) * 1999-08-16 2001-02-22 Memc Electronic Materials, Inc. Procede de nettoyage en une operation de semi-conducteurs apres polissage final
JP2004172271A (ja) * 2002-11-19 2004-06-17 Mitsubishi Electric Corp 太陽電池の製造方法及び太陽電池
EP2048702A2 (fr) * 2007-10-10 2009-04-15 Siltron Inc. Procédé de nettoyage de tranche de silicium

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1514949C3 (de) * 1966-03-26 1975-06-19 Telefunken Patentverwertungsgesellschaft Mbh, 7900 Ulm Verfahren zum Herstellen eines Halbleiterbauelementes oder einer Halbleiterschaltung
WO2000072366A1 (fr) * 1999-05-21 2000-11-30 Plasmasil, L.L.C. Procede d'amelioration de l'uniformite en epaisseur des plaquettes semi-conductrices
DE19962136A1 (de) * 1999-12-22 2001-06-28 Merck Patent Gmbh Verfahren zur Rauhätzung von Siliziumsolarzellen
KR101070204B1 (ko) * 2006-02-01 2011-10-06 자이단호진 고쿠사이카가쿠 신고우자이단 반도체 장치의 제조 방법 및 반도체 표면의 마이크로러프니스 저감 방법
DE102007004060B4 (de) * 2007-01-22 2013-03-21 Gp Solar Gmbh Verwendung einer Ätzlösung aufweisend Wasser, Salpetersäure und Schwefelsäure und Ätzverfahren

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0472441A1 (fr) * 1990-08-24 1992-02-26 Seiko Epson Corporation Méthode de nettoyage de composants semi-conducteur en deux étapes
US5904574A (en) * 1995-08-10 1999-05-18 Seiko Epson Corporation Process of making semiconductor device and improved semiconductor device
WO2001013418A1 (fr) * 1999-08-16 2001-02-22 Memc Electronic Materials, Inc. Procede de nettoyage en une operation de semi-conducteurs apres polissage final
JP2004172271A (ja) * 2002-11-19 2004-06-17 Mitsubishi Electric Corp 太陽電池の製造方法及び太陽電池
EP2048702A2 (fr) * 2007-10-10 2009-04-15 Siltron Inc. Procédé de nettoyage de tranche de silicium

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013518425A (ja) * 2010-01-27 2013-05-20 コミサリア ア レネルジー アトミック エ オ ゼネルジー アルテルナティブ 結晶シリコン基板の表面の下処理を含む光起電セルの製造方法
CN102694078A (zh) * 2012-06-16 2012-09-26 成都聚合科技有限公司 一种清洗高倍聚光光伏光电转换接收器模块工艺
CN103341458A (zh) * 2013-06-15 2013-10-09 成都聚合科技有限公司 一种高倍聚光光伏光电转换接收器电路板清洗工艺
CN104384125A (zh) * 2014-10-08 2015-03-04 昆山诃德新能源科技有限公司 一种高倍聚光太阳能光电接收器模块清洗工艺
CN104384126A (zh) * 2014-10-10 2015-03-04 昆山诃德新能源科技有限公司 一种高倍聚光光伏光电转换接收器电路板清洗工艺
EP3370267A1 (fr) * 2017-02-23 2018-09-05 LG Electronics Inc. Procédé de fabrication d'une couche d'oxydation pour cellule solaire
US10490676B2 (en) 2017-02-23 2019-11-26 Lg Electronics Inc. Method of manufacturing oxidation layer for solar cell
EP4238663A1 (fr) 2022-03-03 2023-09-06 Arva Greentech AG Procédé d'élimination de polluants organiques de surfaces au moyen de persulfates et de persulfonates générés in situ
WO2023166187A1 (fr) 2022-03-03 2023-09-07 Arva Greentech Ag Procédé d'élimination de polluants organiques de surfaces à travers des persulfates et des persulfonates générés in situ

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Publication number Publication date
TW201027617A (en) 2010-07-16
DE102008056455B3 (de) 2010-04-29
WO2010052541A3 (fr) 2010-10-07

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