WO2010024629A2 - 양자점 태양광 소자 및 그 제조방법 - Google Patents
양자점 태양광 소자 및 그 제조방법 Download PDFInfo
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- WO2010024629A2 WO2010024629A2 PCT/KR2009/004852 KR2009004852W WO2010024629A2 WO 2010024629 A2 WO2010024629 A2 WO 2010024629A2 KR 2009004852 W KR2009004852 W KR 2009004852W WO 2010024629 A2 WO2010024629 A2 WO 2010024629A2
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- photovoltaic device
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
- H01L31/035209—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions comprising a quantum structures
- H01L31/035218—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions comprising a quantum structures the quantum structure being quantum dots
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Definitions
- the present invention relates to a semiconductor-based photovoltaic device capable of absorbing light in a wide wavelength band, having high electron-hole pair separation efficiency, and having a high photoelectric conversion efficiency, and a method of manufacturing the same.
- the present invention relates to a high efficiency semiconductor-based photovoltaic device having a semiconductor quantum dot and having a large junction vertical junction structure with a pn junction.
- silicon-based photovoltaic devices use silicon single crystals and silicon polycrystals, and the cost of silicon materials and wafers when building a solar system exceeds 40% of the total construction cost. Efforts have been made to reduce the amount of silicon required to produce unit power through a morphology / physical engineering approach and to minimize silicon consumption in thin film devices.
- the light absorption layer of the photovoltaic device is limited to a flat depletion layer or neutral layer (i) formed at the p-n junction.
- thickening the light absorbing layer pn depletion layer, or i-layer
- the absorption wavelength band is very narrow, the theoretical conversion efficiency is known to be less than 30%.
- An object of the present invention for solving the above problems is a semiconductor photovoltaic device capable of absorbing light in a wide wavelength band, having a high electron-hole pair separation efficiency and maximizing the light absorbing layer region and having a high photoelectric conversion efficiency;
- a semiconductor quantum dot is provided in the light absorbing layer region to allow light absorption in a wide wavelength band, and a pn junction has a vertical and radial junction structure so that the semiconductor quantum dot and the p layer / n are provided.
- Highly efficient photovoltaic devices and simple and economical processes that maximize the contact area between layers and effectively separate electron-holes by drift caused by electric fields even in the case of many defects such as amorphous semiconductors. It is to provide a method of manufacturing a high efficiency photovoltaic device.
- a method of manufacturing a photovoltaic device includes the steps of: a) forming a semiconductor quantum dot thin film formed on the p-type or n-type semiconductor substrate, the semiconductor quantum dot formed inside a medium doped with impurities of the same type as the semiconductor substrate; b) forming a pore array through the semiconductor quantum dot thin film through partial etching; c) depositing a semiconductor doped with complementary impurities to the semiconductor substrate on the semiconductor quantum dot thin film on which the pore array is formed; and d) sequentially forming a transparent conductive film and an upper electrode on the semiconductor doped with the complementary impurities, and forming a lower electrode under the semiconductor substrate.
- the p-type or n-type semiconductor substrate includes a semiconductor substrate doped with p-type impurities or n-type impurities, and the movement of the semiconductor (p-type) substrate or electrons through which current flows due to the movement of holes due to the characteristics of the semiconductor material itself. And a semiconductor (n-type) substrate through which current flows.
- Impurities of the same type as the semiconductor substrate mean impurities in which a medium generates the same kind of charge carriers as the semiconductor substrate.
- the impurity having the same type as the semiconductor substrate refers to an acceptor-type impurity based on the material of the medium when the semiconductor substrate is p-type, and based on the material of the medium when the semiconductor substrate is n-type. It means donor impurity.
- the impurity complementary to the semiconductor substrate refers to an impurity that generates different kinds of charge carriers from the p-type or n-type semiconductor substrate.
- the semiconductor substrate when the semiconductor substrate is p-type, it means a donor-type impurity.
- the semiconductor substrate when the semiconductor substrate is n-type, it means acceptor-type impurities.
- a semiconductor doped with complementary impurities to the semiconductor substrate refers to a semiconductor having a charge carrier different from that of the semiconductor substrate.
- a hole is formed when the charge carrier of the semiconductor substrate is electron.
- a semiconductor having charge carriers means a semiconductor having electrons as charge carriers when charge carriers of the semiconductor substrate are holes.
- the semiconductor substrate or a semiconductor doped with complementary impurities to the semiconductor substrate includes a Group IV semiconductor including Si and Ge, a Group 3-5 semiconductor including GaAs and InP, an oxide semiconductor, and a nitride semiconductor.
- the semiconductor substrate or the semiconductor doped with complementary impurities to the semiconductor substrate includes monocrystalline, polycrystalline or amorphous.
- the medium is a semiconductor nitride, a semiconductor oxide, or a mixture thereof, and the semiconductor nitride, a semiconductor oxide, or a mixture thereof is a nitride, an oxide, or a mixture of elements constituting the semiconductor substrate.
- the semiconductor substrate or a semiconductor doped with complementary impurities to the semiconductor substrate is a Group 4 semiconductor
- the medium is an oxide of Group 4 element, nitride, or a mixture thereof.
- the pores penetrating the semiconductor quantum dot thin film mean pores penetrating the semiconductor quantum dot thin film in the thickness direction, and the penetration is not only the semiconductor quantum dot thin film but also the p-type or n-type semiconductor substrate existing under the semiconductor quantum dot thin film. It includes the meaning that the pores are formed to a certain thickness of.
- the pore array refers to pores penetrating through the plurality of semiconductor quantum dot thin film physically separated from each other, the pore array includes a case where the pores penetrating the semiconductor quantum dot thin film has a regular arrangement, a single pore This includes cases with six nearest pores.
- Step a) is characterized by being performed by the method of a1-1) and a1-2) below or by the method of a2-1) and a2-2) below.
- the step a) may be performed by repeating a1-1) a semiconductor layer of a semiconductor nitride, a semiconductor oxide, or a mixture thereof doped with impurities of the same type as the semiconductor substrate on the semiconductor substrate; and a semiconductor layer; Forming; And a1-2) heat treating the composite layer to form semiconductor quantum dots in a medium of a semiconductor nitride, semiconductor oxide, or a mixture doped with impurities of the same type as the semiconductor substrate, followed by heat treatment in a hydrogen atmosphere. Bonding the unbound electrons with hydrogen;
- the step a) includes a2-1) a semiconductor oxide, a semiconductor nitride, or a mixture thereof having a non-stoichiometric ratio that is doped with impurities of the same type as the semiconductor substrate and lacks oxygen or nitrogen on the semiconductor substrate.
- the medium layer is formed by a deposition process including the physical vapor deposition (PVD), chemical vapor deposition (CVD) or atomic layer deposition (ALD) of the a1-1) step, and constitutes the composite laminate layer;
- the semiconductor layer are preferably 1 nm to 5 nm thick independently of each other.
- the semiconductor layers constituting the composite laminate layer have different thicknesses, and the semiconductor layer adjacent to the semiconductor substrate has a thicker thickness.
- the apron compound layer of step a2-1) is formed by a deposition process including a physical vapor deposition (PVD), a chemical vapor deposition (CVD) or an atomic layer deposition (ALD), contained in the non-proton compound layer
- PVD physical vapor deposition
- CVD chemical vapor deposition
- ALD atomic layer deposition
- the semiconductor oxide or semiconductor nitride lacks 0 to 50% in the amount of oxygen or nitrogen required for bonding to satisfy the stoichiometric ratio, and is characterized by a gradient of oxygen or nitrogen in the thickness direction of the non-proton compound layer.
- the gradient of oxygen or nitrogen amount includes a discontinuous gradient or continuous gradient, and includes a gradient in which the amount of oxygen or nitrogen in the non-protonous compound layer varies in the depth direction.
- the amount of oxygen or nitrogen decreases as the semiconductor oxide or semiconductor nitride contained in the non-proton compound layer is closer to the semiconductor substrate. Specifically, the gradient of oxygen or nitrogen amount decreases continuously or discontinuously as the oxygen or nitrogen amount approaches the semiconductor substrate.
- Step b) is a step of manufacturing a low-dimensional nanostructure in a top-down manner by partially etching the composite layer or apron compound layer heat-treated and hydrogenated, in detail, b1) forming a mask on the semiconductor quantum dot thin film Doing; And b2) transferring the pattern of the mask through ion beam etching (RIE) to form an array of pores penetrating through the semiconductor quantum dot thin film.
- RIE ion beam etching
- the short axis diameter of the pores formed by the ion beam etching in step b2) is characterized in that 20 nm to 1000 nm.
- the photovoltaic device is a silicon photovoltaic device; the semiconductor quantum dots are silicon quantum dots; and the medium is silicon oxide, silicon nitride, or a mixture thereof.
- the p-type or n-type semiconductor substrate is a p-type or n-type silicon substrate
- the semiconductor doped with complementary impurities to the semiconductor substrate is n-type or p-type silicon doped with complementary impurities
- the semiconductor quantum dots are silicon quantum dots
- the medium is silicon oxide, silicon nitride, or a mixture thereof.
- Photovoltaic device is a lower electrode; An n-type or p-type first semiconductor layer formed on the lower electrode; A porous semiconductor quantum dot layer having a plurality of semiconductor quantum dots formed in a medium doped with impurities of the same type as the first semiconductor layer and having a plurality of through pores; A second semiconductor layer formed in contact with the porous semiconductor quantum dot layer and being a semiconductor material doped with impurities complementary to the first semiconductor layer; And a transparent conductive film and an upper electrode sequentially formed on the second semiconductor layer.
- the medium is a semiconductor nitride, a semiconductor oxide, or a mixture thereof, and the semiconductor nitride, a semiconductor oxide, or a mixture thereof is a nitride, an oxide, or a mixture of elements constituting the semiconductor substrate.
- the through pores formed in the porous semiconductor quantum dot layer refers to pores penetrating through a medium in which a plurality of semiconductor quantum dots are formed, and the through pores formed in the porous semiconductor quantum dot layer are formed under the porous semiconductor quantum dot layer. It includes the case where the pores are formed to a certain depth of one semiconductor layer.
- the plurality of through pores includes a meaning in which the plurality of through pores physically separated from each other has a regular arrangement, and includes a meaning in which one through pore is arranged to have six nearest through pores.
- the semiconductor quantum dots of the porous semiconductor quantum dot layer have different sizes and have a larger size as they are adjacent to the first semiconductor layer.
- the semiconductor quantum dots of the porous semiconductor quantum dot layer have a gradient of the size in the thickness direction of the porous semiconductor quantum dot layer, and the closer to the first semiconductor layer, the larger the size of the semiconductor quantum dots is.
- the photovoltaic device has a pn junction formed at a surface of the through-holes penetrating the porous semiconductor quantum dot layer, and in detail, a pn junction is formed in the entire surface of the nano-column that is the through-holes. Is formed.
- the photovoltaic device is a silicon photovoltaic device; the semiconductor quantum dots are silicon quantum dots; and the medium is silicon oxide, silicon nitride, or a mixture thereof.
- the p-type or n-type first semiconductor layer is a p-type or n-type silicon substrate
- the second semiconductor layer is n-type or p-type silicon
- the semiconductor quantum dots are silicon quantum dots
- the medium is silicon oxide, Silicon nitride or mixtures thereof.
- the photovoltaic device has a structure in which semiconductor quantum dots of various sizes are embedded in a p layer or an n layer region, and thus light absorption in a wide wavelength band is possible, and the semiconductor quantum dots are embedded in a p layer or n layer.
- the semiconductor material doped with complementary impurities in the region where the semiconductor quantum dots are formed has a low dimensional nanostructure penetrating into a cylindrical array, and thus has a large-area vertical and radial junction structure. It is a highly efficient photovoltaic device that maximizes the contact area between the absorber layer and the p layer / n layer, and can effectively separate electron-holes by drift caused by electric field even when there are many defects such as amorphous silicon.
- semiconductor quantum dots are embedded in a p-layer or an n-layer region, and the vertical and vertical directions of a large area are included.
- High-efficiency photovoltaic devices with a radiated junction structure can be fabricated with low-dimensional nanostructures using top-down methods without the use of advanced lithography or epitaxial processes, and the size, location, and density of semiconductor quantum dots. It is easy to control, and there is an advantage that the production of high efficiency photovoltaic devices through a simple and easy process of deposition, heat treatment, etching, deposition.
- FIG. 1 is an example showing a method of manufacturing a photovoltaic device of the present invention
- FIG 3 illustrates an example of a mask used for ion beam etching according to the present invention.
- FIG. 5 is an example of an ion beam etching step using a mesh membrane according to the present invention.
- FIG. 6 illustrates an example of a porous semiconductor quantum dot layer having through pores formed by ion beam etching according to the present invention.
- Figure 7 shows an example of the p-n junction forming step in the manufacturing method according to the present invention
- FIG. 8 illustrates an example of manufacturing a semiconductor quantum dot layer using an aproton compound layer in a manufacturing method according to the present invention.
- FIG 9 illustrates an example of an oxygen or nitrogen gradient formed in the thickness direction t of the aproton compound layer according to the present invention.
- p-type semiconductor layer 121 medium thin film (medium layer)
- non-proton compound layer 130 semiconductor quantum dot layer
- n-type semiconductor 153 lower electrode
- the present invention will be described based on the p-type semiconductor substrate (p-type first semiconductor layer) as an example.
- the semiconductor substrate (first semiconductor layer) is n-type
- n-type impurities are doped in the medium.
- a semiconductor (second semiconductor layer) doped with complementary impurities is replaced with a p-type, and the present invention is not limited by the p-type semiconductor substrate (p-type first semiconductor layer).
- FIG. 1 is a process diagram illustrating a manufacturing method according to the present invention, in which an impurity having the same electrical properties as that of the semiconductor substrate 110, that is, a p-type impurity is doped using a deposition process on a p-type semiconductor substrate 110.
- the multilayer thin film (medium layer) 121 and the semiconductor thin film (semiconductor layer, 122) are alternately deposited to fabricate the composite multilayer layer 120 having a multilayer thin film structure.
- the medium thin film 121 is characterized in that it is a semiconductor oxide, a semiconductor nitride, or a mixture thereof.
- the plurality of medium thin films 121 constituting the composite layer 120 may have different materials (semiconductor oxide, semiconductor nitride, A mixture of a semiconductor oxide and a semiconductor nitride) and different thicknesses.
- the semiconductor quantum dot 132 is formed through the heat treatment of the semiconductor thin film 122, the thickness of the semiconductor thin film 122, the position (height) of the semiconductor thin film 122 within the composite multilayer layer 120, The number, size, number, and the like of the semiconductor quantum dots 132 in the medium 131 are controlled by the number of semiconductor thin films 122 constituting the composite multilayer 120.
- the thicknesses of the medium thin film 121 and the semiconductor thin film 122 are deposited to have a nanometer order, respectively, and the medium thin film 121 and the semiconductor thin film are deposited. It is more preferable to deposit so that the thickness of 122 is 1-5 nm independently of each other.
- the semiconductor thin films 122 (a), 122 (b), 122 (c), and 122 (d) become thicker as they approach the p-type semiconductor substrate 110. desirable. This is for manufacturing a larger semiconductor quantum dot 132 by heat treatment as it approaches the p-type semiconductor substrate 110 (the light penetrates deeply).
- the thickness of the composite layer 120 is made from several nanometers to several hundred nanometers
- the thickness of the semiconductor quantum dot layer 130 (semiconductor quantum dot thin film) produced by the heat treatment of the composite layer 120 is several nanometers to It is desirable to control to several hundred nanometers.
- the composite laminate 120 is subjected to high temperature heat treatment to form a semiconductor quantum dot layer 130 (a semiconductor quantum dot thin film) in which a plurality of semiconductor quantum dots 132 are formed in a medium 131.
- a semiconductor quantum dot layer 130 a semiconductor quantum dot thin film
- the semiconductor thin film 122 of the composite multilayer 120 is changed into an array of semiconductor quantum dots 132 surrounded by a medium material constituting the medium thin film 121 with a driving force to reduce stress and minimize interfacial energy.
- the non-bonded electrons of the semiconductor quantum dots 132 are combined with hydrogen by heat treatment in a hydrogen atmosphere.
- the heat treatment for forming the semiconductor quantum dots 132 should be determined according to the type of medium, the type of semiconductor thin film, and the size and density of the quantum dots to be manufactured.
- the heat treatment temperature is too low during the manufacture of the semiconductor quantum dot, it is difficult to obtain the shape of the semiconductor quantum dot because the material movement is difficult, and if the heat treatment temperature is too high, the risk of uneven size of the semiconductor quantum dot and the quantum confinement effect is insignificant There is a risk of producing granulated particles.
- the heat treatment for forming the semiconductor quantum dots 132 is carried out at 1000 to 1200 ° C when the semiconductor oxide, preferably silicon oxide (SiO 2 ) is a medium, the semiconductor nitride, preferably silicon nitride (Si 3 N 4 ) In the case of the medium, it is preferably performed at 800 to 1200 ° C., and the heat treatment is preferably performed for 10 to 30 minutes.
- the semiconductor oxide preferably silicon oxide (SiO 2 ) is a medium
- the semiconductor nitride preferably silicon nitride (Si 3 N 4 )
- the medium it is preferably performed at 800 to 1200 ° C.
- the heat treatment is preferably performed for 10 to 30 minutes.
- a hydrogenation step is performed in which the unbonded electrons of the semiconductor quantum dots are combined with hydrogen by heat treatment in a hydrogen atmosphere.
- the heat treatment temperature of the hydrogenation step should be determined according to the type of semiconductor quantum dots, and if the semiconductor quantum dots are silicon quantum dots, 600 to 700 o C under hydrogen atmosphere using a forming gas (95% Ar-5% H 2 ). It is preferable to heat-process 30 minutes-90 minutes at temperature.
- the top-down partially etching the semiconductor quantum dot thin film 130 on which the semiconductor quantum dots 132 are formed in the medium 131 is perpendicular to the surface of the p-type semiconductor substrate 110.
- the array of pores 300 penetrating the semiconductor quantum dot layer 130 is manufactured in a down) manner.
- a mask 200 is formed on the semiconductor quantum dot thin film 130, and the pattern of the mask 200 is transferred through reactive ion etching (RIE) to penetrate the semiconductor quantum dot thin film. Form an array.
- RIE reactive ion etching
- the mask 200 is preferably a mask in which pores (pores in FIG. 3) are regularly arranged, and may be a metal, a metal oxide, or an organic material. 3 illustrates an example in which the shape of the mask pores is circular, but the present invention is not limited thereto.
- the mask 200 is made of nanoporous alumina ( AAO; anodic alumina oxide (210) is preferable, and the through-pore 300 penetrating through the semiconductor quantum dot layer 130 is formed by ion beam etching (RIE) with the nanoporous alumina 210 as an etching mask. It is preferable to make it.
- AAO nanoporous alumina
- RIE ion beam etching
- the nanoporous alumina is an alumina formed with through pores of several nanometers, and may be prepared by anodizing aluminum with sulfuric acid, oxalic acid, or phosphoric acid as an electrolyte. Detailed methods for preparing nanoporous alumina are described in the applicant's paper (W. Lee et al. Nature Nanotech. 3, 402 (2008)).
- a fine through-pore array in order to fabricate a fine through-pore array to have a high specific surface area and to produce a through-pore having a short axis diameter of 20 nm to 1000 nm, After the film 220 is formed on the semiconductor quantum dot layer 130, through pores penetrating the semiconductor quantum dot layer 130 by ion beam etching (RIE) using the mesh-like film 220 as a mask. 300) is preferred.
- RIE ion beam etching
- the mesh-like film 220 is preferably a metal film, and the mesh-like metal film 220 may be manufactured using nanoporous alumina (AAO) as a mask.
- AAO nanoporous alumina
- the metal film is etched by using the nanoporous alumina as a mask to form a net metal film 220 in which a small number of circular pores are regularly arranged ) Can be prepared.
- the semiconductor quantum dot layer 130 may be etched to a predetermined depth in the pore shape of the nanoporous alumina using a nanoporous alumina as a mask to form surface irregularities having a predetermined depth on the surface of the semiconductor quantum dot layer 130. Thereafter, metal is deposited on the surface of the semiconductor quantum dot layer 130 on which the surface irregularities are formed. In the deposition of the metal, selectively in the convex region (region not etched by RIE) due to the surface step of the semiconductor quantum dot layer 130. Metal may be deposited to form a mesh metal film 220 having a cavity having a size and arrangement similar to that of nanoporous alumina.
- ion beam etching is performed to form the through pores 300 penetrating through the semiconductor quantum dot layer 130.
- a portion of the semiconductor quantum dot layer 130 is etched in a vertical direction to form through holes 300, and the semiconductor quantum dot layer 130 has a mesh having a predetermined thickness. It has a network shape similar to the pore pattern of the mask, 130 ').
- pores 300 penetrating the semiconductor quantum dot layer 130 in a thickness direction are formed by partial etching of the semiconductor quantum dot layer 130, and the semiconductor quantum dot layer 130 and The etching is performed to a predetermined depth of the semiconductor substrate 110 positioned below the semiconductor quantum dot layer 130, so that the pores 300 extend to the semiconductor substrate 110 through the semiconductor quantum dot layer 130 as shown in FIG. 6. Can be.
- the semiconductor quantum dots 132 may be exposed on the surface during the ion beam etching (RIE), natural oxidation is induced on the surface of the semiconductor 132 exposed to the surface by the ion beam etching, so that the semiconductor quantum dots are embedded in the medium 131 ′. It has a shape.
- RIE ion beam etching
- the short axis diameter of the through pores 300 formed by the ion beam etching is preferably 20 nm to 1000 nm. This is because the medium 130 'doped with the p-type impurity having the same properties as the p-type semiconductor substrate 110 plays a role similar to that of the p-type semiconductor substrate 110 and is formed by the internal electric field formed in the medium 130'. This is because the electrons in the electron-hole pairs generated in the semiconductor quantum dots 132 'drift to generate current.
- the semiconductor quantum dot (photoactive region) removed by etching is relatively increased to reduce the photoelectric efficiency. If the diameter of the through-hole 300 is too small, the series resistance is increased. Photoelectric efficiency can be reduced.
- the n-type doped with the complementary impurities of the medium 131 ′ and the semiconductor substrate 110 are formed on the semiconductor quantum dot layer 130 ′ on which the array of through pores 300 is formed and inside the through pores 300.
- the process of depositing a semiconductor is performed.
- all the empty spaces (through-pore arrays) formed by partial etching of the semiconductor quantum dot layer 130 on the p-type semiconductor substrate 110 during the deposition are all n-type semiconductors.
- Filling (140), and completely covering the semiconductor quantum dot layer 130 ' is deposited so that only the n-type semiconductor 140 is present on the surface to form a pn junction.
- the voids (through-hole pore arrays) formed by partial etching are filled in the surface of the porous semiconductor quantum dot layer 130 (including the surface formed by the through-holes).
- the n-type semiconductor 140 is deposited to form a pn junction so as not to be supported.
- a pn junction is formed in the outer surface of the through hole 300 between the p-type impurity-doped medium 131 'and the p-type semiconductor substrate 110 and the n-type semiconductor 140. And electron-hole pair holes generated in the semiconductor substrate 110 and the semiconductor quantum dot 132 ′ through the medium 131 ′ to the p-type semiconductor substrate 110, and electrons pass through the pores ( It is moved to the n-type semiconductor filled in 300).
- the semiconductor quantum dot 132 ' Has a structure embedded in the medium 131 ′ which is an extension of the p-type semiconductor substrate 110.
- the medium 131 ′ in which the semiconductor quantum dots 132 ′ are positioned is in a built-in depletion layer state due to a pn junction, which is an impurity doping concentration of the medium 131 ′,
- the impurity doping concentration of the n-type semiconductor and the distance between the centers of the through pores 300 (and the short axis diameter of the through pores) may be controlled.
- electrodes 153, 152, and 151 are formed on the lower surface of the p-type semiconductor substrate 110 and the surfaces of the n-type semiconductor 140 so as to face each other.
- the surface of the n-type semiconductor 140 is a light receiving surface.
- the electrodes on the surface of the n-type semiconductor 140 may be a transparent electrode film 151 and the transparent electrode film ( It is preferable to have a structure of a metal pad 152 on the upper portion, and the transparent electrode film 151 is preferably formed on the entire area of the surface of the n-type semiconductor 140.
- the electrodes 151, 152, and 153 are manufactured using a conventional printing method such as screen printing using a conductive metal paste, stencil printing, or deposition using PVD / CVD.
- the semiconductor quantum dot layer 130 according to the present invention may be manufactured by heat treatment and hydrogenation of the non-proton compound layer 120 ′ rather than the composite layer 120.
- the non-proton compound layer 120 ′ includes a semiconductor nitride, a semiconductor oxide, or a mixture thereof having a non-stoichiometric ratio doped with impurities of the same type as the p-type semiconductor substrate on the p-type semiconductor substrate 110. Consists of medium.
- the non-proton compound layer 120 'contains a semiconductor compound having a non-stoichiometric ratio (semiconductor nitride, semiconductor oxide or mixture thereof) and a semiconductor compound having a stoichiometric ratio (semiconductor nitride, semiconductor oxide or mixture thereof) can do.
- the non-proton compound layer 120 ' is formed by a deposition process including a physical vapor deposition (PVD), a chemical vapor deposition (CVD), or an atomic layer deposition (ALD), and a precursor of a semiconductor material (for example, silicon) during the deposition process.
- PVD physical vapor deposition
- CVD chemical vapor deposition
- ALD atomic layer deposition
- a precursor of a semiconductor material for example, silicon
- the semiconductor oxide or semiconductor nitride constituting the medium contained in the non-proton compound layer 120 ' may include a semiconductor oxide or semiconductor nitride satisfying a stoichiometric ratio; And a semiconductor oxide or semiconductor nitride that is insufficient within 50% (atomic% based on stoichiometric ratio) in the amount of oxygen or nitrogen required for bonding based on the stoichiometric ratio, wherein the stoichiometric compound layer 120 ' It is preferable that the amount of oxygen or nitrogen is gradient in the thickness direction t of the compound layer.
- the semiconductor oxide lacking within 50% (atomic%) in the amount of oxygen or nitrogen required for bonding based on the stoichiometric ratio has a composition of SiO 2 (stoichiometric ratio) to SiO (50% deficiency)
- the semiconductor nitride has a composition of Si 3 N 4 (stoichiometric ratio) to Si 3 N 2 (50% deficiency).
- the semiconductor oxide or the semiconductor nitride contained in the non-proton compound layer 120 ′ is closer to the semiconductor substrate, it is preferable that nitrogen deficiency or oxygen deficiency increases in the stoichiometric ratio. That is, the composition of oxygen or nitrogen contained in the non-proton compound layer 120 'is decreased as the depth t of the non-proton compound layer 120' is increased, which is due to the stoichiometric ratio during the heat treatment of the non-proton compound layer 120 '. This is to adjust the size of the quantum dot according to the depth of the non-quantum compound layer 120 ′ of the semiconductor quantum dot generated out of the composition by the driving force, and to form a larger semiconductor quantum dot closer to the semiconductor substrate.
- the oxygen or nitrogen gradient formed in the thickness direction t of the non-proton compound layer 120 ′ is less oxygen or nitrogen in the vicinity of the p-type semiconductor substrate 110.
- Continuously decreasing discontinuous gradient Fig. 9 (a)
- a continuous gradient in which the amount of oxygen or nitrogen continuously decreases closer to the p-type semiconductor substrate 110 Fig. 9 (b)).
- the non-proton compound layer 120 ' is thermally treated similarly to the composite layer 120 and then hydrogenated, an area adjacent to the p-type semiconductor substrate 110 having a semiconductor-rich composition by the gradient of hydrogen or nitrogen is obtained.
- a photovoltaic device according to the present invention may be manufactured in a manner similar to the above-described method except that the semiconductor quantum dot layer 130 is formed using the non-proton compound layer 120 ′.
- the solar device according to the present invention includes a lower electrode 153; An n-type or p-type first semiconductor layer 110 formed on the lower electrode 153; A porous semiconductor quantum dot layer 130 'having a plurality of semiconductor quantum dots 132' formed in a medium 131 'doped with impurities of the same type as the first semiconductor layer 110, and having a plurality of through pores 300 formed therein.
- a second semiconductor layer 140 formed in contact with the porous semiconductor quantum dot layer 130 'and being a semiconductor material doped with impurities complementary to the first semiconductor layer 110; And a transparent conductive film 151 and an upper electrode 152 sequentially formed on the second semiconductor layer 140.
- the medium 131 ' is a semiconductor nitride, a semiconductor oxide, or a mixture thereof, and the semiconductor nitride, a semiconductor oxide, or a mixture thereof is a nitride, an oxide, or an element of the elements constituting the first semiconductor layer 110. Is a mixture of.
- the semiconductor quantum dot 132 ′ of the porous semiconductor quantum dot layer 130 ′ has a different size and has a larger size as it is adjacent to the first semiconductor layer 110.
- the pn junction is formed at the surface by the through-hole 300 penetrating through the pth), and the medium 131 'has a built-in depletion layer due to the pn junction.
- the manufacturing method of this invention and the photovoltaic device manufactured by the manufacturing method of this invention are a silicon-based photovoltaic device.
- the vertical junction semiconductor quantum dot photovoltaic device is a silicon photovoltaic device; the semiconductor quantum dots are silicon quantum dots; the medium is a silicon oxide, silicon nitride or a mixture thereof having a stoichiometric ratio or a non-stoichiometric ratio
- the p-type semiconductor and the n-type semiconductor are p-type silicon and n-type silicon, and a pn junction formed at the surface of the through hole 300 and having a junction structure of vertical and radial is n-type.
- the silicon oxide (or silicon nitride) doped with (or p-type) impurity is a junction of silicon doped with p-type (or n-type) impurity.
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Abstract
Description
Claims (14)
- a) p형 또는 n형 반도체 기판 상부에, 상기 반도체 기판과 동일 형의 불순물이 도핑된 매질 내부에 반도체 양자점이 형성된 반도체 양자점 박막을 형성하는 단계;b) 부분 에칭을 통하여 상기 반도체 양자점 박막을 관통하는 기공 어레이를 형성하는 단계;c) 상기 기공 어레이가 형성된 반도체 양자점 박막에 상기 반도체 기판과 상보적 불순물이 도핑된 반도체를 증착하는 단계;d) 상기 상보적 불순물이 도핑된 반도체 상에 투명전도막 및 상부전극을 순차적으로 형성하고, 상기 반도체 기판 하부에 하부전극을 형성하는 단계;를 포함하여 제조되는 태양광 소자의 제조방법.
- 제 1항에 있어서,상기 a) 단계는a1-1) 반도체 기판 상부에 상기 반도체 기판과 동일 형의 불순물이 도핑된 반도체질화물, 반도체산화물 또는 이들의 혼합물의 매질층;과 반도체층;을 반복 적층하여 복합적층층을 형성하는 단계; 및a1-2) 상기 복합적층층을 열처리하여 상기 반도체 기판과 동일 형의 불순물이 도핑된 반도체질화물, 반도체산화물 또는 이들의 혼합물인 매질 내 반도체 양자점을 형성한 후, 수소분위기에서 열처리하여 상기 반도체 양자점의 비결합 전자를 수소와 결합시키는 단계;를 포함하여 제조되는 것을 특징으로 하는 태양광 소자의 제조방법.
- 제 1항에 있어서,상기 a) 단계는a2-1) 반도체 기판 상부에 상기 반도체 기판과 동일 형의 불순물이 도핑되며 산소나 질소가 부족한 비화학양론비를 갖는 반도체산화물, 반도체질화물, 또는 이들의 혼합물을 함유하는 비양론화합물층을 형성하는 단계; 및a2-2) 상기 비양론화합물층을 열처리하여 상기 반도체 기판과 동일 형의 불순물이 도핑된 반도체질화물, 반도체산화물 또는 이들의 혼합물인 매질 내 반도체 양자점을 형성한 후, 수소분위기에서 열처리하여 상기 반도체 양자점의 비결합 전자를 수소와 결합시키는 단계;를 포함하여 제조되는 것을 특징으로 하는 태양광 소자의 제조방법.
- 제 2항에 있어서,a1-1)단계의 상기 복합적층층은 PVD(Physical Vapor Deposition), CVD(Chemical Vapor Deposition) 또는 ALD(Atomic Layer Deposition)를 포함하는 증착 공정에 의해 형성되며, 상기 복합적층층을 구성하는 상기 매질층;과 반도체층;은 서로 독립적으로 1 nm 내지 5 nm의 두께인 것을 특징으로 하는 태양광 소자의 제조방법.
- 제 4항에 있어서,상기 복합적층층을 구성하는 반도체층은 서로 다른 두께를 가지며, 상기 반도체 기판에 인접한 반도체층일수록 두께가 더 두꺼운 것을 특징으로 하는 태양광 소자의 제조방법.
- 제 3항에 있어서,a2-1)단계의 상기 비양론화합물층은 PVD(Physical Vapor Deposition), CVD(Chemical Vapor Deposition) 또는 ALD(Atomic Layer Deposition)를 포함하는 증착 공정에 의해 형성되며, 상기 비양론화합물층에 함유된 상기 반도체산화물 또는 반도체질화물은 화학양론비를 만족하는 결합에 필요한 산소 또는 질소량에서 0 내지 50%가 부족하며, 비양론화합물층의 두께 방향으로 산소 또는 질소량이 구배(gradient)진 것을 특징으로 하는 태양광 소자의 제조방법.
- 제 6항에 있어서,상기 산소 또는 질소량이 구배(gradient)는 상기 반도체 기판에 인접할수록 산소 또는 질소 량이 감소하는 것을 특징으로 하는 태양광 소자의 제조방법.
- 제 1항에 있어서,상기 b) 단계는b1) 상기 반도체 양자점 박막 상부에 마스크를 형성하는 단계; 및b2) 이온빔 식각(RIE; Reactive Ion Etching)을 통해 상기 마스크의 패턴을 전사하여 상기 반도체 양자점 박막을 관통하는 기공의 어레이를 형성하는 단계;를 포함하여 수행되는 것을 특징으로 하는 태양광 소자의 제조방법.
- 제 8항에 있어서,상기 b2) 단계의 이온빔 식각에 의해 형성된 기공의 단축 지름은 20nm 내지 1000nm인 것을 특징으로 하는 태양광 소자의 제조방법.
- 제 1항 내지 제 9항에서 선택된 어느 한 항에 있어서,상기 태양광 소자는 실리콘 태양광 소자;이며, 상기 반도체 양자점은 실리콘 양자점;이며, 상기 매질은 실리콘산화물, 실리콘질화물 또는 이들의 혼합물;인 것을 특징으로 하는 태양광 소자의 제조방법.
- 하부전극;상기 하부전극 상에 형성된 n형 또는 p형의 제1반도체층;상기 제1반도체층과 동일 형의 불순물이 도핑된 매질 내에 다수개의 반도체 양자점이 형성되고, 다수개의 관통 기공이 형성된 다공성 반도체 양자점층;상기 다공성 반도체 양자점층과 접하여 형성되며, 상기 제1반도체층과 상보적인 불순물이 도핑된 반도체물질인 제2반도체층;상기 제2반도체층 상에 순차적으로 형성된 투명전도막 및 상부전극;을 포함하여 구성되는 태양광 소자.
- 제 11항에 있어서,상기 다공성 반도체 양자점층의 상기 반도체 양자점은 서로 다른 크기를 가지며 상기 제1반도체층과 인접할수록 더 큰 크기를 갖는 것을 특징으로 하는 태양광 소자.
- 제 11항에 있어서,상기 다공성 반도체 양자점층을 관통하는 관통기공에 의한 표면에서 p-n 정션(p-n junction)이 형성되며, 상기 매질은 p-n 정션에 의한 공핍(built-in depletion layer) 상태인 것을 특징으로 하는 태양광 소자.
- 제 11항에 있어서,상기 태양광 소자는 실리콘 태양광 소자;이며, 상기 반도체 양자점은 실리콘 양자점;이며, 상기 매질은 실리콘산화물, 실리콘질화물 또는 이들의 혼합물;인 것을 특징으로 하는 수직접합 반도체 양자점 태양광 소자.
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JP2011524911A JP5223010B2 (ja) | 2008-08-28 | 2009-08-28 | 量子ドット太陽光素子及びその製造方法 |
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- 2009-08-28 WO PCT/KR2009/004852 patent/WO2010024629A2/ko active Application Filing
- 2009-08-28 CN CN2009801381281A patent/CN102165605B/zh not_active Expired - Fee Related
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Also Published As
Publication number | Publication date |
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CN102165605B (zh) | 2013-04-10 |
WO2010024629A3 (ko) | 2010-04-29 |
CN102165605A (zh) | 2011-08-24 |
DE112009002124T5 (de) | 2012-01-26 |
KR101060014B1 (ko) | 2011-08-26 |
KR20100027016A (ko) | 2010-03-10 |
US20110146775A1 (en) | 2011-06-23 |
JP5223010B2 (ja) | 2013-06-26 |
US8603849B2 (en) | 2013-12-10 |
JP2012501536A (ja) | 2012-01-19 |
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