WO2010016444A1 - 電力増幅装置ならびにそれを用いた送信装置および通信装置 - Google Patents
電力増幅装置ならびにそれを用いた送信装置および通信装置 Download PDFInfo
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- WO2010016444A1 WO2010016444A1 PCT/JP2009/063703 JP2009063703W WO2010016444A1 WO 2010016444 A1 WO2010016444 A1 WO 2010016444A1 JP 2009063703 W JP2009063703 W JP 2009063703W WO 2010016444 A1 WO2010016444 A1 WO 2010016444A1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0294—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using vector summing of two or more constant amplitude phase-modulated signals
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/336—A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/20—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F2203/21—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F2203/211—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
- H03F2203/21142—Output signals of a plurality of power amplifiers are parallel combined to a common output
Definitions
- the present invention relates to a power amplifying device and a transmitting device and a communication device using the same, and in particular, an input signal is converted into two constant envelope signals, and the constant envelope signals are amplified and then vector addition is performed.
- the present invention relates to a power amplifying device, a transmitting device using the same, and a communication device.
- a LINC (Linear Amplification with Nonlinear Component) method As a power amplification method used for amplification of a transmission signal in a communication device, a LINC (Linear Amplification with Nonlinear Component) method is known.
- the LINC method an input signal having an envelope variation is converted into two constant envelope signals having a phase difference corresponding to the amplitude of the input signal, and then the constant envelope signals are respectively amplified using a nonlinear amplifier. . Then, an amplified input signal is obtained by vector addition of the amplified constant envelope signal.
- the nonlinear amplifier since the nonlinear amplifier only has to amplify the constant envelope signal, it is possible to improve the power added efficiency (see, for example, Patent Document 1).
- the applicant of the present application is examining a circuit configuration for converting an input signal into two constant envelope signals by analog signal processing, and the circuit configuration is shown in FIG.
- the phase shifter 502 advances the phase of the input signal Sin by 90 ° to obtain an orthogonal signal. Then, a signal (first constant envelope vector generation signal e) obtained by amplifying this signal by the variable gain amplifier 504 is generated, and this first constant envelope vector generation signal e is added to the input signal Sin by the adder circuit 506.
- a first constant envelope signal S1 is generated by vector addition.
- phase shifter 510 generates a reverse phase signal (second constant envelope vector generation signal ⁇ e) obtained by delaying the phase of the first constant envelope vector generation signal e by 180 °, and this second constant envelope.
- the addition vector 508 adds the line vector generation signal -e to the input signal Sin to generate a second constant envelope signal S2.
- the amplitudes (specifically, the square of the amplitude) of the first constant envelope signal S1 and the second constant envelope signal S2 are detected by mixers (amplitude detection circuits) 516 and 518, and the addition circuit 520 detects them.
- a signal indicating the total value is generated. Further, a signal indicating a difference between the total value and the predetermined voltage Vref is generated by the adder circuit 514.
- the output from the adder circuit 514 is input to the low-pass filter 512, and the output from the low-pass filter 512 is input as a gain control signal of the variable gain amplifier 504 via a buffer amplifier (not shown).
- the gain of the variable gain amplifier 504 is feedback controlled so that the square sum of the amplitudes of the first constant envelope signal S1 and the second constant envelope signal S2 becomes a constant value, and the first constant envelope signal The amplitudes of S1 and the second constant envelope signal S2 are converged to intended values.
- the first constant envelope signal S1 and the second constant envelope signal S2 can be made constant envelope signals, respectively.
- the first constant envelope signal S1 and the second constant envelope signal S2 are amplified using the amplifiers 531 and 532, respectively, to obtain the first amplified signal Sa1 and the second amplified signal Sa2, and then the vector addition circuit 541. Is used to add the first amplified signal Sa1 and the second amplified signal Sa2 to obtain an output signal Sout having an amplified envelope variation (see FIG. 10).
- the phase is shifted by 90 °.
- a phaser 502 is required.
- a normal phase shifter gives a specific amount of phase shift to a signal of a specific frequency. Therefore, for all signals over a wide frequency range. Therefore, it is difficult to realize a phase shifter that shifts the phase accurately by 90 °. Therefore, it has been difficult to obtain a power amplifying device that can handle a wide frequency range. For this reason, it has been difficult to obtain a transmission device and a communication device that have low power consumption and can be used in a wide frequency range.
- the present invention has been devised in view of such problems, and a purpose thereof is a power amplifying apparatus capable of amplifying an input signal having an envelope variation with high power added efficiency in a wide frequency range. Another object is to provide a transmission device and a communication device using the same.
- the power amplifying device includes a first basic signal and a second basic signal that are generated based on an input signal having an envelope variation and have the same amplitude and a phase difference ⁇ (0 ° ⁇ ⁇ 180 °).
- a first orthogonal signal generation circuit that generates a first orthogonal signal by vector subtraction of the basic signal, and a second orthogonal signal that generates a second orthogonal signal by vector addition of the first basic signal and the second basic signal
- a quadrature signal generation circuit a variable gain amplification circuit that generates a first constant envelope vector generation signal and a second constant envelope vector generation signal that are opposite in phase by amplifying the first orthogonal signal;
- a first terminal to which two orthogonal signals are input, and a second terminal to which the first constant envelope vector generation signal is input, and the signals input from the first terminal and the second terminal are vectorized.
- a first adder circuit that generates a first constant envelope signal by adding the second, a third terminal to which the second orthogonal signal is input, and a fourth terminal to which the second constant envelope vector generation signal is input
- a second addition circuit for generating a second constant envelope signal by vector addition of signals input from the third terminal and the fourth terminal, and the first constant envelope signal and the first
- An amplitude control circuit that generates an amplitude control signal for controlling the gain in the variable gain amplifier circuit based on the amplitude of two constant envelope signals, and a first amplified signal by amplifying the first constant envelope signal
- the second amplification circuit for generating the second amplification signal by amplifying the second constant envelope signal, and the first amplification signal and the second amplification signal.
- a phase shift circuit that generates the first basic signal and the second basic signal by changing a phase of the input signal may be included.
- the input signal may be input to the first terminal of the first adder circuit and the third terminal of the second adder circuit.
- the first orthogonal signal generation circuit may receive the first constant envelope signal and the second constant envelope signal as the first basic signal and the second basic signal.
- the first orthogonal signal generation circuit may generate the first orthogonal signal by vector subtracting the first constant envelope signal and the second constant envelope signal.
- the second orthogonal signal generation circuit may receive the first constant envelope signal and the second constant envelope signal as the first basic signal and the second basic signal.
- the second orthogonal signal generation circuit may generate the second orthogonal signal by vector addition of the first constant envelope signal and the second constant envelope signal.
- the first orthogonal signal may be input to the variable gain amplifier circuit.
- the second orthogonal signal may be input together with the input signal to the first terminal of the first adder circuit and the third terminal of the second adder circuit.
- a first amplitude detection circuit that generates a first amplitude detection signal according to an amplitude of the first constant envelope signal, and an amplitude of the second constant envelope signal
- a second amplitude detection circuit that generates a corresponding second amplitude detection signal.
- the amplitude control circuit may generate the amplitude control signal for controlling a gain in the variable gain amplifier circuit based on the first amplitude detection signal and the second amplitude detection signal.
- the first gain control for controlling the gain of the first adding circuit based on the amplitudes of the first constant envelope signal and the second constant envelope signal.
- a gain control circuit that generates a signal and a second gain control signal for controlling the gain of the second adder circuit may be included.
- a first amplitude detection circuit that generates a first amplitude detection signal according to an amplitude of the first constant envelope signal, and an amplitude of the second constant envelope signal
- a second amplitude detection circuit that generates a corresponding second amplitude detection signal.
- the voltage of the first amplitude detection signal may be a value corresponding to the amplitude of the first constant envelope signal.
- the voltage of the second amplitude detection signal may be a value corresponding to the amplitude of the second constant envelope signal.
- the voltage of the first gain control signal may be a value obtained by subtracting the voltage of the first amplitude detection signal from a predetermined reference voltage.
- the voltage of the second gain control signal may be a value obtained by subtracting the voltage of the second amplitude detection signal from the predetermined reference voltage.
- the power amplifying device of the present invention changes the phase of the input signal having the envelope fluctuation, and the first basic signal and the second basic signal having the same amplitude and the phase difference ⁇ (0 ° ⁇ ⁇ 180 °).
- a phase shift circuit for generating a signal, a first quadrature signal generation circuit for generating a first quadrature signal by vector subtraction of the input first basic signal and the second basic signal, and the input first basic signal A second quadrature signal generating circuit that generates a second quadrature signal by vector addition of the signal and the second basic signal, and a first constant envelope vector that amplifies the input first quadrature signal and has opposite phases to each other
- a variable gain amplifying circuit for generating a generation signal and a second constant envelope vector generation signal and a vector addition of the input second orthogonal signal and the first constant envelope vector generation signal to obtain a first constant envelope signal Generate first
- a detection circuit an amplitude control circuit for generating an amplitude control signal for controlling a gain in the variable gain amplifier circuit based on the input first amplitude detection signal and the second amplitude detection signal; and the input first control signal
- a first amplifier circuit that amplifies one constant envelope signal to generate a first amplified signal
- a second amplifier circuit that amplifies the input second constant envelope signal to generate a second amplified signal
- an output adder circuit for generating an output signal having amplified envelope variation.
- the power amplifying device of the present invention includes a variable gain amplifying circuit that amplifies an input basic signal and generates a first constant envelope vector generation signal and a second constant envelope vector generation signal that are opposite in phase to each other; A first terminal to which an input signal having an envelope variation is input and a second terminal to which the first constant envelope vector generation signal is input; a signal input from the first terminal and the second terminal as a vector; A first adder circuit that adds to generate a first constant envelope signal; a third terminal to which the input signal is input; and a fourth terminal to which the second constant envelope vector generation signal is input.
- a second addition circuit for generating a second constant envelope signal by vector addition of signals inputted from the third terminal and the fourth terminal, and detecting the amplitude of the inputted first constant envelope signal to Generate amplitude detection signal A first amplitude detection circuit; a second amplitude detection circuit that detects an amplitude of the input second constant envelope signal to generate a second amplitude detection signal; the input first amplitude detection signal and the second amplitude detection signal; Based on an amplitude detection signal, an amplitude control circuit that generates an amplitude control signal for controlling a gain in the variable gain amplifier circuit, and a first amplification signal that amplifies the input first constant envelope signal and generates a first amplified signal.
- the second quadrature signal input to the variable gain amplifier circuit is input to the first terminal of the first adder circuit and the third terminal of the second adder circuit together with the input signal. Is.
- the first gain control signal for controlling the gain of the first addition circuit based on the input first amplitude detection signal and the second amplitude detection signal, and A gain control circuit that generates a second gain control signal for controlling the gain of the second adder circuit may be included.
- the voltage of the first amplitude detection signal may be a value corresponding to the amplitude of the first constant envelope signal.
- the voltage of the second amplitude detection signal may be a value corresponding to the amplitude of the second constant envelope signal.
- the voltage of the first gain control signal may be a value obtained by subtracting the voltage of the first amplitude detection signal from a predetermined reference voltage.
- the voltage of the second gain control signal may be a value obtained by subtracting the voltage of the second amplitude detection signal from the predetermined reference voltage.
- the transmission device of the present invention is characterized in that the transmission circuit is connected to the antenna via any one of the power amplification devices of the present invention.
- the communication device of the present invention is characterized in that a transmission circuit and a reception circuit are connected to an antenna, and any one of the power amplification devices of the present invention is inserted between the transmission circuit and the antenna. To do.
- the power amplifying device of the present invention includes a first orthogonal signal generation circuit that generates a first orthogonal signal from a first basic signal and a second basic signal, which is generated based on an input signal having an envelope variation, and a first basic signal
- a second orthogonal signal generation circuit for generating a second orthogonal signal from the signal and the second basic signal, and a variable gain amplification for generating a first constant envelope vector generation signal and a second constant envelope vector generation signal from the first orthogonal signal
- a first adder circuit that generates a first constant envelope signal from the circuit, a second orthogonal signal and a first constant envelope vector generation signal, a second orthogonal signal and a second constant envelope vector generation signal;
- a second adding circuit for generating a constant envelope signal, an amplitude control circuit for controlling the gain in the variable gain amplifier circuit based on the amplitudes of the first constant envelope signal and the second constant envelope signal, and a first constant envelope
- the power amplifying device of the present invention by converting an input signal having an envelope variation into two constant envelope signals, amplifying those two constant envelope signals, and then adding the vectors, Since an output signal having an amplified envelope variation can be obtained, a signal having an envelope variation can be amplified with high power added efficiency.
- the power amplifying device of the present invention generates a first basic signal and a second basic signal that are generated based on an input signal having an envelope variation and have the same amplitude and phase difference ⁇ (0 ° ⁇ ⁇ 180 °).
- a first orthogonal signal generation circuit that generates a first orthogonal signal by vector subtracting the signal, and a second orthogonal signal generation circuit that generates a second orthogonal signal by vector addition of the first basic signal and the second basic signal
- a variable gain amplification circuit that generates a first constant envelope vector generation signal and a second constant envelope vector generation signal that are opposite in phase by amplifying the first orthogonal signal, a second orthogonal signal, and a first Vector addition of a first addition circuit that generates a first constant envelope signal by vector addition of the constant envelope vector generation signal, and a second orthogonal signal and a second constant envelope vector generation signal
- a second adder circuit for generating a second constant envelope signal by Rukoto.
- the first constant envelope signal and the second constant envelope can be obtained by using the first orthogonal signal and the second orthogonal signal orthogonal to each other without using a 90 ° phase shifter.
- a line signal can be obtained. As a result, it can be used in a wide frequency range.
- a first gain control signal for controlling the gain of the first addition circuit based on the amplitudes of the first constant envelope signal and the second constant envelope signal; And a gain control circuit for generating a second gain control signal for controlling the gain of the second adder circuit.
- the gains of the first addition circuit and the second addition circuit can be controlled based on the amplitude of the first constant envelope signal and the amplitude of the second constant envelope signal.
- the gain of the first adder circuit and the second adder circuit is adjusted to adjust the first constant envelope signal.
- the amplitude and the amplitude of the second constant envelope signal can be matched.
- the voltage of the first amplitude detection signal is a value corresponding to the amplitude of the first constant envelope signal
- the voltage of the second amplitude detection signal is a value corresponding to the amplitude of the second constant envelope signal
- the first The voltage of the gain control signal is a value obtained by subtracting the voltage of the first amplitude detection signal from the predetermined reference voltage
- the voltage of the second gain control signal is subtracted from the voltage of the second amplitude detection signal from the predetermined reference voltage. This is the value obtained.
- the amplitude of the first constant envelope signal and the amplitude of the second constant envelope signal can be matched using a simple circuit.
- the voltages of the gain control signal and the second gain control signal will have opposite polarities with respect to deviations from the intended values of the amplitudes of the first constant envelope signal and the second constant envelope signal.
- the first constant envelope signal is controlled by controlling the gain of the first adder circuit with the first gain control signal having a voltage opposite in polarity to the deviation of the amplitude of the first constant envelope signal from the intended value.
- the amplitude of the first constant envelope signal can be matched with the intended amplitude.
- the second constant envelope is controlled by controlling the gain of the second adder circuit with a second gain control signal having a voltage opposite in polarity to the deviation of the amplitude of the second constant envelope signal from the intended value.
- the amplitude of the second constant envelope signal can be matched with the intended amplitude. In this way, since the amplitudes of the first constant envelope signal and the second constant envelope signal both match the intended amplitude, the amplitude of the first constant envelope signal and the amplitude of the second constant envelope signal are Can be matched.
- the transmission device of the present invention since the transmission circuit is connected to the antenna via the above-described power amplification device, the power amplification device of the present invention has low power consumption and high power added efficiency. It is possible to amplify a transmission signal having the following envelope variation. As a result, it is possible to obtain a transmission device with low power consumption and a long transmission time.
- the transmission circuit and the reception circuit are connected to the antenna, and the power amplification device described above is inserted between the transmission circuit and the antenna. It is possible to amplify a transmission signal having an envelope variation from a transmission circuit by using the power amplification device of the present invention having a high value. As a result, a communication device with low power consumption and a long transmission time can be obtained.
- FIG. 1 is a block diagram schematically showing an example of a power amplifying device according to an embodiment of the present invention.
- an input signal Sin having an envelope variation is input to the phase shift circuit 150.
- the phase shift circuit 150 outputs the first basic signal Su1 and the second basic signal Su2 having the same amplitude and a phase difference ⁇ (0 ° ⁇ ⁇ 180 °).
- the phase shift circuit 150 generates the first basic signal Su1 and the second basic signal Su2 by changing the phase of the input signal Sin.
- FIG. 2 illustrates an example of the operation of the phase shift circuit 150.
- the input signal Sin is distributed into two signals having the same phase as the input signal Sin and the same amplitude.
- the first basic signal Su1 is obtained by delaying the phase of one signal by ⁇ (0 ° ⁇ ⁇ 90 °), and the other signal is advanced by the phase ⁇ (0 ° ⁇ ⁇ 90 °). 2 basic signals Su2 are generated.
- the first basic signal Su1 and the second basic signal Su2 are input to both the first orthogonal signal generation circuit 130a and the second orthogonal signal generation circuit 130b, respectively.
- FIG. 3 is a diagram for explaining an example of operations of the first orthogonal signal generation circuit 130a and the second orthogonal signal generation circuit 130b.
- the first orthogonal signal generation circuit 130a generates and outputs a first orthogonal signal Sd1 by performing vector subtraction on the input first basic signal Su1 and second basic signal Su2.
- the second orthogonal signal generation circuit 130b generates and outputs a second orthogonal signal Sd2 by vector addition of the input first basic signal Su1 and second basic signal Su2.
- the phase of the second orthogonal signal Sd2 matches the phase of the input signal Sin. That is, in the present embodiment, the phase of the signal (second orthogonal signal Sd2) obtained by vector addition of the first basic signal Su1 and the second basic signal Su2 is set to be the same as the phase of the input signal Sin. The first basic signal Su1 and the second basic signal Su2 are generated.
- the phase shift circuit 150 can be easily configured using a distributed constant line or an LC circuit capable of signal branching.
- the second orthogonal signal Sd2 has a predetermined phase relationship with the input signal Sin, and is a signal whose amplitude increases or decreases in accordance with the increase or decrease of the amplitude of the input signal Sin.
- the second orthogonal signal Sd2 is input to the first addition circuit 111a and the second addition circuit 111b. That is, the second orthogonal signal Sd2 is input to the first terminal (not shown) of the first adder circuit 111a and the third terminal (not shown) of the second adder circuit 111b.
- the first orthogonal signal Sd1 is input to the variable gain amplifier circuit 110.
- FIG. 4 is a diagram for explaining an example of operations of the variable gain amplifier circuit 110 and a first adder circuit 111a and a second adder circuit 111b described later.
- the variable gain amplifier circuit 110 generates a first constant envelope vector generation signal e and a second constant envelope vector generation signal -e based on the first orthogonal signal Sd1.
- the first constant envelope vector generation signal e and the second constant envelope vector generation signal -e are signals orthogonal to the second orthogonal signal Sd2.
- the first constant envelope vector generation signal e and the second constant envelope vector generation signal -e are signals having the same amplitude and opposite phases.
- the first constant envelope vector is orthogonal to the second quadrature signal Sd2, and has the same amplitude and opposite phase.
- the generated signal e and the second constant envelope vector generation signal -e are output.
- the first constant envelope vector generation signal e and the second constant envelope vector generation signal -e are input to the first addition circuit 111a and the second addition circuit 111b, respectively. That is, the first constant envelope vector generation signal e is input to the second terminal (not shown) of the first addition circuit 111a, and the second constant envelope vector generation signal -e is the fourth terminal of the second addition circuit 111b. (Not shown).
- the variable gain amplifier circuit 110 is preferably configured using a variable gain amplifier capable of differential output, but may be configured by combining a variable gain amplifier and a phase shift circuit in some cases.
- the first adder circuit 111a performs vector addition on the signal input from the first terminal (not shown) and the signal input from the second terminal (not shown), thereby obtaining the first constant envelope signal.
- S1 is generated and output. That is, as shown in FIG. 4, the first addition circuit 111a generates and outputs a first constant envelope signal S1 by vector addition of the second orthogonal signal Sd2 and the first constant envelope vector generation signal e. To do.
- the second addition circuit 111b performs a vector addition of the signal input from the third terminal (not shown) and the signal input from the fourth terminal (not shown), thereby obtaining the second constant envelope.
- a line signal S2 is generated and output. That is, as shown in FIG. 4, the second addition circuit 111b generates a second constant envelope signal S2 by vector addition of the second orthogonal signal Sd2 and the second constant envelope vector generation signal -e. Output.
- the first constant envelope signal S1 is input to the first amplitude detection circuit 113a, and the first amplitude detection signal Sb1 corresponding to the amplitude of the first constant envelope signal S1 is generated by the first amplitude detection circuit 113a.
- the first amplitude detection signal Sb1 having a DC voltage signal indicating the square value of the amplitude of the first constant envelope signal S1 is generated.
- the second constant envelope signal S2 is input to the second amplitude detection circuit 113b, and a second amplitude detection signal Sb2 corresponding to the amplitude of the second constant envelope signal S2 is generated by the second amplitude detection circuit 113b.
- the second amplitude detection signal Sb2 having a DC voltage signal indicating the square value of the amplitude of the second constant envelope signal S2 is generated.
- a Gilbert cell mixer can be adopted as the first amplitude detection circuit 113a and the second amplitude detection circuit 113b.
- the first amplitude detection signal Sb1 and the second amplitude detection signal Sb2 are input to the amplitude control circuit 120.
- the amplitude control circuit 120 is a circuit for generating an amplitude control signal Sc for controlling the gain of the variable gain amplifier circuit 110 based on the amplitudes of the first constant envelope signal S1 and the second constant envelope signal S2. is there.
- the first amplitude detection signal Sb1 and the second amplitude detection signal Sb2 are input to the adder 165 and added by the adder 165. Then, a signal obtained by adding the first amplitude detection signal Sb1 and the second amplitude detection signal Sb2 is output from the adder 165 as the amplitude detection signal Sf.
- the amplitude detection signal Sf is input to the adder 166, and an amplitude control basic signal Sp having a voltage obtained by subtracting the voltage of the amplitude detection signal Sf from the voltage of the reference signal So is generated.
- the amplitude control basic signal Sp is supplied to the variable gain amplifier circuit 110 as the amplitude control signal Sc after the high frequency component is removed by the low-pass filter 167 and amplified by the buffer amplifier 168.
- the amplitude control signal Sc serves as a gain control signal for controlling the gain of the variable gain amplifier circuit 110.
- the adder 165, the adder 166, the low-pass filter 167, and the buffer amplifier 168 constitute an amplitude control circuit 120.
- the voltage of the amplitude control basic signal Sp and the amplitude control signal Sc based thereon is the first constant envelope signal S1 and the second constant envelope signal. Conversely, it increases or decreases according to the increase or decrease of the amplitude of S2. Therefore, by controlling the gain of the variable gain amplifier circuit 110 using the amplitude control signal Sc, the first constant envelope vector generation signal e and the second constant envelope vector generation signal e that increase or decrease inversely according to the increase or decrease of the amplitude of the input signal Sin. A constant envelope vector generation signal -e can be generated. Thereby, the first constant envelope signal S1 and the second constant envelope signal S2 which are constant envelope signals can be generated.
- the first constant envelope signal S1 is input to the first amplifier circuit 112a, and the first amplifier circuit 112a amplifies the first constant envelope signal S1 to generate and output the first amplified signal Sa1.
- the second constant envelope signal S2 is input to the second amplifier circuit 112b, and the second amplifier circuit 112b generates and outputs the second amplified signal Sa2 by amplifying the second constant envelope signal S2.
- the first amplification signal Sa1 and the second amplification signal Sa2 are input to the output addition circuit 114, and the output addition circuit 114 performs vector addition of the first amplification signal Sa1 and the second amplification signal Sa2, thereby outputting an output signal having an envelope variation. Sout is generated and output.
- the input signal Sin having the envelope fluctuation is decomposed into the first constant envelope signal S1 and the second constant envelope signal S2 that are constant envelope signals. .
- the first amplifier circuit 112a and the second amplifier circuit 112b to amplify the first constant envelope signal S1 and the second constant envelope signal S2 with high power added efficiency, A two-amplified signal Sa2 is obtained.
- the output addition circuit 114 performs vector addition of the first amplified signal Sa1 and the second amplified signal Sa2, thereby generating an output signal Sout having an envelope variation. For this reason, according to the power amplifying apparatus 100 according to the present embodiment, a signal having an envelope variation can be amplified with high power added efficiency.
- the input signal Sin and the predetermined signal are used by using the first orthogonal signal generation circuit 130a and the second orthogonal signal generation circuit 130b without using a 90 ° phase shifter.
- the second orthogonal signal Sd2 having the following phase relationship and the first orthogonal signal Sd1 orthogonal to the second orthogonal signal Sd2 can be obtained. If the amplitudes of the first basic signal Su1 and the second basic signal Su2 are equal, the first orthogonal signal Sd1 and the second orthogonal signal Sd2 are orthogonal to each other without being limited to a specific frequency, and thus the power amplification device 100 according to the present embodiment. According to this, it is possible to obtain a power amplification device that can be used in a wide frequency range.
- the first amplitude detection signal Sb1 output from the first amplitude detection circuit 113a and the second amplitude detection signal Sb2 output from the second amplitude detection circuit 113b are: Input to the gain control circuit 140.
- the gain control circuit 140 includes a first gain control signal Sg1 for controlling the gain of the first addition circuit 111a based on the amplitudes of the first constant envelope signal S1 and the second constant envelope signal S2, and a second addition. This is a circuit for generating a second gain control signal Sg2 for controlling the gain of the circuit 111b.
- the first gain control signal Sg1 having a voltage obtained by subtracting the voltage of the first amplitude detection signal Sb1 from the reference voltage and the voltage of the second amplitude detection signal Sb2 from the reference voltage are subtracted.
- a second gain control signal Sg2 having the resulting voltage is generated.
- the first gain control signal Sg1 is input to the first adder circuit 111a and controls the amplitude of the first constant envelope signal S1 by controlling the gain of the first adder circuit 111a.
- the second gain control signal Sg2 is input to the second adder circuit 111b and controls the amplitude of the second constant envelope signal S2 by controlling the gain of the second adder circuit 111b.
- the first adder circuit 111a, the second adder circuit 111b, and the output adder circuit 114 for example, an image suppression type double balance mixer can be used, and as the gain control circuit 140, for example, a comparator is used. Can do. Then, for example, by inputting the first gain control signal Sg1 and the second gain control signal Sg2 to the current source gate terminal of the mixer constituting the first addition circuit 111a and the second addition circuit 111b, By controlling the supply current, the gains of the first addition circuit 111a and the second addition circuit 111b can be controlled.
- the first amplitude detection signal when the amplitudes of the first constant envelope signal S1 and the second constant envelope signal S2 are the desired values are the desired values.
- the voltages of Sb1 and the second amplitude detection signal Sb2 are set to the reference voltage, the voltages of the first gain control signal Sg1 and the second gain control signal Sg2 are changed to the first constant envelope signal S1 and the second constant envelope signal. It will have the opposite polarity with respect to the deviation from the expected value of the amplitude of S2.
- the gain of the first adder circuit 111a is controlled by the first gain control signal Sg1 having a voltage opposite in polarity to the deviation of the amplitude of the first constant envelope signal S1 from the intended value.
- the amplitude of the first constant envelope signal S1 can be matched with the intended amplitude.
- the second gain control signal Sg2 having a voltage opposite in polarity to the deviation of the amplitude of the second constant envelope signal S2 from the intended value is used to control the gain of the second adder circuit 111b.
- the amplitude of the second constant envelope signal S2 can be matched with the intended amplitude.
- the amplitudes of the first constant envelope signal S1 and the second constant envelope signal S2 are both equal to the intended amplitude, so that the amplitude of the first constant envelope signal S1 and the second constant envelope signal S2 The amplitude can be matched.
- the first addition circuit 111a and the second addition circuit 111b are based on the amplitude of the first constant envelope signal S1 and the amplitude of the second constant envelope signal S2.
- the gain By controlling the gain, the amplitude of the first constant envelope signal S1 and the amplitude of the second constant envelope signal S2 can be matched.
- the amplitude of the first constant envelope signal S1 and the amplitude of the second constant envelope signal S2 are matched. be able to.
- FIG. 5 is a block diagram schematically showing an example of the power amplifying device according to the embodiment of the present invention.
- an input signal Sin having an envelope variation is input to a first terminal (not shown) of the first adder circuit 211a.
- the input signal Sin and the first constant envelope vector generation signal e input to the second terminal (not shown) of the first adder circuit 211a are vector-added to obtain the first.
- a constant envelope signal S1 is generated and output from the first addition circuit 211a (see FIG. 10).
- the input signal Sin is input to a third terminal (not shown) of the second adder circuit 211b.
- the input signal Sin and the second constant envelope vector generation signal -e input to the fourth terminal (not shown) of the second adder circuit 211b are vector-added to perform the first addition.
- a second constant envelope signal S2 is generated and output from the second addition circuit 211b (see FIG. 10). It should be noted that the first constant envelope vector generation signal e and the second constant envelope vector generation signal -e have the same amplitude and opposite phases.
- the first constant envelope signal S1 and the second constant envelope signal S2 have the same amplitude and a phase difference ⁇ (0 ° ⁇ ⁇ 180 °).
- the phase of the first constant envelope signal S1 is a phase obtained by delaying the phase of the input signal Sin by a certain angle
- the phase of the second constant envelope signal S2 is advanced by the same angle as the phase of the input signal Sin. It is a phase.
- the phase of the signal obtained by vector addition of the first constant envelope signal S1 and the second constant envelope signal S2 becomes equal to the phase of the input signal Sin.
- the first constant envelope signal S1 (first basic signal) and the second constant envelope signal S2 (second basic signal) are input to the second orthogonal signal generation circuit 230b.
- the second orthogonal signal generation circuit 230b generates and outputs a second orthogonal signal Sd2 by vector addition of the first constant envelope signal S1 and the second constant envelope signal S2 (see FIG. 6).
- the second orthogonal signal Sd2 has the same phase as the input signal Sin, and together with the input signal Sin, the first terminal (not shown) of the first addition circuit 211a and the third terminal (not shown) of the second addition circuit 211b. )).
- the first constant envelope signal S1 (first basic signal) and the second constant envelope signal S2 (second basic signal) are input to the first orthogonal signal generation circuit 230a.
- the first orthogonal signal generation circuit 230a generates and outputs the first orthogonal signal Sd1 by vector subtraction of the first constant envelope signal S1 and the second constant envelope signal S2 (see FIG. 6).
- the amplitude of the first constant envelope signal S1 is equal to the amplitude of the second constant envelope signal S2
- the phase of the input signal Sin and the second orthogonal signal Sd2 and the phase of the first orthogonal signal Sd1 are , 90 ° (ie, ⁇ / 2).
- the input signal Sin, the second orthogonal signal Sd2, and the first orthogonal signal Sd1 are orthogonal.
- the first quadrature signal Sd1 is input to the variable gain amplifier circuit 210 as a basic signal. After being amplified by the variable gain amplifier circuit 210, the first quadrature signal Sd1 is orthogonal to the input signal Sin and the second quadrature signal Sd2 and is in reverse phase with each other.
- the first constant envelope vector generation signal e and the second constant envelope vector generation signal -e are output.
- the first constant envelope vector generation signal e and the second constant envelope vector generation signal -e are supplied to a second terminal (not shown) of the first addition circuit 211a and a fourth terminal (not shown) of the second addition circuit 211b. (Not shown).
- the variable gain amplifier circuit 210 is preferably configured using a variable gain amplifier capable of differential output, but may be configured by combining a variable gain amplifier and a phase shift circuit in some cases.
- the first constant envelope signal S1 is input to the first amplitude detection circuit 213a, and the first amplitude detection circuit 213a has a first DC voltage signal indicating a square value of the amplitude of the first constant envelope signal S1.
- An amplitude detection signal Sb1 is generated.
- the second constant envelope signal S2 is input to the second amplitude detection circuit 213b, and the second amplitude detection circuit 213b has a DC voltage signal indicating a square value of the amplitude of the second constant envelope signal S2.
- a two-amplitude detection signal Sb2 is generated.
- a Gilbert cell mixer can be adopted as the first amplitude detection circuit 213a and the second amplitude detection circuit 213b.
- the first amplitude detection signal Sb1 and the second amplitude detection signal Sb2 are input to the amplitude control circuit 220.
- the amplitude control circuit 220 is a circuit for generating an amplitude control signal Sc for controlling the gain of the variable gain amplifier circuit 210 based on the amplitudes of the first constant envelope signal S1 and the second constant envelope signal S2. is there.
- the first amplitude detection signal Sb1 and the second amplitude detection signal Sb2 are input to the adder 265, added by the adder 265, and output as the amplitude detection signal Sf.
- the amplitude detection signal Sf is input to the adder 266, and an amplitude control basic signal Sp having a voltage obtained by subtracting the voltage of the amplitude detection signal Sf from the voltage of the reference signal So is generated.
- the amplitude control basic signal Sp is removed from the high frequency component by the low-pass filter 267, amplified by the buffer amplifier 268, and then supplied to the variable gain amplifier circuit 210 as the amplitude control signal Sc via the adder 263.
- the amplitude control signal Sc serves as a gain control signal for controlling the gain of the variable gain amplifier circuit 210.
- the adder 265, the adder 266, the low-pass filter 267, the buffer amplifier 268, and the adder 263 constitute an amplitude control circuit 220.
- the voltage of the amplitude control basic signal Sp and the amplitude control signal Sc based thereon is the first constant envelope signal S1 and the second constant envelope signal. Conversely, it increases or decreases according to the increase or decrease of the amplitude of S2. Therefore, by controlling the gain of the variable gain amplifier circuit 210 using the amplitude control signal Sc, the first constant envelope vector generation signal e and the second constant envelope vector generation signal e that increase or decrease inversely according to the increase or decrease of the amplitude of the input signal Sin. A constant envelope vector generation signal -e can be generated. Thereby, the first constant envelope signal S1 and the second constant envelope signal S2 which are constant envelope signals can be generated.
- the first constant envelope signal S1 is input to the first amplifier circuit 212a, and the first amplifier circuit 212a amplifies the first constant envelope signal S1 to generate and output the first amplified signal Sa1.
- the second constant envelope signal S2 is input to the second amplifier circuit 212b, and the second amplifier circuit 212b generates and outputs the second amplified signal Sa2 by amplifying the second constant envelope signal S2.
- the first amplified signal Sa1 and the second amplified signal Sa2 are input to the output adding circuit 214, and the output adding circuit 214 performs vector addition of the first amplified signal Sa1 and the second amplified signal Sa2, thereby outputting an output signal having an envelope variation. Sout is generated and output.
- the input signal Sin having the envelope variation is changed into the first constant envelope signal S1 and the second constant envelope signal S2 which are constant envelope signals.
- the output adding circuit 214 vector-adds the first amplified signal Sa1 and the second amplified signal Sa2, thereby generating an output signal Sout having an envelope variation. That is, according to the power amplifying apparatus 200 according to the present embodiment, a signal having an envelope variation can be amplified with high power added efficiency.
- the first quadrature signal generation circuit 230a and the second quadrature signal generation circuit 230b are used in phase with the input signal Sin without using a 90 ° phase shifter.
- the second orthogonal signal Sd2 and the first orthogonal signal Sd1 orthogonal to the input signal Sin and the second orthogonal signal Sd2 can be obtained. Since the first orthogonal signal Sd1 and the second orthogonal signal Sd2 are orthogonal to each other without being limited to a specific frequency, the power amplification device 200 according to the present embodiment can obtain a power amplification device that can be used in a wide frequency range. Can do.
- the input signal Sin is input to the input amplitude detection circuit 251, and the input amplitude detection circuit 251 has a DC voltage signal indicating the square value of the amplitude of the input signal Sin.
- An input amplitude detection signal Sq is generated.
- the input amplitude detection signal Sq is input to the adder 252 and an amplitude control auxiliary signal St having a voltage obtained by subtracting the voltage of the input amplitude detection signal Sq from the voltage of the second reference signal Sr is generated.
- the amplitude control auxiliary signal St is input to the adder 263 and added to the amplitude control basic signal Sp.
- the power amplifying apparatus 200 having such a configuration, it is possible to add the amplitude control auxiliary signal St that increases or decreases inversely according to the increase or decrease of the amplitude of the input signal Sin to the amplitude control basic signal Sp. Therefore, it is possible to prevent the voltage of the amplitude control signal Sc from being insufficient even when the amplitude of the input signal Sin is very small.
- the input amplitude detection circuit 251 for example, a Gilbert cell mixer can be adopted.
- the first amplitude detection signal Sb1 output from the first amplitude detection circuit 213a and the second amplitude detection signal Sb2 output from the second amplitude detection circuit 213b are: Input to the gain control circuit 240.
- the gain control circuit 240 includes a first gain control signal Sg1 for controlling the gain of the first addition circuit 211a based on the amplitudes of the first constant envelope signal S1 and the second constant envelope signal S2, and a second addition. This is a circuit for generating a second gain control signal Sg2 for controlling the gain of the circuit 211b.
- the first gain control signal Sg1 having a voltage obtained by subtracting the voltage of the first amplitude detection signal Sb1 from the reference voltage and the voltage of the second amplitude detection signal Sb2 from the reference voltage are subtracted.
- a second gain control signal Sg2 having the resulting voltage is generated.
- the first gain control signal Sg1 is input to the first adder circuit 211a and controls the amplitude of the first constant envelope signal S1 by controlling the gain of the first adder circuit 211a.
- the second gain control signal Sg2 is input to the second adder circuit 211b and controls the amplitude of the second constant envelope signal S2 by controlling the gain of the second adder circuit 211b.
- the first adder circuit 211a, the second adder circuit 211b, and the output adder circuit 214 for example, an image suppression type double balance mixer can be used, and as the gain control circuit 240, for example, a comparator is used. Can do. Then, for example, by inputting the first gain control signal Sg1 and the second gain control signal Sg2 to the current source gate terminal of the mixer constituting the first addition circuit 211a and the second addition circuit 211b, By controlling the supply current, the gains of the first addition circuit 211a and the second addition circuit 211b can be controlled.
- the first amplitude detection signal when the amplitudes of the first constant envelope signal S1 and the second constant envelope signal S2 are the intended values By setting the voltages of Sb1 and the second amplitude detection signal Sb2 to the reference voltage, the voltages of the first gain control signal Sg1 and the second gain control signal Sg2 are changed to the first constant envelope signal S1 and the second constant envelope signal. It will have the opposite polarity with respect to the deviation from the expected value of the amplitude of S2.
- the gain of the first addition circuit 211a is controlled by the first gain control signal Sg1 having a voltage having a polarity opposite to the deviation of the amplitude of the first constant envelope signal S1 from the intended value.
- the second gain control signal Sg2 having a voltage opposite in polarity to the deviation of the amplitude of the second constant envelope signal S2 from the intended value is used to control the gain of the second adder circuit 211b.
- the amplitude of the second constant envelope signal S2 can be matched with the intended amplitude.
- the amplitudes of the first constant envelope signal S1 and the second constant envelope signal S2 are both equal to the intended amplitude, so that the amplitude of the first constant envelope signal S1 and the second constant envelope signal S2 The amplitude can be matched.
- the first addition circuit 211a and the second addition circuit 211b are based on the amplitude of the first constant envelope signal S1 and the amplitude of the second constant envelope signal S2.
- the amplitude of the first constant envelope signal S1 and the amplitude of the second constant envelope signal S2 can be matched.
- the amplitude of the first constant envelope signal S1 and the amplitude of the second constant envelope signal S2 are matched. be able to. Thereby, it is possible to ensure the orthogonality of the input signal Sin and the second orthogonal signal Sd2 and the first orthogonal signal Sd1.
- FIG. 7 is a block diagram illustrating a configuration example of a transmission apparatus according to the embodiment of the present invention, that is, a transmission apparatus using the power amplification apparatus according to the embodiment of the present invention.
- the transmission circuit 320 is connected to the antenna 330 via the power amplification device 310 according to the embodiment of the present invention.
- the power amplifying apparatus 310 is, for example, the power amplifying apparatus 100 shown in FIG. 1 or the power amplifying apparatus 200 shown in FIG.
- the transmission signal output from the transmission circuit 320 and having an envelope variation is applied to the embodiment of the present invention with low power consumption and high power added efficiency. Since it can amplify using the power amplifier 310 which concerns, the transmission device with low power consumption and long transmission time can be obtained.
- FIG. 8 is a block diagram illustrating a configuration example of a communication device according to the embodiment of the present invention, that is, a communication device using the power amplification device according to the embodiment of the present invention.
- the communication apparatus 400 includes a transmission circuit 420 and a reception circuit 440 connected to an antenna 430, and the communication apparatus 400 according to the embodiment of the present invention is between the transmission circuit 420 and the antenna 430.
- a power amplifying device 410 is inserted.
- the power amplifying apparatus 410 is, for example, the power amplifying apparatus 100 shown in FIG. 1 or the power amplifying apparatus 200 shown in FIG.
- An antenna sharing circuit 450 is inserted between the antenna 430 and the transmission circuit 420 and the reception circuit 440.
- the transmission signal output from the transmission circuit 420 and having an envelope fluctuation is applied to the embodiment of the present invention with low power consumption and high power added efficiency. Since amplification can be performed using the power amplifying apparatus 410, a transmission apparatus with low power consumption and long transmission time can be obtained.
- the first gain control signal Sg1 having a voltage obtained by subtracting the voltage of the first amplitude detection signal Sb1 from the reference voltage
- the reference voltage An example is shown in which the gain of the first addition circuit 111a and the second addition circuit 111b is controlled using the second gain control signal Sg2 having a voltage obtained by subtracting the voltage of the second amplitude detection signal Sb2 from the second gain detection signal Sb2. .
- the first gain control signal Sg1 having a voltage obtained by subtracting the voltage of the first amplitude detection signal Sb1 from the reference voltage
- the reference An example is shown in which the gain of the first addition circuit 211a and the second addition circuit 211b is controlled using the second gain control signal Sg2 having a voltage obtained by subtracting the voltage of the second amplitude detection signal Sb2 from the voltage. It was. However, for example, the first gain control signal Sg1 having a voltage obtained by adding the reference voltage and the voltage of the first amplitude detection signal Sb1, and the reference voltage and the voltage of the second amplitude detection signal Sb2 are obtained.
- the second gain control signal Sg2 having a voltage to be generated may be used.
- the second gain control signal Sg2 may be used.
- the amplitude control auxiliary signal St is generated using the input amplitude detection circuit 251 and the adder 252 is shown. If the Sc voltage can be sufficiently secured, the input amplitude detection circuit 251 and the adder 252 are not necessary. At this time, the adder 263 is not required, and the signal output from the buffer amplifier 268 may be input to the variable gain amplifier circuit 210 as it is as the amplitude control signal Sc.
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Abstract
Description
図1は本発明の実施形態に係る電力増幅装置の一例を模式的に示すブロック図である。
図5は本発明の実施形態に係る電力増幅装置の一例を模式的に示すブロック図である。
図7は、本発明の実施形態に係る送信装置、すなわち、本発明の実施形態に係る電力増幅装置を用いた送信装置の構成例を示すブロック図である。
図8は、本発明の実施形態に係る通信装置、すなわち、本発明の実施形態に係る電力増幅装置を用いた通信装置の構成例を示すブロック図である。
本発明は前述した実施の形態の例に限定されるものではなく、本発明の要旨を逸脱しない範囲において種々の変更,改良が可能である。
Claims (8)
- 包絡線変動を有する入力信号に基づいて生成される、互いに振幅が等しく、かつ、位相差δθ(0°<δθ<180°)を有する第1基本信号および第2基本信号をベクトル減算することによって、第1直交信号を生成する第1直交信号生成回路と、
前記第1基本信号および前記第2基本信号をベクトル加算することによって第2直交信号を生成する第2直交信号生成回路と、
前記第1直交信号を増幅することによって、互いに逆相である第1定包絡線ベクトル生成信号および第2定包絡線ベクトル生成信号を生成する可変利得増幅回路と、
前記第2直交信号が入力される第1端子と、前記第1定包絡線ベクトル生成信号が入力される第2端子と、を含み、前記第1端子および前記第2端子から入力される信号をベクトル加算することによって第1定包絡線信号を生成する第1加算回路と、
前記第2直交信号が入力される第3端子と、前記第2定包絡線ベクトル生成信号が入力される第4端子と、を含み、前記第3端子および前記第4端子から入力される信号をベクトル加算することによって第2定包絡線信号を生成する第2加算回路と、
前記第1定包絡線信号および前記第2定包絡線信号の振幅に基づいて、前記可変利得増幅回路における利得を制御するための振幅制御信号を生成する振幅制御回路と、
前記第1定包絡線信号を増幅することによって第1増幅信号を生成する第1増幅回路と、
前記第2定包絡線信号を増幅することによって第2増幅信号を生成する第2増幅回路と、
前記第1増幅信号および前記第2増幅信号をベクトル加算することによって、増幅された包絡線変動を有する出力信号を生成する出力加算回路と、
を含むことを特徴とする電力増幅装置。 - 前記入力信号の位相を変化させることによって、前記第1基本信号および前記第2基本信号を生成する移相回路を含むことを特徴とする請求項1に記載の電力増幅装置。
- 前記第1加算回路の前記第1端子および前記第2加算回路の前記第3端子には、前記入力信号が入力され、
前記第1直交信号生成回路には、前記第1基本信号および前記第2基本信号として、前記第1定包絡線信号および前記第2定包絡線信号が入力され、
前記第1直交信号生成回路は、前記第1定包絡線信号および前記第2定包絡線信号をベクトル減算することによって前記第1直交信号を生成し、
前記第2直交信号生成回路には、前記第1基本信号および前記第2基本信号として、前記第1定包絡線信号および前記第2定包絡線信号が入力され、
前記第2直交信号生成回路は、前記第1定包絡線信号および前記第2定包絡線信号をベクトル加算することによって前記第2直交信号を生成し、
前記第1直交信号は、前記可変利得増幅回路に入力され、
前記第2直交信号は、前記入力信号とともに、前記第1加算回路の前記第1端子および前記第2加算回路の前記第3端子に入力される、
ことを特徴とする請求項1に記載の電力増幅装置。 - 前記第1定包絡線信号の振幅に応じた第1振幅検出信号を生成する第1振幅検出回路と、
前記第2定包絡線信号の振幅に応じた第2振幅検出信号を生成する第2振幅検出回路と、を含み、
前記振幅制御回路は、前記第1振幅検出信号および前記第2振幅検出信号に基づいて、前記可変利得増幅回路における利得を制御するための前記振幅制御信号を生成する、
ことを特徴とする請求項1に記載の電力増幅装置。 - 前記第1定包絡線信号および前記第2定包絡線信号の振幅に基づいて、前記第1加算回路の利得を制御するための第1利得制御信号と、前記第2加算回路の利得を制御するための第2利得制御信号と、を生成する利得制御回路を含むことを特徴とする請求項1に記載の電力増幅装置。
- 前記第1定包絡線信号の振幅に応じた第1振幅検出信号を生成する第1振幅検出回路と、
前記第2定包絡線信号の振幅に応じた第2振幅検出信号を生成する第2振幅検出回路と、を含み、
前記第1振幅検出信号の電圧は前記第1定包絡線信号の振幅に応じた値であり、
前記第2振幅検出信号の電圧は前記第2定包絡線信号の振幅に応じた値であり、
前記第1利得制御信号の電圧は所定の基準電圧から前記第1振幅検出信号の電圧を減算して得られる値であり、
前記第2利得制御信号の電圧は前記所定の基準電圧から前記第2振幅検出信号の電圧を減算して得られる値である、
ことを特徴とする請求項5に記載の電力増幅装置。 - 送信回路が請求項1乃至請求項6のいずれかに記載の電力増幅装置を介してアンテナに接続されていることを特徴とする送信装置。
- 送信回路および受信回路がアンテナに接続されており、前記送信回路と前記アンテナとの間に請求項1乃至請求項6のいずれかに記載の電力増幅装置が挿入されていることを特徴とする通信装置。
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US13/057,471 US8344781B2 (en) | 2008-08-07 | 2009-07-31 | Power amplification device, and transmission device and communication device using same |
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EP0635933B1 (en) * | 1990-02-07 | 1998-09-30 | Fujitsu Limited | Constant-amplitude wave combination type amplifier |
JPH0622302A (ja) | 1992-07-01 | 1994-01-28 | Nri & Ncc Co Ltd | 画像情報の伝送再生方式 |
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TWI348279B (en) * | 2007-09-12 | 2011-09-01 | Univ Nat Taiwan | Frequency synthesizer?oupled divide-by-n circuit?urrent-reuse multiply-by-m circuit |
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2009
- 2009-07-31 JP JP2010523844A patent/JP5086436B2/ja not_active Expired - Fee Related
- 2009-07-31 US US13/057,471 patent/US8344781B2/en not_active Expired - Fee Related
- 2009-07-31 WO PCT/JP2009/063703 patent/WO2010016444A1/ja active Application Filing
- 2009-07-31 CN CN2009801298797A patent/CN102119484B/zh not_active Expired - Fee Related
- 2009-07-31 EP EP09804928A patent/EP2320563A4/en not_active Withdrawn
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JPH0254607A (ja) * | 1988-08-19 | 1990-02-23 | Nippon Telegr & Teleph Corp <Ntt> | 増幅装置 |
JPH0537263A (ja) * | 1991-07-30 | 1993-02-12 | Fujitsu Ltd | 定振幅波合成形増幅器 |
JP2003152464A (ja) * | 2001-11-13 | 2003-05-23 | Shimada Phys & Chem Ind Co Ltd | 歪補償送信増幅器 |
JP2004343665A (ja) * | 2003-05-19 | 2004-12-02 | Japan Radio Co Ltd | 高周波増幅回路 |
JP2006339888A (ja) * | 2005-05-31 | 2006-12-14 | Japan Radio Co Ltd | 高周波増幅回路 |
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Cited By (1)
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WO2012114867A1 (ja) * | 2011-02-25 | 2012-08-30 | 京セラ株式会社 | 定包絡線信号生成回路ならびにそれを用いた増幅回路,送信装置および通信装置 |
Also Published As
Publication number | Publication date |
---|---|
CN102119484B (zh) | 2013-07-03 |
JP5086436B2 (ja) | 2012-11-28 |
JPWO2010016444A1 (ja) | 2012-01-19 |
CN102119484A (zh) | 2011-07-06 |
US20110140761A1 (en) | 2011-06-16 |
US8344781B2 (en) | 2013-01-01 |
EP2320563A4 (en) | 2012-04-11 |
EP2320563A1 (en) | 2011-05-11 |
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