WO2009125541A1 - 不揮発性記憶モジュール、アクセスモジュール、楽音データファイル生成モジュール及び楽音生成システム - Google Patents
不揮発性記憶モジュール、アクセスモジュール、楽音データファイル生成モジュール及び楽音生成システム Download PDFInfo
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- WO2009125541A1 WO2009125541A1 PCT/JP2009/001156 JP2009001156W WO2009125541A1 WO 2009125541 A1 WO2009125541 A1 WO 2009125541A1 JP 2009001156 W JP2009001156 W JP 2009001156W WO 2009125541 A1 WO2009125541 A1 WO 2009125541A1
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- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10H—ELECTROPHONIC MUSICAL INSTRUMENTS; INSTRUMENTS IN WHICH THE TONES ARE GENERATED BY ELECTROMECHANICAL MEANS OR ELECTRONIC GENERATORS, OR IN WHICH THE TONES ARE SYNTHESISED FROM A DATA STORE
- G10H7/00—Instruments in which the tones are synthesised from a data store, e.g. computer organs
- G10H7/02—Instruments in which the tones are synthesised from a data store, e.g. computer organs in which amplitudes at successive sample points of a tone waveform are stored in one or more memories
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10H—ELECTROPHONIC MUSICAL INSTRUMENTS; INSTRUMENTS IN WHICH THE TONES ARE GENERATED BY ELECTROMECHANICAL MEANS OR ELECTRONIC GENERATORS, OR IN WHICH THE TONES ARE SYNTHESISED FROM A DATA STORE
- G10H1/00—Details of electrophonic musical instruments
- G10H1/0033—Recording/reproducing or transmission of music for electrophonic musical instruments
- G10H1/0041—Recording/reproducing or transmission of music for electrophonic musical instruments in coded form
- G10H1/0058—Transmission between separate instruments or between individual components of a musical system
- G10H1/0066—Transmission between separate instruments or between individual components of a musical system using a MIDI interface
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7201—Logical to physical mapping or translation of blocks or pages
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- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10H—ELECTROPHONIC MUSICAL INSTRUMENTS; INSTRUMENTS IN WHICH THE TONES ARE GENERATED BY ELECTROMECHANICAL MEANS OR ELECTRONIC GENERATORS, OR IN WHICH THE TONES ARE SYNTHESISED FROM A DATA STORE
- G10H2240/00—Data organisation or data communication aspects, specifically adapted for electrophonic musical tools or instruments
- G10H2240/121—Musical libraries, i.e. musical databases indexed by musical parameters, wavetables, indexing schemes using musical parameters, musical rule bases or knowledge bases, e.g. for automatic composing methods
- G10H2240/145—Sound library, i.e. involving the specific use of a musical database as a sound bank or wavetable; indexing, interfacing, protocols or processing therefor
Definitions
- the present invention relates to a non-volatile storage module that stores musical tone data such as instrument sounds in a semiconductor memory card, etc., and an access module that reads musical tone data from the non-volatile storage module and generates musical sounds by performing signal processing on the musical tone data Further, the present invention relates to a tone generation system in which an access module is added as a constituent element to the nonvolatile storage module, and a tone data file generation module that generates a sound material file group as a tone data file.
- non-volatile memory modules including rewritable non-volatile memories
- semiconductor memory cards are very expensive compared to optical disks and tape media, they are portable devices such as digital still cameras and mobile phones due to their small size, light weight, earthquake resistance, and ease of handling. As a recording medium, the demand is growing.
- This semiconductor memory card includes a flash memory as a nonvolatile main storage memory, and has a data reading unit for controlling the flash memory.
- the data reading unit performs read / write control on the flash memory in response to a read / write instruction from an access module such as a digital still camera.
- an access module such as a digital still camera.
- the flash memory includes a memory cell array and an I / O register (RAM) for temporarily holding data read from the memory cell array or temporarily holding data written from the outside. Since the flash memory requires a relatively long time for writing to and erasing the memory cells constituting the memory cell array, the flash memory has a structure in which a plurality of memory cells can be erased and written collectively. Specifically, the flash memory is composed of a plurality of physical blocks, and each physical block includes a plurality of pages. Data is erased in physical block units and written in page units.
- the musical tone generation system is a system for generating musical instrument sounds (hereinafter referred to as musical sounds) in response to keystroke operations on a keyboard or the like.
- the tone generation system usually has 32 or more tone generation channels. For example, tone generation channels are assigned in the order in which keys are pressed to generate tone.
- a mask ROM having a high random reading speed is used as a ROM for musical sound data.
- Patent Document 1 it is predicted that the bit unit price of the flash memory will be lower than the bit unit price of the mask ROM as the technology of the flash memory advances.
- a technique for rationalizing the system cost by using a flash memory having a slower random reading speed than a mask ROM as a ROM for musical tone data is disclosed.
- flash memory has responded to demands for large capacity and low cost, and multi-level NAND flash memory has become mainstream due to multi-level and process shrink.
- bit price of flash memory is much cheaper than that of mask ROM, and the capacity per unit area is much larger than that of mask ROM, which may reduce the system price and size.
- the binary NAND flash memory (product number: TC58V64FT) used in the embodiment of Patent Document 1 has a capacity of 64 Mbit, and a read time for accessing the I / O register from the memory cell array (hereinafter referred to as TR).
- TR a read time for accessing the I / O register from the memory cell array
- a high sound quality musical sound generation system in which musical sound data obtained by digitally recording musical sounds of a piano or the like is stored in a mask ROM or NAND flash memory without compression is examined.
- the sampling frequency is 44.1 kHz
- the sound generation time per keyboard is 40 seconds
- the word length per sample of the musical sound data is 2 bytes
- the total number of piano keys is 88 keys.
- a capacity of about 621 MBytes is required as shown in Equation (1). 44.1 ⁇ 40 ⁇ 2 ⁇ 2 ⁇ 88 ⁇ 621 MByte (1)
- the multi-level NAND flash memory has a lead time TR that is an order of magnitude longer than 50 ⁇ s due to the expansion of the page size in order to increase the reading / writing speed of large-capacity data at once and the multi-level conversion. .
- the sound generation delay time is at least 1.6 ms as shown in the equation (3).
- the sound generation delay time is a time from the key pressing operation to the start of sound generation, and its allowable range is generally within 1 msec. If this exceeds 1 msec, the performance will be uncomfortable and it will not be realized as a musical sound generation system.
- the present invention is a non-volatile device capable of realizing a high-quality and small-sized musical sound generation system even when a memory such as a large-capacity multi-level NAND flash memory which is currently mainstream is used as a musical sound data memory.
- An object is to provide a storage module, an access module, and a musical sound generation system. In addition, it is possible to easily update the tone, or to apply it to a high-quality and small electronic musical instrument with automatic accompaniment or karaoke equipment, and tones based on the sound material file group recorded in the data storage module.
- An object is to provide a musical sound data file generation module for generating a data file.
- the nonvolatile memory module of the present invention is a nonvolatile memory module that reads data in response to an external read instruction, and is a plurality of nonvolatile memories each recording the same musical tone data. Data is read from one of the nonvolatile memory banks in response to one read instruction from the memory bank and the outside, and when another read instruction is issued before the read is completed, A data reading unit that reads data from a non-volatile memory bank different from the non-volatile memory bank in parallel.
- the nonvolatile memory module of the present invention is a nonvolatile memory module that reads and writes data according to an external access instruction, and each of the plurality of data records the same musical tone data.
- Data is read from the non-volatile memory bank and one of the non-volatile memory banks in response to one read instruction from the outside, and the read is performed when another read instruction is issued before the read is completed.
- Data that is read from a non-volatile memory bank different from the non-volatile memory bank in the memory reads memory configuration information indicating the configuration of the non-volatile memory bank, and multiplexes and writes musical sound data to the non-volatile memory bank And a reading / writing unit.
- the non-volatile memory bank includes at least one of audio data, performance data, image data, and text data, and memory configuration information indicating a configuration of the non-volatile memory bank, in addition to the multiplexed musical sound data.
- the data read / write unit may multiplex and write the musical sound data, and may write at least one of audio data, performance data, image data, and text data.
- the non-volatile memory bank may hold memory configuration information indicating the configuration of the non-volatile memory bank and read performance information.
- the non-volatile memory bank may hold memory configuration information indicating the configuration of the non-volatile memory bank and read performance information.
- an access module is an access module that issues a read instruction to a nonvolatile memory module, and the nonvolatile memory module includes a plurality of nonvolatile memories each recording the same musical tone data. Data is read from one of the non-volatile memory banks in response to one read instruction from the bank and the outside, and when there is another read instruction before the read is completed, A data reading unit that reads data from a non-volatile memory bank different from the non-volatile memory bank, and the access module performs time-division multiplexing processing based on the musical sound data read from the non-volatile memory module. Performs tone generation processing for multiple channels per sampling period. It is intended to include a signal processing unit.
- an access module is an access module that performs a write instruction and a read instruction to a non-volatile storage module, and the non-volatile storage module includes a plurality of pieces of recording of the same musical tone data.
- a nonvolatile memory bank a memory holding memory configuration information indicating the configuration of the nonvolatile memory bank, and reading data from one of the nonvolatile memory banks in response to one read instruction from the outside, Memory configuration information indicating the configuration of the non-volatile memory bank by performing reading from a non-volatile memory bank different from the non-volatile memory bank being read when there is another read instruction before completing the reading And the musical sound data is multiplexed and written in the non-volatile memory bank.
- a data read / write unit, and the access module manages a musical sound data stored in the non-volatile memory as a file based on the musical sound data read from the non-volatile storage module.
- a signal processing unit that performs a tone generation process for a plurality of channels for each sampling period by time-division multiplexing processing.
- an access module is an access module that instructs a nonvolatile storage module to read data
- the nonvolatile storage module is a plurality of nonvolatile memories each recording the same musical tone data.
- Data is read from one of the non-volatile memory banks in response to one read instruction from the bank and the outside, and when there is another read instruction before the read is completed,
- a data read / write unit that performs reading from a non-volatile memory bank different from the non-volatile memory bank in parallel, reads memory configuration information indicating a configuration of the non-volatile memory bank, and multiplexes and writes musical sound data to the non-volatile memory bank;
- the access module is the non-volatile Based on the read performance information and recorded data characteristic information acquired from the storage module, it has a sound channel number determination unit for determining the sound channel number so that the sound delay time is less than a predetermined time, and is within the determined sound channel number range. Then, a read instruction is given
- a musical sound data file generation module is a musical sound data file generation module that generates a musical sound data file in a non-volatile storage module including a plurality of non-volatile memory banks.
- a file editing unit for editing a recorded sound material file group into a musical sound data file; a multiplexing unit for multiplexing the musical sound data based on the memory configuration information notified from the nonvolatile storage module; and the nonvolatile memory
- at least two or more nonvolatile memory banks are provided with a file system unit that writes the musical sound data multiplexed by the multiplexing unit into the nonvolatile storage module as a musical sound data file.
- a tone generation system is a tone generation system including an access module and a non-volatile storage module that reads and writes data according to read / write instructions from the access module.
- the non-volatile memory module reads a plurality of non-volatile memory banks each recording the same musical tone data and one of the non-volatile memory banks in response to one read instruction from the outside.
- a memory showing a configuration of the non-volatile memory bank by performing a read from a non-volatile memory bank different from the non-volatile memory bank being read when another read instruction is issued before the read is completed.
- the same musical sound data file is written into at least two or more non-volatile memory banks of the non-volatile storage module, and the music data file read from the non-volatile storage module is read based on the file system unit that reads out the musical sound data file, And a signal processing unit that performs a tone generation process for a plurality of channels for each sampling period by time division multiplexing.
- the access module may further include a file editing unit for editing the sound material file group stored in the data storage module into one musical sound data file.
- the musical sound data is multiplexed and recorded in the nonvolatile memory bank without being compressed, and the data reading unit reads the musical sound in parallel from the plurality of nonvolatile memory banks in accordance with the reading instruction from the access module.
- Data can be read.
- the sound generation delay time can be made shorter than the allowable time. Therefore, even when a large-capacity multi-level NAND flash memory that is currently mainstream is used as a memory for musical tone data, it is possible to realize a low-priced and small musical tone generation system.
- the musical sound data is multiplexed and recorded in the nonvolatile memory bank without being compressed, and the data read / write unit is connected in parallel from the plurality of nonvolatile memory banks in accordance with a read instruction from the access module.
- Music sound data can be read out, and the same effect can be obtained.
- the musical sound data can be managed as a file by providing the file system unit in the access module, the timbre can be easily updated by writing the musical sound data downloaded from the Internet or the like to the nonvolatile memory module.
- the musical tone data is multiplexed and written as a file by the writing module
- the musical tone data downloaded from the Internet or the like can be easily updated by writing the musical tone data in the nonvolatile memory module.
- the file system unit multiplexes and manages musical sound data in a logical address space, and if audio data, image data, and text data are held, an electronic musical instrument that uses audio data as an accompaniment sound, a karaoke device, etc.
- the present invention can also be applied to a system that can generate accompaniment music using musical tone data while displaying background images and lyrics.
- the tone data can be managed as a file by providing the file system unit in the access module, the sound material file group recorded by the user is edited into one tone data, and the multiplexing unit multiplexes the tone data, If the file system unit writes the multiplexed music data as a music data file in the non-volatile storage module, the music data file is based on the sound material file group recorded in the data storage module such as a linear PCM recorder. Can be generated. Moreover, the tone color can be easily updated by writing the sound material data recorded by the user into the nonvolatile memory module.
- the sound generation channel number determination unit of the access module based on the read performance information and the recording data characteristic information acquired from the nonvolatile storage module determines the number of sound generation channels so that the sound generation delay time is a predetermined time or less. Regardless of the reading performance of the nonvolatile memory module, it is possible to realize a high-quality and compact musical sound generation system.
- FIG. 1A is a block diagram showing a non-volatile storage module of a musical sound generation system according to a first embodiment of the present invention.
- FIG. 1B is a block diagram showing an access module of the tone generation system according to the first embodiment of the present invention.
- FIG. 2 is an explanatory diagram for explaining the relationship between the structure in the nonvolatile memory banks 110 to 113 and the LSN.
- FIG. 3 is a diagram for explaining the recording format in a page by taking P0 of PB0 as an example.
- FIG. 4 is a bit format showing the correspondence between the LSN and the physical address.
- FIG. 5 is a memory map showing the register 121a in the host interface of the present embodiment.
- FIG. 6 is a block diagram showing the configuration of the buffer unit 122.
- FIG. 1A is a block diagram showing a non-volatile storage module of a musical sound generation system according to a first embodiment of the present invention.
- FIG. 1B is a block diagram showing an access module of
- FIG. 7 is a block diagram showing the musical sound data buffer 231 of the present embodiment.
- FIG. 8A is an explanatory diagram showing the channel assignment table 232.
- FIG. 8B is an explanatory diagram showing the channel assignment table 232.
- FIG. 8C is an explanatory diagram showing the channel assignment table 232.
- FIG. 9 is an explanatory diagram showing the NN table 233A.
- FIG. 10 shows a bit format indicating one sample of musical sound data.
- FIG. 11 is an explanatory diagram showing characteristic information of piano musical tone data stored in the nonvolatile storage module 100.
- FIG. 12 is an explanatory diagram showing memory configuration information of the nonvolatile memory module 100.
- FIG. 13A is a flowchart showing normal processing of the CPU unit 124.
- FIG. 13A is a flowchart showing normal processing of the CPU unit 124.
- FIG. 13B is a flowchart showing interrupt processing of the CPU unit 124.
- FIG. 14A is a flowchart showing normal processing of the CPU unit 230.
- FIG. 14B is a flowchart showing interrupt processing of the CPU unit 230.
- FIG. 15 shows a bit format indicating read instruction information from the access module 200 to the nonvolatile memory module 100.
- FIG. 16 shows a bit format indicating performance data transferred from the master keyboard.
- FIG. 17 is a bit format showing musical tone data when read from the nonvolatile memory module 100 onto the external bus.
- FIG. 18 is a flowchart showing processing of the signal processing unit 220.
- FIG. 19 is a graph showing the time change of LD after key pressing when PD is 0.
- FIG. 19 is a graph showing the time change of LD after key pressing when PD is 0.
- FIG. 20 is a graph showing the time change of LD after key pressing when PD is 1.
- FIG. 21 is a time slot diagram showing signal processing per sampling period.
- FIG. 22A is a flowchart showing processing of the host interface 121.
- FIG. 22B is a flowchart showing interrupt processing of the host interface 121.
- FIG. 23 is a time chart of a read command issued by the data reading unit 120 to the nonvolatile memory bank.
- FIG. 24A is a time chart of the musical sound generation system according to the first embodiment of the present invention.
- FIG. 24B is a time chart of the musical sound generation system according to the first embodiment of the present invention.
- FIG. 24C is a time chart of the tone generation system according to the first embodiment of the present invention.
- FIG. 25 is a block diagram showing a non-volatile storage module of the tone generation system according to the second embodiment of the present invention. It is a block diagram which shows the non-volatile memory module of the musical tone generation system by the 3rd Embodiment of this invention. It is a block diagram which shows the access module of the musical tone generation system by the 3rd Embodiment of this invention. It is explanatory drawing explaining the relationship between a logical address and LSN.
- FIG. 3 is an explanatory diagram for explaining a relationship between a structure in a nonvolatile memory bank 110 to 113 and an LSN. It is the figure explaining taking the recording format in a page as P0 of PB0 as an example.
- FIG. 3 is a block diagram showing a configuration of a buffer unit 152.
- FIG. It is explanatory drawing which shows NN table 233C. It is a bit format indicating read instruction information from the access module 200C to the nonvolatile storage module 100C. It is a bit format which shows the read instruction information of memory configuration information. It is a flowchart which shows the musical sound data writing process of the access module 200C. It is explanatory drawing which shows the file allocation of the musical sound data acquired from the internet 310.
- FIG. 11 is an explanatory diagram showing a storage state of the nonvolatile memory banks 110 to 113 before writing musical sound data.
- FIG. 10 is an explanatory diagram showing a storage state of the nonvolatile memory banks 110 to 113 after writing musical sound data. It is a bit map which shows the musical data write instruction information.
- It is a block diagram which shows the writing module of the data writing system in the 4th Embodiment of this invention. It is a block diagram which shows the non-volatile memory module of the musical tone generation system by the 5th Embodiment of this invention.
- It is a block diagram which shows the access module of the musical tone generation system by the 5th Embodiment of this invention.
- 5 is a flowchart showing normal processing of a CPU unit 154.
- 5 is a flowchart showing interrupt processing of a CPU unit 154.
- 5 is a flowchart showing interrupt processing of a CPU unit 154. It is a flowchart which shows the normal process of CPU section 230E. It is a flowchart which shows the interruption process of CPU part 230E.
- This is a bit format indicating read instruction information from the access module 200A to the nonvolatile storage module 100E. Bit format indicating reading instruction information for musical sound data It is a bit format indicating read instruction information such as audio data.
- It is a flowchart which shows the process of the host interface 151E. It is a flowchart which shows the interruption process of the host interface 151E. It is a flowchart which shows the musical sound data writing process of the access module 200E.
- FIG. 11 is an explanatory diagram showing a storage state of the nonvolatile memory banks 110 to 113 before writing musical sound data.
- FIG. 10 is an explanatory diagram showing a storage state of the nonvolatile memory banks 110 to 113 after writing musical sound data. It is a bit map which shows the musical data write instruction information.
- It is a block diagram which shows the access module 200F of the tone generation system in the 6th Embodiment of this invention. It is a flowchart which shows the write-in processing of the musical sound data and karaoke data set of the access module 200F. It is a flowchart which shows the main routine of CPU part 230F.
- FIG. 11 is an explanatory diagram showing a storage state of the nonvolatile memory banks 110 to 113 before writing musical sound data.
- FIG. 10 is an explanatory diagram showing a storage state of the nonvolatile memory banks 110 to 113 after writing musical sound data. It is a block diagram which shows the writing module of the musical sound data file generation system in the 9th Embodiment of this invention. It is a flowchart which shows the process of CPU part 420 in the 9th Embodiment of this invention. It is a block diagram which shows the non-volatile memory module of the musical tone generation system by the 10th Embodiment of this invention. It is a block diagram which shows the non-volatile memory module of the musical sound production
- the musical tone generation system includes a nonvolatile memory module 100A shown in FIG. 1A and an access module 200A shown in FIG. 1B.
- the nonvolatile memory module 100A includes four nonvolatile memory banks 110 to 113 and a data reading unit 120 provided in parallel.
- the data reading unit 120 includes a host interface 121, a buffer unit 122, a memory interface 123, and a CPU unit 124.
- the access module 200A includes an input / output unit 210A, a signal processing unit 220, a CPU unit 230A, and a driver unit 250, and can output musical sounds for 32 channels simultaneously.
- the channel numbers are CH0 to CH31.
- the CPU unit 230A includes a musical sound data buffer 231, a channel assignment table 232, an NN table 233A, a performance data buffer 234, and a transfer monitoring unit 235.
- the nonvolatile memory banks 110 to 113 are flash memories, and include I / O registers 110a to 113a and memory cell arrays 110b to 113b, respectively.
- the I / O registers 110a to 113a are RAMs each having a capacity of 4096 bytes + 128 bytes.
- Each of the memory cell arrays 110b to 113b has 1024 physical blocks.
- a physical block is an erase unit of flash memory.
- the physical block is PB
- the logical sector is LS
- the physical block number is PBN
- the logical sector number is LSN
- the physical block number PBN is 0, for example
- the physical block is PB0
- the logical sector number LSN is, for example, 0, the logical sector. Let it be LS0.
- FIG. 2 is an explanatory diagram for explaining the relationship between the structure in the memory cell arrays 110b to 113b and the logical sector number LSN.
- the memory cell arrays 110b to 113b have physical blocks PB0 to PB1023, respectively. Each physical block is composed of 256 pages (P0 to P255).
- FIG. 3 is a diagram illustrating the recording format in each page, taking the page P0 of the physical block PB0 as an example.
- Each page of all physical blocks consists of a data area of 4096 bytes and a redundant area of 128 bytes. In the present embodiment, the data area is divided into 8 sectors. Each sector has a capacity of 512 bytes. Redundant areas are not used. Details of the recorded data will be described later.
- FIG. 4 is a bit format showing the correspondence between the logical sector number LSN and the physical address.
- bits b0 to b2 are intra-page selector selection bits
- b3 and b4 are bank select
- b5 to b12 are page numbers
- b13 to b22 are physical block numbers.
- the nonvolatile memory bank 110 is selected.
- the bank select is the value 1
- the nonvolatile memory bank 111 is selected.
- the bank select is the value 2
- the nonvolatile memory bank 112 is selected.
- the value is 3, the nonvolatile memory bank 113 is selected.
- the bit format shown in FIG. 4 is an example in which the parallel number of the nonvolatile memory banks is 4, and the number of bits allocated to the bank select may be changed depending on the parallel number.
- the parallel number is 2
- the number of bits assigned to the bank select is 1 (b3)
- the page number is assigned to b11 to b4
- the PBN is assigned to b21 to b12.
- the intra-page sector selection bit is a bit corresponding to a quotient obtained by dividing a page by a sector size.
- the page size is 4096 + 128 bytes and the sector size is 512 bytes, that is, a page is divided into 8 sectors as shown in FIG. Select by 3 bits.
- the page size and sector size need not be limited to the above-described values, and the in-page sector selection bit may be variable according to the values.
- the host interface 121 is connected to the access module 200A via an external bus.
- the host interface 121 is a block that receives musical tone data read instruction information from the access module 200A and transfers musical tone data read from the nonvolatile memory banks 110 to 113 via the buffer unit 122 to the access module 200A.
- the host interface 121 includes a register 121a inside.
- FIG. 5 is a memory map showing the register 121a.
- the register 121a has an LSN, a read instruction reception flag RR, a read command issue flag RC, and a data transfer completion flag TE for 32 channels.
- the read instruction reception flag RR (hereinafter referred to as RR) is a flag having a value of 0 while the read instruction information is not transferred from the access module 200A, and is 1 when the instruction information is transferred.
- the read command issue flag RC (hereinafter referred to as RC) is a flag that is set when the memory interface 123 is instructed to output a read command to the nonvolatile memory bank.
- the data transfer completion flag TE (hereinafter referred to as TE) is a flag that is set when data transfer from the IO register of each nonvolatile memory to the buffer unit 122 is completed, and indicates whether further data can be written to the buffer unit 122. Used to discriminate.
- the buffer unit 122 is a block that temporarily stores musical tone data read from the nonvolatile memory banks 110 to 113.
- the buffer unit 122 includes 4 kByte single port RAMs 122a and 122b and a RAM switching circuit 122c.
- the RAM switching circuit 122c connects the input terminal from the memory interface (IF) 123 to the input / output port of the single port RAM 122a and connects the output terminal to the host interface (IF) 121. Connected to the input / output port of the single port RAM 122b.
- the RAM switching terminal 122d is 1, the input terminal from the memory interface 123 is connected to the input / output port of the single port RAM 122b, and the output terminal to the host interface 121 is connected to the input / output port of the single port RAM 122a.
- the RAM switching terminal 122d is toggle-controlled by the CPU unit 124.
- the size used as a buffer for musical sound data is 512 bytes. However, considering the versatility, the size is set to 4 kBytes which is the same as the size of the data area of the page.
- the memory interface 123 is connected to the non-volatile memory banks 110 to 113 via the memory bus, and reads out musical sound data stored in the non-volatile memory banks 110 to 113 to the buffer unit 122 according to an instruction from the CPU unit 124. .
- the memory interface 123 decodes the 2-bit bank select corresponding to CHN, generates four CE signals (chip enable signals) for selecting the non-volatile memory banks 110 to 113, and passes through the memory bus.
- CE signals are given independently to each of the nonvolatile memory banks 110 to 113.
- the memory interface 123 manages the data ready flag DRF and the access flag AF for each of the nonvolatile memory banks 110 to 113.
- the data ready flag DRF is a flag that is set to a value of 1 when the busy signal changes from a value of 1 to a value of 0, and that has a value of 0 when the music data 512 bytes have been transferred from the I / O register to the buffer unit 122.
- the access flag AF is a flag indicating whether or not each memory bank 110 to 113 is being accessed.
- the CPU unit 124 is connected to the host interface 121, the buffer unit 122, and the memory interface 123, and is a block that controls the entire data reading unit 120.
- the performance data is generated in response to an operation such as keystroke on the external master keyboard 300, and is taken into the CPU unit 230A via the input / output unit 210A.
- the input / output unit 210A is a terminal for inputting performance data from the master keyboard 300, a DA converter for digital-to-analog conversion of the musical sound generated by the signal processing unit 220, an amplifier unit for amplifying the converted musical sound, and its Includes a line-out terminal for outputting the output to the outside.
- the signal processing unit 220 is a block that generates musical sounds.
- the signal processing unit 220 performs interpolation processing and level control of musical sound data for up to 32 channels supplied from the CPU unit 230A, and then performs effect processing such as sound channel mixing and reverb.
- the signal processing unit 220 includes a digital signal processor (hereinafter referred to as DSP), a ROM storing the DSP program, a delay element necessary for effector processing, or a RAM necessary for temporarily storing parameters. Is done.
- DSP digital signal processor
- the CPU unit 230A performs channel assignment processing on the performance data received by the input / output unit 210A, transfers read instruction information to the nonvolatile storage module 100A via the driver unit 250, and also reads the musical sound read from the nonvolatile storage module 100A. This block supplies data and part of performance data to the signal processing unit 220.
- FIG. 7 is a block diagram showing the musical sound data buffer 231 included in the CPU unit 230A.
- the musical sound data buffer 231 includes 16 kByte dual port RAMs 231a and 231b, a multiplexer 231c, and a demultiplexer 231d.
- the channel assignment table 232 holds the following information indicating the statuses of the sound generation states of all channels, that is, CH0 to CH31. Such information will be described below.
- the sounding flag SON is a flag indicating whether or not the corresponding channel is sounding. A value of 0 indicates a sounding channel, and a value of 1 indicates an empty channel.
- the KON flag is a flag that has a value of 1 after the key is pressed and released.
- the note number NN is a hexadecimal number corresponding to the piano keyboard position.
- the touch parameter TP is strength information corresponding to the strength of keystroke.
- the level data LD corresponds to the volume of a musical sound determined according to the strength of keystroke.
- the forced mute flag F is a flag for forcibly muting the musical sound.
- the sector count SC is a counter that counts up every time the musical sound data is read out for one sector, that is, 128 samples.
- the wave end flag WE is a flag indicating that the final sample of the musical tone data, that is, s1763999 has been processed for musical tone generation.
- the envelope end flag EE is a flag that is set to a value of 1 when the volume change of the musical sound (hereinafter referred to as the envelope ENV) that changes according to the keystroke state or the sustain pedal state becomes a volume level that cannot be heard. .
- the musical sound data read request flag DQ is a flag that is set when the number of musical data samples used by the signal processing unit 220 for generating musical sounds reaches a predetermined threshold (for example, 96 samples).
- the selection flag M is a flag for selecting which of the dual port RAMs 231a and 231b in the musical sound data buffer 231 is to be written with musical sound data.
- the selection flag D is a flag for selecting whether the musical sound data stored in the dual port RAM 231a or 231b is transferred to the signal processing unit 220.
- the flags D and M select the dual port RAM 231a when the value is 0, and select the dual port RAM 231b when the value is 1.
- FIG. 9 is an explanatory diagram showing the NN table 233A held in the CPU unit 230A.
- the NN table is a table showing the relationship between the note number NN and the physical block number storing the musical tone data corresponding to the NN.
- the performance data buffer 234 is a FIFO that holds a plurality of performance data input from the master keyboard 300.
- the transfer monitoring unit 235 in the CPU unit 230A monitors data transfer, and when temporarily stored in the area corresponding to either channel of the dual port RAM 231a or 231b, the transfer monitoring unit 235 sets the transfer completion flag TRNF to the signal processing unit 220. To be transferred.
- the musical sound data of the piano digitally recorded in advance is transferred to the physical blocks PB0 to PB703 of the nonvolatile memory bank 110 from the lowest sound of the piano to the highest sound as shown in FIG. All 88 keys of musical tone data are written in ascending order. The same data is similarly written in the nonvolatile memory banks 111 to 113, respectively. As a result, the same data is multiplexed and recorded in four parallel non-volatile memory banks.
- PB0 to PB7 of each memory bank records the lowest piano data, and 1764000 samples of music from the first sample (s0) immediately after the keystroke to the last sample (s1763999) in ascending order from P0 of PB0. Data is stored.
- two types of musical sound data, the weakest touch and the strongest touch are written as a set in units of 512 bytes.
- P0 of PB0 of the non-volatile memory bank 110 corresponds to LS0-7
- P0 of PB0 of the non-volatile memory bank 111 corresponds to LS8-15
- P0 of PB0 in the nonvolatile memory bank 112 corresponds to LS16 to 23
- P0 of PB0 in the nonvolatile memory bank 113 corresponds to LS24 to 31.
- This relationship follows the LSN bit format shown in FIG.
- FIG. 10 is a bit format showing one sample of musical sound data.
- sign bits indicating positive and negative are written in b15, and 15 bits from b15 to b1 are used as one sample of musical sound data.
- a wave end flag WE is recorded in b0.
- the flag WE is a flag indicating whether or not the corresponding sample is the final sample. When the value is 1, the final sample is assumed.
- the page P0 of the final physical block PB1023 of the non-volatile memory bank 113 contains the characteristic information (hereinafter referred to as recording data characteristic information, RDI) of piano musical tone data recorded in the non-volatile storage module 100A.
- recording data characteristic information RDI
- MSI memory configuration information
- FIG. 11 is an explanatory diagram showing an example of recording data characteristic information.
- This characteristic information includes at least information on the sampling frequency (44.1 kHz in this case) of the musical sound data. Reverb and chorus are used for effect processing.
- the remarks column is not actually recorded but is reference information.
- FIG. 12 is an explanatory diagram showing an example of the memory configuration information of the nonvolatile storage module 100.
- the sector size in FIG. 12 indicates the size of data read for each read instruction.
- the read time TR indicates the read time from the memory cell array to the IO register.
- the transfer time TT indicates the data transfer time from the IO register to the memory interface 123.
- the remarks column is not actually recorded but is reference information.
- FIG. 13A is a flowchart showing normal processing of the CPU unit 124
- FIG. 13B is a flowchart showing the interrupt processing.
- the CPU unit 124 of the nonvolatile storage module 100A performs an initialization process in S100.
- the initialization process the single port RAMs 122a and 122b in the buffer unit 122 and the register 121a of the host interface 121 are cleared. Thereafter, the host interface 121 notifies the completion of initialization.
- the CPU unit 230A of the access module 200A performs an initialization process in S200.
- the signal processing unit 220 is reset and the dual port RAMs 231a and 231b in the musical sound data buffer 231 are cleared.
- the signal processor 220 starts counting up the program counter of the internal DSP.
- initial setting of the channel assignment table 232 shown in FIGS. 8A to 8C that is, the following processing is performed.
- (1) SON is set to value 0, that is, CH0 to 31 are set as empty channels
- KON, PD, NN, TP, LD, F, SC, WE, DQ, M, and D are set to value 0
- FIG. 15 shows a bit format indicating read instruction information from the access module 200A to the nonvolatile storage module 100A.
- b29 and b28 are provided so that they can be extended to instructions other than reading, in this embodiment, instructions other than reading are not performed, so they are fixed to a value of 11.
- the characteristic information is written within 512 bytes from the address 0 of P0 of the PB1023 of the nonvolatile memory bank 113. According to the bit format of FIG. 4, the read instruction information shown in FIG.
- the access module 200A can read the recording data characteristic information and the memory configuration information by transferring the read instruction information to the nonvolatile storage module 100A.
- the CPU unit 230A When acquiring the recording data characteristic information shown in FIG. 11, the CPU unit 230A sets the sampling period (22.7 ⁇ s) in the timer in the signal processing unit 220, and determines one period of the signal processing time slot for one sampling time. To do. This timer functions as a timer for controlling one period of the DSP in the signal processing unit 220.
- the CPU section 230A writes one sample capacity (2 bytes) and flag assignment bit (b0) in the recording data characteristic information as parameters of the RAM in the signal processing section 220, and the musical sound data is in any bit position of the bit format shown in FIG. It is used as a parameter for determining whether it corresponds.
- the CPU unit 230A determines the channel frame of the channel assignment table 232 and the number of channels of the time slot of the signal processing unit 220 based on the maximum number of sound generation channels (32CH) in the recording data characteristic information.
- the signal processing unit 220 determines effect processing by reverb and chorus. In the illustrated case, it is determined that only reverb is performed as effect processing.
- the CPU unit 230A obtains the parallel number by executing Expression (5) based on the number of buses (1) and the number of memory banks per bus (4). .
- Number of parallels number of buses x number of memory banks per bus (5)
- the bit number of the LSN is determined by the parallel number thus obtained.
- the number of parallels is 4, the number of bits of the bank select is 2, and the bit format of the LSN is as shown in FIG.
- the parallel number is 2
- the number of bits assigned to the bank select is 1 (b3), and accordingly, the page number is assigned to b11 to b4 and the PBN is assigned to b21 to b12.
- CHN and bank select CHN% Number of parallels (6)
- the relationship between CHN and bank select is four ways as shown in (a) to (b) below.
- (A) CH0, 4, 8, 12, 16, 20, 24, 28 ... Bank select 0 (nonvolatile memory bank 110)
- Bank select 1 (nonvolatile memory bank 111)
- Bank select 2 (nonvolatile memory bank 112)
- D) CH3, 7, 11, 15, 19, 23, 27, 31 ... Bank select 3 (nonvolatile memory bank 113)
- the CPU unit 230A refers to the sector size (512 bytes) in the memory configuration information shown in FIG. 12, and manages the size of the data read unit from the nonvolatile storage module 100A as 512 bytes. Further, the total number of samples for each sector (hereinafter referred to as usn) is determined by executing equation (7).
- the CPU 230A is based on the occupied capacity per note in the recording data characteristic information shown in FIG. 11, the page size in the memory configuration information, and the number of pages TPN per physical block (in this case, 256).
- the number of physical blocks required per note is calculated.
- the PBN corresponding to each note from the lowest sound A -1 to the highest sound C 7 is determined, and the NN table 233A shown in FIG. 9 is generated.
- the recording data characteristic information and the memory configuration information are read, and the CPU 230A completes the initialization process (S200) by the setting process of various parameters. Then, the process proceeds to the normal operation process S201, where the interrupt is enabled and performance data from the external master keyboard 300 is received.
- the flowchart is composed of two routines, a main routine shown in FIG. 14A and an interrupt routine shown in FIG. 14B.
- the interrupt routine is a routine started when performance data is transferred to the access module 200 ⁇ / b> A by a performance operation of the master keyboard 300. If a performance operation of the master keyboard 300 is performed during the processing of the main routine, the routine immediately shifts to the interrupt routine. It is assumed that the interrupt routine can receive multiple interrupts, that is, accept the next interrupt even during the interrupt routine.
- FIG. 16 shows a bit format indicating performance data transferred from the master keyboard.
- performance data There are two types of performance data: keystroke data generated in response to keystrokes and pedal data generated in response to a sustain pedal ON / OFF operation. Those data are identified by the value of b15.
- the KON flag, note number NN, and touch parameter TP are as described above.
- the pedal data PD is a flag that becomes 1 when the sustain pedal is turned on.
- the sustain pedal is a pedal for maintaining the sound even when the key is released, and is a pedal provided in a real piano.
- performance data transferred from the master keyboard 300 via the input / output unit 210A is acquired in the performance data buffer 234 (S220). As shown in FIG.
- the format of the performance data is either keystroke data or pedal data. If there is no unprocessed performance data already acquired in the performance data buffer 234 (S221), the performance data acquired this time is checked (S222). Specifically, by checking b15 of the performance data shown in FIG. 16, it is identified whether it is keystroke data or pedal data. When the performance data is pedal data (S223), b14 in the pedal data shown in FIG. 16, that is, the PD flag is directly copied to the PD in the channel assignment table 232 (S224), and the process proceeds to S232. On the other hand, if the performance data is keying data (S223), the KON flag is extracted from b14 of the keying data shown in FIG. 16 (S225), and the value of KON is checked in S226. When KON is 0, that is, when the key is released, the process proceeds to S232.
- KON is a value 1
- each information of the assignment destination channel is set as follows. (1) Set SON to value 1 (2) Copy NN and TP from keystroke data (3) Set SC, WE, EE, DQ, M, D to value 0
- the musical sound data read instruction information shown in FIG. 15 is transferred to the nonvolatile memory module 100A.
- the read instruction information is obtained by the following procedure.
- the head PBN is obtained by referring to the NN table 233A based on the NN of the keystroke data.
- a temporary LSN is obtained based on the top PBN, SC, and equation (9).
- Provisional LSN (lead PBN ⁇ 13) + [ ⁇ (SC & 0xFFE8) ⁇ 2 ⁇
- the temporary LSN is an LSN when the bank select is not confirmed. In this case, the value of (b4, b3) is set to 0.
- & is an operator that takes a logical product
- is an operator that takes a logical sum
- ⁇ is an operator that performs a bit shift to the left.
- “0x” is a symbol representing a hexadecimal number.
- the first PBN of the NN table is shifted by 13 bits to obtain physical block numbers PBN from b13 to b22 shown in FIG. Further, the page number can be obtained by masking b0 to b2 of the sector count SC and shifting by 2 bits. Further, a temporary LSN is obtained by adding the lower 3 bits of the sector count.
- C A bank select is obtained from the assigned CHN and the above-described equation (6).
- the LSN of the read destination is determined, the read instruction information is transferred to the nonvolatile storage module 200 in the format shown in FIG. 15, and the desired musical tone data is read (S230).
- the musical sound data read from the nonvolatile storage module 100A is transferred to the access module 200A.
- FIG. 17 is a bit format showing the musical tone data when read from the nonvolatile storage module 100A onto the external bus. As shown in FIG. 17, the channel data of the weakest touch, the strongest touch, and the musical sound data are included.
- the storage destination channel is determined by the external format CHN of the musical sound data shown in FIG.
- the 512 bytes from s0 to s127 are temporarily stored in the area corresponding to CH0 of the dual port RAM 231a for all samples in the head sector, that is, the weakest touch and the strongest touch respectively. Thereafter, the transfer monitoring unit 235 in the CPU unit 230A transfers the transfer completion flag TRNF to the signal processing unit 220. It should be noted that the processing after S230 of the CPU and the musical tone data transfer (including transfer monitoring) to the musical tone data buffer 231 are executed in parallel.
- the level data LD is calculated by the calculation of TP / 0x7F, and is set in the LD of the channel assignment table 232, and the KON extracted in S225 is set in the KON of the channel assignment table 232.
- 0x7F represents the maximum value of TP. That is, the level data LD takes a value between 0 and 1 in accordance with the touch parameter TP. The operation of the signal processing unit 220 will be described later.
- the initial flag INI is set to a value 1 according to the equation (11).
- INI KON & EE (11)
- both INI and TRNF are set to 1 (S301), and various parameters are initially set in S302.
- sn held in the counter in the signal processing unit 220 is set to 0, and the transfer completion flag TRNF held in the RAM in the signal processing unit 220 is set to 0.
- Interpolation processing is processing for changing the tone color of a musical tone according to the strength of the keystroke, that is, the value of the touch parameter TP.
- a tone color with a strong keystroke is richer in high frequency components than a tone color with a weak keystroke. Therefore, in the present embodiment, linear interpolation is performed between the strongest touch musical tone data that is representative of the timbre of the strong keystroke and the weakest touch musical tone data that is the representative of the timbre of the weak keystroke.
- the timbre can be changed according to TP by performing linear interpolation between two points based on the touch parameter TP.
- ENV LD ⁇ REL (13)
- REL_old is held in the RAM in the signal processing unit 220 and is updated to REL every time the expression (13) is executed. The REL gradually approaches 0 exponentially.
- FIG. 19 and 20 show the time variation of ENV.
- FIG. 19 shows the case where PD is 0, that is, the sustain pedal is OFF. In this case, while KON is 1, the ENV does not change as in the above (c), and when the value becomes 0, that is, after the key is released, the ENV attenuates exponentially.
- FIG. 20 shows the case where PD is 1, that is, the sustain pedal is ON. In this case, even if KON becomes a value of 1, the state of (c) described above continues, and the ENV value at the time of keystroke remains as it is.
- ENV linearly attenuates to a value of 0 at 8 sampling periods indicated by broken lines.
- one sampling period follows Formula (14). 1 / sampling frequency (44.1 kHz) ⁇ about 22.7 ⁇ sec (14) Accordingly, the 8 sampling period is about 182 ⁇ sec.
- ENVth is a value at a level that cannot be heard sufficiently for hearing.
- ENVth is a value at a level that cannot be heard sufficiently for hearing.
- the digital data W after the envelope processing is obtained based on the equation (15) (S307).
- W w ⁇ ENV
- the musical tone data is data obtained by digitally recording piano sounds for each keyboard. Therefore, even if the ENV level does not change with time, the peak value of W attenuates with time, so that it is audible. Sounds attenuated.
- sn i.e., the last sample (s127) in one sector of the musical sound data. If it has been reached, toggle of the selection flag D, i.e., the reverse of the current value. Change to logic. In this operation, the D of the corresponding channel in the channel assignment table 232 is toggled (for example, changed from 0 to 1), and the input of the demultiplexer 231d of the musical sound data buffer 231 is switched to thereby change the musical sound data reading source. For example, the dual port RAM 231a is switched to the dual port RAM 231b.
- Wn from CH0 to CH31 is mixed based on Expression (16).
- Wx (W0 + W1 +... + W31) / 32 (16)
- Wn (n is an integer of 0 to 31 corresponding to CHN) is W of an arbitrary channel
- Wx is a mixing result.
- FIG. 21 is a time slot diagram showing signal processing per sampling period.
- the left side is the earliest time, and after interpolating from CH0 to 31 and level control, mixing processing (MIX) of musical sounds from CH0 to 31 and effect processing such as reverb and chorus (EFFECT) Is made.
- MIX mixing processing
- ETFECT reverb and chorus
- the signal processing described above is repeatedly executed every sampling period (22.7 ⁇ sec), and the musical tone data after processing is digital-analog changed by the DA converter of the input / output unit 210A every 22.7 ⁇ sec.
- the result is output to the outside through a line-out terminal as a desired musical tone.
- the musical sound can be obtained as a piano performance through an external amplifier and speaker.
- the CPU unit 230A checks F of all channels in the channel assignment table 232 in S202. If there is a channel with an EE value of 1 among the channels with an F value of 1, the F of the channel is cleared to a value of 0 (S203), and channel assignment processing is performed on the channel (S204). Note that the signal processing unit 220 clears the EE in S302 as described above.
- S205 a musical sound data read instruction
- S206 sound generation control
- a channel with a DQ value of 1 is searched. If there is, a read instruction for musical tone data of that channel is given.
- the search of the channel assignment table 232 in S207 and S202 is performed in ascending order from CH0.
- the CPU unit 124 executes two routines, a main routine shown in FIG. 13A and an interrupt routine shown in FIG. 13B.
- the interrupt routine does not allow multiple interrupts. That is, even if there is an interrupt during interrupt routine processing, it is masked.
- the process proceeds to a normal process (S101). While the read instruction information is not transferred from the access module 200A, the read instruction reception flag RR and the read command issue flag RC of the register 121a of the host interface 121 shown in FIG. Continue to execute.
- the host interface 121 proceeds from S400 of the main routine of FIG. 22A to S401, and holds the CHN and LSN of the read instruction information in the register 121a (S401). Thereafter, in the register 121a, the RR corresponding to the CHN assigned to the read instruction information shown in FIG. 15 is set to a value 1 (S402). Thereafter, the process returns to S400, and loops through S400 and S402 until there is a data transfer instruction from the CPU unit 124, that is, a data transfer instruction from the buffer unit 122 to the access module 200A. Note that the example shown in FIG.
- CH0 to CH3 are instructed to be read and each flag is changed by the processing described below. Specifically, the CH0 to 3 read instruction and the issue of the read command to the nonvolatile memory banks 110 to 113 are completed, and the transfer of the musical sound data from the nonvolatile memory banks 110 and 111 to the buffer unit 122 is completed. Further, only CH0 represents the time until the completion of the transfer of the musical sound data from the buffer unit 122 to the access module 200A. By this operation, the value of each flag in the register 121a changes.
- the CPU unit 124 instructs the memory interface 123 to output a read command corresponding to CH0 to the nonvolatile memory bank 110. Further, the CPU unit 124 sets the RC of the corresponding channel of the register 121a to a value 1 (S105). The above processing is executed for the channel whose RR is 1 in the register 121a, that is, CH0 to CH3.
- FIG. 23 is a time chart of a read command issued by the data reading unit 120 to the nonvolatile memory bank.
- Command 1 is a command for notifying the start of transfer of the physical address next, and command 2 instructs reading out the musical tone data stored in the physical address in the I / O registers 110a to 113a from the memory cell arrays 110b to 113b. It is a command.
- the read command outputs the physical address immediately after outputting the command 1 at time t1, and then outputs the command 2. Since this addressing time TA is about several hundreds of seconds, it can be ignored in terms of time.
- the musical sound data is read to the I / O register of one of the nonvolatile memory banks while the lead time TR (for example, 50 ⁇ sec in this embodiment) elapses from t2 when the command 2 is completed to the data read completion time t3. .
- the physical address PBA is a physical address designated in units of 512 bytes by the PBN, the page number, and the sector selection bit in the page of FIG. This physical address designates the start address (in bytes) where the tone data to be read is stored, and the tone data from the start address to the last address of the corresponding page corresponds to the I corresponding to TR.
- the bank select is information corresponding to CHN as described above, encoded within the memory interface 123, and functions as four CE signals (chip enable signals) for selecting the nonvolatile memory banks 110 to 113. .
- the memory interface 123 provides CE signals to the nonvolatile memory banks 110 to 113 independently via the memory bus. Further, as shown in FIG. 23, the access flag AF has a value of 1 from t1 when the command 1 is given to time t4 when the musical sound data transfer period (TT) ends.
- S106 it is checked whether or not the corresponding nonvolatile memory bank is data ready for all the channels having the data transfer completion flag TE of 0, that is, CH0 to 3 (S107).
- Data ready indicates data ready when the data ready flag DRF managed by the memory interface 123 is 1, that is, reading of desired musical tone data from the memory cell array to the I / O register has been completed.
- the data ready flag DRF is set to the value 1 at the time t3 when the busy signal changes from the value 1 to the value 0, and the value at the time t4 when the musical sound data 512 bytes are transferred from the I / O register to the buffer unit 122. 0.
- the CE signal and the read clock described above are independently input from the memory interface 123 to the nonvolatile memory banks 110 to 113 via the memory bus, and the busy signal is independently input to each of the nonvolatile memory banks 110 to 113.
- the data is input to the memory interface 123 via the memory bus.
- S107 if it is data ready, the process proceeds to S108, and if it is not data ready, the process returns to S102.
- S108 if the memory interface 123 is not transferring data, the process proceeds to S109. If the data is being transferred, the process returns to S102.
- the CPU unit 124 issues a transfer instruction to the memory interface 123 so as to transfer the musical sound data from the non-volatile memory bank having the DRF value of 1 to the buffer unit 122. Thereafter, the read command issue flag RC of the corresponding channel is reset to 0 (S110), and the process returns to S102.
- the CPU unit 124 proceeds to the interrupt routine with the completion of the data transfer as a trigger.
- the TE of the corresponding channel of the register 121a is set to 1 (S121).
- the input value to the RAM switching terminal 122d of the RAM switching circuit 122c is toggled and switched (S122). For example, by changing the value from 0 to 1, the transfer destination from the memory interface 123 is switched to the single port RAM 122b, and the transfer source to the host interface 121 is switched to the single port RAM 122a.
- the CPU unit 104 notifies the host interface 121 of the CHN of the channel for which the data transfer to the buffer unit 122 has been completed, and instructs to transfer the musical sound data temporarily stored in the buffer unit 122 to the access module 200A ( S123).
- the host interface 121 proceeds to S420 in FIG. 22B by an interrupt corresponding to the data transfer instruction of the CPU unit 124 in S123.
- the host interface 121 transfers the musical tone data from the buffer unit 122 to the access module 200A.
- the CHN notified by the CPU unit 124 in S123 is added to the musical sound data and transferred to the access module 200A (FIG. 17).
- the RR and TE of the corresponding channel are reset to the value 0 in the register 121a (S421).
- the area in which the RR of the register 121a has a value of 0 is an area that is released as an area for the next new read instruction information.
- RC when RR has a value of 0, RC also has a value of 0 by S109, and TE has a value of 0 by S421.
- the temporary storage of the read instruction information in the register 121a is used in order from the uppermost area, and is used so as to return to the uppermost again when reaching the lowermost stage, that is, cyclically.
- the access module 200A When receiving the musical tone data from the host interface 121, the access module 200A temporarily stores the musical tone data in the area of the musical tone data buffer 231 corresponding to the CHN added to the musical tone data.
- the subsequent processing of the access module 200A is as described above.
- FIG. 24A is a time chart for explaining the operation when discrete keystroke is performed, and FIG. 8A represents a change in parameters in the channel assignment table 232 corresponding to the keystroke.
- NN is 0x25 at intervals of several tens of microseconds. The case where a keyboard with NN 0x29 and finally two keys with NN 0x2C and 0x2F will be described.
- Each keystroke is assigned to CH0-7 by the channel assignment process of the CPU section 230A described above, and the instruction to read CH0-7 is nonvolatile from the access module 200A at the timing when the processing delay of the CPU section 230A is added to the keystroke timing.
- the data is transferred to the storage module 100A.
- the next read command cannot be issued while the corresponding nonvolatile memory bank is being accessed, that is, while the access flag is 1.
- the read command issuance timing to the nonvolatile memory banks 110 to 113 is the timing shown in FIG. 24A, and the CH0 to 7 read instructions are transferred from the access module 200A to the nonvolatile storage module 100A.
- the data is read from the memory cells to the I / O register from the respective memory banks 110 to 113 during the access time TR.
- the musical sound data read out to the I / O registers 110a to 113a of the non-volatile memory banks 110 to 113 is in accordance with S108 described above and after time t2 so that the transfer times of channels 0 to 3 do not overlap each other as shown in the figure.
- the data is sequentially transferred to the buffer unit 122.
- the host interface 121 transfers the musical tone data temporarily stored in the buffer unit 122 to the access module 200A.
- the CPU unit 230A stores the transferred tone data in the tone data buffer 231.
- the output from the buffer unit 122 is normally in the order in which read commands are issued, that is, in ascending order from CH0.
- the tone data of CH1 is more preferable than the tone data of CH0. It may be transferred to the buffer unit 122 first.
- the musical sound data when read from the nonvolatile storage module 100A onto the external bus has a format with CHN added as shown in FIG. Thereby, the CPU section 230A can store the music data buffer 231 in the area corresponding to CHN based on the CHN.
- the signal processing unit 220 uses the musical tone data stored in the musical tone data buffer 231 to perform musical tone generation processing as described above.
- the signal processing unit 220 performs processing from CH0 to CH31 in a time division manner for each sampling period. That is, the musical tone data of each channel is used in order from s0 every 22.7 ⁇ sec.
- s0 is used in the first time slot starting from time t3 in FIG. 24A.
- both s0 of CH2 and CH3 are used from the third time slot starting from time t5.
- each channel all the 512-byte musical sound data is used up in the 127th time slot counting from the time slot using s0. Therefore, as described above, at time t7 when sn becomes 96, it is necessary to obtain musical sound data for the next 512 bytes in advance.
- the number is not limited to 96, and other values may be used as long as the musical sound data for 512 bytes can be acquired in time for processing the musical data for the next 512 bytes.
- the read instruction of CH0 to 7 is transferred from the access module 200A to the nonvolatile memory module 100A.
- the interval between reading instructions is basically a time slot interval, that is, every 22.7 ⁇ sec.
- a channel having the same read instruction time appears (for example, CH2 And 3).
- the sound generation delay time is the time from when the key is pressed until the musical sound corresponding to s0 is generated.
- the sound generation delay time t1 to t6 of CH3 is the maximum and the sound generation delay time is 150 ⁇ sec or less. Since this is a value sufficiently shorter than 1 ms which is the allowable range of the sound generation delay time, in the case of FIG. 24A, the tone generation system of the present embodiment can be applied as a tone generation system such as an electronic musical instrument.
- FIG. 24B is a time chart for explaining the operation when 32 keys are simultaneously pressed by the master keyboard 300 at time t1
- FIG. 8B shows changes in parameters in the channel assignment table 232 corresponding to the keys. . It should be noted that such a keying method is a method that is not often performed in normal performance.
- the access module 200A transfers the read instruction information of CH0 to 31 to the non-volatile storage module 100A at a timing obtained by adding the processing delay of the CPU unit 230A to the keying timing. Thereafter, the access module 200A intermittently transfers the musical tone data corresponding to CH0 to 31 to the musical tone data buffer 231 from time t2 to time t3 in the same manner as (1-1) described above to generate musical tone. To do.
- CH31 has the longest pronunciation delay time.
- the period from time t2 to time t3 is 490.8 microseconds
- the sound generation delay time is from t1 to time t3, that is, 600 microseconds or less in the drawing of FIG. 24B. Since this is a value shorter than 1 msec which is the allowable range of the sounding delay time, even in the case of FIG. 24B, the tone generation system of the present embodiment can be applied as a tone generation system such as an electronic musical instrument.
- the period during which such rapid mute is performed is a period of 182 ⁇ s corresponding to 8 sampling periods immediately after key pressing in FIG. 24C.
- all the channels are channels on which a new key has been pressed in a state where the already-keyed keyboard (FIG. 24B) is not released and is sounded. Therefore, both KON and SON start from the value 1.
- the EE becomes a value 1 and the SON becomes a value 0 by the quick mute processing of the signal processing unit 220.
- the read instruction information of CH0 to 31 is transferred to the nonvolatile storage module 100A by the channel assignment processing of the CPU unit 230A. It becomes.
- the subsequent time chart is the same as the time chart shown in FIG. 24B.
- the longest sound delay time is CH31, and it can be said that the sound sound delay time is from time t1 to time t4, that is, 800 ⁇ sec or less in the drawing of FIG. 24C. Since this is a value shorter than 1 msec which is the allowable range of the sounding delay time, the tone generation system of the present embodiment can be applied as a tone generation system for electronic musical instruments.
- the tone data is multiplexed by recording in each of the nonvolatile memory banks 110 to 113, and the data reading unit 120 instructs the reading from the access module 200A. Accordingly, the musical sound data is read out in parallel from the plurality of nonvolatile memory banks. Therefore, even in a system in which it is impossible to predict which musical tone data is to be read, such as a musical tone generation system, it is possible to read in parallel from a plurality of nonvolatile memory banks when reading a plurality of data. . Therefore, the sound generation delay time can be made shorter than the allowable range of 1 ms. That is, even when a large-capacity multi-value NAND flash memory, which is currently mainstream, is used as a ROM for musical tone data, it is possible to realize a low-priced and small musical tone signal generator.
- the nonvolatile storage module 100A may be a removable storage device such as a memory card, or a memory unit incorporated in a device such as an electronic musical instrument.
- the access module 150 may be a device such as an electronic musical instrument, or may be an access circuit unit incorporated in a device such as an electronic musical instrument.
- FIG. 25 is a block diagram showing a musical sound generation system according to the second embodiment of the present invention.
- each of the nonvolatile memory banks 110 to 113 is one flash memory (chip), but in this embodiment, the nonvolatile memory banks 110 to 113 are nonvolatile.
- Memory banks 110 and 111 are built in one flash memory 131, and nonvolatile memory banks 112 and 113 are built in one flash memory 132.
- the data reading unit 140 includes a memory interface 141 in addition to the host interface 121, the buffer unit 122, and the CPU unit 124 described above.
- the tone generation system according to the second embodiment corresponds to the latter.
- the non-volatile memory banks 110 and 111 included in the flash memory 131 and the non-volatile memory banks 112 and 113 included in the flash memory 132 can independently read the musical sound data as in the first embodiment.
- the difference from the first embodiment is that there are two flash memory chips, so the number of CE signals, read clocks, and busy signals connected to the memory interface 123 via the memory bus is two. It becomes one by one.
- b3 in the bit format shown in FIG. 4, that is, the LSB of the bank select is added to the upper part of b22 of PBN (b22 to b13) and used as a physical block address of the flash memory 131 or the flash memory 132.
- B4 in the bit format, that is, the MSB of the bank select is encoded inside the memory interface 141 and used as two CE signals.
- the busy signal of the flash memory 131 is shared by the nonvolatile memory banks 110 and 111.
- the data ready flags of the nonvolatile memory banks 110 and 111 may be generated by the busy signal.
- the busy signal of the flash memory 132 is shared by the nonvolatile memory banks 112 and 113.
- the data ready flag for each of the nonvolatile memory banks 112 and 113 may be generated by the busy signal.
- the access flag may be controlled so as to have a value of 1 during the period from the command 1 to the end of the musical sound data transfer period (TT), as in the first embodiment.
- the musical tone generation system according to the second embodiment operates in the same manner as the musical tone generation system according to the first embodiment, so that the sound generation delay time is shorter than the permissible range of 1 msec. Things will be possible. That is, even when a large-capacity multi-value NAND flash memory, which is currently mainstream, is used as a ROM for musical tone data, it is possible to realize a low-priced and small musical tone signal generator.
- FIG. 26A and FIG. 26B are block diagrams showing a tone generation system according to the third embodiment of the present invention.
- the musical tone generation system includes a nonvolatile storage module 100C shown in FIG. 26A and an access module 200C shown in FIG. 26B.
- the nonvolatile storage module 100C includes four nonvolatile memory banks 110 to 113 provided in parallel and a data read / write unit 150C.
- the data read / write unit 150C includes a host interface 151, a buffer unit 152, a memory interface 153, a CPU unit 154, and an address management unit 155.
- the access module 200C includes an input / output unit 210C, a signal processing unit 220, a CPU unit 230C, and a driver unit 250, and can output musical sounds for 32 channels simultaneously.
- the channel numbers are CH0 to CH31.
- the CPU unit 230C includes a file system unit 236 and a multiplexing unit 237 in addition to the musical sound data buffer 231, the channel assignment table 232, the NN table 233C, the performance data buffer 234, and the transfer monitoring unit 235.
- the nonvolatile memory banks 110 to 113 of the nonvolatile memory module 100C are the same as those in the first embodiment described above.
- the physical block is PB
- the logical sector is LS
- the cluster is CL
- the physical block number is PBN
- the logical sector number is LSN
- the cluster number is CLN.
- a physical block with a physical block number PBN of 0 is PB0
- a logical sector with a logical sector number LSN of 0 is LS0
- a cluster with a cluster number CLN of 0 is CL0.
- FIG. 27A is an explanatory diagram illustrating the relationship between the logical address space, the cluster number CLN, and the logical sector number LSN
- FIG. 27B is a physical diagram illustrating the relationship between the logical sector number LSN and the structure in the memory cell arrays 110b to 113b.
- the logical address space is composed of CL0 to CL130943.
- One cluster has a capacity of 32 kBytes.
- the memory cell arrays 110b to 113b have physical blocks PB0 to PB1023, respectively. Each physical block is composed of 256 pages (P0 to P255).
- musical tone data is held in PB1 to PB704 of each nonvolatile memory bank 110 to 113.
- PB1023 is an area (hereinafter referred to as a system area) that cannot be read or written by specifying a logical address. This is to prevent the user from accidentally erasing, and the manufacturer can directly write by physical addressing.
- FIG. 28 is a diagram illustrating an example of the page P0 of the physical block PB1 with respect to the recording format in each page where the musical sound data is recorded.
- Each page of all physical blocks consists of a data area of 4096 bytes and a redundant area of 128 bytes. In the present embodiment, the data area is divided into 8 sectors. Each sector has a capacity of 512 bytes. Redundant areas are not used. Details of the recorded data will be described later.
- FIG. 29 is a bit format showing the correspondence between the logical sector number LSN and the physical sector number PSN.
- bits b0 to b2 of LSN are intra-page selector selection bits
- b3 and b4 are bank select
- b5 to b12 are page numbers
- b13 to b22 are logical block numbers LBN.
- the cluster number CLN corresponds to b22 to b5.
- the bank select b3, b4 is 0, the nonvolatile memory bank 110 is selected.
- the bank select is the value 1
- the nonvolatile memory bank 111 is selected.
- the bank select is the value 2
- the nonvolatile memory bank 112 is selected.
- the value is 3, the nonvolatile memory bank 113 is selected.
- the PBN is determined by logical-physical conversion of LSNs b22 to b13.
- LSN b12 to b5 and b2 to b0 correspond to PSN b10 to b3 and b2 to
- the LSN bit format shown in FIG. 29 is an example in which the parallel number of the nonvolatile memory banks is 4, and the number of bits allocated to the bank select may be changed depending on the parallel number.
- the parallel number is 2
- the number of bits assigned to the bank select is 1 (b3)
- the page number is assigned to b11 to b4
- the LBN is assigned to b21 to b12.
- the intra-page sector selection bit is a bit corresponding to a quotient obtained by dividing a page by a sector size.
- the page size is set to 4096 + 128 bytes and the sector size is set to 512 bytes, that is, a page is divided into 8 sectors as shown in FIG. Select by 3 bits.
- the page size and sector size need not be limited to the above-described values, and the in-page sector selection bit may be variable according to the values.
- the host interface 151 is connected to the access module 200C via an external bus.
- the host interface 151 is a block that receives the musical sound data read instruction information from the access module 200C and transfers the musical sound data read from the nonvolatile memory banks 110 to 113 to the buffer unit 152 to the access module 200C.
- This read function is the same as that in the first embodiment.
- the read / write unit 150C has a write function for writing the musical sound data input by the user as a file to the nonvolatile storage module 100C.
- the host interface 151 includes a register 151a inside.
- FIG. 30 is a memory map showing the register 151a.
- the register 151a has an LSN, a read instruction reception flag RR, a read command issue flag RC, and a data transfer completion flag TE for 32 channels.
- the register 151a holds read instruction information next to the read instruction information in the register before reading the musical sound data corresponding to the read instruction information.
- the read instruction reception flag RR (hereinafter referred to as RR) is a flag having a value of 0 while the read instruction information is not transferred from the access module 200C, and is 1 when the instruction information is transferred.
- the read command issue flag RC (hereinafter referred to as RC) is a flag that is set when the memory interface 153 is instructed to output a read command to the nonvolatile memory bank.
- a data transfer completion flag TE (hereinafter referred to as TE) is a flag that is set when data transfer from the IO register of each nonvolatile memory to the buffer unit 152 is completed, and indicates whether or not further data can be written to the buffer unit 152. Used to discriminate.
- the buffer unit 152 is a block that temporarily stores musical tone data read from the nonvolatile memory banks 110 to 113 and musical tone data to be written to the nonvolatile memory banks 110 to 113.
- the buffer unit 152 includes 4 kByte single port RAMs 152a and 152b, and a RAM switching circuit 152c. When the RAM switching terminal 152d is 0, the RAM switching circuit 152c connects the input from the memory interface (IF) 153 to the input / output port of the single port RAM 152a and outputs to the host interface (IF) 151 as a single port. Connected to the input / output port of the RAM 152b.
- the RAM switching terminal 152d is 1, the input / output end of the memory interface 153 is connected to the input / output port of the single port RAM 152b, and the input / output end of the host interface 151 is connected to the input / output port of the single port RAM 152a.
- the RAM switching terminal 152d is toggle-controlled by the CPU unit 154.
- the size used for buffering the musical sound data is 512 bytes. However, considering the versatility, the size is set to 4 kBytes which is the same as the size of the data area of the page.
- the memory interface 153 is connected to the non-volatile memory banks 110 to 113 via a memory bus, and reads out the musical sound data stored in the non-volatile memory banks 110 to 113 to the buffer unit 152 according to an instruction from the CPU unit 154.
- the data of the unit 152 is written into the nonvolatile memory banks 110 to 113.
- the memory interface 153 decodes the 2-bit bank select corresponding to the channel number CHN, generates four CE signals (chip enable signals) for selecting the non-volatile memory banks 110 to 113, and passes through the memory bus.
- the CE signals are applied independently to each of the nonvolatile memory banks 110 to 113.
- the memory interface 153 manages the data ready flag DRF and the access flag AF for each of the nonvolatile memory banks 110 to 113.
- the data ready flag DRF is a flag that is set to a value 1 when the busy signal changes from a value 1 to a value 0, and that has a value 0 when the music data 512 bytes have been transferred from the I / O register to the buffer unit 152.
- the access flag AF is a flag indicating whether or not each memory bank 110 to 113 is being accessed.
- the CPU unit 154 is connected to the host interface 151, the buffer unit 152, the memory interface 153, and the address management unit 155, and is a block that controls the entire data read / write unit 150C.
- the address management unit 155 has a function of converting a logical address and a physical address, and changes a physical block or executes wear leveling when a physical block becomes a bad block during writing of musical tone data or the like.
- the address management unit 155 has a RAM therein, and holds a logical physical conversion table in the RAM.
- the performance data is generated in response to an operation such as keystroke on the external master keyboard 300, and taken into the CPU unit 230C via the input / output unit 210C.
- the access module 200C is connected to the Internet 310, and can download necessary data in accordance with a download instruction from the user.
- the input / output unit 210C is a terminal for inputting performance data from the master keyboard 300, a DA converter for digital-to-analog conversion of the musical sound generated by the signal processing unit 220, an amplifier unit for amplifying the converted musical sound, and its Includes a line-out terminal for outputting the output to the outside.
- the signal processing unit 220 interpolates and performs level control of musical sound data for a maximum of 32 channels supplied from the CPU unit 230C, and then generates musical sounds by performing effect processing such as sound channel mixing and reverb. It is a block to do.
- the signal processing unit 220 includes a digital signal processor (hereinafter referred to as DSP), a ROM storing the DSP program, a delay element necessary for effector processing, or a RAM necessary for temporarily storing parameters. Is done.
- DSP digital signal processor
- the CPU unit 230C performs channel assignment processing on the performance data received by the input / output unit 210C, transfers read instruction information to the nonvolatile storage module 100C via the driver unit 250, and also reads the musical sound read from the nonvolatile storage module 100C. This block supplies data and part of performance data to the signal processing unit 220.
- the musical tone data buffer 231, the channel assignment table 232, the performance data buffer 234, and the transfer monitoring unit 235 included in the CPU unit 230C are the same as those in the first embodiment, and the details are omitted.
- FIG. 32 is an explanatory diagram showing the NN table 233C held in the CPU unit 230C.
- the NN table is a table showing the relationship between the note number NN and the cluster number storing the musical tone data corresponding to the NN.
- the file system unit 236 in the CPU unit 230C is for managing musical tone data as files. Details of the file system unit 236 will be described later.
- the multiplexing unit 237 in the CPU unit 230C multiplexes the musical sound data when writing the musical sound data as a file. Details of the multiplexing unit 237 will be described later.
- a manufacturer's writing device such as a personal computer conforming to the FAT file system, physically formats the nonvolatile storage module 100C. Thereafter, as shown in FIG. 27A, management information such as a FAT table and a root directory entry is allocated to the management information area (CL0, CL1) in the logical address space by the writing device, and musical tone data is stored in the normal area after the cluster CL2. To allocate.
- P0 of PB0 of the non-volatile memory bank 110 corresponds to LS0-7
- P0 of PB0 of the non-volatile memory bank 111 corresponds to LS8-15
- P0 of PB0 in the nonvolatile memory bank 112 corresponds to LS16 to 23
- P0 of PB0 in the nonvolatile memory bank 113 corresponds to LS24 to 31. This relationship follows the bit format of LSN and PSN shown in FIG.
- the musical sound data is allocated in order from the lowest note name (A ⁇ 1 ) from the cluster (CL128) obtained by adding 4 Mbyte offset from the head logical address.
- management information is written in the areas P0 to P3 of PB0 of the nonvolatile memory banks 110 to 113, and musical tone data is written after PB1.
- the CL 128 that is the head address of the musical sound data, the file name, the time information at which the musical sound data is stored, and the like are held in the file entry (FE).
- This file entry (FE) is allocated to the first 512 bytes of CL2 as shown in FIG. 27A, and written in P4 of PB0 of the non-volatile memory bank 110 in the physical space as shown in FIG. 27B.
- the logical address of the file entry can be traced from the root directory entry in the management information.
- the logical-physical conversion process is not performed to simplify the description. That is, LSN b22 to b13 and PSN b20 to b11 in FIG. 29 have a one-to-one correspondence. Since the FAT file system is a general technique, detailed description thereof is omitted.
- the musical sound data of the piano is digitally recorded at a sampling frequency of 44.1 kHz
- the musical sound data for about 40 seconds is recorded in the nonvolatile module 110 without being compressed for each pitch. This data is the same as in the first embodiment.
- the musical sound data of the piano digitally recorded in advance is transferred to the physical blocks PB1 to PB704 of the non-volatile memory bank 110 from the lowest sound of the piano to the highest sound as shown in FIG. 27B. All 88 keys of musical tone data are written in ascending order. The same data is similarly written in the nonvolatile memory banks 111 to 113, respectively. As a result, the same data is multiplexed and recorded in four parallel non-volatile memory banks. For example, in FIG.
- PB1 to PB8 of each memory bank records the lowest piano sound data, and 1764000 samples of musical tones from P0 of PB1 in ascending order to the last sample (s1763999) in order from the first sample (s0) immediately after the key is pressed. Data is stored.
- two types of musical sound data of the weakest touch and the strongest touch are written as a set in units of 512 bytes.
- the bit format indicating one sample of musical sound data is the same as that shown in FIG. 10 described in the first embodiment.
- Logical and physical addresses are logically and logically converted as shown in FIG. For simplicity, it is assumed that all physical blocks are normal blocks. However, if there is an initial defective block, the initial defective block may not be used by a logical-physical conversion technique.
- a logical-physical conversion table (referred to as CT in the figure) managed by the address management unit 155 is held in the PB 1023 of the nonvolatile memory bank 110. Since the logical-physical conversion is a general technique, a detailed description is omitted.
- the last page of the physical block PB1022 of the non-volatile memory bank 113 has characteristic information (hereinafter referred to as recording) of piano musical tone data recorded in the non-volatile storage module 100C.
- Data characteristic information referred to as RDI in the figure
- memory configuration information information related to the memory configuration of the nonvolatile storage module 100C (hereinafter referred to as MSI in the figure) in the final page of the physical block PB1023 ).
- the memory configuration information is the same as that in the first embodiment.
- the CPU unit 154 of the non-volatile storage module 100C performs an initialization process in S100 as shown in the flowchart of FIG. 13A.
- the initialization process the single port RAMs 152a and 152b in the buffer unit 152 and the register 151a of the host interface 151 are cleared.
- the address management unit 155 reads the logical-physical conversion table stored in the PB 1023 of the nonvolatile memory bank 110 into the internal RAM.
- the nonvolatile memory module 100C notifies the access permission to the access module 200C. Thereafter, the host interface 151 notifies the completion of initialization.
- the CPU unit 230C of the access module 200C performs an initialization process in S200.
- the CPU unit 230C reads the FAT table and the file entry stored in PB0 of the nonvolatile memory banks 110 to 113 to the file system unit 236, and the file system unit 236 has already stored in the nonvolatile storage module 100C.
- the start cluster number (CL128) of the musical tone data being recorded is recognized.
- the access module 200C transfers the read instruction information of the recording data characteristic information and the memory configuration information to the nonvolatile storage module 100C.
- the CPU unit 230C reads the recording data characteristic information stored in the PB1022 of the nonvolatile memory bank 113 and the memory configuration information stored in the PB1023.
- FIG. 33A shows read instruction information for reading memory configuration information.
- b27 to b23 indicate memory configuration information identification codes. * Is a symbol indicating that any value is acceptable.
- the CPU 230C resets the signal processor 220 and clears the dual port RAMs 231a and 231b in the musical sound data buffer 231. When the signal processor 220 is reset, the signal processor 220 starts counting up the program counter of the internal DSP.
- the CPU unit 230C performs the initial setting of the channel assignment table 232 as in the first embodiment.
- the CPU unit 230C Upon obtaining the recording data characteristic information shown in FIG. 11, the CPU unit 230C sets the sampling period (22.7 ⁇ s) in the timer in the signal processing unit 220, and determines one period of the signal processing time slot for one sampling time. To do. This timer functions as a timer for controlling one period of the DSP in the signal processing unit 220.
- the CPU unit 230C writes one sample capacity (2 bytes) and flag assignment bit (b0) in the recording data characteristic information as parameters of the RAM in the signal processing unit 220, and in which bit position of the musical sound data the bit format shown in FIG. It is used as a parameter for determining whether it corresponds.
- the CPU unit 230C determines the channel frame of the channel assignment table 232 and the number of channels of the time slot of the signal processing unit 220 based on the maximum number of sound generation channels (32CH) in the recording data characteristic information.
- the signal processing unit 220 determines effect processing by reverb and chorus. In the illustrated case, it is determined that only reverb is performed as effect processing.
- the CPU unit 230C obtains the formula (5) based on the number of buses (1) and the number of memory banks per bus (4) as in the first embodiment. To obtain the parallel number.
- the bit number of the LSN is determined by the parallel number thus obtained.
- the parallel count is 4, the number of bits of the bank select is 2, and the bit format of the LSN is as shown in FIG.
- the parallel number is 2
- the number of bits assigned to the bank select is 1 (b3), and accordingly, the page number is assigned to b11 to b4 and the PBN is assigned to b21 to b12.
- the CPU unit 230C is based on the occupied capacity per note in the recording data characteristic information shown in FIG. 11, the page size in the memory configuration information, and the number of pages TPN per physical block (in this case, 256). By executing Equation (8), the number of physical blocks required per note is calculated. Then, based on the starting cluster of the music data file system unit 236 is extracted from the file entry (CL128), determining the PBN corresponding to each of the notes from the lowest sound A -1 up sound C 7, NN shown in FIG. 32 A table 233C is generated.
- the recording data characteristic information and the memory configuration information are read, and the CPU section 230C finishes the initialization process (S200) by the setting process of various parameters. Then, the process proceeds to the normal operation process S201, where the interrupt is enabled and performance data from the external master keyboard 300 is received.
- the performance data transferred from the master keyboard has the same bit format as that of the first embodiment shown in FIG.
- KON is a value 1, that is, a key is pressed, it is checked whether there is an empty channel in the channel assignment table 232 (S227). Specifically, it is checked whether there is a sounding flag SON having a value 0 in ascending order from CH0, and if there is, the performance data is assigned to the first found channel (S229).
- the musical sound data read instruction information shown in FIG. 33 is transferred to the nonvolatile memory module 100C.
- the read instruction information is obtained by the following procedure.
- the head CLN is obtained by referring to the NN table 233C based on the NN of the keystroke data.
- a temporary LSN is obtained from the head CLN and SC based on the equation (18).
- Provisional LSN (first CLN ⁇ 6) + [ ⁇ (SC & 0xFFE8) ⁇ 2 ⁇
- the temporary LSN is an LSN when the bank select is not confirmed. In this case, the value of (b4, b3) is set to 0.
- & is an operator that takes a logical product
- is an operator that takes a logical sum
- ⁇ is an operator that performs a bit shift to the left.
- “0x” is a symbol representing a hexadecimal number.
- the first CLN of the NN table is shifted by 6 bits to obtain the logical block numbers LSN from b5 to 22 shown in FIG. Further, the page number can be obtained by masking b0 to b2 of the sector count SC and shifting by 2 bits. Further, a temporary LSN is obtained by adding the lower 3 bits of the sector count.
- C A bank select is obtained from the assigned CHN and the above-described equation (6).
- D) The LSN is obtained from the provisional LSN and the bank select described above using the equation (10).
- the LSN of the read destination is determined, the read instruction information is transferred to the nonvolatile storage module 200 in the format shown in FIG. 33B, and the desired musical sound data is read (S230).
- the musical sound data read from the nonvolatile storage module 100C is transferred to the access module 200C.
- the following processing is the same as that of the first embodiment.
- the tone generation system of the present embodiment can be applied as a tone generation system for electronic musical instruments.
- FIG. 34 is a flowchart showing the musical sound data writing process of the access module 200C.
- FIG. 35 is an explanatory diagram showing file allocation of musical sound data acquired from the Internet 310.
- the file system unit 236 With the physical format, the file system unit 236 logically erases the logical address space once, and transfers an erase instruction to the nonvolatile storage module 100C via the driver unit 250. A detailed description of the specification of the erasure instruction is omitted.
- L22 b22 to b13 and PSN b20 to b11 in FIG. 29 correspond one to one.
- PB0 to PB1022 of the non-volatile memory banks 110 to 113 are physically erased by the erase instruction described above.
- PB1023 is not physically erased because it is outside the logical address range.
- a FAT table indicating that the physical blocks PB0 to P1022 have been erased is recorded in PB0 (S501).
- FIG. 36A is an explanatory diagram showing the storage state of the nonvolatile memory banks 110 to 113 before the musical sound data is written.
- PB0 of the non-volatile memory banks 110 to 113 stores a FAT table for managing that all normal areas have been logically erased by writing after the physical format (S500) described above. ing. Accordingly, PB1 to PB1022 of the nonvolatile memory banks 110 to 113 are all erased.
- the memory configuration information (MSI) stored in the PB 1023 of the nonvolatile memory bank 113 is read (S502).
- the multiplexing unit 237 sets the page size (4 kBytes) in the memory configuration information as the multiplexing unit size (S503).
- the CPU unit 230C starts downloading musical tone data from the Internet 310 in response to a user download instruction input via the input / output unit 210C (S504).
- the information downloaded from the Internet has a format consisting of a header and musical sound data as shown in FIG.
- the header includes a tone data length, recording data characteristic information RDI, and the like.
- the recording data characteristic information is allocated to the last LSN of CL130943 (S505), and the recording data characteristic information is written by the write instruction information via the driver unit 250 (S506).
- the nonvolatile storage module 100C writes the transferred recording data characteristic information to the last PSN of P255 of PB1022 of the nonvolatile memory bank 113 by the data read / write unit 150C.
- the address management unit 155 searches for another free physical block, rewrites the free block, and discusses the free block. It will be registered in the object conversion table. Such replacement of the physical block is performed for each of the nonvolatile memory banks 110 to 113. In other words, it is assumed that physical block substitution is not performed between different nonvolatile memory banks.
- the multiplexing unit 237 of the CPU unit 230C multiplexes and allocates the musical sound data in the logical address space by the parallel number (4 parallels) for each multiplexing unit size (4 kBytes) (S507). ). Then, the multiplexing unit 237 passes the multiplexed tone data to the file system unit 236. The file system unit 236 allocates the multiplexed musical tone data to the logical address space.
- the first allocation destination of the musical sound data is CL128. However, as long as it is an empty cluster, any destination cluster may be used.
- FIG. 37 is a bitmap showing musical tone data write instruction information.
- FIG. 36B is an explanatory diagram showing the storage states of the nonvolatile memory banks 110 to 113 after the musical sound data is written.
- the musical sound data is stored in PB1 to PB704 of the nonvolatile memory banks 110 to 113, and the recording data characteristic information is stored in the PB1022 of the nonvolatile memory bank 113.
- management information such as the FAT table and file entry is updated from the information stored in PB0 of the nonvolatile memory banks 110 to 113, it is stored in the PB 705 of the nonvolatile memory banks 110 to 113 among other free physical blocks.
- PB705 of the nonvolatile memory banks 110 to 113 among other free physical blocks.
- it is an empty physical block, it is not limited to PB705.
- the musical tone data acquired from the Internet or the like by the access module 200C is multiplexed and allocated on the logical address space based on the memory configuration information, and the musical tone data is written to the nonvolatile storage module in accordance with the allocation. I did it.
- a nonvolatile storage module that holds the musical tone data thus obtained is connected to the access module 200C.
- the timbre can be easily updated by generating a sound according to the keystrokes of the master keyboard 300.
- the musical sound data stored in the non-volatile storage module is managed as a musical sound data file by the file system unit 236. Therefore, the musical sound data must be managed and edited by a device such as a personal computer based on the same file system (FAT file system). Can do. Also, copying to other recording devices or recording media can be easily performed.
- FAT file system file system
- the musical sound data that the access module 200C writes to the nonvolatile storage module 100C is acquired from the Internet 310, but may be acquired from another device such as a personal computer.
- the tone generation of the tone generation system according to the third embodiment has the same effect as the tone generation system according to the first embodiment. Since this musical tone generation system is a system based on a general-purpose FAT file system, musical tone data can be written by the access module. Therefore, it can be said that the system is highly versatile because the user can use musical tone data rewritten according to his / her preference.
- the data writing system of the present embodiment includes a data writing module 400A and a nonvolatile memory module 100C.
- the nonvolatile memory module 100C is the same as the nonvolatile memory module 100C in the third embodiment described above.
- the data writing module 400A is obtained by extracting the data writing function of the access module 200C of the third embodiment, and includes an input / output unit 410, a CPU unit 420, and a driver unit 430 as shown in FIG.
- the CPU unit 420 includes a file system unit 236 and a multiplexing unit 237 according to the third embodiment.
- the Internet 310 is connected to the data writing module 400A, and necessary data can be downloaded according to a download instruction from the user. Since the data writing module 400A executes the data writing process of the access module 200C of the third embodiment, detailed description thereof is omitted.
- the data writing module 400A may be a personal computer or a module incorporated in a personal computer or the like.
- FIG. 39A and FIG. 39B are block diagrams showing a tone generation system according to the fifth embodiment of the present invention.
- the musical tone generation system includes a nonvolatile memory module 100E shown in FIG. 39A and an access module 200E shown in FIG. 39B.
- the nonvolatile memory module 100E includes four nonvolatile memory banks 110 to 113 provided in parallel and a data read / write unit 150E.
- the data read / write unit 150E includes a host interface 151E, a buffer unit 152, a memory interface 153, a CPU unit 154, an address management unit 155, and a buffer unit 156.
- the access module 200E includes an input / output unit 210E, signal processing units 220 and 222, a CPU unit 230E, and a driver unit 250, and can output musical sounds for 32 channels simultaneously.
- the channel numbers are CH0 to CH31.
- the musical sound data buffer 231, the channel assignment table 232, the NN table 233C, the performance data buffer 234, the transfer monitoring unit 235, the file system unit 236, the multiplexing unit 237, the CPU unit 230E includes a content identification unit 238 and an audio buffer 239. Including.
- the non-volatile memory banks 110 to 113 of the non-volatile memory module 100E are the same as in the third embodiment described above, and the relationship between the logical address space, the cluster number CLN and the logical sector number LSN, the logical sector number LSN. And the structure in the memory cell arrays 110b to 113b are the same as in the third embodiment.
- musical tone data is held in PB1 to PB704 of each nonvolatile memory bank 110 to 113.
- the CL90240 and later on the logical space and the PB705 and later on the physical space are areas where audio data and the like are written without being multiplexed by the user.
- the logical address space corresponds to PB0 to PB1022. That is, PB1023 is an area (hereinafter referred to as a system area) that cannot be read or written by specifying a logical address. This is to prevent the user from accidentally erasing, and the manufacturer can directly write by physical addressing.
- the recording format in each page in which the musical sound data is recorded is the same as in FIG. 28, and the correspondence relationship between the logical sector number LSN and the physical sector number PSN is also the same as in FIG.
- the host interface 151E is connected to the access module 200E via an external bus.
- the host interface 151E is a block that receives the tone data read instruction information from the access module 200E and transfers the tone data read from the nonvolatile memory banks 110 to 113 via the buffer unit 152 to the access module 200E.
- the read / write unit 150E has a writing function for writing the musical sound data input by the user to the nonvolatile storage module 100E as a file.
- the host interface 151E includes registers 151a and 151b.
- the register 151a is the same as that in FIG.
- the register 151b is a register for audio data and receives read instruction information.
- the buffer unit 152 and the memory interface 153 are the same as in the third embodiment.
- the CPU unit 154 is connected to the host interface 151E, the buffer unit 152, the memory interface 153, the address management unit 155, and the buffer unit 156, and is a block that controls the entire data read / write unit 150E.
- the address management unit 155 has a function of converting a logical address and a physical address, and changes a physical block or executes wear leveling when a physical block becomes a bad block during writing of musical tone data or the like.
- the address management unit 155 has a RAM therein, and holds a logical physical conversion table in the RAM.
- the buffer unit 156 is a buffer that temporarily holds audio data when the audio data is written or read.
- the performance data is generated in response to an operation such as keystroke on the external master keyboard 300, and is taken into the CPU unit 230E via the input / output unit 210E.
- the access module 200E is connected to the Internet 310, and can download necessary data in accordance with a download instruction from the user.
- the input / output unit 210E is a terminal for inputting performance data from the master keyboard 300, a musical sound generated by the signal processing unit 220, and a DA converter for digital-analog conversion of the audio data generated by the signal processing unit 222, An amplifier unit for amplifying the converted musical sound and a line-out terminal for outputting the output to the outside are included.
- the input / output unit 210E is a block that obtains musical sound data and audio data from the Internet 310 and outputs musical sounds and accompaniment sounds (audio data).
- the signal processing unit 220 is the same as that of the third embodiment.
- the signal processing unit 222 is a block that performs an expansion process when reproducing audio data.
- the decompression process may be anything as long as it is a process according to the audio data compression method. If the audio data is uncompressed, no particular decompression process is performed.
- the CPU unit 230E performs channel assignment processing on the performance data received by the input / output unit 210E, transfers read instruction information to the nonvolatile storage module 100E via the driver unit 250, and also reads the musical sound read from the nonvolatile storage module 100E. This block supplies data and part of performance data to the signal processing unit 220.
- the musical tone data buffer 231, the channel assignment table 232, the NN table 233C, the performance data buffer 234, the transfer monitoring unit 235, the file system unit 236, and the multiplexing unit 237 included in the CPU unit 230E are the same as in the third embodiment. It is.
- the content identification unit 238 included in the CPU unit 230E is a block for identifying whether externally applied data is musical tone data or audio data.
- the audio buffer 239 in the CPU unit 230E is a block for temporarily holding audio data.
- FIG. 40A is a flowchart showing normal processing of the CPU unit 154
- FIGS. 40B and 40C are flowcharts showing the interrupt processing.
- the CPU unit 154 of the nonvolatile memory module 100E performs an initialization process in S100.
- the initialization process the single port RAMs 152a and 152b in the buffer unit 152 and the registers 151a and 151b of the host interface 151E are cleared.
- the address management unit 155 reads the logical-physical conversion table stored in the PB 1023 of the nonvolatile memory bank 110 into the internal RAM.
- the nonvolatile memory module 100E notifies the access permission to the access module 200E. Thereafter, the host interface 151E notifies the completion of initialization.
- the CPU unit 230E of the access module 200E performs an initialization process in S200.
- the CPU unit 230E reads the FAT table and file entry stored in PB0 of the nonvolatile memory banks 110 to 113 to the file system unit 236, and the file system unit 236 has already been stored in the nonvolatile storage module 100E.
- the start cluster number (CL128) of the musical tone data being recorded is recognized.
- the access module 200E transfers the read instruction information of the recording data characteristic information and the memory configuration information to the nonvolatile storage module 100E.
- the CPU unit 230E reads the recording data characteristic information stored in the PB1022 of the nonvolatile memory bank 113 and the memory configuration information stored in the PB1023.
- FIG. 42A shows read instruction information for reading the memory configuration information.
- b27 to b23 indicate memory configuration information identification codes. * Is a symbol indicating that any value is acceptable.
- the CPU unit 230E resets the signal processing unit 220 and clears the dual port RAMs 231a and 231b in the musical sound data buffer 231.
- the signal processor 220 When the signal processor 220 is reset, the signal processor 220 starts counting up the program counter of the internal DSP. In the initialization process, the CPU unit 230E performs initial setting of the channel assignment table 232.
- SON is set to value 0, that is, CH0 to 31 are set as empty channels
- KON, PD, NN, TP, LD, F, SC, WE, DQ, M, and D are set to value 0
- the CPU unit 230E Upon obtaining the recording data characteristic information shown in FIG. 11, the CPU unit 230E sets the sampling period (22.7 ⁇ s) in the timer in the signal processing unit 220 and determines one period of the signal processing time slot for one sampling time. To do. This timer functions as a timer for controlling one period of the DSP in the signal processing unit 220.
- the CPU unit 230E writes one sample capacity (2 bytes) and flag assignment bit (b0) in the recording data characteristic information as parameters of the RAM in the signal processing unit 220, and in which bit position of the musical sound data the bit format shown in FIG. It is used as a parameter for determining whether it corresponds.
- the CPU unit 230E determines the channel frame of the channel assignment table 232 and the number of channels of the time slot of the signal processing unit 220 based on the maximum number of sound generation channels (32CH) in the recording data characteristic information.
- the signal processing unit 220 determines effect processing by reverb and chorus. In the illustrated case, it is determined that only reverb is performed as effect processing.
- the CPU 230E obtains the number of parallels by executing Expression (5) based on the number of buses (1) and the number of memory banks per bus (4). .
- the bit format of the LSN is determined by the obtained parallel number.
- the parallel count is 4, the number of bits of the bank select is 2, and the bit format of the LSN is as shown in FIG.
- the parallel number is 2
- the number of bits assigned to the bank select is 1 (b3), and accordingly, the page number is assigned to b11 to b4 and the PBN is assigned to b21 to b12.
- the CPU unit 230E is based on the occupied capacity per note in the recording data characteristic information shown in FIG. 11, the page size in the memory configuration information, and the number of pages TPN per physical block (in this case, 256). By executing Equation (8), the number of physical blocks required per note is calculated. Then, based on the starting cluster of the music data file system unit 236 is extracted from the file entry (CL128), determining the PBN corresponding to each of the notes from the lowest sound A -1 up sound C 7, NN shown in FIG. 32 A table 233C is generated.
- the recording data characteristic information and the memory configuration information are read, and the CPU 230E finishes the initialization process (S200) by the setting process of various parameters. Then, the process proceeds to the normal operation process S201, where the interrupt is enabled and performance data from the external master keyboard 300 is received.
- the flowchart of the CPU unit 230 includes two routines, a main routine shown in FIG. 41A and an interrupt routine shown in FIG. 41B.
- the interrupt routine is a routine started when performance data is transferred to the access module 200E by a performance operation of the master keyboard 300. If a performance operation of the master keyboard 300 is performed during the processing of the main routine, the routine immediately shifts to the interrupt routine. It is assumed that the interrupt routine can receive multiple interrupts, that is, accept the next interrupt even during the interrupt routine.
- FIG. 42B transfers the read instruction information to the nonvolatile storage module 200E in the format, and reads the desired musical sound data (S230).
- 0000 in the content identification codes of b33 to b30 indicates musical tone data.
- the operation of the signal processing unit 220 is also the same as that of the first embodiment shown in FIG.
- the signal processing unit 220 repeatedly executes signal processing every sampling period (22.7 ⁇ sec).
- the DA converter of the input / output unit 210E performs digital-analog conversion on the processed musical tone data every 22.7 ⁇ s, and outputs the result as a desired musical tone to the outside through the line-out terminal.
- the musical sound can be obtained as a piano performance through an external amplifier and speaker.
- the CPU unit 230E checks the F of all channels in the channel assignment table 232. If there is a channel with an EE value of 1 among the channels with an F value of 1, the F of the channel is cleared to a value of 0 (S203), and channel assignment processing is performed on the channel (S204).
- S205 a musical sound data read instruction
- S206 sound generation control
- a channel with a DQ value of 1 is searched. If there is, a read instruction for musical tone data of that channel is given.
- the search of the channel assignment table 232 in S207 and S202 is performed in ascending order from CH0.
- the CPU unit 154 executes three routines: a main routine shown in FIG. 40A and an interrupt routine shown in FIGS. 40B and 40C.
- the interrupt routine does not allow multiple interrupts. That is, even if there is an interrupt during interrupt routine processing, it is masked.
- the process proceeds to a normal process (S101). While the read instruction information is not transferred from the access module 200E, there is no reception by the register unit 151b, and the read instruction reception flag RR and the read command issue flag RC of the register 151a of the host interface 151E shown in FIG. Therefore, the decision branch processing of S102, S105, and S109 is continued to be executed.
- the process proceeds to step S103 to instruct the buffer unit 156 to read data. Then, it is determined whether or not the read request cluster held in the buffer unit 156 has been reached, and reading is repeated until this cluster is reached. Next, when the read request cluster is reached, the host interface 151E shifts from S430 to S431 in the main routine of FIG. 43A.
- the read instruction information includes content identification codes b33 to b30, b29 and b28 read codes, b27 to b23 CHN, and b22 to b0 LSN.
- the content identification code is a 4-bit code that can identify 16 types of content.
- the process proceeds to step S432, and reception to the register 151a is performed.
- the register 151a holds CHN and LSN of read instruction information.
- the RR corresponding to the CHN assigned to the read instruction information shown in FIG. 42B is set to a value 1 (S433).
- the process returns to S430, and S430 is looped until a data transfer instruction from the CPU unit 154, that is, a data transfer instruction from the buffer unit 152 to the access module 200E is issued.
- step S433 the CPU 154 is notified of data reception.
- the example shown in FIG. 30 is an example in which a read instruction for CH0 to CH3 is given and each flag is changed by the processing described below. Specifically, the CH0 to 3 read instruction and the issue of the read command to the nonvolatile memory banks 110 to 113 are completed, and the transfer of the musical sound data from the nonvolatile memory banks 110 and 111 to the buffer unit 152 is completed. Furthermore, only CH0 represents the time until the transfer of the musical sound data from the buffer unit 152 to the access module 200E is completed. By this operation, the value of each flag in the register 151a changes.
- the process proceeds from S102 to S103. Since the non-volatile memory banks corresponding to CH0 to CH3, that is, the non-volatile memory banks 110 to 113 are not reading the musical sound data at this time, the access flag (value 0) is notified from the memory interface 153 to the CPU unit 154. Is done. The CPU unit 154 recognizes that the corresponding nonvolatile memory bank is not being accessed by the access flag (value 0), and proceeds to S104.
- the CPU unit 154 instructs the memory interface 153 to output a read command corresponding to CH0 to the nonvolatile memory bank 110. Further, the RC of the corresponding channel of the register 151a is set to 1 (S105). The above processing is executed for the channel whose RR is 1 in the register 151a, that is, CH0 to CH3.
- the time chart of the read command issued by the data read / write unit 150E to the nonvolatile memory bank is the same as that shown in FIG.
- Command 1 is a command for notifying the start of transfer of the physical address next
- command 2 instructs reading out the musical tone data stored in the physical address in the I / O registers 110a to 113a from the memory cell arrays 110b to 113b. It is a command.
- This physical address specifies the start address (in bytes) where the tone data to be read is stored, and the tone data from the start address to the last address of the corresponding page corresponds to the I / O corresponding to the TR.
- the bank select is information corresponding to CHN as described above, encoded within the memory interface 153, and functions as four CE signals (chip enable signals) for selecting the non-volatile memory banks 110 to 113. .
- the memory interface 153 gives CE signals to the nonvolatile memory banks 110 to 113 independently via the memory bus.
- the access flag AF has a value of 1 from time t1 when the command 1 is given to time t4 when the musical sound data transfer period (TT) ends.
- S106 it is checked whether or not the corresponding nonvolatile memory bank is data ready for all the channels having the data transfer completion flag TE of 0, that is, CH0 to 3 (S107).
- Data ready indicates data ready when the data ready flag DRF managed by the memory interface 153 is 1, that is, reading of desired musical tone data from the memory cell array to the I / O register has been completed.
- the data ready flag DRF is set to the value 1 at the time t3 when the busy signal changes from the value 1 to the value 0, and the value at the time t4 when the musical sound data 512 bytes are transferred from the I / O register to the buffer unit 152. 0.
- the CE signal and read clock described above are independently input from the memory interface 153 to the nonvolatile memory banks 110 to 113 via the memory bus, and the busy signal is independently input to each of the nonvolatile memory banks 110 to 113.
- the data is input to the memory interface 153 via the memory bus.
- the CPU unit 154 shifts to an interrupt routine with the completion of the data transfer as a trigger.
- the TE of the corresponding channel of the register 151a is set to a value 1 (S121).
- the input value to the RAM switching terminal 152d of the RAM switching circuit 152c is toggled and switched (S122). For example, by changing the value from 0 to 1, the transfer destination from the memory interface 153 is switched to the single port RAM 152b, and the transfer source to the host interface 151E is switched to the single port RAM 152a.
- the CPU unit 104 notifies the host interface 151E of the CHN of the channel for which the data transfer to the buffer unit 152 has been completed, and instructs to transfer the musical tone data temporarily stored in the buffer unit 152 to the access module 200E ( S123).
- the host interface 151E shifts to S440 in FIG. 43B by an interrupt corresponding to the data transfer instruction of the CPU unit 154 in S123, and transfers the musical sound data from the buffer unit 152 to the access module 200E.
- the CHN notified by the CPU unit 154 in S123 is added to the musical sound data and transferred to the access module 200E (FIG. 17).
- the RR and TE of the corresponding channel are reset to 0 in the register 151a (S441).
- the area in which the RR of the register 151a has a value of 0 is an area released as an area for the next new read instruction information.
- RC when RR has a value of 0, RC also has a value of 0 by S109, and TE has a value of 0 by S441.
- the temporary storage of the read instruction information in the register 151a is used in order from the uppermost area, and is used so as to return to the uppermost again when reaching the lowermost stage, that is, cyclically.
- the access module 200E When receiving the musical tone data from the host interface 151E, the access module 200E temporarily stores the musical tone data in the area of the musical tone data buffer 231 corresponding to the CHN added to the musical tone data.
- the subsequent processing of the access module 200E is as described above.
- the transfer time of the musical sound data to / from the buffer unit 152 is about 12.8 ⁇ s according to the equation (17).
- the reading instruction is audio data reading (step S211 in FIG. 41A)
- the content identification code is 0001
- the process proceeds to an interrupt routine.
- the input value to the RAM switching terminal 152d of the RAM switching circuit 152c is toggled and switched (S131). For example, by changing the value from 0 to 1, the transfer destination from the memory interface 153 is switched to the single port RAM 152b, and the transfer source to the host interface 151E is switched to the single port RAM 152a. Thereafter, the CPU unit 154 instructs the host interface 151E to transfer the audio data temporarily stored in the buffer unit 156 to the access module 200E (S132).
- the audio data read from the nonvolatile storage module 100E by the read instruction is buffered by the audio buffer 239.
- the signal processing unit 222 decodes the audio data and outputs it as an accompaniment sound via the input / output unit 210E.
- the buffering control in the audio buffer 239 and the decoding process in the signal processing unit 222 can be realized by a general technique, and thus detailed description is omitted.
- the tone generation system of the present embodiment can be applied as a tone generation system for electronic musical instruments.
- FIG. 44 is a flowchart showing the musical sound data and audio data writing process of the access module 200E.
- FIG. 45 is an explanatory diagram showing file allocation of musical tone data acquired from the Internet 310.
- the access module 200E performs a physical format to erase the data stored in the nonvolatile storage module 100E (S530).
- the file system unit 236 With the physical format, the file system unit 236 logically erases the logical address space once, and transfers an erase instruction to the nonvolatile storage module 100E via the driver unit 250. A detailed description of the specification of the erasure instruction is omitted.
- L22 b22 to b13 and PSN b20 to b11 in FIG. 29 correspond one to one.
- PB0 to PB1022 of the non-volatile memory banks 110 to 113 are physically erased by the erase instruction described above.
- PB1023 is not physically erased because it is outside the logical address range.
- a FAT table indicating that the physical blocks PB0 to P1022 have been erased is recorded in PB0 (S531).
- FIG. 46A is an explanatory diagram showing the storage state of the nonvolatile memory banks 110 to 113 before the musical sound data is written.
- PB0 of the non-volatile memory banks 110 to 113 stores a FAT table for managing that all normal areas have been logically erased by writing after the physical format (S530) described above. ing. Accordingly, PB1 to PB1022 of the nonvolatile memory banks 110 to 113 are all erased.
- the content identification unit 238 of the CPU unit 230E identifies whether the user's download instruction acquired via the input / output unit 210E is a musical sound data download instruction or an audio data download instruction (S532).
- the process proceeds to S533, and the memory configuration information (MSI) stored in the PB1023 of the nonvolatile memory bank 113 is read.
- the multiplexing unit 237 calculates the page size (4 kByte) in the memory configuration information as the multiplexing unit size (S534).
- the CPU unit 230E starts downloading musical sound data from the Internet 310 in response to a user download instruction input via the input / output unit 210E (S535).
- the information downloaded from the Internet is in the form of a header and musical sound data as shown in FIG.
- the header includes a tone data length, recording data characteristic information RDI, and the like. Therefore, the recording data characteristic information (RDI) is allocated to the last LSN of CL130943 (S536), and the recording data characteristic information is written by the write instruction information via the driver unit 250 (S537).
- RDI recording data characteristic information
- the nonvolatile memory module 100E writes the transferred recording data characteristic information to the last PSN of P255 of PB1022 of the nonvolatile memory bank 113 by the data read / write unit 150E.
- the address management unit 155 searches for another free physical block, rewrites the free block, and discusses the free block. It will be registered in the object conversion table. Such replacement of the physical block is performed for each of the nonvolatile memory banks 110 to 113. In other words, it is assumed that physical block substitution is not performed between different nonvolatile memory banks.
- the multiplexing unit 237 of the CPU unit 230E multiplexes and allocates the musical sound data to the logical address space by the number of parallel units (4 parallels) for each multiplexing unit size (4 kBytes) (S538). ). Then, the multiplexing unit 237 passes the multiplexed tone data to the file system unit 236. The file system unit 236 allocates the multiplexed musical tone data to the logical address space.
- the first allocation destination of the musical sound data is CL128. However, as long as it is an empty cluster, any destination cluster may be used.
- FIG. 47 is a bit map showing musical tone data write instruction information.
- the FAT table is written (S540) and the file entry is written (S541) in order to register the musical tone data and the recording data characteristic information corresponding to the musical tone data as one musical tone data file as a set.
- FIG. 46B is an explanatory diagram showing the storage states of the nonvolatile memory banks 110 to 113 after the musical sound data is written.
- the musical sound data is stored in PB1 to PB704 of the nonvolatile memory banks 110 to 113, and the recording data characteristic information is stored in the PB1022 of the nonvolatile memory bank 113.
- management information such as the FAT table and file entry is updated from the information stored in PB0 of the nonvolatile memory banks 110 to 113, it is stored in the PB 705 of the nonvolatile memory banks 110 to 113 among other free physical blocks.
- PB705 of the nonvolatile memory banks 110 to 113 among other free physical blocks.
- it is an empty physical block, it is not limited to PB705.
- the downloaded audio data is passed to the file system unit 236 without being multiplexed.
- the file system unit 236 allocates the audio data to the logical address space as shown in FIG. 45 (S551).
- the allocation destination at the beginning of the audio data is CL90240 next to the musical sound data.
- any location may be used as the leading cluster.
- the CPU unit 230E writes audio data through the driver unit 250 according to the write instruction information (FIG. 47) (S552).
- the host interface 151E receives write instruction information in the audio data register 151b.
- the data read / write unit 150E writes and reads audio data via a buffer unit 156 provided exclusively for audio data.
- the read / write unit 150E writes the FAT table (S553) and the file entry (S554) in order to register the written audio data as an audio data file.
- the read / write unit 150E writes the FAT table (S553) and the file entry (S554) in order to register the written audio data as an audio data file.
- the musical tone data acquired from the Internet or the like by the access module 200E is multiplexed and allocated on the logical address space based on the memory configuration information, and the musical tone data is written to the nonvolatile storage module along with the allocation. I did it. Audio data is also acquired from the outside and written to the nonvolatile module.
- the content identification unit 238 identifies whether the data acquired from the Internet or the like is musical tone data or audio data, and the file system unit 236 multiplexes and manages the musical tone data on the logical address space accordingly, and manages the audio data. Management was done without multiplexing on the logical address space. That is, since the storage format for determining whether or not to multiplex is varied depending on the content type, the storage capacity of the nonvolatile storage module 100E can be used reasonably. A non-volatile storage module holding the musical tone data and audio data obtained in this way is connected to the access module 200E. Then, by generating sound according to the keystrokes of the master keyboard 300, the tone color can be easily updated and the audio data can be reproduced. That is, the musical sound generation system of the present embodiment can be applied to an electronic musical instrument that uses audio data as an accompaniment sound.
- the musical sound data stored in the non-volatile storage module is managed as a musical sound data file by the file system unit 236. Therefore, the musical sound data must be managed and edited by a device such as a personal computer based on the same file system (FAT file system). Can do. Also, copying to other recording devices or recording media can be easily performed.
- FAT file system file system
- the musical sound data that the access module 200E writes to the nonvolatile storage module 100E is acquired from the Internet 310, but may be acquired from another device such as a personal computer.
- the musical sound generation system shown in the present embodiment has the same effect as the first embodiment with respect to the reproduction of musical sound data.
- the tone generation system in the fifth embodiment is a system based on the FAT file system.
- the FAT file system is a general-purpose file system, and musical sound data and audio data can be written by an access module. Therefore, it can be said that the system is highly versatile because the musical sound data and audio data rewritten according to the user's preference can be used.
- the nonvolatile storage module 100E may be a removable storage device such as a memory card, or a memory unit incorporated in a device such as an electronic musical instrument.
- the access module 200E may be a device such as an electronic musical instrument, or may be an access circuit unit incorporated in a device such as an electronic musical instrument.
- the musical sound generation system is a system assuming that audio data is used as an accompaniment sound of a performance sound (musical sound) by the master keyboard 300, but the audio data is a minus one source, that is, one musical instrument.
- the audio source does not contain only sound (eg piano).
- audio data is acquired from the Internet 310, but the audio data may be acquired from a commercially available medium such as a CD or a hard disk.
- the audio data is not multiplexed, but may be multiplexed as long as the storage capacity of the nonvolatile storage module 100E is not wasted.
- nonvolatile storage module 100E may be a removable storage device such as a memory card, or may be a memory unit incorporated in a device such as an electronic musical instrument.
- the access module 200E may be a device such as an electronic musical instrument, or may be an access circuit unit incorporated in a device such as an electronic musical instrument.
- FIG. 48 is a block diagram showing an access module of the tone generation system according to the sixth embodiment of the present invention.
- the musical tone generation system of the sixth embodiment is a karaoke data set acquired from the Internet 310, that is, performance data, background image data, and text data for lyrics. And the point that music data can be used as a karaoke source is different.
- the performance data corresponds to the performance data acquired from the master keyboard 300 in the musical tone generation system according to the fifth embodiment.
- This musical tone generation system includes a nonvolatile memory module 100E and an access module 200F shown in FIG.
- the nonvolatile memory module 100E is the same as that of the fifth embodiment.
- the register 151b holds karaoke data read instruction information
- the buffer unit 156 is used as a karaoke data buffer.
- the access module 200F includes an input / output unit 210F, a signal processing unit 224, a CPU unit 230F, and a driver unit 250.
- the input / output unit 210F is a block that obtains the karaoke data set described above from the Internet 310 and outputs musical sounds, background images, lyrics, and the like.
- the signal processing unit 224 is a block that performs decompression processing and conversion processing when image data and text data are compressed.
- the decoding process may be anything as long as it is a process according to the image data compression method. If the image data is uncompressed, no decompression process is performed.
- the blocks 231 to 238 of the CPU unit 230F are the same as those in the fifth embodiment, and further include a karaoke buffer 240.
- the karaoke buffer 240 temporarily holds data excluding musical tone data in the karaoke data set.
- the musical tone generation system according to the sixth embodiment of the present invention configured as described above will be described.
- the basic operation is the same as that of the fifth embodiment.
- the musical sound data is multiplexed and stored, and the audio data is stored without being multiplexed.
- musical sound data is multiplexed and stored, and performance data, image data, and text data are stored without being multiplexed.
- FIG. 49 is a flowchart showing the writing process of the karaoke data set of the access module 200F.
- S530 to S541 are the same as those in FIG.
- the content identifying unit 238 identifies the musical sound data and other data based on the content identification code shown in FIG. 42C.
- the musical sound data is multiplexed and allocated in the same manner as in the fifth embodiment, and the karaoke data is allocated and written without being multiplexed to the logical address in steps S560 to S564, and managed by the FAT file system.
- Other processes are the same as those in the fifth embodiment.
- FIG. 50 is a flowchart showing a main routine of the CPU unit 230F.
- the interrupt routine of the CPU unit 230F is the same as the interrupt routine of FIG. 41B.
- S200 to S208 are the same as those in FIG. 41A.
- S215 when there is a reproduction instruction from the user (S214), an instruction to read out a karaoke data set other than the musical sound data is given (S215).
- a karaoke data set acquired from the Internet 310 that is, performance data, background image data, lyrics text data, and musical tone data can be used as a karaoke source.
- each of the nonvolatile memory banks 110 to 113 is one flash memory (chip).
- the nonvolatile memory banks 110 to 113 are nonvolatile.
- Memory banks 110 and 111 are built in one flash memory 131, and nonvolatile memory banks 112 and 113 are built in one flash memory 132.
- the data read / write unit 160A includes a memory interface 161 in addition to the host interface 151E, the buffer units 152 and 156, the CPU unit 154, and the address management unit 155 described above.
- the musical tone generation system according to the seventh embodiment corresponds to the latter.
- the non-volatile memory banks 110 and 111 included in the flash memory 131 and the non-volatile memory banks 112 and 113 included in the flash memory 132 can independently read the musical sound data as in the first embodiment.
- the difference from the fifth embodiment is that the number of flash memory chips is two, so the number of CE signals, read clocks, and busy signals connected to the memory interface 161 via the memory bus is two. It becomes one by one.
- b3 in the LSN bit format shown in FIG. 29, that is, the LSB of the bank select, is added to the higher order of b22 of the LSN (b22 to b13) and used as the physical block address of the flash memory 131 or the flash memory 132.
- B4 in the bit format, that is, the MSB of the bank select is encoded inside the memory interface 161 and used as two CE signals.
- the busy signal of the flash memory 131 is shared by the nonvolatile memory banks 110 and 111.
- the data ready flags of the nonvolatile memory banks 110 and 111 may be generated by the busy signal.
- the busy signal of the flash memory 132 is shared by the nonvolatile memory banks 112 and 113.
- the data ready flag for each of the nonvolatile memory banks 112 and 113 may be generated by the busy signal.
- the access flag may be controlled so as to have a value of 1 during the period from the command 1 to the end of the musical sound data transfer period (TT), as in the first embodiment.
- the musical tone generation system according to the seventh embodiment operates in the same manner as the musical tone generation system according to the fifth embodiment, so that the sound generation delay time is shorter than the allowable range of 1 ms. Things will be possible. That is, even when a large-capacity multi-level NAND flash memory which is currently mainstream is used as a memory for musical tone data and karaoke data, a low-priced and small musical tone signal generator can be realized.
- the content identification unit 238 identifies whether or not the karaoke data set acquired from the Internet or the like is music data, and the file system unit 236 multiplexes and manages the music data on the logical address space accordingly. Data other than data is managed without being multiplexed in the logical address space. That is, since the storage format for determining whether or not to multiplex is varied according to the content type, the storage capacities of the nonvolatile storage modules 100E, 100F, and 100G can be rationally used. That is, the musical tone generation system of the present embodiment can be applied to a karaoke apparatus.
- the karaoke data set is acquired collectively from the Internet 310, some data such as musical tone data is stored in advance in the nonvolatile storage modules 100E, 100F, 100G and the like on the manufacturer side, and the remaining data is stored from the Internet 310. You may make it acquire.
- the karaoke data set is acquired from the Internet 310.
- the karaoke data set may be acquired from a commercial medium such as a CD or a hard disk.
- MIDI data may be used as performance data.
- karaoke data sets other than musical sound data are not multiplexed, they may be multiplexed as long as the storage capacity of the nonvolatile memory module is not wasted.
- nonvolatile storage module 100E may be a removable storage device such as a memory card, or may be a memory unit incorporated in a device such as a karaoke device.
- the access module 200F may be a karaoke device or an access circuit unit incorporated in the karaoke device.
- the musical sound generation system includes a nonvolatile memory module 100H shown in FIG. 52A and an access module 200H shown in FIG. 52B.
- the nonvolatile memory module 100H includes four nonvolatile memory banks 110 to 113 provided in parallel and a data read / write unit 150H.
- the data read / write unit 150H includes a host interface 151, a buffer unit 152, a memory interface 153, a CPU unit 154, and an address management unit 155.
- the access module 200H includes an input / output unit 210H, a signal processing unit 220, a CPU unit 230H, and a driver unit 250, and can output musical sounds for 32 channels simultaneously.
- the channel numbers are CH0 to CH31.
- the CPU unit 230H includes a musical sound data buffer 231, a channel assignment table 232, an NN table 233C, a performance data buffer 234, a transfer monitoring unit 235, a file system unit 236, a multiplexing unit 237, a file editing unit 242, and a sampling unit 243.
- nonvolatile memory banks 110 to 113 of the nonvolatile memory module 100H are the same as those in the third embodiment described above.
- the relationship between the logical address space, the cluster number CLN, and the logical sector number LSN, and the structure of the logical sector number LSN and the memory cell arrays 110b to 113b are the same as in the third embodiment.
- the LSN bit format shown in FIG. 29 is an example in which the parallel number of the nonvolatile memory banks is 4, and the number of bits allocated to the bank select may be changed depending on the parallel number.
- the parallel number is 2
- the number of bits assigned to the bank select is 1 (b3)
- the page number is assigned to b11 to b4
- the LBN is assigned to b21 to b12.
- the intra-page sector selection bit is a bit corresponding to a quotient obtained by dividing a page by a sector size.
- the page size is set to 4096 + 128 bytes and the sector size is set to 512 bytes, that is, a page is divided into 8 sectors as shown in FIG. Select by 3 bits.
- the page size and sector size need not be limited to the above-described values, and the in-page sector selection bit may be variable according to the values.
- the host interface 151, buffer unit 152, memory interface 153, CPU unit 154, and address management unit 155 in the data read / write unit 150H are the same as those in the third embodiment shown in FIGS. 26A and 26B.
- the performance data is generated in response to an operation such as keystroke on the external master keyboard 300, and is taken into the CPU unit 230H via the input / output unit 210H.
- the access module 200H is connected to a microphone 320 for recording sound, a data storage module 330, and a hard disk 340, and can record necessary data according to a sound recording instruction from the user.
- the input / output unit 210H is a terminal for inputting performance data from the master keyboard 300, a DA converter for digital-to-analog conversion of the musical sound generated by the signal processing unit 220, an amplifier unit for amplifying the converted musical sound, and its output A line-out terminal for outputting to the outside, a microphone input terminal, and a hard disk interface.
- the signal processing unit 220 is the same as that of the third embodiment.
- the signal processing unit 220 includes a digital signal processor (hereinafter referred to as DSP), a ROM storing the DSP program, a delay element necessary for effector processing, or a RAM necessary for temporarily storing parameters. Is done.
- DSP digital signal processor
- the CPU section 230H performs channel assignment processing on the performance data received by the input / output section 210H, transfers read instruction information to the nonvolatile storage module 100H via the driver section 250, and also reads the musical sound read from the nonvolatile storage module 100H. This block supplies data and part of performance data to the signal processing unit 220.
- the file system unit 236 in the CPU unit 230H is for managing musical tone data as files. Details of the file system unit 236 will be described later.
- the multiplexing unit 237 in the CPU unit 230H multiplexes the musical sound data when writing the musical sound data as a file. Details of the multiplexing unit 237 will be described later.
- the file editing unit 242 in the CPU unit 230H is for editing and managing the musical sound data as a file. Details of the file editing unit 242 will be described later.
- the sampling unit 243 in the CPU unit 230H samples the data recorded from the microphone and records it in the data storage module 330.
- a manufacturer's writing device for example, a device such as a personal computer conforming to the FAT file system, physically formats the nonvolatile storage module 100H. Thereafter, as shown in FIG. 27A, management information such as FAT and root directory entry is allocated to the management information area (CL0, CL1) in the logical address space by the writing device, and musical tone data is stored in the normal area after the cluster CL2. Allocate.
- management information such as FAT and root directory entry is allocated to the management information area (CL0, CL1) in the logical address space by the writing device, and musical tone data is stored in the normal area after the cluster CL2. Allocate.
- the following writing process is the same as that of the third embodiment.
- the characteristic information of the piano musical tone data recorded in the nonvolatile storage module 100H is recorded data characteristics.
- the information is written as information (RDI), and the memory configuration information (MSI) of the nonvolatile memory module 100H is written in the last page of the physical block PB1023.
- the recording data characteristic information and the memory configuration information are the same as in the third embodiment.
- the tone generation system of the present embodiment can be applied as a tone generation system for electronic musical instruments.
- FIG. 53 is a flowchart showing the musical sound data writing process of the access module 200H.
- FIG. 54 is an explanatory diagram showing file allocation of a sound material file group.
- the logical address space is logically erased once by the physical format, and the file system unit 236 transfers an erase instruction to the nonvolatile storage module 100H via the driver unit 250.
- a detailed description of the specification of the erasure instruction is omitted.
- L22 b22 to b13 and PSN b20 to b11 in FIG. 29 correspond one to one.
- PB0 to PB1022 of the non-volatile memory banks 110 to 113 are physically erased by the erase instruction described above.
- PB1023 is not physically erased because it is outside the logical address range.
- FAT or the like indicating that the physical blocks PB0 to P1022 have been erased is recorded in PB0 (S601).
- FIG. 55A is an explanatory diagram showing the storage state of the nonvolatile memory banks 110 to 113 before the musical sound data is written.
- PB0 of the non-volatile memory banks 110 to 113 stores FAT or the like for managing that all normal areas have been logically erased by writing after the physical format (S600) described above. Yes. Accordingly, PB1 to PB1022 of the nonvolatile memory banks 110 to 113 are all erased.
- the multiplexing unit 237 sets the page size (4 kBytes) in the memory configuration information as the multiplexing unit size (S603).
- the user plays a piano or the like one by one and records sound material data using the microphone 320.
- the sampling unit 243 of the CPU unit 230H samples the piano sound via the input / output unit 210H.
- the file editing unit 242 once holds the sampled data in the data storage module 330 as a sound material file group, and further transfers and stores the data in the hard disk 340 (S604).
- the sound material file is composed of sound data and metadata, and the metadata indicates sound attribute information.
- the sound material files are recorded for each of the 88 keys ranging from the lowest to the highest sound of the piano. To do.
- This file is preferably in the WAVE file format so that it can be easily edited on a PC or the like.
- a pitch name code (lowest sound A ⁇ 1 to highest sound C 7 ) is assigned to each metadata of the sound material file group (S605). Further, the recording data characteristic information shown in FIG. 56 is set (S606). More specifically, in the remarks column of FIG. 56, the parameter of the part clearly specified as “user set” or “CPU unit 230H automatically set” is set. The other parameters are set in the sound material file metadata at the time of recording and are determined based on the memory configuration information. Next, the CPU unit 230H allocates the recording data characteristic information to the last LSN of the CL 130943 (S607), and writes the recording data characteristic information by the writing instruction information via the driver unit 250 (S608).
- the nonvolatile storage module 100H writes the transferred recording data characteristic information to the last PSN of P255 of PB1022 of the nonvolatile memory bank 113 by the data read / write unit 150H.
- the address management unit 155 searches for another free physical block, rewrites the free block, and discusses the free block. It will be registered in the object conversion table. Such replacement of the physical block is performed for each of the nonvolatile memory banks 110 to 113. In other words, it is assumed that physical block substitution is not performed between different nonvolatile memory banks.
- the multiplexing unit 237 of the CPU unit 230H reads the sound material file group from the hard disk 340 in order from the lowest sound (S609). Then, as shown in FIG. 54, the multiplexing unit 237 stores the musical sound data corresponding to the parallel number (4 parallels) for each multiplexing unit size (4 kBytes) except for the metadata of each sound material file, that is, only data corresponding to the sound. Are allocated in the logical address space (S610). Then, the multiplexing unit 237 passes the multiplexed tone data to the file system unit 236. The file system unit 236 allocates the multiplexed musical sound data to the logical address space. In FIG. 54, for the sake of simplicity, the first allocation destination of the musical sound data is CL128.
- the CPU 230H writes the musical sound data using the write instruction information via the driver 250 (S611).
- FIG. 55B is an explanatory diagram showing the storage states of the nonvolatile memory banks 110 to 113 after the musical sound data is written.
- the musical sound data is stored in PB1 to PB704 of the nonvolatile memory banks 110 to 113, and the recording data characteristic information is stored in the PB1022 of the nonvolatile memory bank 113.
- management information such as FAT and file entry is updated from the information stored in PB0 of the non-volatile memory banks 110 to 113, it is stored in the PB 705 of the non-volatile memory banks 110 to 113 among other free physical blocks. Is done. In addition, if it is an empty physical block, it is not limited to PB705.
- sound material is recorded from a sound source such as a piano or guitar prepared by the user, multiplexed as musical sound data on the logical address space based on the memory configuration information through the access module 200H, and further allocated.
- the musical sound data was written in the non-volatile memory module with the allocation. In this way, a musical sound data file can be generated from the sound material file group.
- the nonvolatile memory module that holds the musical tone data thus obtained is connected to the access module 200H. Then, by generating sound according to the keystrokes of the master keyboard 300, it is possible to generate a desired musical sound based on the generated musical sound data file. Furthermore, since the access module 200H has a sampling function, it is possible to sample sound from the outside.
- the musical sound data stored in the non-volatile storage module is managed as a musical sound data file by the file system unit 236. Therefore, the musical sound data must be managed and edited by a device such as a personal computer based on the same file system (FAT file system). Can do. Also, copying to other recording devices or recording media can be easily performed.
- FAT file system file system
- the recording capacity of the non-volatile storage module 100H is sufficiently large, a plurality of musical sound data files can be held, and a musical sound can be generated by reading data from one of the files according to the performance of the master keyboard. it can.
- the sound generation delay time can be made shorter than the allowable range of 1 ms, Even when a large-capacity multi-level NAND flash memory is used as a memory for musical tone data, a low-priced and small musical tone signal generator can be realized.
- the musical tone generation system has the following effects in addition to the effects of the first and third embodiments. Since this embodiment is a system based on a general-purpose FAT file system, musical tone data can be written by the access module. Therefore, it can be said that the system is highly versatile because the user can use musical tone data rewritten according to his / her preference.
- the non-volatile storage module 100H may be a removable storage device such as a memory card, or a memory unit incorporated in a device such as an electronic musical instrument.
- the access module 200H may be a device such as an electronic musical instrument, or may be an access circuit unit incorporated in a device such as an electronic musical instrument.
- the sound from the microphone 320 is sampled and recorded once in the data storage module 330 and transferred to the hard disk 340 to form a sound material file group.
- the hard disk itself may be used as the data storage module.
- sampling data may be temporarily stored by using an empty area of the nonvolatile storage module 100H as a data storage module.
- the musical sound data file generation system includes a musical sound data file generation module 400B shown in FIG. 57 and the non-volatile storage module 100H according to the eighth embodiment described above.
- the musical sound data file generation module 400B extracts the function for writing data from the access module 200H of the eighth embodiment, and executes only the data writing process of the access module 200H.
- the musical sound data file generation module 400B includes an input / output unit 410, a CPU unit 420, and a driver unit 430 as shown in FIG.
- the CPU unit 420 includes a file system unit 236, a multiplexing unit 237, and a file editing unit 242 according to the eighth embodiment.
- the musical sound data file generation module 400B is connected to a data storage module 500 in addition to the hard disk 340, and can record necessary data according to a sound source recording instruction from the user.
- the data storage module 500 is, for example, a linear PCM recorder, and is a system that samples and records sounds such as instrument sounds in advance and stores them as sound material files.
- the data storage module 500 includes a nonvolatile memory such as a flash memory.
- a removable recording medium such as a semiconductor memory card may be mounted.
- a data storage module 500 and a hard disk 340 are connected to the musical sound data file generation system, and a sound material file recorded in the data storage module 500 is copied to the hard disk 340 via the input / output unit 410. Yes.
- the sound material file group sampled by the data storage module 500 is copied from the data storage module 500 to the hard disk 340 (S624).
- the sound material file group is recorded for two types of keys, that is, a strong key and a weak key for 88 keyboards ranging from the lowest sound to the highest sound of the piano.
- This file is preferably in the WAVE file format so that it can be easily edited on a PC or the like.
- the data storage module 500 may be a simple storage device that does not have a sampling function, and sound materials sampled by a linear PCM recorder or the like may be stored in advance in the storage device.
- the storage device of the data storage module 500 may use a partial area of the nonvolatile storage module as it is. Thereby, the temporary storage and editing of the sound material file group in the hard disk 340 can be performed by the nonvolatile storage module 100H. However, in this case, since it is necessary to store the sound material file group and the musical sound data file at the same time, it is necessary to secure a sufficient capacity in advance in the nonvolatile storage module 100H.
- nonvolatile storage module 100H may be a removable storage device such as a memory card, or a memory unit incorporated in a data editing device such as a personal computer (PC).
- the musical sound data file generation module 400B may be a data editing device such as a PC, or may be a data editing circuit unit incorporated in the data editing device.
- FIG. 59 is a block diagram showing a non-volatile storage module 100J of the tone generation system according to the tenth embodiment of the present invention.
- the access module is the same as that of the above-described eighth embodiment, and only the nonvolatile memory module is different.
- each of the nonvolatile memory banks 110 to 113 is one flash memory (chip), but in the nonvolatile memory module 100J of the present embodiment,
- the non-volatile memory banks 110 and 111 are built in one flash memory 131, and the non-volatile memory banks 112 and 113 are built in one flash memory 132.
- the data read / write unit 160B has a memory interface 162 in addition to the host interface 151, the buffer units 152 and 126, the CPU unit 154, and the address management unit 155 described above.
- the tone generation system according to the tenth embodiment corresponds to the latter.
- the non-volatile memory banks 110 and 111 included in the flash memory 131 and the non-volatile memory banks 112 and 113 included in the flash memory 132 can independently read the musical sound data as in the first embodiment.
- the difference from the first embodiment is that there are two flash memory chips, so the number of CE signals, read clocks and busy signals connected to the memory interface 162 via the memory bus is two. It becomes one by one.
- b3 in the LSN bit format shown in FIG. 29, that is, the LSB of the bank select, is added to the higher order of b22 of the LSN (b22 to b13) and used as the physical block address of the flash memory 131 or the flash memory 132.
- B4 in the bit format, that is, the MSB of the bank select is encoded inside the memory interface 162 and used as two CE signals.
- the busy signal of the flash memory 131 is shared by the nonvolatile memory banks 110 and 111.
- the data ready flags of the nonvolatile memory banks 110 and 111 may be generated by the busy signal.
- the busy signal of the flash memory 132 is shared by the nonvolatile memory banks 112 and 113.
- the data ready flag for each of the nonvolatile memory banks 112 and 113 may be generated by the busy signal.
- the access flag may be controlled so as to have a value of 1 during the period from the command 1 to the end of the musical sound data transfer period (TT), as in the first embodiment.
- the tone generation system according to the tenth embodiment operates in the same manner as the tone generation system according to the eighth embodiment, so that the sound generation delay time is shorter than the permissible range of 1 msec. Things will be possible. That is, even when a large-capacity multi-level NAND flash memory which is currently mainstream is used as musical tone data, it is possible to realize a low-priced and small musical tone signal generator.
- the musical tone generation system includes a nonvolatile memory module 100K shown in FIG. 60A and an access module 200K shown in FIG. 60B.
- the nonvolatile memory module 100K includes four nonvolatile memory banks 110 to 113 provided in parallel and a data read / write unit 150K.
- the data read / write unit 150K includes a read performance notification unit 157 in addition to the host interface 151, the buffer unit 152, the memory interface 153, the CPU unit 154, and the address management unit 155.
- the access module 200K includes an input / output unit 210, a signal processing unit 220, a CPU unit 230K, and a driver unit 250, and can output musical sounds for 32 channels simultaneously.
- the CPU unit 230K includes a tone generation data buffer 231, a channel assignment table 232, an NN table 233 C, a performance data buffer 234, a transfer monitoring unit 235, a file system unit 236, a multiplexing unit 237, and a tone generation channel number determination unit 245. is doing.
- the read performance notification unit 157 holds the performance when reading data from the nonvolatile storage module 100K in the internal ROM.
- the read performance is, for example, a value of “random read rate in 512-byte units (hereinafter referred to as RR512)”, and this information is notified to the access module 200K.
- the sound generation channel number determination unit 245 in the CPU unit 230K determines the number of sound generation channels so that the sound generation delay time is a predetermined time or less, here 1 msec or less, according to the reading performance of the nonvolatile storage module 100K. .
- the determined number of channels is the number of usable frames in the channel assignment table 232.
- the read performance notification unit 157 holds a value of “random read rate in units of 512 bytes (hereinafter referred to as RR512)” in the internal ROM in advance.
- RR512 is a value that can be calculated using parameters of the memory configuration information shown in FIG.
- the parallel number is obtained by the following equation (19).
- Number of parallels number of buses ⁇ number of memory banks per bus (19)
- RR512 is obtained by the following equation (20).
- RR512 ⁇ sector size / (TR + TT) ⁇ ⁇ parallel number (20)
- the parallel number is, for example, a value of 4, the value of RR512 is about 32 MByte / second. This value is stored in the ROM in the read performance notification unit 157.
- the CPU unit 154 of the nonvolatile memory module 100K performs an initialization process in S100.
- the initialization process the single port RAMs 152a and 152b in the buffer unit 152 and the register 151a of the host interface 151 are cleared.
- the address management unit 155 reads the logical-physical conversion table stored in the PB 1023 of the nonvolatile memory bank 110 into the internal RAM.
- the nonvolatile memory module 100K notifies the access permission to the access module 200K. Thereafter, the host interface 151 notifies the completion of initialization.
- the CPU unit 230K of the access module 200K performs an initialization process in S200.
- the CPU unit 230K reads the FAT table and the file entry stored in PB0 of the nonvolatile memory banks 110 to 113 to the file system unit 236, and the file system unit 236 has already been stored in the nonvolatile storage module 100K.
- the start cluster number (CL128) of the musical tone data being recorded is recognized.
- the access module 200K transfers a read instruction for recording data characteristic information, memory configuration information, and read performance information to the nonvolatile storage module 100K.
- the CPU unit 230K reads the recording data characteristic information stored in the PB1022 of the nonvolatile memory bank 113 and the memory configuration information stored in the PB1023.
- FIG. 15A shows a read instruction for reading the memory configuration information.
- b27 to b23 indicate memory configuration information identification codes. * Is a symbol indicating that any value is acceptable.
- the read performance notification unit 157 notifies the access module 200K of the read performance information RR512 stored in the internal ROM, here 32 MByte / second.
- the CPU unit 230K resets the signal processing unit 220 and clears the dual port RAMs 231a and 231b in the musical sound data buffer 231.
- the signal processor 220 starts counting up the program counter of the internal DSP.
- the CPU unit 230K performs initial setting of the channel assignment table 232.
- the CPU unit 230K When acquiring the recording data characteristic information shown in FIG. 11, the CPU unit 230K sets the sampling period (22.7 ⁇ s) in the timer in the signal processing unit 220, and determines one period of the signal processing time slot of one sampling time. To do. This timer functions as a timer for controlling one period of the DSP in the signal processing unit 220.
- the CPU unit 230K writes one sample capacity (2 bytes) and flag assignment bit (b0) in the recording data characteristic information as parameters of the RAM in the signal processing unit 220, and in which bit position in the bit format shown in FIG. It is used as a parameter for determining whether it corresponds.
- the sound generation channel number determination unit 245 executes Expression (21) based on the read performance information RR512 acquired from the nonvolatile storage module 100K and the sampling period and one sample capacity in the already acquired recording data characteristic information RDI. Determine the maximum number of sound channels.
- Maximum number of sound generation channels RR512 / (1 sample capacity / sampling period) (21)
- “1 sample capacity / sampling period” is a rate necessary for sound generation processing per sound generation channel.
- FIG. 61 is an explanatory diagram showing the relationship between the read performance information, the maximum number of sounding channels, and the number of sounding channels.
- the sound channel number determination unit 245 determines the following equation (22) based on TR and TT in the memory configuration information, the maximum sound channel number obtained by Equation (21), and the parallel number obtained by Equation (19). ) To obtain the sound generation delay time per parallel.
- Delay time per parallel [ ⁇ (TR + TT) ⁇ maximum number of sound channels ⁇ / number of parallel] ⁇ (1 + 0.2) (22)
- the sound generation delay time is about 678 ⁇ sec, which is smaller than the allowable value of 1 msec. Therefore, the maximum number of sound channels cannot be used as the number of sound channels.
- Equation (22) 0.2 is the margin rate of the sound generation delay time per parallel.
- Expression (22) corresponds to a value obtained by adding the overhead (margin) before and after the time required for reading out the musical sound data for 8 channels up to CH0, 4, 8,... 28 in the nonvolatile memory bank 110, for example. To do.
- a margin is further anticipated, and the number of tone generation channels is defined as a number that is smaller than the maximum number of tone generation channels and is a power of 2. In this embodiment, according to the definition, the number of sound generation channels is determined to 32 as shown in FIG.
- the CPU unit 230K determines the channel frame of the channel assignment table 232 and the number of channels of the time slot of the signal processing unit 220 based on the number of sound generation channels (32CH) thus determined.
- the signal processing unit 220 determines effect processing by reverb and chorus. In the illustrated case, it is determined that only reverb is performed as effect processing.
- the CPU unit 230K executes the above-described equation (19) based on the number of buses (1) and the number of memory banks per bus (4), thereby increasing the parallel number.
- the LSN bit format is determined by the obtained parallel number.
- the parallel count is 4, the number of bits of the bank select is 2, and the bit format of the LSN is as shown in FIG.
- the parallel number is 2
- the number of bits assigned to the bank select is 1 (b3), and accordingly, the page number is assigned to b11 to b4 and the PBN is assigned to b21 to b12.
- CHN and bank select are the same as in the third embodiment. Since the bit format of LSN is as shown in FIG. 29, the relationship between LSN and CLN in LS8192 to LS8255 shown in FIG. 27A and other initialization processes are the same as in the third embodiment.
- the recording data characteristic information, the memory configuration information, and the read performance information are read, and the CPU unit 230K finishes the initialization process (S200) by the setting process of various parameters. Then, the process proceeds to S201 of the normal operation process, where the interrupt is enabled and performance data from the external master keyboard 300 is received.
- the musical sound data writing process of the access module is the same as that of the third embodiment, and detailed description thereof is omitted.
- the sound channel number determination unit 245 determines the sound channel number so that the sound delay time is 1 msec or less. As a result, even if the reading performance of the nonvolatile memory module 100K is low, it is possible to realize a musical sound generation system in which the number of sound generation channels is reduced so that the sound generation delay time does not exceed a predetermined value.
- the random read rate in units of 512 bytes is stored in the ROM in the sound generation channel number determination unit 245, but may be stored in any one of the nonvolatile memory banks 110 to 113.
- a display unit may be provided in the access module 200K, and the number of sound generation channels determined by the sound channel number determination unit 245 may be displayed on the display unit.
- the number of sound generation channels is less than 1, in other words, even when the number of sound generation channels is 1, even if the sound generation delay time exceeds 1 msec, a warning message “Music tone cannot be generated” is displayed on the display unit. Also good.
- the nonvolatile storage module 100K transfers the read performance information in response to an instruction from the access module 200K. However, the nonvolatile storage module 100K may actively notify the access module 200K.
- the non-volatile memory module of the present invention is a non-volatile memory module that reads data in response to a read instruction from the outside, and includes a plurality of non-volatile memory banks in which musical sound data is multiplexed and recorded, and an external 1
- the data is read from one of the nonvolatile memory banks in response to one read instruction, and when there is another read instruction before the read is completed, the nonvolatile memory bank is different from the nonvolatile memory bank being read
- a data reading unit that reads data from the memory bank in parallel.
- the nonvolatile memory bank may be a multi-level NAND flash memory.
- the access module issues a read instruction to the non-volatile storage module, and the access module includes a signal processing unit that performs a tone generation process for a plurality of channels every sampling period by time division multiplexing. it can.
- the non-volatile storage module may include a non-volatile memory that holds recording data characteristic information including at least information related to the sampling frequency of the musical sound data.
- the access module can be a module that issues a read instruction to the nonvolatile memory module and performs a tone generation process based on the recording data characteristic information acquired from the nonvolatile memory module.
- a musical tone generation system including these access modules and a non-volatile storage module that reads data in response to a read instruction from the access module can be provided.
- the non-volatile storage module of the present invention is a non-volatile storage module that reads and writes data in response to an external access instruction, and includes a plurality of non-volatile memory banks in which musical sound data is multiplexed and recorded, and an external The data is read from one of the non-volatile memory banks in response to one read instruction, and different from the non-volatile memory bank being read when there is another read instruction before completing the read.
- a data read / write unit that reads data from the nonvolatile memory bank in parallel and reads memory configuration information indicating the configuration of the nonvolatile memory bank.
- the read / write control unit has a register for holding a plurality of read instruction information transferred from the outside, and reads the next read instruction information after the read instruction information before reading the musical sound data corresponding to the read instruction information. It may be held in the register.
- the read / write control unit may include an address management unit that performs conversion between a logical address and a physical address of the nonvolatile memory bank.
- An access module is an access module for writing to and reading from a non-volatile module, and the access module performs signal generation processing for generating a plurality of channels for each sampling period by time division multiplexing processing. A part.
- the musical tone generation system of the present invention can be configured to include an access module and a nonvolatile memory module that performs data writing and reading in response to writing and reading instructions from the access module.
- the data writing module is a data writing module for writing the musical sound data to the nonvolatile storage module, and multiplexes the musical sound data acquired from the outside based on the memory configuration information notified from the nonvolatile storage module.
- a multiplexing unit and a file system unit that writes the musical sound data multiplexed by the multiplexing unit to the nonvolatile storage module may be provided.
- the non-volatile storage module of the present invention is a non-volatile storage module that reads and writes data in response to an external access instruction, multiplexes and records musical sound data, and stores audio data, performance data, and image data.
- a plurality of non-volatile memory banks that record at least one of text data, and music data are multiplexed and written, and at least one of audio data, performance data, image data, and text data is written and external
- the data is read from one of the non-volatile memory banks in response to one read instruction from the non-volatile memory bank that is being read when there is another read instruction before the read is completed. Reading from different non-volatile memory banks in parallel
- the read / write control unit has a register for holding a plurality of read instruction information transferred from the outside, and reads the next read instruction information after the read instruction information before reading the musical sound data corresponding to the read instruction information. It may be held in the register.
- the read / write control unit may include an address management unit that performs conversion between a logical address and a physical address of the nonvolatile memory bank.
- the musical tone generation system of the present invention can be configured to include an access module and a nonvolatile memory module that performs data writing and reading in response to writing and reading instructions from the access module.
- the musical tone generation system of the present invention is a musical tone generation system comprising an access module and a nonvolatile storage module that reads and writes data in response to a read / write instruction from the access module.
- the module reads data from a plurality of non-volatile memory banks in which musical sound data is multiplexed and recorded, and one of the non-volatile memory banks in response to an external read instruction, and completes the reading.
- Data read / write to read memory configuration information indicating the configuration of the non-volatile memory bank by reading in parallel from a non-volatile memory bank different from the non-volatile memory bank being read when there is another read instruction before
- the access module includes a data storage module.
- a file editing unit that edits a sound material file group stored in a musical sound file into one musical sound data file, a multiplexing unit that multiplexes the musical sound data, and a musical sound data file that is multiplexed by the multiplexing unit,
- a file system unit that multiplexes and writes to at least two or more non-volatile memory banks of the non-volatile memory module and reads the musical sound data file.
- An access module of the present invention is an access module that is connected to a non-volatile storage module and reads and writes data, and a file editing unit that edits a sound material file group stored in the data storage module into one musical sound data
- a multiplexing unit that multiplexes the musical tone data, and a musical tone data file that is multiplexed by the multiplexing unit is multiplexed and written to at least two or more nonvolatile memory banks of the nonvolatile storage module, And a file system unit for reading out a musical sound data file.
- the access module may further include a sampling unit that samples a sound input from the outside.
- the access module may further include a signal processing unit that performs a tone generation process for a plurality of channels for each sampling period by a time division multiplexing process.
- the musical sound data file generation module of the present invention is a musical sound data file generation module for generating a musical sound data file in a nonvolatile storage module including a plurality of nonvolatile memory banks, and a sound material file group recorded in the data storage module is recorded.
- the nonvolatile memory bank includes a file system unit that writes the musical tone data multiplexed by the multiplexing unit to the nonvolatile storage module as a musical tone data file.
- the data storage module and the nonvolatile storage module may be the same storage module.
- the multiplexing unit may determine the number of multiplexing in the multiplexing based on the memory configuration information acquired from the nonvolatile storage module.
- the non-volatile memory module of the present invention is a non-volatile memory module that reads data in response to an access instruction from the outside, and includes a plurality of non-volatile memory banks in which musical sound data is multiplexed and recorded, and an external 1
- the data is read from one of the nonvolatile memory banks in response to one read instruction, and when there is another read instruction before the read is completed, the nonvolatile memory bank is different from the nonvolatile memory bank being read
- a data reading unit that reads data from the memory bank in parallel and reads the memory configuration information indicating the configuration of the nonvolatile memory bank and the read performance information is provided.
- non-volatile memory for holding recording data characteristic information including information relating to at least the sampling period of the musical sound data and one sample capacity, and reading performance information relating to the reading rate.
- An access module is an access module for instructing reading to the above-described nonvolatile storage module, and based on the read performance information and the recorded data characteristic information acquired from the nonvolatile storage module, the sound generation delay time is a predetermined time or less
- the sound generation channel number determination unit for determining the number of sound generation channels is provided so as to give a read instruction to the nonvolatile storage module within the determined number of sound generation channels.
- a display unit for displaying the number of channels determined by the channel number determination unit may be further included.
- a signal processing unit that performs musical tone generation processing for a plurality of channels within the range of the number of sound generation channels determined for each sampling period by time division multiplexing processing may be further provided.
- the musical tone generation system of the present invention is a musical tone generation system including an access module and a non-volatile storage module that reads data in response to a read instruction from the access module, wherein the non-volatile storage module includes musical tone data.
- a data reading unit that reads data from a non-volatile memory bank that is different from the non-volatile memory bank that is being read when instructed, and reads memory configuration information and read performance information indicating the configuration of the non-volatile memory bank;
- the access module includes the access module Based on the read performance information and the recorded data characteristic information acquired from the volatile storage module, a sound channel number determination unit is provided for determining the sound channel number so that the sound delay time is a predetermined time or less. Within the range, a read instruction is given to the nonvolatile memory module.
- data obtained by digitally recording a piano sound is recorded as musical sound data in the non-volatile memory banks 110 to 113.
- instrument sounds other than the piano, voices, or other data are stored. It doesn't matter.
- the musical sound data may be artificially created data instead of digitally recorded data. Further, it may be data compressed by a compression technique such as MP3. However, in that case, it is necessary to cause the signal processing unit 220 to execute a process of expanding the compressed data, that is, a decoding process.
- two types of musical sound data are stored in advance corresponding to the keystroke strength, but may be one type or three or more types. However, in the case of one type, the interpolation processing by the signal processing unit 220 is not necessary. If there are three or more types, the interpolation processing method may be expanded to linear interpolation between three points.
- the musical tone data corresponding to one keyboard is about 40 seconds.
- the present invention is not limited to this, and the time length of the musical tone data can be changed according to NN. Good. In general, in the case of a piano, the lower the tone, the longer the sounding time. Therefore, it is preferable to make the time length of the low tone music data relatively long and the time length of the high tone music data relatively short to rationalize the storage capacity. .
- the number of nonvolatile memory banks is four, but other numbers may be used. As the number of nonvolatile memory banks increases, the sound generation delay time can be further shortened. Further, although the sector size, that is, the read size of the musical sound data per time is 512 bytes, other sizes may be used. The smaller the size is, the more rational the RAM capacity of the musical sound data buffer is. Further, the number of memory buses may be expanded to a plurality. For example, when the number of memory buses is two and four nonvolatile memory banks are connected per memory bus, it is possible to perform reading to the nonvolatile memory banks in eight parallel manners. In this case, there is no need to avoid bus contention as in the first embodiment. That is, since it is not necessary to shift the data transfer time from the I / O registers 110a to 113a, the sound generation delay time can be further shortened.
- the bank select is determined by the CHN. However, the bank select is performed in the order in which the read instruction information is issued, that is, in the order in which the access module transfers the read instruction information to the nonvolatile storage module. May be cyclically incremented such that 0 ⁇ 1 ⁇ 2 ⁇ 3 ⁇ 0 ⁇ 1.
- the musical sound data is continuously arranged in the page of the nonvolatile memory bank, it may be discontinuous as long as the regularity of the arrangement is recognized by the nonvolatile memory module or the access module.
- PB0 or PB1 is continuously arranged in order from the lowest tone of the musical sound data with the first block as the first block. It may also be discontinuous.
- nonvolatile memory bank is a flash memory
- present invention can be applied when other nonvolatile memories are used.
- the musical tone data characteristic information and the memory configuration information are held in the nonvolatile memory bank, but another nonvolatile memory that holds these information may be provided.
- the data reading part and the data read / write part are provided in the nonvolatile memory module, they may be in the access module.
- performance information is input from the master keyboard.
- other types of input controllers such as a guitar-type controller that outputs performance data by playing a string or a performance by hitting an object.
- a stick-type controller that outputs data may be used.
- performance data such as a standard MIDI file may be input to the access module from a device such as a personal computer or via a network.
- the musical sound generation system proposes a method of using a non-volatile memory as a memory for musical sound data, and is an electronic musical instrument, a karaoke apparatus, or a personal computer having a musical sound generation function (for example, a sound card) or a portable computer. This is useful for telephones, game machines, and devices that use recorded sound material as musical sound data.
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Abstract
Description
44.1×40×2×2×88≒621MByte ・・・(1)
621MByte÷64Mbit≒78個 ・・・(2)
従って楽音生成システムを小型化することが困難となる。
発音遅延時間=50μ秒×32=1.6m秒 ・・・(3)
尚、発音遅延時間とは、打鍵操作~発音開始までの時間であり、その許容範囲は一般的に1m秒以内とされている。これが1m秒を超えてしまうと演奏上違和感をきたし、楽音生成システムとして成り立たない。
110~113 不揮発性メモリバンク
110a~113a I/Oレジスタ
110b~113b メモリセルアレイ
120,140 データ読み出し部
121 ホストインターフェイス
121a レジスタ
122 バッファ部
122a,122b シングルポートRAM
122c RAM切り替え回路
123,141,153,161,162 メモリインターフェイス
124,154,230C,230E,420 CPU部
131,132 フラッシュメモリ
150C,150E,150H,160A,160B データ読み書き部
151 ホストインターフェイス
151a,151b レジスタ
152,156 バッファ部
152a,152b シングルポートRAM
152c RAM切り替え回路
155 アドレス管理部
157 読み出し性能通知部
200A~200K アクセスモジュール
210A,210C,210E,210H,410 入出力部
220,222,224 信号処理部
231 楽音データバッファ
231a,231b デュアルポートRAM
231c マルチプレクサ
231d デマルチプレクサ
232 チャンネルアサインテーブル
233A,233C NNテーブル
234 演奏データバッファ
235 転送監視部
236 ファイルシステム部
237 多重化部
238 コンテンツ識別部
239 オーディオバッファ
240 カラオケバッファ
242 ファイル編集部
243 サンプリング部
245 発音チャンネル数決定部
250,430 ドライバ部
300 マスターキーボード
310 インターネット
320 マイクロフォン
330,500 データ記憶モジュール
340 ハードディスク
400A データ書き込みモジュール
400B 楽音データファイル生成モジュール
図1A,図1Bは、本発明の第1の実施の形態における楽音生成システムを示すブロック図である。楽音生成システムは、図1Aに示す不揮発性記憶モジュール100Aと図1Bに示すアクセスモジュール200Aとを含んで構成される。不揮発性記憶モジュール100Aは、並列に設けられた4つの不揮発性メモリバンク110~113と、データ読み出し部120を含む。データ読み出し部120はホストインターフェイス121、バッファ部122、メモリインターフェイス123、CPU部124を含む。
発音中フラグSONは対応するチャンネルが発音中か否かを示すフラグであり、値0の時は発音中チャンネル、値1の時は空きチャンネルであることを示す。
KONフラグは打鍵してから離鍵されるまでの間に値1になるフラグである。
ノートナンバーNNはピアノの鍵盤位置に対応する16進数の番号である。
タッチパラメータTPは打鍵の強さに対応する強弱情報である。
レベルデータLDは打鍵の強さに応じて決まる楽音の音量に対応するものである。
強制消音フラグFは楽音を強制的に消音するためのフラグである。
セクタカウントSCは楽音データが1セクタ分即ち128サンプル分読み出される毎にカウントアップするカウンタである。
ウェーブエンドフラグWEは楽音データの最終サンプル即ちs1763999が楽音生成のために処理されたことを示すフラグである。
エンベロープエンドフラグEEは打鍵の状態やサスティンペダルの状態に応じて変化する楽音の音量変化(以下、エンベロープENVという)が、聴感上聞こえない音量レベルになった時に値1にセットされるフラグである。
楽音データ読み出し要求フラグDQは信号処理部220が楽音の生成として使用した楽音データのサンプル数が所定の閾値(例えば96サンプル)に到達した時点でセットされるフラグである。
選択フラグMは楽音データバッファ231内のデュアルポートRAM231aと231bのどちらに楽音データを書き込むかを選択するフラグである。
選択フラグDはデュアルポートRAM231aと231bのどちらに記憶されている楽音データを信号処理部220に転送するかを選択するフラグである。
尚、フラグDとMは、値0の時にデュアルポートRAM231aを選択し、値1の時にデュアルポートRAM231bを選択する。
まず、不揮発性記憶モジュール100Aの出荷前において、メーカ側で処理する初期化の内容について説明する。本実施の形態では、ピアノの楽音データを44.1kHzのサンプリング周波数でデジタル録音した場合において、各音高毎に約40秒分の楽音データを圧縮せずに不揮発性記憶モジュール100Aに記録する。尚ピアノの鍵盤を打鍵してから音が十分減衰するまでの時間を40秒とする。この場合には式(4)に示すとおり、1764000サンプルとなる。
44.1kHz×40秒=1764000サンプル ・・・(4)
アクセスモジュール200A及び不揮発性記憶モジュール100Aの電源立ち上げ後、夫々初期化処理を開始する。図13Aは、CPU部124の通常処理、図13Bはその割り込み処理を示すフローチャートである。
(1)SONを値0、即ちCH0~31を空きチャンネルに設定
(2)KON、PD、NN、TP、LD、F、SC、WE、DQ、M、Dを値0に設定
(3)EEを値1に設定
並列数=バス数×1バスあたりのメモリバンク数 ・・・(5)
こうして求めた並列数によりLSNのビットフォーマットが決まる。本実施の形態においては、並列数が値4であるので、バンクセレクトのビット数は2となり、LSNのビットフォーマットは図4に示すとおりとなる。また例えば並列数が値2の場合には、バンクセレクトに割り当てられるビット数は1(b3)となり、それに伴いページ番号はb11~b4にPBNはb21~b12に割り当てられることとなる。
バンクセレクト=CHN % 並列数 ・・・(6)
本実施の形態においては、並列数が値4であるので、CHNとバンクセレクトとの関係は下記(a)~(b)に示す4通りとなる。
(a)CH0、4、8、12、16、20、24、28
・・・バンクセレクト=0(不揮発性メモリバンク110)
(b)CH1、5、9、13、17、21、25、29
・・・バンクセレクト=1(不揮発性メモリバンク111)
(c)CH2、6、10、14、18、22、26、30
・・・バンクセレクト=2(不揮発性メモリバンク112)
(d)CH3、7、11、15、19、23、27、31
・・・バンクセレクト=3(不揮発性メモリバンク113)
usn=セクタサイズ/1サンプルサイズ/タッチ数 ・・・(7)
本実施の形態においては、セクタサイズが512Byte、1サンプルサイズが2Byte、タッチ数が2であるので、usn=128サンプルとなる。
1ノートあたり必要な物理ブロック数
=1ノートあたりの占有容量/(ページサイズ×TPN)=8個 ・・・(8)
そして、最低音A-1から最高音C7まで夫々のノートに対応するPBNを決定し、図9に示すNNテーブル233Aを生成する。
(1)全体的な動作説明
演奏データの入力から楽音の生成に至る全体的な動作説明を、CPU部230Aのフローチャートを中心に説明する。該フローチャートは図14Aに示すメインルーチンと、図14Bに示す割り込みルーチンの2つのルーチンからなる。割り込みルーチンは、マスターキーボード300の演奏操作によって演奏データがアクセスモジュール200Aに転送された際に起動されるルーチンである。メインルーチンの処理中にマスターキーボード300の演奏操作がなされると、即座に割り込みルーチンに移行する。尚、割り込みルーチンは多重割り込みが可能、即ち割り込みルーチン中であっても、次の割り込みを受け付けるものとする。
(1)SONを値1にセット
(2)NNとTPを打鍵データからコピー
(3)SC、WE、EE、DQ、M、Dを値0に設定
(a)打鍵データのNNに基づきNNテーブル233Aを参照し、先頭PBNを求める。
(b)先頭PBNとSCと式(9)に基づき、仮LSNを求める。
仮LSN=(先頭PBN<<13)+[{(SC&0xFFE8)<<2}|
(SC&0x0007)] ・・・(9)
但し仮LSNはバンクセレクトが未確定の場合のLSNであり、この場合には(b4、b3)の値を0とする。また、&は論理積をとる演算子、|は論理和をとる演算子、<<は左にビットシフトする演算子である。尚、“0x”は16進数を表す記号である。式(9)においてNNテーブルの先頭のPBNを13ビットシフトすることによって図4に示すb13~22までの物理ブロック番号PBNとすることができる。またセクタカウントSCのb0~b2をマスクして2ビットシフトさせることによってページ番号とすることができる。更にセクタカウントの下位3ビットを加えることによって仮LSNが得られる。
(c)アサイン先のCHNと前述した式(6)によりバンクセレクトを求める。
(d)前述した仮LSNとバンクセレクトから次式(10)によりLSNを求める。
LSN=仮LSN|(バンクセレクト<<3) ・・・(10)
(e)CHNをb27~23に割り付ける。
INI=KON&EE ・・・(11)
w=wb×α+wa(1-α) ・・・(12)
但し、α=TP/0x7F
ENV=LD×REL ・・・(13)
但し、RELは次のように決定される。
(a)F=1の場合は、
REL=g
(b)F=0かつKON=0かつPD=0の場合は
REL=REL_old×0.5
(c)上記以外の場合は、
REL=1
尚、RELは減衰パラメータ、REL_oldは前サンプリング期間のREL、gは減衰変数である。
gはF=1がCPU部230Aから転送されたサンプリング周期において0.875となり、次のサンプリング期間において0.750となる。これ以降、gは0.125ずつ小さくなり、値0になった時点以降は値0を維持する。このように決めておけばF=1が転送されてから8サンプリング周期でENVは値0に到達する。またREL_oldは信号処理部220内のRAMに保持され、式(13)の実行毎にRELに更新されるものであり、RELは指数関数的に0に漸近することとなる。
1/サンプリング周波数(44.1kHz)≒約22.7μ秒 ・・・(14)
従って8サンプリング周期は約182μ秒となる。
W=w×ENV ・・・(15)
尚、前述した通り楽音データはピアノの音を鍵盤毎にデジタル録音したデータであるので、ENVのレベルが時間的に変化しなくても、Wの波高値は時間的に減衰するので聴感上は減衰して聞こえる。
Wx=(W0+W1+・・・・+W31)/32 ・・・(16)
ここでWn(nはCHNに対応する0~31の整数)は任意のチャンネルのWとし、Wxはミキシング結果である。ミキシングの後S317において更にエフェクト処理を行う。
512Byte×(25n秒/Byte)=12.8μ秒 ・・・(17)
以上の処理を踏まえ、さまざまな打鍵方法別に、図24A~図24Cに示すタイムチャートと、図8A~図8Cに示すチャンネルアサインテーブル232を用いて、打鍵から楽音が発音されるまでの動作、及び発音遅延時間について説明する。
図24Aは離散的な打鍵を行った場合の動作を説明したタイムチャート、図8Aは該打鍵に対応するチャンネルアサインテーブル232内のパラメータの変化を表したものである。まず無音状態からマスターキーボード300によってNNが0x19、0x1C、0x1E、0x20に対応する4つの鍵盤が時刻t1に同時に打鍵され、その後、数十μ秒ずつの時間間隔をおいて、NNが0x25の鍵盤、NNが0x29の鍵盤、最後にNNが0x2Cと0x2Fの2つの鍵盤が打鍵された場合について説明する。各打鍵は、前述したCPU部230Aのチャンネルアサイン処理により夫々CH0~7に割り当てられ、打鍵タイミングにCPU部230Aの処理遅延を付加したタイミングで、CH0~7の読み出し指示がアクセスモジュール200Aから不揮発性記憶モジュール100Aに転送される。
次に、32チャンネル全てを使用して一度に発音する場合について説明する。図24Bはマスターキーボード300により32個の鍵盤を時刻t1に同時に打鍵した場合の動作を説明したタイムチャート、図8Bはこの打鍵に対応するチャンネルアサインテーブル232内のパラメータの変化を表したものである。尚、このような打鍵方法は通常の演奏ではあまりなされない方法である。
最後に、急速消音の後に32チャンネル全てを使用して一度に発音する場合について、図24Cと図8Cを用いて説明する。この場合は、例えば(2-2)に示した打鍵、即ち図8Bに示したようにNNが0x28~0x47に対応する32個の鍵盤が打鍵された状態のままで、新たに時刻t1にNNが0x48~0x67に対応する32個の鍵盤が打鍵された場合、即ち最大発音チャンネル数(32チャンネル)を超えた発音となる。
図25は、本発明の第2の実施の形態における楽音生成システムを示すブロック図である。図1に示した第1の実施の形態における楽音生成システムにおいては、不揮発性メモリバンク110~113は各々が1個のフラッシュメモリ(チップ)であったが、本実施の形態においては、不揮発性メモリバンク110と111が1個のフラッシュメモリ131に内蔵され、不揮発性メモリバンク112と113が1個のフラッシュメモリ132に内蔵される。またデータ読み出し部140は前述したホストインターフェイス121、バッファ部122、CPU部124に加えて、メモリインターフェイス141を有している。
図26A,図26Bは、本発明の第3の実施の形態における楽音生成システムを示すブロック図である。楽音生成システムは、図26Aに示す不揮発性記憶モジュール100Cと、図26Bに示すアクセスモジュール200Cとを含んで構成される。不揮発性記憶モジュール100Cは、並列に設けられた4つの不揮発性メモリバンク110~113と、データ読み書き部150Cを含む。データ読み書き部150Cはホストインターフェイス151、バッファ部152、メモリインターフェイス153、CPU部154及びアドレス管理部155を含む。
まず、不揮発性記憶モジュール100Cの出荷前において、メーカー側で処理する初期化の内容について説明する。
メモリ構成情報についても第1の実施の形態と同様である。
アクセスモジュール200C及び不揮発性記憶モジュール100Cの電源立ち上げ後、夫々初期化処理を開始する。CPU部154の通常処理、及びその割り込み処理については第1の実施の形態とほぼ同様であるので、図13A,図13Bのフローチャートを用いて説明する。
本実施の形態においては、並列数が値4であるので、CHNとバンクセレクトとの関係は下記(a)~(b)に示す4通りとなる。
(a)CH0、4、8、12、16、20、24、28
・・・バンクセレクト=0(不揮発性メモリバンク110)
(b)CH1、5、9、13、17、21、25、29
・・・バンクセレクト=1(不揮発性メモリバンク111)
(c)CH2、6、10、14、18、22、26、30
・・・バンクセレクト=2(不揮発性メモリバンク112)
(d)CH3、7、11、15、19、23、27、31
・・・バンクセレクト=3(不揮発性メモリバンク113)
(e)CH0、4、8、12、16、20、24、28
・・・LS8192~LS8199
(f)CH1、5、9、13、17、21、25、29
・・・LS8200~LS8207
(g)CH2、6、10、14、18、22、26、30
・・・LS8208~LS8215
(h)CH3、7、11、15、19、23、27、31
・・・LS8216~LS8223
(1)全体的な動作説明
演奏データの入力から楽音の生成に至る全体的な動作については第1の実施の形態と同様であり、説明を省略する。マスターキーボード300の演奏操作がなされると、図14Bに示す割り込みルーチンが起動される。この割り込み処理の相違点について説明する。
(a)打鍵データのNNに基づきNNテーブル233Cを参照し、先頭CLNを求める。
(b)先頭CLNとSCより式(18)に基づき、仮LSNを求める。
仮LSN=(先頭CLN<<6)+[{(SC&0xFFE8)<<2}|
(SC&0x0007)] ・・・(18)
但し仮LSNはバンクセレクトが未確定の場合のLSNであり、この場合には(b4、b3)の値を0とする。また、&は論理積をとる演算子、|は論理和をとる演算子、<<は左にビットシフトする演算子である。尚、“0x”は16進数を表す記号である。尚式(18)においてNNテーブルの先頭のCLNを6ビットシフトすることによって図29に示すb5~22までの論理ブロック番号LSNとすることができる。またセクタカウントSCのb0~b2をマスクして2ビットシフトさせることによってページ番号とすることができる。更にセクタカウントの下位3ビットを加えることによって仮LSNが得られる。
(c)アサイン先のCHNと前述した式(6)によりバンクセレクトを求める。
(d)前述した仮LSNとバンクセレクトから式(10)によりLSNを求める。
(e)CHNをb27~23に割り付ける。
次に本発明の第4の実施の形態におけるデータ書き込みシステムについて、図38を用いて説明する。本実施の形態のデータ書き込みシステムは、データ書き込みモジュール400Aと不揮発性記憶モジュール100Cとから構成される。不揮発性記憶モジュール100Cは、前述した第3の実施の形態における不揮発性記憶モジュール100Cと同じものである。データ書き込みモジュール400Aは第3の実施の形態のアクセスモジュール200Cのデータ書き込みのための機能を抽出したもので、図38に示すように、入出力部410、CPU部420、ドライバ部430を含む。CPU部420は第3の実施の形態のファイルシステム部236、及び多重化部237を含む。なおデータ書き込みモジュール400Aにはインターネット310が接続されており、ユーザによるダウンロードの指示に応じて必要なデータをダウンロードできるものとする。データ書き込みモジュール400Aは第3の実施の形態のアクセスモジュール200Cのデータ書き込み処理を実行するので、詳細な説明を省略する。
図39A,図39Bは、本発明の第5の実施の形態における楽音生成システムを示すブロック図である。楽音生成システムは、図39Aに示す不揮発性記憶モジュール100Eと図39Bに示すアクセスモジュール200Eとを含んで構成される。不揮発性記憶モジュール100Eは、並列に設けられた4つの不揮発性メモリバンク110~113と、データ読み書き部150Eを含む。データ読み書き部150Eはホストインターフェイス151E、バッファ部152、メモリインターフェイス153、CPU部154、アドレス管理部155及びバッファ部156を含む。
まず、不揮発性記憶モジュール100Eの出荷前において、メーカー側で処理する初期化については第3の実施の形態と同様である。
アクセスモジュール200E及び不揮発性記憶モジュール100Eの電源立ち上げ後、夫々初期化処理を開始する。図40AはCPU部154の通常処理、図40B,図40Cはその割り込み処理を示すフローチャートである。
(1)SONを値0、即ちCH0~31を空きチャンネルに設定
(2)KON、PD、NN、TP、LD、F、SC、WE、DQ、M、Dを値0に設定
(3)EEを値1に設定
(a)CH0、4、8、12、16、20、24、28
・・・バンクセレクト=0(不揮発性メモリバンク110)
(b)CH1、5、9、13、17、21、25、29
・・・バンクセレクト=1(不揮発性メモリバンク111)
(c)CH2、6、10、14、18、22、26、30
・・・バンクセレクト=2(不揮発性メモリバンク112)
(d)CH3、7、11、15、19、23、27、31
・・・バンクセレクト=3(不揮発性メモリバンク113)
(e)CH0、4、8、12、16、20、24、28
・・・LS8192~LS8199
(f)CH1、5、9、13、17、21、25、29
・・・LS8200~LS8207
(g)CH2、6、10、14、18、22、26、30
・・・LS8208~LS8215
(h)CH3、7、11、15、19、23、27、31
・・・LS8216~LS8223
(1)全体的な動作説明
演奏データの入力から楽音の生成、及びオーディオデータの読み出しから生成に至る全体的な動作説明を、CPU部230Eのフローチャートを中心に説明する。尚CLN90240以降には、既に何らかのオーディオデータが書き込まれているものとして説明する。CPU部230のフローチャートは、図41Aに示すメインルーチンと、図41Bに示す割り込みルーチンの2つのルーチンからなる。割り込みルーチンは、マスターキーボード300の演奏操作によって演奏データがアクセスモジュール200Eに転送された際に起動されるルーチンである。メインルーチンの処理中にマスターキーボード300の演奏操作がなされると、即座に割り込みルーチンに移行する。尚、割り込みルーチンは多重割り込みが可能、即ち割り込みルーチン中であっても、次の割り込みを受け付けるものとする。
図48は、本発明の第6の実施の形態における楽音生成システムのアクセスモジュールを示すブロック図である。第6の実施の形態の楽音生成システムは、第5の実施の形態の楽音生成システムと比較すると、インターネット310から取得したカラオケデータセット、すなわち演奏データや背景用の画像データや歌詞用のテキストデータや楽音データをカラオケソースとして使用できる機能が加わった点が異なる。なお、演奏データは、第5の実施の形態における楽音生成システムではマスターキーボード300から取得した演奏データに対応するものである。
次に本発明の第7の実施の形態における楽音生成システムについて説明する。この楽音生成システムは図51に示す不揮発性記憶モジュール100Gとアクセスモジュール200E又は200Fを用いて構成される。図39に示した第5の実施の形態における楽音生成システムにおいては、不揮発性メモリバンク110~113は各々が1個のフラッシュメモリ(チップ)であったが、本実施の形態においては、不揮発性メモリバンク110と111が1個のフラッシュメモリ131に内蔵され、不揮発性メモリバンク112と113が1個のフラッシュメモリ132に内蔵される。またデータ読み書き部160Aは前述したホストインターフェイス151E、バッファ部152,156、CPU部154、アドレス管理部155に加えて、メモリインターフェイス161を有している。
図52A,図52Bは、本発明の第8の実施の形態における楽音生成システムを示すブロック図である。本楽音生成システムは、図52Aに示す不揮発性記憶モジュール100Hと図52Bに示すアクセスモジュール200Hとを含んで構成される。不揮発性記憶モジュール100Hは、並列に設けられた4つの不揮発性メモリバンク110~113と、データ読み書き部150Hを含む。データ読み書き部150Hはホストインターフェイス151、バッファ部152、メモリインターフェイス153、CPU部154及びアドレス管理部155を含む。
まず、不揮発性記憶モジュール100Hの出荷前において、メーカー側で処理する初期化の内容について説明する。尚本実施の形態では、あらかじめメーカーが楽音データを記録して出荷するものとして説明するが、何も記録せずに出荷し、後述するようにユーザが楽音データファイルを記録する場合もある。
アクセスモジュール200H及び不揮発性記憶モジュール100Hの電源立ち上げ後、夫々初期化処理を開始する。CPU部154の通常処理、及び割り込み処理については第3の実施の形態と同様であり、説明を省略する。
演奏データの入力から楽音の生成に至る動作についても第3の実施の形態と同様である。
次に本発明の第9の実施の形態における楽音データファイル生成システムについて説明する。本実施の形態の楽音データファイル生成システムは、図57に示す楽音データファイル生成モジュール400Bと、前述した第8の実施の形態における不揮発性記憶モジュール100Hとから構成される。楽音データファイル生成モジュール400Bは、第8の実施の形態のアクセスモジュール200Hからのデータ書き込みのための機能を抽出したもので、アクセスモジュール200Hのデータ書き込み処理のみを実行する。楽音データファイル生成モジュール400Bは図57に示すように、入出力部410、CPU部420、ドライバ部430を含む。CPU部420は第8の実施の形態のファイルシステム部236、多重化部237、及びファイル編集部242を含む。なお楽音データファイル生成モジュール400Bには、ハードディスク340に加えてデータ記憶モジュール500が接続されており、ユーザによる音源の収録の指示に応じて必要なデータを収録できるものとする。
図59は、本発明の第10の実施の形態における楽音生成システムの不揮発性記憶モジュール100Jを示すブロック図である。第10の実施の形態における楽音生成システムでは、アクセスモジュールは前述した第8の実施の形態と同様であり、不揮発性記憶モジュールのみが異なる。第8の実施の形態の不揮発性記憶モジュール100Jにおいては、不揮発性メモリバンク110~113は各々が1個のフラッシュメモリ(チップ)であったが、本実施の形態の不揮発性記憶モジュール100Jにおいては、不揮発性メモリバンク110と111が1個のフラッシュメモリ131に内蔵され、不揮発性メモリバンク112と113が1個のフラッシュメモリ132に内蔵される。またデータ読み書き部160Bは前述したホストインターフェイス151、バッファ部152,126、CPU部154、アドレス管理部155に加えて、メモリインターフェイス162を有している。
図60A,図60Bは、本発明の第11の実施の形態における楽音生成システムを示すブロック図である。楽音生成システムは、図60Aに示す不揮発性記憶モジュール100Kと図60Bに示すアクセスモジュール200Kとを含んで構成される。不揮発性記憶モジュール100Kは、並列に設けられた4つの不揮発性メモリバンク110~113と、データ読み書き部150Kを含む。データ読み書き部150Kはホストインターフェイス151、バッファ部152、メモリインターフェイス153、CPU部154、アドレス管理部155に加えて、読み出し性能通知部157を含む。
まず、不揮発性記憶モジュール100Kの出荷前にメーカー側で処理する初期化の内容のうち、第3の実施の形態との相違点について説明する。
並列数=バス数×1バスあたりのメモリバンク数 ・・・(19)
次いで以下の式(20)によってRR512を求める。
RR512={セクタサイズ/(TR+TT)}×並列数 ・・・(20)
アクセスモジュール200K及び不揮発性記憶モジュール100Kの電源立ち上げ後、夫々初期化処理を開始する。CPU部154の通常処理、その割り込み処理については夫々図13A,図13Bに示すフローチャートと同様である。
最大発音チャンネル数=RR512/(1サンプル容量/サンプリング周期) ・・・(21)
ここで式(21)において、「1サンプル容量/サンプリング周期」は1発音チャンネルあたりの発音処理に必要なレートとなる。
1並列あたりの遅延時間=[{(TR+TT)×最大発音チャンネル数}/並列数]
×(1+0.2) ・・・(22)
本実施の形態においては、発音遅延時間は約678μ秒となり、その許容値である1m秒より小さいので問題ない。従って最大発音チャンネル数を発音チャンネル数としてさしつかえない。
(1)全体的な動作説明
演奏データの入力から楽音の生成に至る全体的な動作はほぼ第1の実施の形態と同様であり、相違点は第3の実施の形態と同様であり、説明を省略する。
Claims (11)
- 外部からの読み出し指示に応じてデータの読み出しを行う不揮発性記憶モジュールであって、
夫々同一の楽音データを記録した複数の不揮発性メモリバンクと、
外部からの1つの読み出し指示に応じて前記いずれかの不揮発性メモリバンクからデータの読み出しを行い、当該読み出しを完了する前に、他の読み出し指示があったときに該読み出し中の不揮発性メモリバンクと異なる不揮発性メモリバンクから読み出しを並行して行うデータ読み出し部と、を具備する不揮発性記憶モジュール。 - 外部からのアクセス指示に応じてデータの読み出しや書き込みを行う不揮発性記憶モジュールであって、
夫々同一の楽音データを記録する複数の不揮発性メモリバンクと、
外部からの1つの読み出し指示に応じて前記いずれかの不揮発性メモリバンクからデータの読み出しを行い、当該読み出しを完了する前に、他の読み出し指示があったときに該読み出し中の不揮発性メモリバンクと異なる不揮発性メモリバンクから読み出しを並行して行い、前記不揮発性メモリバンクの構成を示すメモリ構成情報を読み出すと共に、前記不揮発性メモリバンクに楽音データを多重化して書き込むデータ読み書き部と、を具備する不揮発性記憶モジュール。 - 前記不揮発性メモリバンクは、
多重化した楽音データに加えて、オーディオデータ、演奏データ、画像データ、及びテキストデータのうち少なくとも1つと、前記不揮発性メモリバンクの構成を示すメモリ構成情報とを記録するものであり、
前記データ読み書き部は、
楽音データを多重化して書き込むと共に、オーディオデータ、演奏データ、画像データ、及びテキストデータのうち少なくとも1つを書き込むものである請求項2記載の不揮発性記憶モジュール。 - 前記不揮発性メモリバンクは、
前記不揮発性メモリバンクの構成を示すメモリ構成情報及び読み出し性能情報を保持する請求項1記載の不揮発性記憶モジュール。 - 前記不揮発性メモリバンクは、
前記不揮発性メモリバンクの構成を示すメモリ構成情報及び読み出し性能情報を保持する請求項2記載の不揮発性記憶モジュール。 - 不揮発性記憶モジュールに読み出し指示を行うアクセスモジュールであって、
前記不揮発性記憶モジュールは、
夫々同一の楽音データを記録した複数の不揮発性メモリバンクと、
外部からの1つの読み出し指示に応じて前記いずれかの不揮発性メモリバンクからデータの読み出しを行い、当該読み出しを完了する前に、他の読み出し指示があったときに該読み出し中の不揮発性メモリバンクと異なる不揮発性メモリバンクから読み出しを並行して行うデータ読み出し部と、を具備するものであり、
前記アクセスモジュールは、
前記不揮発性記憶モジュールから読み出した楽音データに基づき、時分割多重処理により1サンプリング周期毎に複数チャンネル分の楽音生成処理を行う信号処理部を具備するアクセスモジュール。 - 不揮発性記憶モジュールに書き込み、及び読み出し指示を行うアクセスモジュールであって、
前記不揮発性記憶モジュールは、
夫々同一の楽音データを記録した複数の不揮発性メモリバンクと、
前記不揮発性メモリバンクの構成を示すメモリ構成情報を保持するメモリと、
外部からの1つの読み出し指示に応じて前記いずれかの不揮発性メモリバンクからデータの読み出しを行い、当該読み出しを完了する前に、他の読み出し指示があったときに該読み出し中の不揮発性メモリバンクと異なる不揮発性メモリバンクから読み出しを並行して行い、前記不揮発性メモリバンクの構成を示すメモリ構成情報を読み出すと共に、前記不揮発性メモリバンクに楽音データを多重化して書き込むデータ読み書き部と、を具備するものであり、
前記アクセスモジュールは、
前記不揮発性メモリに保持される楽音データをファイルとして管理するファイルシステム部と、
前記不揮発性記憶モジュールから読み出した楽音データに基づき、時分割多重処理により1サンプリング周期毎に複数チャンネル分の楽音生成処理を行う信号処理部と、を具備するアクセスモジュール。 - 不揮発性記憶モジュールに読み出し指示を行うアクセスモジュールであって、
前記不揮発性記憶モジュールは、
夫々同一の楽音データを記録する複数の不揮発性メモリバンクと、
外部からの1つの読み出し指示に応じて前記いずれかの不揮発性メモリバンクからデータの読み出しを行い、当該読み出しを完了する前に、他の読み出し指示があったときに該読み出し中の不揮発性メモリバンクと異なる不揮発性メモリバンクから読み出しを並行して行い、前記不揮発性メモリバンクの構成を示すメモリ構成情報を読み出すと共に、前記不揮発性メモリバンクに楽音データを多重化して書き込むデータ読み書き部と、を具備するものであり、
前記アクセスモジュールは、
前記不揮発性記憶モジュールから取得した読み出し性能情報及び記録データ特性情報に基づき、発音遅延時間が所定時間以下となるように発音チャンネル数を決定する発音チャンネル数決定部を具備し、
決定した発音チャンネル数の範囲内で前記不揮発性記憶モジュールに読み出し指示を行うアクセスモジュール。 - 複数の不揮発性メモリバンクを含む不揮発性記憶モジュールに楽音データファイルを生成する楽音データファイル生成モジュールであって、
データ記憶モジュールに録音された音素材ファイル群を楽音データファイルに編集するファイル編集部と、
前記楽音データを前記不揮発性記憶モジュールから通知された前記メモリ構成情報に基づいて多重化する多重化部と、
前記不揮発性記憶モジュールにおいて少なくとも2以上の前記不揮発性メモリバンクに、前記多重化部によって多重化された楽音データを楽音データファイルとして前記不揮発性記憶モジュールに書き込むファイルシステム部と、を具備する楽音データファイル生成モジュール。 - アクセスモジュールと、前記アクセスモジュールからの読み書き指示に応じてデータの読み出しや書き込みを行う不揮発性記憶モジュールと、を具備する楽音生成システムであって、
前記不揮発性記憶モジュールは、
夫々同一の楽音データを記録した複数の不揮発性メモリバンクと、
外部からの1つの読み出し指示に応じて前記いずれかの不揮発性メモリバンクからデータの読み出しを行い、当該読み出しを完了する前に、他の読み出し指示があったときに該読み出し中の不揮発性メモリバンクと異なる不揮発性メモリバンクから読み出しを並行して行い、前記不揮発性メモリバンクの構成を示すメモリ構成情報を読み出すと共に、前記不揮発性メモリバンクに楽音データを多重化して書き込むデータ読み書き部と、を備え、
前記アクセスモジュールは、
楽音データを前記不揮発性記憶モジュールから読み出した前記メモリ構成情報に基づいて多重化する多重化部と、
前記多重化部によって多重化された同一の楽音データファイルを、前記不揮発性記憶モジュールの少なくとも2以上の前記不揮発性メモリバンクに書き込み、前記楽音データファイルを読み出すファイルシステム部と、
前記不揮発性記憶モジュールから読み出した楽音データに基づき、時分割多重処理により1サンプリング周期毎に複数チャンネル分の楽音生成処理を行う信号処理部と、を具備する楽音生成システム。 - 前記アクセスモジュールは、
データ記憶モジュールに記憶された音素材ファイル群を1つの楽音データファイルに編集するファイル編集部を更に有する請求項10記載の楽音生成システム。
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US12/936,239 US8450589B2 (en) | 2008-04-10 | 2009-03-16 | Nonvolatile storage module, access module, musical sound data file generation module and musical sound generation system |
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US8450589B2 (en) * | 2008-04-10 | 2013-05-28 | Panasonic Corporation | Nonvolatile storage module, access module, musical sound data file generation module and musical sound generation system |
JPWO2010010646A1 (ja) * | 2008-07-24 | 2012-01-05 | パナソニック株式会社 | アクセスモジュール、記憶モジュール、楽音生成システム、及びデータ書き込みモジュール |
JP2014092722A (ja) * | 2012-11-05 | 2014-05-19 | Yamaha Corp | 音発生装置 |
KR101377246B1 (ko) * | 2012-11-15 | 2014-03-25 | 이승재 | 기타 이펙터 모듈을 이용한 멀티형 기타 이펙터, 스위치 모듈 및 컴팩터형 기타 이펙터 |
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WO2016081192A1 (en) | 2014-11-20 | 2016-05-26 | Rambus Inc. | Memory systems and methods for improved power management |
DE102015118583B4 (de) * | 2015-10-30 | 2019-05-09 | Ampete Engineering GbR (vertretungsberechtigter Gesellschafter: Peter Arends, 50733 Köln) | Elektronisches Musikinstrumentensystem und Effektmodul für ein derartiges Musikinstrumentensystem |
CN112908307A (zh) * | 2021-01-29 | 2021-06-04 | 云从科技集团股份有限公司 | 一种音频特征提取方法、系统、设备及介质 |
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