WO2009069696A1 - ソースドライバ、ソースドライバの製造方法、および液晶モジュール - Google Patents

ソースドライバ、ソースドライバの製造方法、および液晶モジュール Download PDF

Info

Publication number
WO2009069696A1
WO2009069696A1 PCT/JP2008/071539 JP2008071539W WO2009069696A1 WO 2009069696 A1 WO2009069696 A1 WO 2009069696A1 JP 2008071539 W JP2008071539 W JP 2008071539W WO 2009069696 A1 WO2009069696 A1 WO 2009069696A1
Authority
WO
WIPO (PCT)
Prior art keywords
source driver
semiconductor chip
terminals
wiring region
liquid crystal
Prior art date
Application number
PCT/JP2008/071539
Other languages
English (en)
French (fr)
Inventor
Tatsuya Katoh
Original Assignee
Sharp Kabushiki Kaisha
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Kabushiki Kaisha filed Critical Sharp Kabushiki Kaisha
Priority to US12/734,844 priority Critical patent/US8373262B2/en
Priority to CN2008801183252A priority patent/CN101878524B/zh
Priority to KR1020107013699A priority patent/KR101158380B1/ko
Publication of WO2009069696A1 publication Critical patent/WO2009069696A1/ja

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985Flexible insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0209External configuration of printed circuit board adapted for heat dissipation, e.g. lay-out of conductors, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812Applying energy for connecting
    • H01L2224/81201Compression bonding
    • H01L2224/81203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49568Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01023Vanadium [V]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/189Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10681Tape Carrier Package [TCP]; Flexible sheet connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/361Assembling flexible printed circuits with other printed circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

 フィルム基材の表面に、外部と接続可能な端子が複数設けられた半導体チップが実装され、半導体チップの入力端子と接続される配線が形成されている入力端子配線領域、および半導体チップの出力端子と接続される配線が形成されている出力端子配線領域が設けられてなるフィルム実装型のソースドライバにおいて、フィルム基材の両端に、連続した穴と表面に銅箔とが形成されてなるスプロケット部を有し、入力端子配線領域および出力端子配線領域は、スプロケット部が設けられていない側に向かって互いに逆向きに設けられており、半導体チップの端子のうち入力端子および出力端子以外の端子とスプロケット部の銅箔とを接続する熱伝導パターンが形成されている。これにより、放熱量を増加させることができるソースドライバ、ソースドライバの製造方法、および液晶モジュールを提供する。
PCT/JP2008/071539 2007-11-30 2008-11-27 ソースドライバ、ソースドライバの製造方法、および液晶モジュール WO2009069696A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US12/734,844 US8373262B2 (en) 2007-11-30 2008-11-27 Source driver, method for manufacturing same, and liquid crystal module
CN2008801183252A CN101878524B (zh) 2007-11-30 2008-11-27 源极驱动器、源极驱动器的制造方法和液晶模块
KR1020107013699A KR101158380B1 (ko) 2007-11-30 2008-11-27 소스 드라이버, 소스 드라이버의 제조 방법, 및 액정 모듈

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-311627 2007-11-30
JP2007311627A JP4344766B2 (ja) 2007-11-30 2007-11-30 ソースドライバ、ソースドライバの製造方法、および液晶モジュール

Publications (1)

Publication Number Publication Date
WO2009069696A1 true WO2009069696A1 (ja) 2009-06-04

Family

ID=40678588

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/071539 WO2009069696A1 (ja) 2007-11-30 2008-11-27 ソースドライバ、ソースドライバの製造方法、および液晶モジュール

Country Status (6)

Country Link
US (1) US8373262B2 (ja)
JP (1) JP4344766B2 (ja)
KR (1) KR101158380B1 (ja)
CN (1) CN101878524B (ja)
TW (1) TWI416640B (ja)
WO (1) WO2009069696A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2013051236A1 (ja) * 2011-10-05 2015-03-30 パナソニック株式会社 表示装置

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5325684B2 (ja) 2009-07-15 2013-10-23 ルネサスエレクトロニクス株式会社 半導体装置
JP2012073388A (ja) * 2010-09-28 2012-04-12 Hitachi Displays Ltd 液晶表示装置
TWI615925B (zh) * 2013-03-04 2018-02-21 盧森堡商經度半導體責任有限公司 半導體裝置
JP5657767B2 (ja) * 2013-10-30 2015-01-21 ルネサスエレクトロニクス株式会社 半導体装置
JP6711582B2 (ja) * 2015-10-14 2020-06-17 ホシデン株式会社 プラグコネクタ及びアダプタ
KR102392683B1 (ko) * 2015-11-30 2022-05-02 엘지디스플레이 주식회사 터치스크린 내장형 표시장치
JP2018085522A (ja) * 2017-12-21 2018-05-31 ルネサスエレクトロニクス株式会社 半導体装置
CN110323198B (zh) * 2019-07-26 2024-04-26 广东气派科技有限公司 非接触式上下芯片封装结构及其封装方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07245324A (ja) * 1994-03-07 1995-09-19 Hitachi Ltd 半導体装置
JP2003108017A (ja) * 2001-09-27 2003-04-11 Pioneer Electronic Corp フラットパネル型表示装置
JP2004111996A (ja) * 1996-03-26 2004-04-08 Canon Inc 接続構造体及び表示装置
JP2005109254A (ja) * 2003-09-30 2005-04-21 Optrex Corp 集積回路搭載基板およびこれを備えた表示装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4862827A (en) * 1988-06-28 1989-09-05 Wacker-Chemie Gmbh Apparatus for coating semiconductor components on a dielectric film
US6184965B1 (en) * 1996-03-26 2001-02-06 Canon Kabushiki Kaisha Circuit connection structure
WO1998018161A1 (en) * 1996-10-17 1998-04-30 Seiko Epson Corporation Semiconductor device, method of its manufacture, circuit substrate, and film carrier tape
KR100385082B1 (ko) * 2000-07-27 2003-05-22 삼성전자주식회사 액정 표시 장치
JP3832576B2 (ja) 2002-03-28 2006-10-11 セイコーエプソン株式会社 配線基板、半導体装置及びその製造方法、パネルモジュール並びに電子機器
JP2005064479A (ja) * 2003-07-31 2005-03-10 Sanyo Electric Co Ltd 回路モジュール
JP4781097B2 (ja) * 2005-12-05 2011-09-28 ルネサスエレクトロニクス株式会社 テープキャリアパッケージ及びそれを搭載した表示装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07245324A (ja) * 1994-03-07 1995-09-19 Hitachi Ltd 半導体装置
JP2004111996A (ja) * 1996-03-26 2004-04-08 Canon Inc 接続構造体及び表示装置
JP2003108017A (ja) * 2001-09-27 2003-04-11 Pioneer Electronic Corp フラットパネル型表示装置
JP2005109254A (ja) * 2003-09-30 2005-04-21 Optrex Corp 集積回路搭載基板およびこれを備えた表示装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2013051236A1 (ja) * 2011-10-05 2015-03-30 パナソニック株式会社 表示装置

Also Published As

Publication number Publication date
KR20100087040A (ko) 2010-08-02
US8373262B2 (en) 2013-02-12
TWI416640B (zh) 2013-11-21
US20100302474A1 (en) 2010-12-02
JP4344766B2 (ja) 2009-10-14
JP2009135340A (ja) 2009-06-18
TW200947570A (en) 2009-11-16
CN101878524B (zh) 2012-10-03
CN101878524A (zh) 2010-11-03
KR101158380B1 (ko) 2012-06-22

Similar Documents

Publication Publication Date Title
WO2009069696A1 (ja) ソースドライバ、ソースドライバの製造方法、および液晶モジュール
WO2008005614A3 (en) Chip module for complete power train
EP2706829A3 (en) Printed wiring board, printed circuit board, and printed circuit board manufacturing method
WO2008119309A3 (de) Wärmesenke sowie bau- oder moduleinheit mit einer wärmesenke
TW200943194A (en) Electronic interface apparatus and method and system for manufacturing same
WO2009022808A3 (en) Circuit board for light emitting device package and light emitting unit using the same
WO2008090643A1 (ja) 光源モジュール及びバックライト光源
WO2008146603A1 (ja) 半導体装置およびその製造方法、ならびにディスプレイ装置およびその製造方法
WO2012005771A3 (en) Compact optically efficient solid state light source with integrated thermal management
EP2998992A3 (en) Semiconductor module
WO2008142885A1 (ja) 半導体モジュール及びインバータ装置
IN2012DN03163A (ja)
TW200719358A (en) Composite conductive film and semiconductor package using such film
WO2007084328A3 (en) High power module with open frame package
TW200709774A (en) Printed circuit board with improved thermal dissipating structure and electronic device with the same
EP2498288A3 (en) Circuit board using heat radiating member, electronic module and method for manufacturing the module
WO2008060646A3 (en) Semiconductor device having carbon nanotube interconnects and method of fabrication
WO2009095486A3 (en) Semiconductor package
WO2009043670A3 (de) Elektronische schaltung aus teilschaltungen und verfahren zu deren herstellung
TW201130108A (en) High-density integrated circuit module structure
DE112005003653A5 (de) Leistungshalbleitermodul mit auf Schaltungsträger aufgebrachten Lastanschlusselementen
WO2009039263A3 (en) Thin circuit module and method
TW200616181A (en) Heat-dissipation device
TW200739857A (en) Semiconductor module and method of manufacturing the same
RU2006120548A (ru) Радиоэлектронный блок

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200880118325.2

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08853883

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 20107013699

Country of ref document: KR

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 12734844

Country of ref document: US

122 Ep: pct application non-entry in european phase

Ref document number: 08853883

Country of ref document: EP

Kind code of ref document: A1