WO2009066566A1 - 単結晶SiC基板の製造方法およびそれによって得られた単結晶SiC基板 - Google Patents
単結晶SiC基板の製造方法およびそれによって得られた単結晶SiC基板 Download PDFInfo
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- WO2009066566A1 WO2009066566A1 PCT/JP2008/070160 JP2008070160W WO2009066566A1 WO 2009066566 A1 WO2009066566 A1 WO 2009066566A1 JP 2008070160 W JP2008070160 W JP 2008070160W WO 2009066566 A1 WO2009066566 A1 WO 2009066566A1
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- 239000000758 substrate Substances 0.000 title claims abstract description 119
- 239000013078 crystal Substances 0.000 title claims abstract description 65
- 238000000034 method Methods 0.000 title claims abstract description 20
- 150000002500 ions Chemical class 0.000 claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 claims abstract description 29
- 239000000463 material Substances 0.000 claims abstract description 28
- 238000010438 heat treatment Methods 0.000 claims abstract description 22
- 239000004215 Carbon black (E152) Substances 0.000 claims abstract description 19
- 229930195733 hydrocarbon Natural products 0.000 claims abstract description 19
- 150000002430 hydrocarbons Chemical class 0.000 claims abstract description 19
- 238000005468 ion implantation Methods 0.000 claims abstract description 10
- 238000001816 cooling Methods 0.000 claims abstract description 9
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 41
- 239000011521 glass Substances 0.000 claims description 35
- 238000000151 deposition Methods 0.000 claims description 8
- 230000001133 acceleration Effects 0.000 claims description 6
- 230000001131 transforming effect Effects 0.000 claims description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 51
- 229910010271 silicon carbide Inorganic materials 0.000 description 51
- 239000007789 gas Substances 0.000 description 31
- 239000005360 phosphosilicate glass Substances 0.000 description 30
- 238000003763 carbonization Methods 0.000 description 14
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 7
- 238000012545 processing Methods 0.000 description 7
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 6
- ATUOYWHBWRKTHZ-UHFFFAOYSA-N Propane Chemical compound CCC ATUOYWHBWRKTHZ-UHFFFAOYSA-N 0.000 description 6
- 229910052698 phosphorus Inorganic materials 0.000 description 6
- 239000011574 phosphorus Substances 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 239000000523 sample Substances 0.000 description 5
- 229910018540 Si C Inorganic materials 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000005259 measurement Methods 0.000 description 3
- UIUXUFNYAYAMOE-UHFFFAOYSA-N methylsilane Chemical compound [SiH3]C UIUXUFNYAYAMOE-UHFFFAOYSA-N 0.000 description 3
- 239000001294 propane Substances 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 238000005304 joining Methods 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000007858 starting material Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000026683 transduction Effects 0.000 description 1
- 238000010361 transduction Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B1/00—Single-crystal growth directly from the solid state
- C30B1/10—Single-crystal growth directly from the solid state by solid state reactions or multi-phase diffusion
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/36—Carbides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02529—Silicon carbide
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02614—Transformation of metal, e.g. oxidation, nitridation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
Definitions
- the present invention relates to a method of manufacturing a single crystal SiC substrate and a single crystal SiC substrate, and more specifically, a large-sized bright crystalline single crystal with little distortion.
- the present invention relates to a method of manufacturing a single crystal SiC substrate capable of manufacturing a SiC substrate and a single crystal SiC substrate.
- Single crystal S i C (silicon carbide) is attracting attention as the next generation semiconductor device material due to its excellent thermal and chemical stability, high mechanical strength, and high radiation resistance. . In particular, it is considered promising in the technical fields of substrate materials such as blue light emitting diodes and environment resistant semiconductor devices.
- As a method of obtaining a S i C film used for such applications liquid phase growth method at a temperature of 140 ° C. or higher, or 130 ° C. on a substrate of S i C single crystal, or Vapor deposition at temperatures above C is commonly used.
- Patent Document 1 it has a surface Si layer, and a buried insulating layer (SiO 2 layer) and a Si base material layer present below the surface Si layer.
- a buried insulating layer SiO 2 layer
- Si base material layer present below the surface Si layer.
- Patent Document 1 Japanese Patent Application Laid-Open No. 200003-2 2 4 2 4 8
- Patent Document 2 Japanese Patent Application Laid-Open Publication No. 200001
- the melting point of S i is 140 ° C.
- a high temperature process of 140 ° C. or more can not be applied at all, and it is at least lower than that. It is necessary to carry out the carbonization treatment at the temperature.
- the thermal expansion coefficients of S i and S i C are different, and the softening point of S i O 2 is relatively high at around 120 ° C.
- a difference in shrinkage occurs between the base material layer and the SiC layer, and warpage can not be generated on the substrate after cooling. In this way, warpage occurs in the substrate itself, which limits the possibility of increasing the size of the substrate.
- the present invention has been made in view of the above-described circumstances, and a relatively inexpensive polycrystalline SiC substrate is used as a base substrate, and a large-size, crystalline single crystal SiC substrate with little distortion is made inexpensive. It is an object of the present invention to provide a method of manufacturing a single crystal SiC substrate that can be manufactured and a single crystal SiC substrate. Means to solve the problem
- a surface Si layer having a predetermined thickness and a buried oxide layer are formed on a Si matrix layer, Introducing P ions from the surface Si layer side, thereby transforming the embedded oxide layer into the embedded glass layer to lower the softening point;
- the SOI substrate on which the embedded glass layer is formed is heated in a hydrocarbon-based gas atmosphere to transform the surface Si layer into SiC and then cooled to form a single crystal Si C layer on the surface.
- the first summary is to provide a forming step of SiC.
- the Si base material and the surface Si layer before joining the Si base material and the Si thin plate to be the surface Si layer, the Si base material and the surface Si layer to be the bonding surface thereof.
- the embedded substrate is heated in a hydrocarbon gas atmosphere to convert the surface si layer into SiC and then cooled to form a single crystal SiC layer on the surface;
- the single crystal S i C substrate of the present invention S i between the base material layer and the single crystal S i C layer on the surface, at least softening point than S i O 2
- the gist of the present invention is that a low embedded glass layer is formed.
- the first method for producing a single crystal SiC substrate of the present invention is an SOI group. Since the embedded oxide layer of the plate is denatured into an embedded glass layer having a low softening point, heating and cooling are performed in a hydrocarbon-based gas atmosphere, the SiC layer and S formed by the carbonization treatment are performed. The embedded glass layer between the S i C layer and the S i base layer is deformed and slippage occurs between the S i base layer and the S i C layer even if there is a difference in the shrinkage ratio of the i base material layer Thus, the warpage of the entire substrate can be significantly suppressed.
- the introduction of P ions in the P ion introduction step 1 1 0 1 5-5 1 0 1 8.
- warpage of the substrate can be effectively suppressed while maintaining good crystallinity of the formed SiC layer.
- the crystallinity of the surface Si layer is determined. It is possible to maintain good quality and secure a good quality SiC layer in the carbonization process.
- the P ion introducing step is performed by ion implantation and the acceleration energy of P ion at that time is 5 to 30 ke V, Ion implantation can be performed while maintaining the crystallinity of the surface Si layer, and as a result, warpage of the substrate can be effectively suppressed.
- the manufacturing method of the second single crystal S i C substrate of the present invention S i the base material layer and the surface S i layer at least S i 0 buried glass layer is lower softening point than 2 during formation
- S i the base material layer and the surface S i layer at least S i 0 buried glass layer is lower softening point than 2 during formation
- the carbonization treatment is performed by heating and cooling in a hydrocarbon gas atmosphere.
- the single crystal SiC substrate of the present invention is a single crystal Si of the Si base layer and the surface. Since an embedded glass layer having a softening point at least lower than that of SiO 2 is formed between the C layer and the C layer, even if the carbonization treatment is performed by heating and cooling in a hydrocarbon gas atmosphere, the Si The embedded glass layer between the C layer and the S i base layer is deformed to cause a slip between the S i base layer and the S i C layer, and the warpage of the entire substrate is largely suppressed.
- FIG. 1 is a view showing a method of manufacturing a single crystal SiC substrate according to a first embodiment of the present invention.
- FIG. 2 is a view showing a method of manufacturing a single crystal SiC substrate of the first embodiment of the present invention.
- FIG. 3 is a view showing a method of manufacturing the single crystal SiC substrate.
- FIG. 4 is a view showing a method of manufacturing a single crystal SiC substrate of a second embodiment of the present invention.
- FIG. 1 and 2 are diagrams showing a method of manufacturing a single crystal SiC substrate according to a first embodiment of the present invention.
- the manufacturing method of this single crystal SiC substrate performs the following steps (1) and (2).
- (1) The surface Si layer 3 side of the SOI (Silicon On Insulator) substrate 1 in which the surface Si layer 3 and the embedded oxide layer 4 are formed in a predetermined thickness on the Si base layer 2 P ion introduction step of modifying the above-mentioned embedded oxide layer 4 into a PSG layer 6 which is a buried glass layer by introducing P ions from the above to lower the softening point.
- SOI Silicon On Insulator
- FIG. 1 (A) shows an SOI substrate 1 in which a surface Si layer 3 of a predetermined thickness and a buried oxide layer 4 are formed on the surface of the Si base layer 2.
- the SOI substrate 1, in the vicinity of the surface of the S i preform layer 2 is S i O 2 layer of a predetermined thickness as the embedded oxide layer 4 is formed, the surface S i layer 3 having a predetermined thickness is formed on the surface It is a thing.
- the thickness of the buried oxide layer 4 is set to be about 10 0 to 2 0 11 11 1.
- the surface S i layer 3 of the S O I substrate 1 is used by thinning a layer having a thickness of about 20 nm to 50 nm to 4 nm to 10 nm. This thinning can be performed, for example, by heating the SOI substrate 1 in an oxidizing atmosphere to leave a Si layer of a desired thickness near the interface with the buried oxide layer 4 from the surface of the surface Si layer 3. After oxidizing the predetermined depth, the oxide layer formed on the surface is removed by etching with hydrofluoric acid or the like to reduce the thickness.
- the thickness of the thinned surface S i layer 3 is 4 nm as described above It is preferably set to about 10 nm, and more preferably about 4 nm to 7 nm. If the thickness of the surface S i layer 3 is too thin, the single-crystal S i C layer 5 is not sufficiently formed by the subsequent transformation process which is carbonization treatment, and a good single-crystal S i C layer 7 It is because it can not form.
- the thickness of the surface S i layer 3 is too thick, then it becomes difficult to completely carbonize the single crystal S i C layer 5 when denatured by carbonization. An uncarbonized Si layer will remain at the bottom end of the C layer 5. The remaining Si layer is easily diffused to the upper Si C layer by the subsequent heat treatment, resulting in deterioration of the crystallinity. If necessary, the epitaxial growth of the single crystal Si C layer 5 is further performed. However, if the crystallinity of the single crystal Si c layer 5 as the seed layer is poor, the crystallinity is obtained even if the epitaxial growth is performed thereafter. Only a single crystal S i C layer 5 of poor quality. As such, it is extremely important to completely carbonize so that the remaining Si C layer does not occur.
- FIG. 1 (B) and 1 (C) show that the above-described SOI substrate 1 is formed with the above-mentioned buried oxide layer 4 by introducing P ions from the above-mentioned surface Si layer 3 side.
- 2 shows a P ion introduction step of denatured into phosphor silicate glass (PSG; Phospho Silicate Glass), which is a glass into which phosphorus is introduced, to form a PSG layer 6 to lower the softening point.
- PSG phosphor silicate glass
- the P ion introduction step can be performed, for example, by an ion implantation method, a plasma doping method, or the like.
- the introduced amount of P ions, ie, the dose amount in the above-described P ion introducing step is preferably 1 ⁇ 10 15 to 5 ⁇ 10 18 ions / cm 2 . If the dose amount is less than 1 ⁇ 10 15 Z cm 2 , the degree of softening of the PSG layer 6 is not sufficient, and the effect of preventing warpage of the substrate can not be sufficiently obtained. On the contrary, when the dose amount exceeds 5 ⁇ 10 18 pieces / c in 2 , the crystallinity of the surface Si layer 3 is bad. As a result, it is impossible to obtain a good-quality single-crystal Si C layer 5 with good crystallinity.
- the crystallinity of the single crystal Si C layer 5 to be formed can be made excellent. Warpage of the substrate can be effectively suppressed while maintaining it.
- the phosphorus doping amount of the P S G layer 6 it is preferable to set the phosphorus doping amount of the P S G layer 6 to about 5 to 7 atomic% by the above ion implantation. If the doping amount is less than 5 atomic%, the degree of softening of the PSG layer 6 is not sufficient, and the effect of preventing the warping of the substrate can not be sufficiently obtained. On the other hand, if the doping amount exceeds 7 atomic%, the hygroscopicity of the PSG layer 6 becomes high, and the electrical characteristics of the electronic device produced using the single crystal Si C layer 5 are significantly degraded, and the high quality and reliability It will not be possible to obtain high electronic devices.
- transduction process sets it as 200-0.50 degreeC.
- the substrate temperature is less than 200 ° C., the crystallinity of the surface Si layer 3 is reduced, and a good-quality single-crystal Si C layer 5 with good crystallinity can not be obtained.
- the substrate temperature exceeds 550 ° C.
- the Si constituting the surface Si layer 3 starts to sublime and the thickness decreases, and a single-crystal Si C layer 5 with a sufficient film thickness can be obtained. It disappears.
- the substrate temperature in the P ion introduction step to 200 ° C. to 50 ° C.
- the crystallinity of the single crystal Si C layer 5 can be maintained well and an appropriate film thickness can be secured. .
- the P ion introduction step is performed by ion implantation, it is preferable to set the acceleration energy of P ion to 5 to 30 ke V. Even if the above acceleration energy is less than 5 ke V or more than 30 ke V, the buried oxide layer 4 can be transformed into a PSG layer 6 having a sufficiently low softening point depending on the thickness of the surface Si layer 3. It is because it can not. And the acceleration energy By setting the energy to 5 to 30 ke V, it is possible to effectively suppress the warpage of the substrate while maintaining the crystalline thickness of the SiC layer appropriately. Fig.
- the above SiC formation step can be performed, for example, in a heating furnace capable of atmosphere control, by controlling the temperature while switching the atmosphere gas (hydrogen gas and hydrocarbon gas) introduced into the heating furnace. .
- the above-mentioned SOI substrate 1 is installed in the heating furnace by the above-described apparatus, and while the mixed gas of hydrogen gas and hydrocarbon-based gas is supplied to the above-mentioned heating furnace, the ambient temperature in the heating furnace is raised. Then, the surface S i layer 3 of the SOI substrate 1 is transformed into a single crystal S i C layer 5.
- the SOI substrate 1 is placed in a heating furnace to subject feed a mixed gas of hydrocarbon gas at a rate of 1 volume 0/0 to hydrogen gas into the heating furnace.
- the atmosphere temperature in the heating furnace is heated to 900 to 140 ° C. By this heating, the surface Si layer 3 of the SOI substrate 1 can be transformed into the single crystal Si C layer 5.
- the hydrogen gas is a carrier gas, and propane gas, for example, is used as the hydrocarbon gas.
- propane gas for example, is used as the hydrocarbon gas.
- the amount of hydrogen gas supplied from the cylinder is 100 cc / min
- the amount of hydrocarbon gas supplied from the cylinder is 10 c c / min.
- the surface S i layer 3 is completely carbonized by heating for a predetermined time, and a single crystal S i
- FIG. 2 (E) shows a state in which a single crystal SiC layer 5 is further grown by epitaxial growth using the single crystal SiC layer 5 formed as described above as a seed layer.
- the single crystal SiC layer 5 is grown under the following conditions.
- a substrate having a single crystal SiC layer 5 formed on the surface is disposed in a processing chamber 1, and a source gas of a methylsilane-based gas such as monomethylsilane is contained in the processing chamber 1 at a gas of about 1.O sccm.
- the single crystal Si C layer 5 is grown by epitaxial growth using the single crystal Si C layer 5 as a seed layer by processing at a temperature of 900 ° C. to 140 ° C. while supplying at a flow rate. It can be done.
- the PSG layer 6 having a low softening point between the single crystal Si C layer 5 and the Si base layer 2 also in the temperature raising and cooling in epitaxial growth of the single crystal Si C layer 5.
- the PSG layer 6 between the single crystal Si C layer 5 and the Si base layer 2 is deformed and slippage occurs between the Si base layer 2 and the single crystal Si C layer 5.
- the warpage of the entire substrate can be significantly suppressed.
- the above processing temperature can be processed in the above temperature range, but in addition to obtaining a better film quality, it is about 10 0 0 to 1 3 50 ° C in terms of equipment cost, energy cost, maintenance cost, etc. It is preferable to set to.
- the above-mentioned epitaxial growth is carried out in the above temperature range while simultaneously supplying a silane-based gas such as monosilane gas and a hydrocarbon-based gas such as propane gas into the processing chamber 1 to process the single crystal Si C layer 5. It is also possible to make it grow.
- a silane-based gas such as monosilane gas and a hydrocarbon-based gas such as propane gas
- FIG. 2F shows a state where another semiconductor film such as the GaN layer 8 is formed by epitaxial growth on the single crystal SiC layer 5 as required.
- the GaN layer 8 is grown under the following conditions.
- the substrate on which the single crystal Si C layer 5 is formed is placed in a processing chamber, and while supplying about 2 sccm of triethylgallium and about 1250 sccm of ammonia into the processing chamber, A Ga N layer 8 can be formed on the single crystal Si C layer 5 by treating at a temperature of 950 to 12000C.
- the monocrystalline SiC layer 5 and the Si base layer 2 Since the PSG layer 6 having a low softening point is interposed between them, the PSG layer 6 between the single crystal Si c layer 5 and the Si base layer 2 is deformed to form a single joint with the Si base layer 2 Slippage occurs between the crystalline S i C layers 5 and warpage of the entire substrate can be significantly suppressed.
- FIG. 3 shows the results of measuring the amounts of warpage of the substrates of the example and the comparative example.
- the SOI substrate 1 has a surface Si layer 3 thickness of 7 nm, a Si base layer 2 thickness of 75 m, a buried oxide layer 4 thickness of 160 nm and a diameter of 200 mm. Prepared.
- the buried oxide layer 4 was transformed into the PSG layer 6 by P ion implantation in the above-mentioned SOI substrate 1 and then carbonization treatment was performed.
- the acceleration energy of the ions was set to 30 ke V
- the dose amount was set to 6 ⁇ 10 15 ions / cm 2
- the substrate temperature was set to 250 ° C.
- the above-described SOI substrate 1 was carbonized without ion implantation.
- the carbonization treatment was performed by heating the substrate to 125 ° C. for 15 minutes while flowing a mixed gas at a ratio of 30 cc of propane gas and 200 cc of hydrogen gas.
- the subsequent epitaxial growth is carried out at a temperature of 1200 ° C.
- the amount of warpage was measured as follows. That is, the sample to be measured 200 mm in diameter is placed on the sample measurement table having a horizontal standard surface, and the probe of the probe type warpage measuring instrument is brought into contact with the surface of the measurement data. While scanning in the horizontal plane. At this time, the waviness appearing in the vertical plane was recorded according to the waviness on the surface of the sample to be measured, and it was measured by determining it as the amount of warpage of the whole substrate.
- the object layer 4 may be transformed into a BPSG layer.
- FIG. 4 is a view showing a method of manufacturing a single crystal SiC substrate according to a second embodiment of the present invention.
- the manufacturing method of this single crystal SiC substrate is the following steps (1) (2) (3) Do.
- glass layer forming step of forming a glass layer is lower softening point than S io 2 at least.
- the embedded substrate is heated in a hydrocarbon-based gas atmosphere to transform the surface Si layer into SiC and then cooled to form a single crystal SiC layer on the surface. Forming process.
- a glass layer having a softening point lower than at least S i 0 2 by a deposition method is applied to one surface of the S i thin plate to be the surface S i layer 3.
- various deposition methods such as chemical vapor deposition methods such as reduced pressure CVD and plasma CVD, physical vapor deposition methods such as vacuum evaporation method and sputtering method, etc. should be applied.
- chemical vapor deposition methods such as reduced pressure CVD and plasma CVD
- physical vapor deposition methods such as vacuum evaporation method and sputtering method, etc.
- the Si base material layer 2 is bonded so as to sandwich the P S G layer 6.
- the P S G layer 6 is a glass doped with phosphorus, and the doping amount of phosphorus is preferably set to about 5 to 7 atomic%. If the doping amount is less than 5 atomic%, the P SG layer
- the doping amount of phosphorus to the glass constituting the PSG layer 6 is 5 By setting the content to 7 atomic%, warpage of the substrate can be effectively suppressed while maintaining good electrical characteristics of the single crystal Si C layer 5 to be formed.
- the bonding can be performed by laminating and heating on the upper surface of the Si base material layer 2 with the surface Si layer 3 facing upward and the PSG layer 6 facing downward.
- the heating temperature at this time is approximately 850 to 950 ° C., and the heating time is approximately 30 to 60 minutes.
- FIG. 4 (C) shows a buried type substrate in which the buried type P S G layer 6 is laminated between the Si base material layer 2 and the surface Si layer 3 formed as described above.
- the thickness of the PSG layer 6 in this embedded substrate is set to a thickness of about 100 to 200 ⁇ m, and the surface Si layer 3 is previously thinned to a thickness of 4 nm to 10 nm. Is the same as that of the first embodiment described above.
- the embedded substrate is heated in a hydrocarbon-based gas atmosphere to transform the surface Si layer 3 into SiC and then cooled to form a single crystal Si C layer 5 on the surface.
- the conditions for this carbonization are the same as in the first embodiment described above.
- FIG. 4 (D) shows a buried type substrate in which the buried type P S G layer 6 is laminated between the Si base material layer 2 and the surface Si layer 3 formed as described above. Thereafter, a single crystal SiC layer 5 is grown by epitaxial growth, or another semiconductor layer such as the GaN layer 8 is stacked. The conditions for epitaxial growth are the same as in the first embodiment described above.
- PSG layer 6 which is a buried glass layer having a softening point lower than that of Si 2 at least, is formed between Si base material layer 2 and single-crystal Si 2 C layer 5 on the surface.
- the single crystal SiC substrate of the present invention can be obtained.
- the PSG layer 6 is formed on one side of the Si thin plate to be the surface Si layer 3 and then joined to the Si base layer 2.
- the PSG layer 6 is formed on one side of the Si base layer 2 Join the Si thin plate which will become the surface S i layer 3 after forming the layer 6
- the PSG layer 6 may be formed on one side of both the Si base layer 2 and the Si thin plate to be the surface Si layer 3 and then both may be joined.
- the buried PSG layer 6 is lower softening point than S i preform layer 2 and at least between the surface S i layer 3 S i O 2 was formed
- the difference in shrinkage ratio between the single crystal Si C layer 5 and the Si base layer 2 formed by the carbonization treatment is different because the carbonization treatment is performed by heating and cooling in a hydrocarbon gas atmosphere. Even if the PSG layer 6 between the single crystal Si C layer 5 and the Si base layer 2 is deformed, a slip occurs between the Si base layer 2 and the single crystal Si C layer 5, Warpage of the entire substrate can be significantly suppressed.
- the P S G layer 6 is formed by the deposition method.
- the B P S G layer borosilicate glass layer
- the present invention can be applied to the manufacture of a semiconductor substrate used for large scale integrated circuits and the like.
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US12/742,413 US8603901B2 (en) | 2007-11-19 | 2008-10-29 | Method for producing single crystal SiC substrate and single crystal SiC substrate produced by the same |
EP08852872.4A EP2216428B8 (en) | 2007-11-19 | 2008-10-29 | PROCESS FOR PRODUCING SINGLE CRYSTAL SiC SUBSTRATE |
CN200880116838.XA CN101868566B (zh) | 2007-11-19 | 2008-10-29 | 单晶SiC基板的制造方法和由其得到的单晶SiC基板 |
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JP2007298752A JP5394632B2 (ja) | 2007-11-19 | 2007-11-19 | 単結晶SiC基板の製造方法 |
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CN103392223A (zh) * | 2011-02-24 | 2013-11-13 | 信越半导体股份有限公司 | 硅基板的制造方法及硅基板 |
JP2017057102A (ja) * | 2015-09-15 | 2017-03-23 | 信越化学工業株式会社 | SiC複合基板の製造方法 |
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JP5394632B2 (ja) * | 2007-11-19 | 2014-01-22 | エア・ウォーター株式会社 | 単結晶SiC基板の製造方法 |
US9620626B2 (en) * | 2014-05-08 | 2017-04-11 | Soitec | Method for fabricating a semiconductor device including fin relaxation, and related structures |
RU2613013C1 (ru) * | 2015-12-07 | 2017-03-14 | Федеральное государственное автономное образовательное учреждение высшего образования "Санкт-Петербургский государственный электротехнический университет "ЛЭТИ" им. В.И. Ульянова (Ленина)" (СПбГЭТУ "ЛЭТИ") | Способ получения полупроводникового карбидокремниевого элемента |
DE102017101333B4 (de) | 2017-01-24 | 2023-07-27 | X-Fab Semiconductor Foundries Gmbh | Halbleiter und verfahren zur herstellung eines halbleiters |
US10510532B1 (en) * | 2018-05-29 | 2019-12-17 | Industry-University Cooperation Foundation Hanyang University | Method for manufacturing gallium nitride substrate using the multi ion implantation |
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- 2008-10-29 KR KR1020107010827A patent/KR101473209B1/ko active IP Right Grant
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Publication number | Publication date |
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CN101868566A (zh) | 2010-10-20 |
JP5394632B2 (ja) | 2014-01-22 |
EP2216428B1 (en) | 2017-06-07 |
KR101473209B1 (ko) | 2014-12-16 |
KR20100100803A (ko) | 2010-09-15 |
EP2216428B8 (en) | 2017-08-16 |
EP2216428A1 (en) | 2010-08-11 |
CN101868566B (zh) | 2012-07-18 |
US20140051235A1 (en) | 2014-02-20 |
US20100252837A1 (en) | 2010-10-07 |
US8906786B2 (en) | 2014-12-09 |
JP2009120455A (ja) | 2009-06-04 |
EP2216428A4 (en) | 2012-08-15 |
US8603901B2 (en) | 2013-12-10 |
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