WO2009060852A1 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
WO2009060852A1
WO2009060852A1 PCT/JP2008/070109 JP2008070109W WO2009060852A1 WO 2009060852 A1 WO2009060852 A1 WO 2009060852A1 JP 2008070109 W JP2008070109 W JP 2008070109W WO 2009060852 A1 WO2009060852 A1 WO 2009060852A1
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WO
WIPO (PCT)
Prior art keywords
region
layer
rear surface
peripheral region
active region
Prior art date
Application number
PCT/JP2008/070109
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English (en)
French (fr)
Inventor
Masafumi Hara
Original Assignee
Toyota Jidosha Kabushiki Kaisha
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyota Jidosha Kabushiki Kaisha filed Critical Toyota Jidosha Kabushiki Kaisha
Priority to CN2008801147519A priority Critical patent/CN101849288B/zh
Priority to EP08848331A priority patent/EP2219224B1/en
Priority to US12/741,622 priority patent/US7973363B2/en
Publication of WO2009060852A1 publication Critical patent/WO2009060852A1/ja

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H01L29/404—Multiple field plate structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/8611—Planar PN junction diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/10155—Shape being other than a cuboid

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

　オン抵抗を増大させずに周辺領域を高耐圧化した半導体装置を提供する。 　ＩＧＢＴは、ボディ領域とガードリングとコレクタ層を備える。ボディ領域は、活性領域におけるドリフト層の表層に形成されている。ガードリングは、周辺領域におけるドリフト層の表層に形成されており、ボディ領域を囲んでいる。コレクタ層は、ドリフト層の裏面側に形成されており、活性領域と周辺領域に亘って形成されている。ガードリングの裏面とドリフト層裏面との間の距離Ｆが、ボディ領域の裏面とドリフト層の裏面との間の距離よりも長い。周辺領域のコレクタ層の厚みＨが、活性領域のコレクタ層の厚みＤよりも薄い。そのような構成により、周辺領域では、活性領域に比較して、厚い半導体層へ少ないキャリアが注入される。従って、このＩＧＢＴは、周辺領域に注入されるキャリアの密度を活性領域に比較して低くすることができる。即ち、このＩＧＢＴは、活性領域のオン抵抗を増大させずに周辺領域の耐圧を向上させることができる。
PCT/JP2008/070109 2007-11-07 2008-11-05 半導体装置 WO2009060852A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN2008801147519A CN101849288B (zh) 2007-11-07 2008-11-05 半导体装置
EP08848331A EP2219224B1 (en) 2007-11-07 2008-11-05 Igbt semiconductor device
US12/741,622 US7973363B2 (en) 2007-11-07 2008-11-05 IGBT semiconductor device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-289536 2007-11-07
JP2007289536A JP4265684B1 (ja) 2007-11-07 2007-11-07 半導体装置

Publications (1)

Publication Number Publication Date
WO2009060852A1 true WO2009060852A1 (ja) 2009-05-14

Family

ID=40625740

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/070109 WO2009060852A1 (ja) 2007-11-07 2008-11-05 半導体装置

Country Status (5)

Country Link
US (1) US7973363B2 (ja)
EP (1) EP2219224B1 (ja)
JP (1) JP4265684B1 (ja)
CN (1) CN101849288B (ja)
WO (1) WO2009060852A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
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US20110175139A1 (en) * 2008-10-29 2011-07-21 Katsuyuki Torii Semiconductor device and method for manufacturing same

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JP2009194330A (ja) * 2008-02-18 2009-08-27 Mitsubishi Electric Corp 半導体装置およびその製造方法
US8159022B2 (en) * 2008-09-30 2012-04-17 Infineon Technologies Austria Ag Robust semiconductor device with an emitter zone and a field stop zone
JP5606240B2 (ja) * 2010-09-22 2014-10-15 三菱電機株式会社 半導体装置
JP5621703B2 (ja) * 2011-04-26 2014-11-12 三菱電機株式会社 半導体装置
WO2013005304A1 (ja) * 2011-07-05 2013-01-10 三菱電機株式会社 半導体装置
KR101261350B1 (ko) 2011-08-08 2013-05-06 아페리오(주) 박형 인쇄회로기판 제작을 위한 회로패턴 형성 방법
DE112012005981T5 (de) 2012-03-05 2015-04-09 Mitsubishi Electric Corporation Halbleitervorrichtung
US8618576B1 (en) * 2012-08-27 2013-12-31 Infineon Technologies Ag Semiconductor device with back side metal structure
KR101339574B1 (ko) * 2012-08-30 2013-12-10 삼성전기주식회사 절연 게이트형 바이폴라 트랜지스터
CN103715074B (zh) * 2012-09-28 2016-08-03 中国科学院微电子研究所 采用质子辐照制备终端结构的方法
CN103208531B (zh) * 2013-04-07 2015-07-15 株洲南车时代电气股份有限公司 一种快恢复二极管frd芯片及其制作方法
DE102014005879B4 (de) * 2014-04-16 2021-12-16 Infineon Technologies Ag Vertikale Halbleitervorrichtung
US9671351B2 (en) * 2014-04-24 2017-06-06 Stmicroelectronics S.R.L. Multi-sensor optical device for detecting chemical species and manufacturing method thereof
US9818837B2 (en) * 2014-12-10 2017-11-14 Semiconductor Components Industries, Llc Process of forming an electronic device having an electronic component
EP3353814B1 (en) * 2015-11-27 2019-07-10 ABB Schweiz AG Area efficient floating field ring termination
CN107425061B (zh) * 2016-05-24 2020-01-07 株洲中车时代电气股份有限公司 变掺杂阳极igbt结构及其制作方法
WO2018016029A1 (ja) * 2016-07-20 2018-01-25 三菱電機株式会社 半導体装置およびその製造方法
JP6854654B2 (ja) 2017-01-26 2021-04-07 ローム株式会社 半導体装置
JP7043750B2 (ja) * 2017-07-14 2022-03-30 株式会社デンソー ＳｉＣ－ＭＯＳＦＥＴ
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CN110676314B (zh) * 2019-10-23 2021-05-04 广东美的白色家电技术创新中心有限公司 一种绝缘栅双极型晶体管、功率模块及生活电器

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
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US8384123B2 (en) * 2008-10-29 2013-02-26 Sanken Electric Co., Ltd. Semiconductor device and method for manufacturing same

Also Published As

Publication number Publication date
US7973363B2 (en) 2011-07-05
CN101849288A (zh) 2010-09-29
EP2219224A1 (en) 2010-08-18
EP2219224B1 (en) 2012-12-26
CN101849288B (zh) 2013-02-13
JP2009117634A (ja) 2009-05-28
US20100224907A1 (en) 2010-09-09
JP4265684B1 (ja) 2009-05-20
EP2219224A4 (en) 2010-11-17

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